Update to new build system.
[clinton/Smoothieware.git] / mbed / src / vendor / NXP / capi / i2c_api.c
1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16 #include "i2c_api.h"
17
18 #if DEVICE_I2C
19
20 #include "cmsis.h"
21 #include "pinmap.h"
22 #include "error.h"
23
24 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
25 static const PinMap PinMap_I2C_SDA[] = {
26 {P0_0 , I2C_1, 3},
27 {P0_10, I2C_2, 2},
28 {P0_19, I2C_1, 3},
29 {P0_27, I2C_0, 1},
30 {NC , NC , 0}
31 };
32
33 static const PinMap PinMap_I2C_SCL[] = {
34 {P0_1 , I2C_1, 3},
35 {P0_11, I2C_2, 2},
36 {P0_20, I2C_1, 3},
37 {P0_28, I2C_0, 1},
38 {NC , NC, 0}
39 };
40
41 #define I2C_CONSET(x) (x->i2c->I2CONSET)
42 #define I2C_CONCLR(x) (x->i2c->I2CONCLR)
43 #define I2C_STAT(x) (x->i2c->I2STAT)
44 #define I2C_DAT(x) (x->i2c->I2DAT)
45 #define I2C_SCLL(x, val) (x->i2c->I2SCLL = val)
46 #define I2C_SCLH(x, val) (x->i2c->I2SCLH = val)
47
48 #elif defined(TARGET_LPC11U24)
49 static const PinMap PinMap_I2C_SDA[] = {
50 {P0_5, I2C_0, 1},
51 {NC , NC , 0}
52 };
53
54 static const PinMap PinMap_I2C_SCL[] = {
55 {P0_4, I2C_0, 1},
56 {NC , NC, 0}
57 };
58
59 #define I2C_CONSET(x) (x->i2c->CONSET)
60 #define I2C_CONCLR(x) (x->i2c->CONCLR)
61 #define I2C_STAT(x) (x->i2c->STAT)
62 #define I2C_DAT(x) (x->i2c->DAT)
63 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
64 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
65 #endif
66
67 static const uint32_t I2C_addr_offset[2][4] = {
68 {0x0C, 0x20, 0x24, 0x28},
69 {0x30, 0x34, 0x38, 0x3C}
70 };
71
72 static void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
73 I2C_CONCLR(obj) = (start << 5)
74 | (stop << 4)
75 | (interrupt << 3)
76 | (acknowledge << 2);
77 }
78
79 static void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
80 I2C_CONSET(obj) = (start << 5)
81 | (stop << 4)
82 | (interrupt << 3)
83 | (acknowledge << 2);
84 }
85
86 // Clear the Serial Interrupt (SI)
87 static void i2c_clear_SI(i2c_t *obj) {
88 i2c_conclr(obj, 0, 0, 1, 0);
89 }
90
91 static int i2c_status(i2c_t *obj) {
92 return I2C_STAT(obj);
93 }
94
95 // Wait until the Serial Interrupt (SI) is set
96 static int i2c_wait_SI(i2c_t *obj) {
97 int timeout = 0;
98 while (!(I2C_CONSET(obj) & (1 << 3))) {
99 timeout++;
100 if (timeout > 100000) return -1;
101 }
102 return 0;
103 }
104
105 static void i2c_interface_enable(i2c_t *obj) {
106 I2C_CONSET(obj) = 0x40;
107 }
108
109 static void i2c_power_enable(i2c_t *obj) {
110 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
111 switch ((int)obj->i2c) {
112 case I2C_0: LPC_SC->PCONP |= 1 << 7; break;
113 case I2C_1: LPC_SC->PCONP |= 1 << 19; break;
114 case I2C_2: LPC_SC->PCONP |= 1 << 26; break;
115 }
116 #elif defined(TARGET_LPC11U24)
117 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
118 LPC_SYSCON->PRESETCTRL |= 1 << 1;
119 #endif
120 }
121
122 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
123 // determine the SPI to use
124 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
125 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
126 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
127 obj->i2c = (LPC_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
128 #elif defined(TARGET_LPC11U24)
129 obj->i2c = (LPC_I2C_Type *)pinmap_merge(i2c_sda, i2c_scl);
130 #endif
131 if ((int)obj->i2c == NC) {
132 error("I2C pin mapping failed");
133 }
134
135 // enable power
136 i2c_power_enable(obj);
137
138 // set default frequency at 100k
139 i2c_frequency(obj, 100000);
140 i2c_conclr(obj, 1, 1, 1, 1);
141 i2c_interface_enable(obj);
142
143 pinmap_pinout(sda, PinMap_I2C_SDA);
144 pinmap_pinout(scl, PinMap_I2C_SCL);
145 }
146
147 int i2c_start(i2c_t *obj) {
148 int status;
149
150 // 8.1 Before master mode can be entered, I2CON must be initialised to:
151 // - I2EN STA STO SI AA - -
152 // - 1 0 0 0 x - -
153 // if AA = 0, it can't enter slave mode
154 i2c_conclr(obj, 1, 1, 1, 1);
155
156 // The master mode may now be entered by setting the STA bit
157 // this will generate a start condition when the bus becomes free
158 i2c_conset(obj, 1, 0, 0, 1);
159
160 i2c_wait_SI(obj);
161 status = i2c_status(obj);
162
163 // Clear start bit now transmitted, and interrupt bit
164 i2c_conclr(obj, 1, 0, 0, 0);
165
166 return status;
167 }
168
169 void i2c_stop(i2c_t *obj) {
170 // write the stop bit
171 i2c_conset(obj, 0, 1, 0, 0);
172 i2c_clear_SI(obj);
173
174 // wait for STO bit to reset
175 while(I2C_CONSET(obj) & (1 << 4));
176 }
177
178
179 static int i2c_do_write(i2c_t *obj, int value) {
180 // write the data
181 I2C_DAT(obj) = value;
182
183 // clear SI to init a send
184 i2c_clear_SI(obj);
185
186 i2c_wait_SI(obj);
187 // wait and return status
188 return i2c_status(obj);
189 }
190
191 static int i2c_do_read(i2c_t *obj, int last) {
192 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
193
194 if(last) {
195 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
196 } else {
197 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
198 }
199
200 // accept byte
201 i2c_clear_SI(obj);
202
203 // wait for it to arrive
204 i2c_wait_SI(obj);
205
206 // return the data
207 return (I2C_DAT(obj) & 0xFF);
208 }
209
210 void i2c_frequency(i2c_t *obj, int hz) {
211 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
212 // [TODO] set pclk to /4
213 uint32_t PCLK = SystemCoreClock / 4;
214 #elif defined(TARGET_LPC11U24)
215 // No peripheral clock divider on the M0
216 uint32_t PCLK = SystemCoreClock;
217 #endif
218
219 uint32_t pulse = PCLK / (hz * 2);
220
221 // I2C Rate
222 I2C_SCLL(obj, pulse);
223 I2C_SCLH(obj, pulse);
224 }
225
226 // The I2C does a read or a write as a whole operation
227 // There are two types of error conditions it can encounter
228 // 1) it can not obtain the bus
229 // 2) it gets error responses at part of the transmission
230 //
231 // We tackle them as follows:
232 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
233 // which basically turns it in to a 2)
234 // 2) on error, we use the standard error mechanisms to report/debug
235 //
236 // Therefore an I2C transaction should always complete. If it doesn't it is usually
237 // because something is setup wrong (e.g. wiring), and we don't need to programatically
238 // check for that
239
240 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
241 int count, status;
242
243 status = i2c_start(obj);
244
245 if ((status != 0x10) && (status != 0x08)) {
246 i2c_stop(obj);
247 return status;
248 }
249
250 status = i2c_do_write(obj, (address | 0x01));
251 if (status != 0x40) {
252 i2c_stop(obj);
253 return status;
254 }
255
256 // Read in all except last byte
257 for (count = 0; count < (length - 1); count++) {
258 int value = i2c_do_read(obj, 0);
259 status = i2c_status(obj);
260 if (status != 0x50) {
261 i2c_stop(obj);
262 return status;
263 }
264 data[count] = (char) value;
265 }
266
267 // read in last byte
268 int value = i2c_do_read(obj, 1);
269 status = i2c_status(obj);
270 if (status != 0x58) {
271 i2c_stop(obj);
272 return status;
273 }
274
275 data[count] = (char) value;
276
277 // If not repeated start, send stop.
278 if (stop) {
279 i2c_stop(obj);
280 }
281
282 return 0;
283 }
284
285 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
286 int i, status;
287
288 status = i2c_start(obj);
289
290 if ((status != 0x10) && (status != 0x08)) {
291 i2c_stop(obj);
292 return status;
293 }
294
295 status = i2c_do_write(obj, (address & 0xFE));
296 if (status != 0x18) {
297 i2c_stop(obj);
298 return status;
299 }
300
301 for (i=0; i<length; i++) {
302 status = i2c_do_write(obj, data[i]);
303 if(status != 0x28) {
304 i2c_stop(obj);
305 return status;
306 }
307 }
308
309 i2c_clear_SI(obj);
310
311 if (stop) {
312 i2c_stop(obj);
313 }
314
315 return 0;
316 }
317
318 void i2c_reset(i2c_t *obj) {
319 i2c_stop(obj);
320 }
321
322 int i2c_byte_read(i2c_t *obj, int last) {
323 return (i2c_do_read(obj, last) & 0xFF);
324 }
325
326 int i2c_byte_write(i2c_t *obj, int data) {
327 int ack;
328 int status = i2c_do_write(obj, (data & 0xFF));
329
330 switch(status) {
331 case 0x18: case 0x28: // Master transmit ACKs
332 ack = 1;
333 break;
334 case 0x40: // Master receive address transmitted ACK
335 ack = 1;
336 break;
337 case 0xB8: // Slave transmit ACK
338 ack = 1;
339 break;
340 default:
341 ack = 0;
342 break;
343 }
344
345 return ack;
346 }
347
348 #if DEVICE_I2CSLAVE
349 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
350 if (enable_slave != 0) {
351 i2c_conclr(obj, 1, 1, 1, 0);
352 i2c_conset(obj, 0, 0, 0, 1);
353 } else {
354 i2c_conclr(obj, 1, 1, 1, 1);
355 }
356 }
357
358 int i2c_slave_receive(i2c_t *obj) {
359 int status;
360 int retval;
361
362 status = i2c_status(obj);
363 switch(status) {
364 case 0x60: retval = 3; break;
365 case 0x70: retval = 2; break;
366 case 0xA8: retval = 1; break;
367 default : retval = 0; break;
368 }
369
370 return(retval);
371 }
372
373 int i2c_slave_read(i2c_t *obj, char *data, int length) {
374 int count = 0;
375 int status;
376
377 do {
378 i2c_clear_SI(obj);
379 i2c_wait_SI(obj);
380 status = i2c_status(obj);
381 if((status == 0x80) || (status == 0x90)) {
382 data[count] = I2C_DAT(obj) & 0xFF;
383 }
384 count++;
385 } while (((status == 0x80) || (status == 0x90) ||
386 (status == 0x060) || (status == 0x70)) && (count < length));
387
388 if(status != 0xA0) {
389 i2c_stop(obj);
390 }
391
392 i2c_clear_SI(obj);
393
394 return (count - 1);
395 }
396
397 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
398 int count = 0;
399 int status;
400
401 if(length <= 0) {
402 return(0);
403 }
404
405 do {
406 status = i2c_do_write(obj, data[count]);
407 count++;
408 } while ((count < length) && (status == 0xB8));
409
410 if((status != 0xC0) && (status != 0xC8)) {
411 i2c_stop(obj);
412 }
413
414 i2c_clear_SI(obj);
415
416 return(count);
417 }
418
419 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
420 uint32_t addr;
421
422 if ((idx >= 0) && (idx <= 3)) {
423 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
424 *((uint32_t *) addr) = address & 0xFF;
425 #ifdef TARGET_LPC1768
426 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[1][idx];
427 *((uint32_t *) addr) = mask & 0xFE;
428 #endif
429 }
430 }
431 #endif
432
433 #endif