1 /* mbed Microcontroller Library
2 * Copyright (c) 2006-2013 ARM Limited
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
24 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
25 static const PinMap PinMap_I2C_SDA
[] = {
33 static const PinMap PinMap_I2C_SCL
[] = {
41 #define I2C_CONSET(x) (x->i2c->I2CONSET)
42 #define I2C_CONCLR(x) (x->i2c->I2CONCLR)
43 #define I2C_STAT(x) (x->i2c->I2STAT)
44 #define I2C_DAT(x) (x->i2c->I2DAT)
45 #define I2C_SCLL(x, val) (x->i2c->I2SCLL = val)
46 #define I2C_SCLH(x, val) (x->i2c->I2SCLH = val)
48 #elif defined(TARGET_LPC11U24)
49 static const PinMap PinMap_I2C_SDA
[] = {
54 static const PinMap PinMap_I2C_SCL
[] = {
59 #define I2C_CONSET(x) (x->i2c->CONSET)
60 #define I2C_CONCLR(x) (x->i2c->CONCLR)
61 #define I2C_STAT(x) (x->i2c->STAT)
62 #define I2C_DAT(x) (x->i2c->DAT)
63 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
64 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
67 static const uint32_t I2C_addr_offset
[2][4] = {
68 {0x0C, 0x20, 0x24, 0x28},
69 {0x30, 0x34, 0x38, 0x3C}
72 static void i2c_conclr(i2c_t
*obj
, int start
, int stop
, int interrupt
, int acknowledge
) {
73 I2C_CONCLR(obj
) = (start
<< 5)
79 static void i2c_conset(i2c_t
*obj
, int start
, int stop
, int interrupt
, int acknowledge
) {
80 I2C_CONSET(obj
) = (start
<< 5)
86 // Clear the Serial Interrupt (SI)
87 static void i2c_clear_SI(i2c_t
*obj
) {
88 i2c_conclr(obj
, 0, 0, 1, 0);
91 static int i2c_status(i2c_t
*obj
) {
95 // Wait until the Serial Interrupt (SI) is set
96 static int i2c_wait_SI(i2c_t
*obj
) {
98 while (!(I2C_CONSET(obj
) & (1 << 3))) {
100 if (timeout
> 100000) return -1;
105 static void i2c_interface_enable(i2c_t
*obj
) {
106 I2C_CONSET(obj
) = 0x40;
109 static void i2c_power_enable(i2c_t
*obj
) {
110 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
111 switch ((int)obj
->i2c
) {
112 case I2C_0
: LPC_SC
->PCONP
|= 1 << 7; break;
113 case I2C_1
: LPC_SC
->PCONP
|= 1 << 19; break;
114 case I2C_2
: LPC_SC
->PCONP
|= 1 << 26; break;
116 #elif defined(TARGET_LPC11U24)
117 LPC_SYSCON
->SYSAHBCLKCTRL
|= (1 << 5);
118 LPC_SYSCON
->PRESETCTRL
|= 1 << 1;
122 void i2c_init(i2c_t
*obj
, PinName sda
, PinName scl
) {
123 // determine the SPI to use
124 I2CName i2c_sda
= (I2CName
)pinmap_peripheral(sda
, PinMap_I2C_SDA
);
125 I2CName i2c_scl
= (I2CName
)pinmap_peripheral(scl
, PinMap_I2C_SCL
);
126 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
127 obj
->i2c
= (LPC_I2C_TypeDef
*)pinmap_merge(i2c_sda
, i2c_scl
);
128 #elif defined(TARGET_LPC11U24)
129 obj
->i2c
= (LPC_I2C_Type
*)pinmap_merge(i2c_sda
, i2c_scl
);
131 if ((int)obj
->i2c
== NC
) {
132 error("I2C pin mapping failed");
136 i2c_power_enable(obj
);
138 // set default frequency at 100k
139 i2c_frequency(obj
, 100000);
140 i2c_conclr(obj
, 1, 1, 1, 1);
141 i2c_interface_enable(obj
);
143 pinmap_pinout(sda
, PinMap_I2C_SDA
);
144 pinmap_pinout(scl
, PinMap_I2C_SCL
);
147 int i2c_start(i2c_t
*obj
) {
150 // 8.1 Before master mode can be entered, I2CON must be initialised to:
151 // - I2EN STA STO SI AA - -
153 // if AA = 0, it can't enter slave mode
154 i2c_conclr(obj
, 1, 1, 1, 1);
156 // The master mode may now be entered by setting the STA bit
157 // this will generate a start condition when the bus becomes free
158 i2c_conset(obj
, 1, 0, 0, 1);
161 status
= i2c_status(obj
);
163 // Clear start bit now transmitted, and interrupt bit
164 i2c_conclr(obj
, 1, 0, 0, 0);
169 void i2c_stop(i2c_t
*obj
) {
170 // write the stop bit
171 i2c_conset(obj
, 0, 1, 0, 0);
174 // wait for STO bit to reset
175 while(I2C_CONSET(obj
) & (1 << 4));
179 static int i2c_do_write(i2c_t
*obj
, int value
) {
181 I2C_DAT(obj
) = value
;
183 // clear SI to init a send
187 // wait and return status
188 return i2c_status(obj
);
191 static int i2c_do_read(i2c_t
*obj
, int last
) {
192 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
195 i2c_conclr(obj
, 0, 0, 0, 1); // send a NOT ACK
197 i2c_conset(obj
, 0, 0, 0, 1); // send a ACK
203 // wait for it to arrive
207 return (I2C_DAT(obj
) & 0xFF);
210 void i2c_frequency(i2c_t
*obj
, int hz
) {
211 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
212 // [TODO] set pclk to /4
213 uint32_t PCLK
= SystemCoreClock
/ 4;
214 #elif defined(TARGET_LPC11U24)
215 // No peripheral clock divider on the M0
216 uint32_t PCLK
= SystemCoreClock
;
219 uint32_t pulse
= PCLK
/ (hz
* 2);
222 I2C_SCLL(obj
, pulse
);
223 I2C_SCLH(obj
, pulse
);
226 // The I2C does a read or a write as a whole operation
227 // There are two types of error conditions it can encounter
228 // 1) it can not obtain the bus
229 // 2) it gets error responses at part of the transmission
231 // We tackle them as follows:
232 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
233 // which basically turns it in to a 2)
234 // 2) on error, we use the standard error mechanisms to report/debug
236 // Therefore an I2C transaction should always complete. If it doesn't it is usually
237 // because something is setup wrong (e.g. wiring), and we don't need to programatically
240 int i2c_read(i2c_t
*obj
, int address
, char *data
, int length
, int stop
) {
243 status
= i2c_start(obj
);
245 if ((status
!= 0x10) && (status
!= 0x08)) {
250 status
= i2c_do_write(obj
, (address
| 0x01));
251 if (status
!= 0x40) {
256 // Read in all except last byte
257 for (count
= 0; count
< (length
- 1); count
++) {
258 int value
= i2c_do_read(obj
, 0);
259 status
= i2c_status(obj
);
260 if (status
!= 0x50) {
264 data
[count
] = (char) value
;
268 int value
= i2c_do_read(obj
, 1);
269 status
= i2c_status(obj
);
270 if (status
!= 0x58) {
275 data
[count
] = (char) value
;
277 // If not repeated start, send stop.
285 int i2c_write(i2c_t
*obj
, int address
, const char *data
, int length
, int stop
) {
288 status
= i2c_start(obj
);
290 if ((status
!= 0x10) && (status
!= 0x08)) {
295 status
= i2c_do_write(obj
, (address
& 0xFE));
296 if (status
!= 0x18) {
301 for (i
=0; i
<length
; i
++) {
302 status
= i2c_do_write(obj
, data
[i
]);
318 void i2c_reset(i2c_t
*obj
) {
322 int i2c_byte_read(i2c_t
*obj
, int last
) {
323 return (i2c_do_read(obj
, last
) & 0xFF);
326 int i2c_byte_write(i2c_t
*obj
, int data
) {
328 int status
= i2c_do_write(obj
, (data
& 0xFF));
331 case 0x18: case 0x28: // Master transmit ACKs
334 case 0x40: // Master receive address transmitted ACK
337 case 0xB8: // Slave transmit ACK
349 void i2c_slave_mode(i2c_t
*obj
, int enable_slave
) {
350 if (enable_slave
!= 0) {
351 i2c_conclr(obj
, 1, 1, 1, 0);
352 i2c_conset(obj
, 0, 0, 0, 1);
354 i2c_conclr(obj
, 1, 1, 1, 1);
358 int i2c_slave_receive(i2c_t
*obj
) {
362 status
= i2c_status(obj
);
364 case 0x60: retval
= 3; break;
365 case 0x70: retval
= 2; break;
366 case 0xA8: retval
= 1; break;
367 default : retval
= 0; break;
373 int i2c_slave_read(i2c_t
*obj
, char *data
, int length
) {
380 status
= i2c_status(obj
);
381 if((status
== 0x80) || (status
== 0x90)) {
382 data
[count
] = I2C_DAT(obj
) & 0xFF;
385 } while (((status
== 0x80) || (status
== 0x90) ||
386 (status
== 0x060) || (status
== 0x70)) && (count
< length
));
397 int i2c_slave_write(i2c_t
*obj
, const char *data
, int length
) {
406 status
= i2c_do_write(obj
, data
[count
]);
408 } while ((count
< length
) && (status
== 0xB8));
410 if((status
!= 0xC0) && (status
!= 0xC8)) {
419 void i2c_slave_address(i2c_t
*obj
, int idx
, uint32_t address
, uint32_t mask
) {
422 if ((idx
>= 0) && (idx
<= 3)) {
423 addr
= ((uint32_t)obj
->i2c
) + I2C_addr_offset
[0][idx
];
424 *((uint32_t *) addr
) = address
& 0xFF;
425 #ifdef TARGET_LPC1768
426 addr
= ((uint32_t)obj
->i2c
) + I2C_addr_offset
[1][idx
];
427 *((uint32_t *) addr
) = mask
& 0xFE;