4 // Originally by David Raingeard (Cal2)
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
6 // Cleanups and endian wrongness amelioration by James Hammons
7 // Note: Endian wrongness probably stems from the MAME origins of this emu and
8 // the braindead way in which MAME handled memory when this was written. :-)
10 // JLH = James Hammons
13 // --- ---------- -----------------------------------------------------------
14 // JLH 11/25/2009 Major rewrite of memory subsystem and handlers
22 #include "SDL_opengl.h"
34 #include "m68000/m68kinterface.h"
40 //#include "debugger/brkWin.h"
44 //Do this in makefile??? Yes! Could, but it's easier to define here...
45 //#define LOG_UNMAPPED_MEMORY_ACCESSES
46 //#define ABORT_ON_UNMAPPED_MEMORY_ACCESS
47 //#define ABORT_ON_ILLEGAL_INSTRUCTIONS
48 //#define ABORT_ON_OFFICIAL_ILLEGAL_INSTRUCTION
49 #define CPU_DEBUG_MEMORY
50 //#define LOG_CD_BIOS_CALLS
51 #define CPU_DEBUG_TRACING
52 #define ALPINE_FUNCTIONS
54 // Private function prototypes
56 unsigned jaguar_unknown_readbyte(unsigned address
, uint32_t who
= UNKNOWN
);
57 unsigned jaguar_unknown_readword(unsigned address
, uint32_t who
= UNKNOWN
);
58 void jaguar_unknown_writebyte(unsigned address
, unsigned data
, uint32_t who
= UNKNOWN
);
59 void jaguar_unknown_writeword(unsigned address
, unsigned data
, uint32_t who
= UNKNOWN
);
60 void M68K_show_context(void);
62 void M68K_Debughalt(void);
67 #ifdef CPU_DEBUG_MEMORY
68 extern bool startMemLog
; // Set by "e" key
69 extern int effect_start
;
70 extern int effect_start2
, effect_start3
, effect_start4
, effect_start5
, effect_start6
;
73 // Really, need to include memory.h for this, but it might interfere with some stuff...
74 extern uint8_t jagMemSpace
[];
78 uint32_t jaguar_active_memory_dumps
= 0;
80 uint32_t jaguarMainROMCRC32
, jaguarROMSize
, jaguarRunAddress
;
81 bool jaguarCartInserted
= false;
82 bool lowerField
= false;
84 #ifdef CPU_DEBUG_MEMORY
85 uint8_t writeMemMax
[0x400000], writeMemMin
[0x400000];
86 uint8_t readMem
[0x400000];
87 uint32_t returnAddr
[4000], raPtr
= 0xFFFFFFFF;
90 uint32_t pcQueue
[0x400];
91 uint32_t a0Queue
[0x400];
92 uint32_t a1Queue
[0x400];
93 uint32_t a2Queue
[0x400];
94 uint32_t a3Queue
[0x400];
95 uint32_t a4Queue
[0x400];
96 uint32_t a5Queue
[0x400];
97 uint32_t a6Queue
[0x400];
98 uint32_t a7Queue
[0x400];
99 uint32_t d0Queue
[0x400];
100 uint32_t d1Queue
[0x400];
101 uint32_t d2Queue
[0x400];
102 uint32_t d3Queue
[0x400];
103 uint32_t d4Queue
[0x400];
104 uint32_t d5Queue
[0x400];
105 uint32_t d6Queue
[0x400];
106 uint32_t d7Queue
[0x400];
107 uint32_t srQueue
[0x400];
109 bool startM68KTracing
= false;
111 // Breakpoint on memory access vars (exported)
112 bool bpmActive
= false;
113 bool bpmSaveActive
= false;
114 uint32_t bpmAddress1
;
119 // Callback function to detect illegal instructions
121 void GPUDumpDisassembly(void);
122 void GPUDumpRegisters(void);
123 static bool start
= false;
125 void M68KInstructionHook(void)
127 uint32_t m68kPC
= m68k_get_reg(NULL
, M68K_REG_PC
);
128 // Temp, for comparing...
130 /* static char buffer[2048];//, mem[64];
131 m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
132 printf("%08X: %s\n", m68kPC, buffer);//*/
134 //JaguarDasm(m68kPC, 1);
135 //Testing Hover Strike...
138 static int hitCount
= 0;
139 static int inRoutine
= 0;
142 //if (regs.pc == 0x80340A)
143 if (m68kPC
== 0x803416)
148 printf("%i: $80340A start. A0=%08X, A1=%08X ", hitCount
, m68k_get_reg(NULL
, M68K_REG_A0
), m68k_get_reg(NULL
, M68K_REG_A1
));
150 else if (m68kPC
== 0x803422)
153 printf("(%i instructions)\n", instSeen
);
160 // For code tracing...
161 #ifdef CPU_DEBUG_TRACING
162 if (startM68KTracing
)
164 static char buffer
[2048];
166 m68k_disassemble(buffer
, m68kPC
, 0, 1);
167 WriteLog("%06X: %s\n", m68kPC
, buffer
);
172 // Ideally, we'd save all the registers as well...
173 pcQueue
[pcQPtr
] = m68kPC
;
174 a0Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_A0
);
175 a1Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_A1
);
176 a2Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_A2
);
177 a3Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_A3
);
178 a4Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_A4
);
179 a5Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_A5
);
180 a6Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_A6
);
181 a7Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_A7
);
182 d0Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_D0
);
183 d1Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_D1
);
184 d2Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_D2
);
185 d3Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_D3
);
186 d4Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_D4
);
187 d5Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_D5
);
188 d6Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_D6
);
189 d7Queue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_D7
);
190 srQueue
[pcQPtr
] = m68k_get_reg(NULL
, M68K_REG_SR
);
194 if (m68kPC
& 0x01) // Oops! We're fetching an odd address!
196 WriteLog("M68K: Attempted to execute from an odd address!\n\nBacktrace:\n\n");
198 static char buffer
[2048];
199 for(int i
=0; i
<0x400; i
++)
201 // WriteLog("[A2=%08X, D0=%08X]\n", a2Queue[(pcQPtr + i) & 0x3FF], d0Queue[(pcQPtr + i) & 0x3FF]);
202 WriteLog("[A0=%08X, A1=%08X, A2=%08X, A3=%08X, A4=%08X, A5=%08X, A6=%08X, A7=%08X, D0=%08X, D1=%08X, D2=%08X, D3=%08X, D4=%08X, D5=%08X, D6=%08X, D7=%08X, SR=%04X]\n", a0Queue
[(pcQPtr
+ i
) & 0x3FF], a1Queue
[(pcQPtr
+ i
) & 0x3FF], a2Queue
[(pcQPtr
+ i
) & 0x3FF], a3Queue
[(pcQPtr
+ i
) & 0x3FF], a4Queue
[(pcQPtr
+ i
) & 0x3FF], a5Queue
[(pcQPtr
+ i
) & 0x3FF], a6Queue
[(pcQPtr
+ i
) & 0x3FF], a7Queue
[(pcQPtr
+ i
) & 0x3FF], d0Queue
[(pcQPtr
+ i
) & 0x3FF], d1Queue
[(pcQPtr
+ i
) & 0x3FF], d2Queue
[(pcQPtr
+ i
) & 0x3FF], d3Queue
[(pcQPtr
+ i
) & 0x3FF], d4Queue
[(pcQPtr
+ i
) & 0x3FF], d5Queue
[(pcQPtr
+ i
) & 0x3FF], d6Queue
[(pcQPtr
+ i
) & 0x3FF], d7Queue
[(pcQPtr
+ i
) & 0x3FF], srQueue
[(pcQPtr
+ i
) & 0x3FF]);
203 m68k_disassemble(buffer
, pcQueue
[(pcQPtr
+ i
) & 0x3FF], 0, 1);//M68K_CPU_TYPE_68000);
204 WriteLog("\t%08X: %s\n", pcQueue
[(pcQPtr
+ i
) & 0x3FF], buffer
);
208 uint32_t topOfStack
= m68k_get_reg(NULL
, M68K_REG_A7
);
209 WriteLog("M68K: Top of stack: %08X. Stack trace:\n", JaguarReadLong(topOfStack
));
210 for(int i
=0; i
<10; i
++)
211 WriteLog("%06X: %08X\n", topOfStack
- (i
* 4), JaguarReadLong(topOfStack
- (i
* 4)));
212 WriteLog("Jaguar: VBL interrupt is %s\n", ((TOMIRQEnabled(IRQ_VIDEO
)) && (JaguarInterruptHandlerIsValid(64))) ? "enabled" : "disabled");
218 // Disassemble everything
220 static char buffer[2048];
221 m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
222 WriteLog("%08X: %s", m68kPC, buffer);
223 WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n",
224 m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
225 m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1));
227 /* if (m68kPC >= 0x807EC4 && m68kPC <= 0x807EDB)
229 static char buffer[2048];
230 m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
231 WriteLog("%08X: %s", m68kPC, buffer);
232 WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n",
233 m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
234 m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1));
236 /* if (m68kPC == 0x8D0E48 && effect_start5)
238 WriteLog("\nM68K: At collision detection code. Exiting!\n\n");
240 GPUDumpDisassembly();
244 /* uint16_t opcode = JaguarReadWord(m68kPC);
245 if (opcode == 0x4E75) // RTS
248 // WriteLog("Jaguar: Returning from subroutine to %08X\n", JaguarReadLong(m68k_get_reg(NULL, M68K_REG_A7)));
250 uint32_t addr = JaguarReadLong(m68k_get_reg(NULL, M68K_REG_A7));
252 if (raPtr != 0xFFFFFFFF)
254 for(uint32_t i=0; i<=raPtr; i++)
256 if (returnAddr[i] == addr)
265 returnAddr[++raPtr] = addr;
269 //Flip Out! debugging...
272 00805FDC: movea.l #$9c6f8, A0 D0=00100010, A0=00100000
273 00805FE2: move.w #$10, (A0)+ D0=00100010, A0=0009C6F8
274 00805FE6: cmpa.l #$c96f8, A0 D0=00100010, A0=0009C6FA
275 00805FEC: bne 805fe2 D0=00100010, A0=0009C6FA
277 0080603A: move.l #$11ed7c, $100.w D0=61700080, A0=000C96F8, D1=00000000, A1=000040D8
279 0012314C: move.l (A0)+, (A1)+ D0=61700080, A0=00124174, D1=00000000, A1=00F03FFC
280 0012314E: cmpa.l #$f04000, A1 D0=61700080, A0=00124178, D1=00000000, A1=00F04000
281 00123154: blt 12314c D0=61700080, A0=00124178, D1=00000000, A1=00F04000
282 00123156: move.l #$0, $f035d0.l D0=61700080, A0=00124178, D1=00000000, A1=00F04000
283 00123160: move.l #$f03000, $f02110.l D0=61700080, A0=00124178, D1=00000000, A1=00F04000
284 0012316A: move.l #$1, $f02114.l D0=61700080, A0=00124178, D1=00000000, A1=00F04000
285 00123174: rts D0=61700080, A0=00124178, D1=00000000, A1=00F04000
287 /* static char buffer[2048];
288 //if (m68kPC > 0x805F48) start = true;
289 //if (m68kPC > 0x806486) start = true;
290 //if (m68kPC == 0x805FEE) start = true;
291 //if (m68kPC == 0x80600C)// start = true;
292 if (m68kPC == 0x802058) start = true;
294 // GPUDumpRegisters();
295 // GPUDumpDisassembly();
297 // M68K_show_context();
303 m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
304 WriteLog("%08X: %s \t\tD0=%08X, A0=%08X, D1=%08X, A1=%08X\n", m68kPC, buffer, m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_A1));
307 /* if (m68kPC == 0x803F16)
309 WriteLog("M68K: Registers found at $803F16:\n");
310 WriteLog("\t68K PC=%06X\n", m68k_get_reg(NULL, M68K_REG_PC));
311 for(int i=M68K_REG_D0; i<=M68K_REG_D7; i++)
312 WriteLog("\tD%i = %08X\n", i-M68K_REG_D0, m68k_get_reg(NULL, (m68k_register_t)i));
314 for(int i=M68K_REG_A0; i<=M68K_REG_A7; i++)
315 WriteLog("\tA%i = %08X\n", i-M68K_REG_A0, m68k_get_reg(NULL, (m68k_register_t)i));
317 //Looks like the DSP is supposed to return $12345678 when it finishes its validation routine...
318 // !!! Investigate !!!
319 /*extern bool doDSPDis;
320 static bool disgo = false;
321 if (m68kPC == 0x50222)
324 // WriteLog("M68K: About to stuff $12345678 into $F1B000 (=%08X)...\n", DSPReadLong(0xF1B000, M68K));
325 // DSPWriteLong(0xF1B000, 0x12345678, M68K);
328 if (m68kPC == 0x5000)
333 static char buffer[2048];
334 m68k_disassemble(buffer, m68kPC, M68K_CPU_TYPE_68000);
335 WriteLog("%08X: %s", m68kPC, buffer);
336 WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X, D2=%08X\n",
337 m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
338 m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_D2));
340 /* if (m68kPC == 0x82E1A)
342 static char buffer[2048];
343 m68k_disassemble(buffer, m68kPC, 0);//M68K_CPU_TYPE_68000);
344 WriteLog("--> [Routine start] %08X: %s", m68kPC, buffer);
345 WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X(cmd), D1=%08X(# bytes), D2=%08X\n",
346 m68k_get_reg(NULL, M68K_REG_A0), m68k_get_reg(NULL, M68K_REG_A1),
347 m68k_get_reg(NULL, M68K_REG_D0), m68k_get_reg(NULL, M68K_REG_D1), m68k_get_reg(NULL, M68K_REG_D2));
349 /* if (m68kPC == 0x82E58)
350 WriteLog("--> [Routine end]\n");
351 if (m68kPC == 0x80004)
353 WriteLog("--> [Calling BusWrite2] D2: %08X\n", m68k_get_reg(NULL, M68K_REG_D2));
354 // m68k_set_reg(M68K_REG_D2, 0x12345678);
357 #ifdef LOG_CD_BIOS_CALLS
380 if (m68kPC
== 0x3000)
381 WriteLog("M68K: CD_init\n");
382 else if (m68kPC
== 0x3006 + (6 * 0))
383 WriteLog("M68K: CD_mode\n");
384 else if (m68kPC
== 0x3006 + (6 * 1))
385 WriteLog("M68K: CD_ack\n");
386 else if (m68kPC
== 0x3006 + (6 * 2))
387 WriteLog("M68K: CD_jeri\n");
388 else if (m68kPC
== 0x3006 + (6 * 3))
389 WriteLog("M68K: CD_spin\n");
390 else if (m68kPC
== 0x3006 + (6 * 4))
391 WriteLog("M68K: CD_stop\n");
392 else if (m68kPC
== 0x3006 + (6 * 5))
393 WriteLog("M68K: CD_mute\n");
394 else if (m68kPC
== 0x3006 + (6 * 6))
395 WriteLog("M68K: CD_umute\n");
396 else if (m68kPC
== 0x3006 + (6 * 7))
397 WriteLog("M68K: CD_paus\n");
398 else if (m68kPC
== 0x3006 + (6 * 8))
399 WriteLog("M68K: CD_upaus\n");
400 else if (m68kPC
== 0x3006 + (6 * 9))
401 WriteLog("M68K: CD_read\n");
402 else if (m68kPC
== 0x3006 + (6 * 10))
403 WriteLog("M68K: CD_uread\n");
404 else if (m68kPC
== 0x3006 + (6 * 11))
405 WriteLog("M68K: CD_setup\n");
406 else if (m68kPC
== 0x3006 + (6 * 12))
407 WriteLog("M68K: CD_ptr\n");
408 else if (m68kPC
== 0x3006 + (6 * 13))
409 WriteLog("M68K: CD_osamp\n");
410 else if (m68kPC
== 0x3006 + (6 * 14))
411 WriteLog("M68K: CD_getoc\n");
412 else if (m68kPC
== 0x3006 + (6 * 15))
413 WriteLog("M68K: CD_initm\n");
414 else if (m68kPC
== 0x3006 + (6 * 16))
415 WriteLog("M68K: CD_initf\n");
416 else if (m68kPC
== 0x3006 + (6 * 17))
417 WriteLog("M68K: CD_switch\n");
419 if (m68kPC
>= 0x3000 && m68kPC
<= 0x306C)
420 WriteLog("\t\tA0=%08X, A1=%08X, D0=%08X, D1=%08X, D2=%08X\n",
421 m68k_get_reg(NULL
, M68K_REG_A0
), m68k_get_reg(NULL
, M68K_REG_A1
),
422 m68k_get_reg(NULL
, M68K_REG_D0
), m68k_get_reg(NULL
, M68K_REG_D1
), m68k_get_reg(NULL
, M68K_REG_D2
));
425 #ifdef ABORT_ON_ILLEGAL_INSTRUCTIONS
426 if (!m68k_is_valid_instruction(m68k_read_memory_16(m68kPC
), 0))//M68K_CPU_TYPE_68000))
428 #ifndef ABORT_ON_OFFICIAL_ILLEGAL_INSTRUCTION
429 if (m68k_read_memory_16(m68kPC
) == 0x4AFC)
431 // This is a kludge to let homebrew programs work properly (i.e., let the other processors
432 // keep going even when the 68K dumped back to the debugger or what have you).
434 // m68k_set_reg(M68K_REG_PC, m68kPC - 2);
435 // Try setting the vector to the illegal instruction...
436 //This doesn't work right either! Do something else! Quick!
437 // SET32(jaguar_mainRam, 0x10, m68kPC);
443 WriteLog("\nM68K encountered an illegal instruction at %08X!!!\n\nAborting!\n", m68kPC
);
444 uint32_t topOfStack
= m68k_get_reg(NULL
, M68K_REG_A7
);
445 WriteLog("M68K: Top of stack: %08X. Stack trace:\n", JaguarReadLong(topOfStack
));
446 uint32_t address
= topOfStack
- (4 * 4 * 3);
448 for(int i
=0; i
<10; i
++)
450 WriteLog("%06X:", address
);
452 for(int j
=0; j
<4; j
++)
454 WriteLog(" %08X", JaguarReadLong(address
));
461 WriteLog("Jaguar: VBL interrupt is %s\n", ((TOMIRQEnabled(IRQ_VIDEO
)) && (JaguarInterruptHandlerIsValid(64))) ? "enabled" : "disabled");
465 // WriteLog("\n\n68K disasm\n\n");
466 // jaguar_dasm(0x802000, 0x50C);
477 Now here be dragons
...
478 Here is how memory ranges are defined in the CoJag driver
.
479 Note that we only have to be concerned with
3 entities read
/writing anything
:
480 The main CPU
, the GPU
, and the DSP
. Everything
else is unnecessary
. So we can keep our main memory
481 checking in jaguar
.cpp
, gpu
.cpp
and dsp
.cpp
. There should be NO checking in TOM
, JERRY
, etc
. other than
482 things that are entirely internal to those modules
. This way we should be able to get a handle on all
483 this crap which is currently scattered over Hell
's Half Acre(tm).
485 Also: We need to distinguish whether or not we need .b, .w, and .dw versions of everything, or if there
486 is a good way to collapse that shit (look below for inspiration). Current method works, but is error prone.
488 /*************************************
490 * Main CPU memory handlers
492 *************************************/
494 static ADDRESS_MAP_START( m68020_map, ADDRESS_SPACE_PROGRAM, 32 )
495 AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_BASE(&jaguar_shared_ram) AM_SHARE(1)
496 AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION(REGION_USER1, 0) AM_BASE(&rom_base)
497 AM_RANGE(0xa00000, 0xa1ffff) AM_RAM
498 AM_RANGE(0xa20000, 0xa21fff) AM_READWRITE(eeprom_data_r, eeprom_data_w) AM_BASE(&generic_nvram32) AM_SIZE(&generic_nvram_size)
499 AM_RANGE(0xa30000, 0xa30003) AM_WRITE(watchdog_reset32_w)
500 AM_RANGE(0xa40000, 0xa40003) AM_WRITE(eeprom_enable_w)
501 AM_RANGE(0xb70000, 0xb70003) AM_READWRITE(misc_control_r, misc_control_w)
502 AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(2)
503 AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE(IDE_CONTROLLER, "ide", ide_controller32_r, ide_controller32_w)
504 AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w)
505 AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_BASE(&jaguar_gpu_clut) AM_SHARE(2)
506 AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w)
507 AM_RANGE(0xf02200, 0xf022ff) AM_READWRITE(jaguar_blitter_r, jaguar_blitter_w)
508 AM_RANGE(0xf03000, 0xf03fff) AM_MIRROR(0x008000) AM_RAM AM_BASE(&jaguar_gpu_ram) AM_SHARE(3)
509 AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w)
510 AM_RANGE(0xf16000, 0xf1600b) AM_READ(cojag_gun_input_r) // GPI02
511 AM_RANGE(0xf17000, 0xf17003) AM_READ(status_r) // GPI03
512 // AM_RANGE(0xf17800, 0xf17803) AM_WRITE(latch_w) // GPI04
513 AM_RANGE(0xf17c00, 0xf17c03) AM_READ(jamma_r) // GPI05
514 AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w)
515 AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r, jaguar_serial_w)
516 AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_BASE(&jaguar_dsp_ram) AM_SHARE(4)
519 /*************************************
521 * GPU memory handlers
523 *************************************/
525 static ADDRESS_MAP_START( gpu_map, ADDRESS_SPACE_PROGRAM, 32 )
526 AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1)
527 AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK(8)
528 AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(9)
529 AM_RANGE(0xe00000, 0xe003ff) AM_DEVREADWRITE(IDE_CONTROLLER, "ide", ide_controller32_r, ide_controller32_w)
530 AM_RANGE(0xf00000, 0xf003ff) AM_READWRITE(jaguar_tom_regs32_r, jaguar_tom_regs32_w)
531 AM_RANGE(0xf00400, 0xf007ff) AM_RAM AM_SHARE(2)
532 AM_RANGE(0xf02100, 0xf021ff) AM_READWRITE(gpuctrl_r, gpuctrl_w)
533 AM_RANGE(0xf02200, 0xf022ff) AM_READWRITE(jaguar_blitter_r, jaguar_blitter_w)
534 AM_RANGE(0xf03000, 0xf03fff) AM_RAM AM_SHARE(3)
535 AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w)
538 /*************************************
540 * DSP memory handlers
542 *************************************/
544 static ADDRESS_MAP_START( dsp_map, ADDRESS_SPACE_PROGRAM, 32 )
545 AM_RANGE(0x000000, 0x7fffff) AM_RAM AM_SHARE(1)
546 AM_RANGE(0x800000, 0xbfffff) AM_ROMBANK(8)
547 AM_RANGE(0xc00000, 0xdfffff) AM_ROMBANK(9)
548 AM_RANGE(0xf10000, 0xf103ff) AM_READWRITE(jaguar_jerry_regs32_r, jaguar_jerry_regs32_w)
549 AM_RANGE(0xf1a100, 0xf1a13f) AM_READWRITE(dspctrl_r, dspctrl_w)
550 AM_RANGE(0xf1a140, 0xf1a17f) AM_READWRITE(jaguar_serial_r, jaguar_serial_w)
551 AM_RANGE(0xf1b000, 0xf1cfff) AM_RAM AM_SHARE(4)
552 AM_RANGE(0xf1d000, 0xf1dfff) AM_READ(jaguar_wave_rom_r) AM_BASE(&jaguar_wave_rom)
557 //#define EXPERIMENTAL_MEMORY_HANDLING
558 // Experimental memory mappage...
559 // Dunno if this is a good approach or not, but it seems to make better
560 // sense to have all this crap in one spot intstead of scattered all over
561 // the place the way it is now.
562 #ifdef EXPERIMENTAL_MEMORY_HANDLING
564 #define NEW_TIMER_SYSTEM
567 uint8_t jaguarMainRAM[0x400000]; // 68K CPU RAM
568 uint8_t jaguarMainROM[0x600000]; // 68K CPU ROM
569 uint8_t jaguarBootROM[0x040000]; // 68K CPU BIOS ROM--uses only half of this!
570 uint8_t jaguarCDBootROM[0x040000]; // 68K CPU CD BIOS ROM
571 bool BIOSLoaded = false;
572 bool CDBIOSLoaded = false;
574 uint8_t cdRAM[0x100];
575 uint8_t tomRAM[0x4000];
576 uint8_t jerryRAM[0x10000];
577 static uint16_t eeprom_ram[64];
579 // NOTE: CD BIOS ROM is read from cartridge space @ $802000 (it's a cartridge
, after all
)
582 enum MemType
{ MM_NOP
= 0, MM_RAM
, MM_ROM
, MM_IO
};
584 // M68K Memory map/handlers
586 { 0x000000, 0x3FFFFF, MM_RAM
, jaguarMainRAM
},
587 { 0x800000, 0xDFFEFF, MM_ROM
, jaguarMainROM
},
588 // Note that this is really memory mapped I/O region...
589 // { 0xDFFF00, 0xDFFFFF, MM_RAM, cdRAM },
590 { 0xDFFF00, 0xDFFF03, MM_IO
, cdBUTCH
}, // base of Butch == interrupt control register, R/W
591 { 0xDFFF04, 0xDFFF07, MM_IO
, cdDSCNTRL
}, // DSA control register, R/W
592 { 0xDFFF0A, 0xDFFF0B, MM_IO
, cdDS_DATA
}, // DSA TX/RX data, R/W
593 { 0xDFFF10, 0xDFFF13, MM_IO
, cdI2CNTRL
}, // i2s bus control register, R/W
594 { 0xDFFF14, 0xDFFF17, MM_IO
, cdSBCNTRL
}, // CD subcode control register, R/W
595 { 0xDFFF18, 0xDFFF1B, MM_IO
, cdSUBDATA
}, // Subcode data register A
596 { 0xDFFF1C, 0xDFFF1F, MM_IO
, cdSUBDATB
}, // Subcode data register B
597 { 0xDFFF20, 0xDFFF23, MM_IO
, cdSB_TIME
}, // Subcode time and compare enable (D24)
598 { 0xDFFF24, 0xDFFF27, MM_IO
, cdFIFO_DATA
}, // i2s FIFO data
599 { 0xDFFF28, 0xDFFF2B, MM_IO
, cdI2SDAT2
}, // i2s FIFO data (old)
600 { 0xDFFF2C, 0xDFFF2F, MM_IO
, cdUNKNOWN
}, // Seems to be some sort of I2S interface
602 { 0xE00000, 0xE3FFFF, MM_ROM
, jaguarBootROM
},
604 // { 0xF00000, 0xF0FFFF, MM_IO, TOM_REGS_RW },
605 { 0xF00050, 0xF00051, MM_IO
, tomTimerPrescaler
},
606 { 0xF00052, 0xF00053, MM_IO
, tomTimerDivider
},
607 { 0xF00400, 0xF005FF, MM_RAM
, tomRAM
}, // CLUT A&B: How to link these? Write to one writes to the other...
608 { 0xF00600, 0xF007FF, MM_RAM
, tomRAM
}, // Actually, this is a good approach--just make the reads the same as well
609 //What about LBUF writes???
610 { 0xF02100, 0xF0211F, MM_IO
, GPUWriteByte
}, // GPU CONTROL
611 { 0xF02200, 0xF0229F, MM_IO
, BlitterWriteByte
}, // BLITTER
612 { 0xF03000, 0xF03FFF, MM_RAM
, GPUWriteByte
}, // GPU RAM
614 { 0xF10000, 0xF1FFFF, MM_IO
, JERRY_REGS_RW
},
618 { 0xF14001, 0xF14001, MM_IO_RO, eepromFOO }
619 { 0xF14801, 0xF14801, MM_IO_WO, eepromBAR }
620 { 0xF15001, 0xF15001, MM_IO_RW, eepromBAZ }
623 { 0xF14000, 0xF14003, MM_IO, joystickFoo }
624 0 = pad0/1 button values (4 bits each), RO(?)
625 1 = pad0/1 index value (4 bits each), WO
627 3 = NTSC/PAL, certain button states, RO
629 JOYSTICK $F14000 Read/Write
631 Read fedcba98 7654321q f-1 Signals J15 to J1
632 q Cartridge EEPROM output data
633 Write exxxxxxm 76543210 e 1 = enable J7-J0 outputs
634 0 = disable J7-J0 outputs
637 0 = Audio muted (reset state)
639 7-4 J7-J4 outputs (port 2)
640 3-0 J3-J0 outputs (port 1)
641 JOYBUTS $F14002 Read Only
643 Read xxxxxxxx rrdv3210 x don't care
646 v 1 = NTSC Video hardware
647 0 = PAL Video hardware
648 3-2 Button inputs B3 & B2 (port 2)
649 1-0 Button inputs B1 & B0 (port 1)
651 J4 J5 J6 J7 Port 2 B2 B3 J12 J13 J14 J15
652 J3 J2 J1 J0 Port 1 B0 B1 J8 J9 J10 J11
660 0 1 1 1 Row 3 C3 Option # 9 6 3
664 1 0 1 1 Row 2 C2 C 0 8 5 2
666 1 1 0 1 Row 1 C1 B * 7 4 1
667 1 1 1 0 Row 0 Pause A Up Down Left Right
670 0 bit read in any position means that button is pressed.
671 C3 = C2 = 1 means std. Jag. cntrlr. or nothing attached.
675 void WriteByte(uint32_t address
, uint8_t byte
, uint32_t who
/*=UNKNOWN*/)
677 // Not sure, but I think the system only has 24 address bits...
678 address
&= 0x00FFFFFF;
680 // RAM ($000000 - $3FFFFF) 4M
681 if (address
<= 0x3FFFFF)
682 jaguarMainRAM
[address
] = byte
;
683 // hole ($400000 - $7FFFFF) 4M
684 else if (address
<= 0x7FFFFF)
686 // GAME ROM ($800000 - $DFFEFF) 6M - 256 bytes
687 else if (address
<= 0xDFFEFF)
689 // CDROM ($DFFF00 - $DFFFFF) 256 bytes
690 else if (address
<= 0xDFFFFF)
692 cdRAM
[address
& 0xFF] = byte
;
694 if ((address
& 0xFF) < 12 * 4)
695 WriteLog("[%s] ", BReg
[(address
& 0xFF) / 4]);
696 WriteLog("CDROM: %s writing byte $%02X at $%08X [68K PC=$%08X]\n", whoName
[who
], data
, offset
, m68k_get_reg(NULL
, M68K_REG_PC
));
699 // BIOS ROM ($E00000 - $E3FFFF) 256K
700 else if (address
<= 0xE3FFFF)
702 // hole ($E40000 - $EFFFFF) 768K
703 else if (address
<= 0xEFFFFF)
705 // TOM ($F00000 - $F0FFFF) 64K
706 else if (address
<= 0xF0FFFF)
709 if (address
== 0xF00050)
711 tomTimerPrescaler
= (tomTimerPrescaler
& 0x00FF) | ((uint16_t)byte
<< 8);
715 else if (address
== 0xF00051)
717 tomTimerPrescaler
= (tomTimerPrescaler
& 0xFF00) | byte
;
721 else if (address
== 0xF00052)
723 tomTimerDivider
= (tomTimerDivider
& 0x00FF) | ((uint16_t)byte
<< 8);
727 else if (address
== 0xF00053)
729 tomTimerDivider
= (tomTimerDivider
& 0xFF00) | byte
;
733 else if (address
>= 0xF00400 && address
<= 0xF007FF) // CLUT (A & B)
735 // Writing to one CLUT writes to the other
736 address
&= 0x5FF; // Mask out $F00600 (restrict to $F00400-5FF)
737 tomRAM
[address
] = tomRAM
[address
+ 0x200] = byte
;
740 //What about LBUF writes???
741 else if ((address
>= 0xF02100) && (address
<= 0xF0211F)) // GPU CONTROL
743 GPUWriteByte(address
, byte
, who
);
746 else if ((address
>= 0xF02200) && (address
<= 0xF0229F)) // BLITTER
748 BlitterWriteByte(address
, byte
, who
);
751 else if ((address
>= 0xF03000) && (address
<= 0xF03FFF)) // GPU RAM
753 GPUWriteByte(address
, byte
, who
);
757 tomRAM
[address
& 0x3FFF] = byte
;
759 // JERRY ($F10000 - $F1FFFF) 64K
760 else if (address
<= 0xF1FFFF)
764 WriteLog("jerry: writing byte %.2x at 0x%.6x\n", byte
, address
);
766 if ((address
>= DSP_CONTROL_RAM_BASE
) && (address
< DSP_CONTROL_RAM_BASE
+0x20))
768 DSPWriteByte(address
, byte
, who
);
771 else if ((address
>= DSP_WORK_RAM_BASE
) && (address
< DSP_WORK_RAM_BASE
+0x2000))
773 DSPWriteByte(address
, byte
, who
);
776 // SCLK ($F1A150--8 bits wide)
777 //NOTE: This should be taken care of in DAC...
778 else if ((address
>= 0xF1A152) && (address
<= 0xF1A153))
780 // WriteLog("JERRY: Writing %02X to SCLK...\n", data);
781 if ((address
& 0x03) == 2)
782 JERRYI2SInterruptDivide
= (JERRYI2SInterruptDivide
& 0x00FF) | ((uint32_t)byte
<< 8);
784 JERRYI2SInterruptDivide
= (JERRYI2SInterruptDivide
& 0xFF00) | (uint32_t)byte
;
786 JERRYI2SInterruptTimer
= -1;
787 #ifndef NEW_TIMER_SYSTEM
790 RemoveCallback(JERRYI2SCallback
);
795 // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
796 else if (address
>= 0xF1A148 && address
<= 0xF1A157)
798 DACWriteByte(address
, byte
, who
);
801 else if (address
>= 0xF10000 && address
<= 0xF10007)
803 #ifndef NEW_TIMER_SYSTEM
804 switch (address
& 0x07)
807 JERRYPIT1Prescaler
= (JERRYPIT1Prescaler
& 0x00FF) | (byte
<< 8);
811 JERRYPIT1Prescaler
= (JERRYPIT1Prescaler
& 0xFF00) | byte
;
815 JERRYPIT1Divider
= (JERRYPIT1Divider
& 0x00FF) | (byte
<< 8);
819 JERRYPIT1Divider
= (JERRYPIT1Divider
& 0xFF00) | byte
;
823 JERRYPIT2Prescaler
= (JERRYPIT2Prescaler
& 0x00FF) | (byte
<< 8);
827 JERRYPIT2Prescaler
= (JERRYPIT2Prescaler
& 0xFF00) | byte
;
831 JERRYPIT2Divider
= (JERRYPIT2Divider
& 0x00FF) | (byte
<< 8);
835 JERRYPIT2Divider
= (JERRYPIT2Divider
& 0xFF00) | byte
;
839 WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", address
);
843 /* else if ((offset >= 0xF10010) && (offset <= 0xF10015))
845 clock_byte_write(offset, byte);
848 // JERRY -> 68K interrupt enables/latches (need to be handled!)
849 else if (address
>= 0xF10020 && address
<= 0xF10023)
851 WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", byte
, address
);
853 /* else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
855 anajoy_byte_write(offset, byte);
858 else if ((address
>= 0xF14000) && (address
<= 0xF14003))
860 JoystickWriteByte(address
, byte
);
861 EepromWriteByte(address
, byte
);
864 else if ((address
>= 0xF14004) && (address
<= 0xF1A0FF))
866 EepromWriteByte(address
, byte
);
869 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
870 else if (address
>= 0xF1D000 && address
<= 0xF1DFFF)
873 jerryRAM
[address
& 0xFFFF] = byte
;
875 // hole ($F20000 - $FFFFFF) 1M - 128K
881 void WriteWord(uint32_t adddress
, uint16_t word
)
886 void WriteDWord(uint32_t adddress
, uint32_t dword
)
891 uint8_t ReadByte(uint32_t adddress
)
896 uint16_t ReadWord(uint32_t adddress
)
901 uint32_t ReadDWord(uint32_t adddress
)
907 void ShowM68KContext(void)
909 printf("\t68K PC=%06X\n", m68k_get_reg(NULL
, M68K_REG_PC
));
911 for(int i
=M68K_REG_D0
; i
<=M68K_REG_D7
; i
++)
913 printf("D%i = %08X ", i
-M68K_REG_D0
, m68k_get_reg(NULL
, (m68k_register_t
)i
));
915 if (i
== M68K_REG_D3
|| i
== M68K_REG_D7
)
919 for(int i
=M68K_REG_A0
; i
<=M68K_REG_A7
; i
++)
921 printf("A%i = %08X ", i
-M68K_REG_A0
, m68k_get_reg(NULL
, (m68k_register_t
)i
));
923 if (i
== M68K_REG_A3
|| i
== M68K_REG_A7
)
927 uint32_t currpc
= m68k_get_reg(NULL
, M68K_REG_PC
);
928 uint32_t disPC
= currpc
- 30;
933 uint32_t oldpc
= disPC
;
934 disPC
+= m68k_disassemble(buffer
, disPC
, 0, 1);
935 printf("%s%08X: %s\n", (oldpc
== currpc
? ">" : " "), oldpc
, buffer
);
937 while (disPC
< (currpc
+ 10));
942 // Custom UAE 68000 read/write/IRQ functions
949 IPL Name Vector Control
950 ---------+---------------+---------------+---------------
951 2 VBLANK IRQ $
100 INT1 bit
#0
952 2 GPU IRQ $
100 INT1 bit
#1
953 2 HBLANK IRQ $
100 INT1 bit
#2
954 2 Timer IRQ $
100 INT1 bit
#3
956 Note
: Both timer
interrupts (JPIT
&& PIT
) are on the same INT1 bit
.
957 and are therefore indistinguishable
.
959 A typical way to install a LEVEL2 handler
for the
68000 would be
960 something like
this, you gotta supply
"last_line" and "handler".
961 Note that the interrupt is
auto vectored thru $
100 (not $
68)
969 IRQS_HANDLED
=$
909 ;; VBLANK
and TIMER
971 move
.w
#$2700,sr ;; no IRQs please
972 move
.l
#handler,V_AUTO ;; install our routine
974 move
.w
#last_line,VI ;; scanline where IRQ should occur
975 ;; should be
'odd' BTW
976 move
.w
#IRQS_HANDLE&$FF,INT1 ;; enable VBLANK + TIMER
977 move
.w
#$2100,sr ;; enable IRQs on the 68K
995 move
.w
#IRQS_HANDLED,INT1 ; clear latch, keep IRQ alive
996 move
.w
#0,INT2 ; let GPU run again
1000 As you can see
, if you have multiple INT1 interrupts coming in
,
1001 you need to check the lower byte of INT1
, to see which interrupt
1004 int irq_ack_handler(int level
)
1006 #ifdef CPU_DEBUG_TRACING
1007 if (startM68KTracing
)
1009 WriteLog("irq_ack_handler: M68K PC=%06X\n", m68k_get_reg(NULL
, M68K_REG_PC
));
1013 // Tracing the IPL lines on the Jaguar schematic yields the following:
1014 // IPL1 is connected to INTL on TOM (OUT to 68K)
1015 // IPL0-2 are also tied to Vcc via 4.7K resistors!
1016 // (DINT on TOM goes into DINT on JERRY (IN Tom from Jerry))
1017 // There doesn't seem to be any other path to IPL0 or 2 on the schematic,
1018 // which means that *all* IRQs to the 68K are routed thru TOM at level 2.
1019 // Which means they're all maskable.
1021 // The GPU/DSP/etc are probably *not* issuing an NMI, but it seems to work
1023 // They aren't, and this causes problems with a, err, specific ROM. :-D
1027 m68k_set_irq(0); // Clear the IRQ (NOTE: Without this, the BIOS fails)...
1028 return 64; // Set user interrupt #0
1031 return M68K_INT_ACK_AUTOVECTOR
;
1036 void M68K_Debughalt(void)
1043 unsigned int m68k_read_memory_8(unsigned int address
)
1045 #ifdef ALPINE_FUNCTIONS
1046 // Check if breakpoint on memory is active, and deal with it
1047 if (bpmActive
&& address
== bpmAddress1
)
1051 // Musashi does this automagically for you, UAE core does not :-P
1052 address
&= 0x00FFFFFF;
1053 #ifdef CPU_DEBUG_MEMORY
1054 // Note that the Jaguar only has 2M of RAM, not 4!
1055 if ((address
>= 0x000000) && (address
<= 0x1FFFFF))
1058 readMem
[address
] = 1;
1061 //WriteLog("[RM8] Addr: %08X\n", address);
1062 //; So, it seems that it stores the returned DWORD at $51136 and $FB074.
1063 /* if (address == 0x51136 || address == 0x51138 || address == 0xFB074 || address == 0xFB076
1064 || address == 0x1AF05E)
1065 WriteLog("[RM8 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, jaguar_mainRam[address]);//*/
1067 unsigned int retVal
= 0;
1069 // Note that the Jaguar only has 2M of RAM, not 4!
1070 if ((address
>= 0x000000) && (address
<= (vjs
.DRAM_size
- 1)))
1071 retVal
= jaguarMainRAM
[address
];
1072 // else if ((address >= 0x800000) && (address <= 0xDFFFFF))
1073 else if ((address
>= 0x800000) && (address
<= 0xDFFEFF))
1074 retVal
= jaguarMainROM
[address
- 0x800000];
1075 else if ((address
>= 0xE00000) && (address
<= 0xE3FFFF))
1076 // retVal = jaguarBootROM[address - 0xE00000];
1077 // retVal = jaguarDevBootROM1[address - 0xE00000];
1078 retVal
= jagMemSpace
[address
];
1079 else if ((address
>= 0xDFFF00) && (address
<= 0xDFFFFF))
1080 retVal
= CDROMReadByte(address
);
1081 else if ((address
>= 0xF00000) && (address
<= 0xF0FFFF))
1082 retVal
= TOMReadByte(address
, M68K
);
1083 else if ((address
>= 0xF10000) && (address
<= 0xF1FFFF))
1084 retVal
= JERRYReadByte(address
, M68K
);
1086 retVal
= jaguar_unknown_readbyte(address
, M68K
);
1088 //if (address >= 0x2800 && address <= 0x281F)
1089 // WriteLog("M68K: Read byte $%02X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
1090 //if (address >= 0x8B5E4 && address <= 0x8B5E4 + 16)
1091 // WriteLog("M68K: Read byte $%02X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
1094 return MMURead8(address
, M68K
);
1100 void gpu_dump_disassembly(void);
1101 void gpu_dump_registers(void);
1104 unsigned int m68k_read_memory_16(unsigned int address
)
1106 #ifdef ALPINE_FUNCTIONS
1107 // Check if breakpoint on memory is active, and deal with it
1108 if (bpmActive
&& (address
== bpmAddress1
))
1114 // Musashi does this automagically for you, UAE core does not :-P
1115 address
&= 0x00FFFFFF;
1116 #ifdef CPU_DEBUG_MEMORY
1117 /* if ((address >= 0x000000) && (address <= 0x3FFFFE))
1120 readMem[address] = 1, readMem[address + 1] = 1;
1122 /* if (effect_start && (address >= 0x8064FC && address <= 0x806501))
1124 return 0x4E71; // NOP
1126 if (effect_start2 && (address >= 0x806502 && address <= 0x806507))
1128 return 0x4E71; // NOP
1130 if (effect_start3 && (address >= 0x806512 && address <= 0x806517))
1132 return 0x4E71; // NOP
1134 if (effect_start4 && (address >= 0x806524 && address <= 0x806527))
1136 return 0x4E71; // NOP
1138 if (effect_start5 && (address >= 0x80653E && address <= 0x806543)) //Collision detection!
1140 return 0x4E71; // NOP
1142 if (effect_start6 && (address >= 0x806544 && address <= 0x806547))
1144 return 0x4E71; // NOP
1147 //WriteLog("[RM16] Addr: %08X\n", address);
1148 /*if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00005FBA)
1149 // for(int i=0; i<10000; i++)
1150 WriteLog("[M68K] In routine #6!\n");//*/
1151 //if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00006696) // GPU Program #4
1152 //if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00005B3C) // GPU Program #2
1153 /*if (m68k_get_reg(NULL, M68K_REG_PC) == 0x00005BA8) // GPU Program #3
1155 WriteLog("[M68K] About to run GPU! (Addr:%08X, data:%04X)\n", address, TOMReadWord(address));
1156 gpu_dump_registers();
1157 gpu_dump_disassembly();
1158 // for(int i=0; i<10000; i++)
1159 // WriteLog("[M68K] About to run GPU!\n");
1161 //WriteLog("[WM8 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);
1162 /*if (m68k_get_reg(NULL, M68K_REG_PC) >= 0x00006696 && m68k_get_reg(NULL, M68K_REG_PC) <= 0x000066A8)
1164 if (address == 0x000066A0)
1166 gpu_dump_registers();
1167 gpu_dump_disassembly();
1169 for(int i=0; i<10000; i++)
1170 WriteLog("[M68K] About to run GPU! (Addr:%08X, data:%04X)\n", address, TOMReadWord(address));
1172 //; So, it seems that it stores the returned DWORD at $51136 and $FB074.
1173 /* if (address == 0x51136 || address == 0x51138 || address == 0xFB074 || address == 0xFB076
1174 || address == 0x1AF05E)
1175 WriteLog("[RM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, GET16(jaguar_mainRam, address));//*/
1177 unsigned int retVal
= 0;
1179 // Note that the Jaguar only has 2M of RAM, not 4!
1180 if ((address
>= 0x000000) && (address
<= (vjs
.DRAM_size
- 2)))
1181 // retVal = (jaguar_mainRam[address] << 8) | jaguar_mainRam[address+1];
1182 retVal
= GET16(jaguarMainRAM
, address
);
1183 // else if ((address >= 0x800000) && (address <= 0xDFFFFE))
1184 else if ((address
>= 0x800000) && (address
<= 0xDFFEFE))
1186 // Memory Track reading...
1187 if (((TOMGetMEMCON1() & 0x0006) == (2 << 1)) && (jaguarMainROMCRC32
== 0xFDF37F47))
1189 retVal
= MTReadWord(address
);
1192 retVal
= (jaguarMainROM
[address
- 0x800000] << 8)
1193 | jaguarMainROM
[address
- 0x800000 + 1];
1195 else if ((address
>= 0xE00000) && (address
<= 0xE3FFFE))
1196 // retVal = (jaguarBootROM[address - 0xE00000] << 8) | jaguarBootROM[address - 0xE00000 + 1];
1197 // retVal = (jaguarDevBootROM1[address - 0xE00000] << 8) | jaguarDevBootROM1[address - 0xE00000 + 1];
1198 retVal
= (jagMemSpace
[address
] << 8) | jagMemSpace
[address
+ 1];
1199 else if ((address
>= 0xDFFF00) && (address
<= 0xDFFFFE))
1200 retVal
= CDROMReadWord(address
, M68K
);
1201 else if ((address
>= 0xF00000) && (address
<= 0xF0FFFE))
1202 retVal
= TOMReadWord(address
, M68K
);
1203 else if ((address
>= 0xF10000) && (address
<= 0xF1FFFE))
1204 retVal
= JERRYReadWord(address
, M68K
);
1206 retVal
= jaguar_unknown_readword(address
, M68K
);
1208 //if (address >= 0xF1B000 && address <= 0xF1CFFF)
1209 // WriteLog("M68K: Read word $%04X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
1210 //if (address >= 0x2800 && address <= 0x281F)
1211 // WriteLog("M68K: Read word $%04X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
1212 //$8B3AE -> Transferred from $F1C010
1213 //$8B5E4 -> Only +1 read at $808AA
1214 //if (address >= 0x8B5E4 && address <= 0x8B5E4 + 16)
1215 // WriteLog("M68K: Read word $%04X at $%08X [PC=%08X]\n", retVal, address, m68k_get_reg(NULL, M68K_REG_PC));
1218 return MMURead16(address
, M68K
);
1223 unsigned int m68k_read_memory_32(unsigned int address
)
1225 #ifdef ALPINE_FUNCTIONS
1226 // Check if breakpoint on memory is active, and deal with it
1227 if (bpmActive
&& address
== bpmAddress1
)
1231 // Musashi does this automagically for you, UAE core does not :-P
1232 address
&= 0x00FFFFFF;
1233 //; So, it seems that it stores the returned DWORD at $51136 and $FB074.
1234 /* if (address == 0x51136 || address == 0xFB074 || address == 0x1AF05E)
1235 WriteLog("[RM32 PC=%08X] Addr: %08X, val: %08X\n", m68k_get_reg(NULL, M68K_REG_PC), address, (m68k_read_memory_16(address) << 16) | m68k_read_memory_16(address + 2));//*/
1237 //WriteLog("--> [RM32]\n");
1239 uint32_t retVal
= 0;
1241 if ((address
>= 0x800000) && (address
<= 0xDFFEFE))
1243 // Memory Track reading...
1244 if (((TOMGetMEMCON1() & 0x0006) == (2 << 1)) && (jaguarMainROMCRC32
== 0xFDF37F47))
1245 retVal
= MTReadLong(address
);
1247 retVal
= GET32(jaguarMainROM
, address
- 0x800000);
1252 return (m68k_read_memory_16(address
) << 16) | m68k_read_memory_16(address
+ 2);
1254 return MMURead32(address
, M68K
);
1259 void m68k_write_memory_8(unsigned int address
, unsigned int value
)
1261 #ifdef ALPINE_FUNCTIONS
1262 // Check if breakpoint on memory is active, and deal with it
1263 if (bpmActive
&& address
== bpmAddress1
)
1267 // Musashi does this automagically for you, UAE core does not :-P
1268 address
&= 0x00FFFFFF;
1269 #ifdef CPU_DEBUG_MEMORY
1270 // Note that the Jaguar only has 2M of RAM, not 4!
1271 if ((address
>= 0x000000) && (address
<= 0x1FFFFF))
1275 if (value
> writeMemMax
[address
])
1276 writeMemMax
[address
] = value
;
1277 if (value
< writeMemMin
[address
])
1278 writeMemMin
[address
] = value
;
1282 /*if (address == 0x4E00)
1283 WriteLog("M68K: Writing %02X at %08X, PC=%08X\n", value, address, m68k_get_reg(NULL, M68K_REG_PC));//*/
1284 //if ((address >= 0x1FF020 && address <= 0x1FF03F) || (address >= 0x1FF820 && address <= 0x1FF83F))
1285 // WriteLog("M68K: Writing %02X at %08X\n", value, address);
1286 //WriteLog("[WM8 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);
1288 if (address >= 0x18FA70 && address < (0x18FA70 + 8000))
1289 WriteLog("M68K: Byte %02X written at %08X by 68K\n", value, address);//*/
1291 /*if (address >= 0x53D0 && address <= 0x53FF)
1292 printf("M68K: Writing byte $%02X at $%08X, PC=$%08X\n", value, address, m68k_get_reg(NULL, M68K_REG_PC));//*/
1293 //Testing AvP on UAE core...
1294 //000075A0: FFFFF80E B6320220 (BITMAP)
1295 /*if (address == 0x75A0 && value == 0xFF)
1296 printf("M68K: (8) Tripwire hit...\n");//*/
1299 // Note that the Jaguar only has 2M of RAM, not 4!
1300 if ((address
>= 0x000000) && (address
<= (vjs
.DRAM_size
- 1)))
1301 jaguarMainRAM
[address
] = value
;
1302 else if ((address
>= 0xDFFF00) && (address
<= 0xDFFFFF))
1303 CDROMWriteByte(address
, value
, M68K
);
1304 else if ((address
>= 0xF00000) && (address
<= 0xF0FFFF))
1305 TOMWriteByte(address
, value
, M68K
);
1306 else if ((address
>= 0xF10000) && (address
<= 0xF1FFFF))
1307 JERRYWriteByte(address
, value
, M68K
);
1309 jaguar_unknown_writebyte(address
, value
, M68K
);
1311 MMUWrite8(address
, value
, M68K
);
1316 void m68k_write_memory_16(unsigned int address
, unsigned int value
)
1318 #ifdef ALPINE_FUNCTIONS
1319 // Check if breakpoint on memory is active, and deal with it
1320 if (bpmActive
&& address
== bpmAddress1
)
1324 // Musashi does this automagically for you, UAE core does not :-P
1325 address
&= 0x00FFFFFF;
1326 #ifdef CPU_DEBUG_MEMORY
1327 // Note that the Jaguar only has 2M of RAM, not 4!
1328 if ((address
>= 0x000000) && (address
<= 0x1FFFFE))
1332 uint8_t hi
= value
>> 8, lo
= value
& 0xFF;
1334 if (hi
> writeMemMax
[address
])
1335 writeMemMax
[address
] = hi
;
1336 if (hi
< writeMemMin
[address
])
1337 writeMemMin
[address
] = hi
;
1339 if (lo
> writeMemMax
[address
+1])
1340 writeMemMax
[address
+1] = lo
;
1341 if (lo
< writeMemMin
[address
+1])
1342 writeMemMin
[address
+1] = lo
;
1346 /*if (address == 0x4E00)
1347 WriteLog("M68K: Writing %02X at %08X, PC=%08X\n", value, address, m68k_get_reg(NULL, M68K_REG_PC));//*/
1348 //if ((address >= 0x1FF020 && address <= 0x1FF03F) || (address >= 0x1FF820 && address <= 0x1FF83F))
1349 // WriteLog("M68K: Writing %04X at %08X\n", value, address);
1350 //WriteLog("[WM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);
1351 //if (address >= 0xF02200 && address <= 0xF0229F)
1352 // WriteLog("M68K: Writing to blitter --> %04X at %08X\n", value, address);
1353 //if (address >= 0x0E75D0 && address <= 0x0E75E7)
1354 // WriteLog("M68K: Writing %04X at %08X, M68K PC=%08X\n", value, address, m68k_get_reg(NULL, M68K_REG_PC));
1355 /*extern uint32_t totalFrames;
1356 if (address == 0xF02114)
1357 WriteLog("M68K: Writing to GPU_CTRL (frame:%u)... [M68K PC:%08X]\n", totalFrames, m68k_get_reg(NULL, M68K_REG_PC));
1358 if (address == 0xF02110)
1359 WriteLog("M68K: Writing to GPU_PC (frame:%u)... [M68K PC:%08X]\n", totalFrames, m68k_get_reg(NULL, M68K_REG_PC));//*/
1360 //if (address >= 0xF03B00 && address <= 0xF03DFF)
1361 // WriteLog("M68K: Writing %04X to %08X...\n", value, address);
1363 /*if (address == 0x0100)//64*4)
1364 WriteLog("M68K: Wrote word to VI vector value %04X...\n", value);//*/
1366 if (address >= 0x18FA70 && address < (0x18FA70 + 8000))
1367 WriteLog("M68K: Word %04X written at %08X by 68K\n", value, address);//*/
1368 /* if (address == 0x51136 || address == 0x51138 || address == 0xFB074 || address == 0xFB076
1369 || address == 0x1AF05E)
1370 WriteLog("[WM16 PC=%08X] Addr: %08X, val: %04X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);//*/
1372 /*if (address >= 0x53D0 && address <= 0x53FF)
1373 printf("M68K: Writing word $%04X at $%08X, PC=$%08X\n", value, address, m68k_get_reg(NULL, M68K_REG_PC));//*/
1374 //Testing AvP on UAE core...
1375 //000075A0: FFFFF80E B6320220 (BITMAP)
1376 /*if (address == 0x75A0 && value == 0xFFFF)
1378 printf("\nM68K: (16) Tripwire hit...\n");
1383 // Note that the Jaguar only has 2M of RAM, not 4!
1384 if ((address
>= 0x000000) && (address
<= (vjs
.DRAM_size
- 2)))
1386 /* jaguar_mainRam[address] = value >> 8;
1387 jaguar_mainRam[address + 1] = value & 0xFF;*/
1388 SET16(jaguarMainRAM
, address
, value
);
1390 // Memory Track device writes....
1391 else if ((address
>= 0x800000) && (address
<= 0x87FFFE))
1393 if (((TOMGetMEMCON1() & 0x0006) == (2 << 1)) && (jaguarMainROMCRC32
== 0xFDF37F47))
1394 MTWriteWord(address
, value
);
1396 else if ((address
>= 0xDFFF00) && (address
<= 0xDFFFFE))
1397 CDROMWriteWord(address
, value
, M68K
);
1398 else if ((address
>= 0xF00000) && (address
<= 0xF0FFFE))
1399 TOMWriteWord(address
, value
, M68K
);
1400 else if ((address
>= 0xF10000) && (address
<= 0xF1FFFE))
1401 JERRYWriteWord(address
, value
, M68K
);
1404 jaguar_unknown_writeword(address
, value
, M68K
);
1405 #ifdef LOG_UNMAPPED_MEMORY_ACCESSES
1406 WriteLog("\tA0=%08X, A1=%08X, D0=%08X, D1=%08X\n",
1407 m68k_get_reg(NULL
, M68K_REG_A0
), m68k_get_reg(NULL
, M68K_REG_A1
),
1408 m68k_get_reg(NULL
, M68K_REG_D0
), m68k_get_reg(NULL
, M68K_REG_D1
));
1412 MMUWrite16(address
, value
, M68K
);
1417 void m68k_write_memory_32(unsigned int address
, unsigned int value
)
1419 #ifdef ALPINE_FUNCTIONS
1420 // Check if breakpoint on memory is active, and deal with it
1421 if (bpmActive
&& address
== bpmAddress1
)
1425 // Musashi does this automagically for you, UAE core does not :-P
1426 address
&= 0x00FFFFFF;
1427 /*if (address == 0x4E00)
1428 WriteLog("M68K: Writing %02X at %08X, PC=%08X\n", value, address, m68k_get_reg(NULL, M68K_REG_PC));//*/
1429 //WriteLog("--> [WM32]\n");
1430 /*if (address == 0x0100)//64*4)
1431 WriteLog("M68K: Wrote dword to VI vector value %08X...\n", value);//*/
1432 /*if (address >= 0xF03214 && address < 0xF0321F)
1433 WriteLog("M68K: Writing DWORD (%08X) to GPU RAM (%08X)...\n", value, address);//*/
1434 //M68K: Writing DWORD (88E30047) to GPU RAM (00F03214)...
1435 /*extern bool doGPUDis;
1436 if (address == 0xF03214 && value == 0x88E30047)
1438 doGPUDis = true;//*/
1439 /* if (address == 0x51136 || address == 0xFB074)
1440 WriteLog("[WM32 PC=%08X] Addr: %08X, val: %02X\n", m68k_get_reg(NULL, M68K_REG_PC), address, value);//*/
1441 //Testing AvP on UAE core...
1442 //000075A0: FFFFF80E B6320220 (BITMAP)
1443 /*if (address == 0x75A0 && (value & 0xFFFF0000) == 0xFFFF0000)
1445 printf("\nM68K: (32) Tripwire hit...\n");
1450 m68k_write_memory_16(address
, value
>> 16);
1451 m68k_write_memory_16(address
+ 2, value
& 0xFFFF);
1453 MMUWrite32(address
, value
, M68K
);
1458 uint32_t JaguarGetHandler(uint32_t i
)
1460 return JaguarReadLong(i
* 4);
1464 bool JaguarInterruptHandlerIsValid(uint32_t i
) // Debug use only...
1466 uint32_t handler
= JaguarGetHandler(i
);
1467 return (handler
&& (handler
!= 0xFFFFFFFF) ? true : false);
1471 void M68K_show_context(void)
1473 WriteLog("68K PC=%06X\n", m68k_get_reg(NULL
, M68K_REG_PC
));
1475 for(int i
=M68K_REG_D0
; i
<=M68K_REG_D7
; i
++)
1477 WriteLog("D%i = %08X ", i
-M68K_REG_D0
, m68k_get_reg(NULL
, (m68k_register_t
)i
));
1479 if (i
== M68K_REG_D3
|| i
== M68K_REG_D7
)
1483 for(int i
=M68K_REG_A0
; i
<=M68K_REG_A7
; i
++)
1485 WriteLog("A%i = %08X ", i
-M68K_REG_A0
, m68k_get_reg(NULL
, (m68k_register_t
)i
));
1487 if (i
== M68K_REG_A3
|| i
== M68K_REG_A7
)
1491 WriteLog("68K disasm\n");
1492 // jaguar_dasm(s68000readPC()-0x1000,0x20000);
1493 JaguarDasm(m68k_get_reg(NULL
, M68K_REG_PC
) - 0x80, 0x200);
1494 // jaguar_dasm(0x5000, 0x14414);
1496 // WriteLog("\n.......[Cart start]...........\n\n");
1497 // jaguar_dasm(0x192000, 0x1000);//0x200);
1499 WriteLog("..................\n");
1501 if (TOMIRQEnabled(IRQ_VIDEO
))
1503 WriteLog("video int: enabled\n");
1504 JaguarDasm(JaguarGetHandler(64), 0x200);
1507 WriteLog("video int: disabled\n");
1509 WriteLog("..................\n");
1511 for(int i
=0; i
<256; i
++)
1513 WriteLog("handler %03i at ", i
);//$%08X\n", i, (unsigned int)JaguarGetHandler(i));
1514 uint32_t address
= (uint32_t)JaguarGetHandler(i
);
1517 WriteLog(".........\n");
1519 WriteLog("$%08X\n", address
);
1525 // Unknown read/write byte/word routines
1528 // It's hard to believe that developers would be sloppy with their memory
1529 // writes, yet in some cases the developers screwed up royal. E.g., Club Drive
1530 // has the following code:
1532 // 807EC4: movea.l #$f1b000, A1
1533 // 807ECA: movea.l #$8129e0, A0
1534 // 807ED0: move.l A0, D0
1535 // 807ED2: move.l #$f1bb94, D1
1536 // 807ED8: sub.l D0, D1
1537 // 807EDA: lsr.l #2, D1
1538 // 807EDC: move.l (A0)+, (A1)+
1539 // 807EDE: dbra D1, 807edc
1541 // The problem is at $807ED0--instead of putting A0 into D0, they really meant
1542 // to put A1 in. This mistake causes it to try and overwrite approximately
1543 // $700000 worth of address space! (That is, unless the 68K causes a bus
1546 void jaguar_unknown_writebyte(unsigned address
, unsigned data
, uint32_t who
/*=UNKNOWN*/)
1548 #ifdef LOG_UNMAPPED_MEMORY_ACCESSES
1549 WriteLog("Jaguar: Unknown byte %02X written at %08X by %s (M68K PC=%06X)\n", data
, address
, whoName
[who
], m68k_get_reg(NULL
, M68K_REG_PC
));
1551 #ifdef ABORT_ON_UNMAPPED_MEMORY_ACCESS
1552 // extern bool finished;
1554 // extern bool doDSPDis;
1561 void jaguar_unknown_writeword(unsigned address
, unsigned data
, uint32_t who
/*=UNKNOWN*/)
1563 #ifdef LOG_UNMAPPED_MEMORY_ACCESSES
1564 WriteLog("Jaguar: Unknown word %04X written at %08X by %s (M68K PC=%06X)\n", data
, address
, whoName
[who
], m68k_get_reg(NULL
, M68K_REG_PC
));
1566 #ifdef ABORT_ON_UNMAPPED_MEMORY_ACCESS
1567 // extern bool finished;
1569 // extern bool doDSPDis;
1576 unsigned jaguar_unknown_readbyte(unsigned address
, uint32_t who
/*=UNKNOWN*/)
1578 #ifdef LOG_UNMAPPED_MEMORY_ACCESSES
1579 WriteLog("Jaguar: Unknown byte read at %08X by %s (M68K PC=%06X)\n", address
, whoName
[who
], m68k_get_reg(NULL
, M68K_REG_PC
));
1581 #ifdef ABORT_ON_UNMAPPED_MEMORY_ACCESS
1582 // extern bool finished;
1584 // extern bool doDSPDis;
1592 unsigned jaguar_unknown_readword(unsigned address
, uint32_t who
/*=UNKNOWN*/)
1594 #ifdef LOG_UNMAPPED_MEMORY_ACCESSES
1595 WriteLog("Jaguar: Unknown word read at %08X by %s (M68K PC=%06X)\n", address
, whoName
[who
], m68k_get_reg(NULL
, M68K_REG_PC
));
1597 #ifdef ABORT_ON_UNMAPPED_MEMORY_ACCESS
1598 // extern bool finished;
1600 // extern bool doDSPDis;
1609 // Disassemble M68K instructions at the given offset
1612 unsigned int m68k_read_disassembler_8(unsigned int address
)
1614 return m68k_read_memory_8(address
);
1618 unsigned int m68k_read_disassembler_16(unsigned int address
)
1620 return m68k_read_memory_16(address
);
1624 unsigned int m68k_read_disassembler_32(unsigned int address
)
1626 return m68k_read_memory_32(address
);
1630 void JaguarDasm(uint32_t offset
, uint32_t qt
)
1633 static char buffer
[2048];//, mem[64];
1634 int pc
= offset
, oldpc
;
1636 for(uint32_t i
=0; i
<qt
; i
++)
1639 for(int j=0; j<64; j++)
1640 mem[j^0x01] = jaguar_byte_read(pc + j);
1642 pc += Dasm68000((char *)mem, buffer, 0);
1643 WriteLog("%08X: %s\n", oldpc, buffer);//*/
1645 pc
+= m68k_disassemble(buffer
, pc
, 0, 1);//M68K_CPU_TYPE_68000);
1646 WriteLog("%08X: %s\n", oldpc
, buffer
);//*/
1652 uint8_t JaguarReadByte(uint32_t offset
, uint32_t who
/*=UNKNOWN*/)
1654 uint8_t data
= 0x00;
1657 // First 2M is mirrored in the $0 - $7FFFFF range
1658 if (offset
< 0x800000)
1659 data
= jaguarMainRAM
[offset
& (vjs
.DRAM_size
- 1)];
1660 else if ((offset
>= 0x800000) && (offset
< 0xDFFF00))
1661 data
= jaguarMainROM
[offset
- 0x800000];
1662 else if ((offset
>= 0xDFFF00) && (offset
<= 0xDFFFFF))
1663 data
= CDROMReadByte(offset
, who
);
1664 else if ((offset
>= 0xE00000) && (offset
< 0xE40000))
1665 // data = jaguarBootROM[offset & 0x3FFFF];
1666 // data = jaguarDevBootROM1[offset & 0x3FFFF];
1667 data
= jagMemSpace
[offset
];
1668 else if ((offset
>= 0xF00000) && (offset
< 0xF10000))
1669 data
= TOMReadByte(offset
, who
);
1670 else if ((offset
>= 0xF10000) && (offset
< 0xF20000))
1671 data
= JERRYReadByte(offset
, who
);
1673 data
= jaguar_unknown_readbyte(offset
, who
);
1679 uint16_t JaguarReadWord(uint32_t offset
, uint32_t who
/*=UNKNOWN*/)
1683 // First 2M is mirrored in the $0 - $7FFFFF range
1684 if (offset
< 0x800000)
1686 return (jaguarMainRAM
[(offset
+0) & (vjs
.DRAM_size
- 1)] << 8) | jaguarMainRAM
[(offset
+1) & (vjs
.DRAM_size
- 1)];
1688 else if ((offset
>= 0x800000) && (offset
< 0xDFFF00))
1691 return (jaguarMainROM
[offset
+0] << 8) | jaguarMainROM
[offset
+1];
1693 // else if ((offset >= 0xDFFF00) && (offset < 0xDFFF00))
1694 else if ((offset
>= 0xDFFF00) && (offset
<= 0xDFFFFE))
1695 return CDROMReadWord(offset
, who
);
1696 else if ((offset
>= 0xE00000) && (offset
<= 0xE3FFFE))
1697 // return (jaguarBootROM[(offset+0) & 0x3FFFF] << 8) | jaguarBootROM[(offset+1) & 0x3FFFF];
1698 // return (jaguarDevBootROM1[(offset+0) & 0x3FFFF] << 8) | jaguarDevBootROM1[(offset+1) & 0x3FFFF];
1699 return (jagMemSpace
[offset
+ 0] << 8) | jagMemSpace
[offset
+ 1];
1700 else if ((offset
>= 0xF00000) && (offset
<= 0xF0FFFE))
1701 return TOMReadWord(offset
, who
);
1702 else if ((offset
>= 0xF10000) && (offset
<= 0xF1FFFE))
1703 return JERRYReadWord(offset
, who
);
1705 return jaguar_unknown_readword(offset
, who
);
1709 void JaguarWriteByte(uint32_t offset
, uint8_t data
, uint32_t who
/*=UNKNOWN*/)
1711 /* if ((offset & 0x1FFFFF) >= 0xE00 && (offset & 0x1FFFFF) < 0xE18)
1713 WriteLog("JWB: Byte %02X written at %08X by %s\n", data, offset, whoName[who]);
1715 /* if (offset >= 0x4E00 && offset < 0x4E04)
1716 WriteLog("JWB: Byte %02X written at %08X by %s\n", data, offset, whoName[who]);//*/
1717 //Need to check for writes in the range of $18FA70 + 8000...
1719 if (offset >= 0x18FA70 && offset < (0x18FA70 + 8000))
1720 WriteLog("JWB: Byte %02X written at %08X by %s\n", data, offset, whoName[who]);//*/
1724 // First 2M is mirrored in the $0 - $7FFFFF range
1725 if (offset
< 0x800000)
1727 jaguarMainRAM
[offset
& (vjs
.DRAM_size
- 1)] = data
;
1730 else if ((offset
>= 0xDFFF00) && (offset
<= 0xDFFFFF))
1732 CDROMWriteByte(offset
, data
, who
);
1735 else if ((offset
>= 0xF00000) && (offset
<= 0xF0FFFF))
1737 TOMWriteByte(offset
, data
, who
);
1740 else if ((offset
>= 0xF10000) && (offset
<= 0xF1FFFF))
1742 JERRYWriteByte(offset
, data
, who
);
1746 jaguar_unknown_writebyte(offset
, data
, who
);
1751 void JaguarWriteWord(uint32_t offset
, uint16_t data
, uint32_t who
/*=UNKNOWN*/)
1753 /* if ((offset & 0x1FFFFF) >= 0xE00 && (offset & 0x1FFFFF) < 0xE18)
1755 WriteLog("JWW: Word %04X written at %08X by %s\n", data, offset, whoName[who]);
1756 WriteLog(" GPU PC = $%06X\n", GPUReadLong(0xF02110, DEBUG));
1758 /* if (offset >= 0x4E00 && offset < 0x4E04)
1759 WriteLog("JWW: Word %04X written at %08X by %s\n", data, offset, whoName[who]);//*/
1760 /*if (offset == 0x0100)//64*4)
1761 WriteLog("M68K: %s wrote word to VI vector value %04X...\n", whoName[who], data);
1762 if (offset == 0x0102)//64*4)
1763 WriteLog("M68K: %s wrote word to VI vector+2 value %04X...\n", whoName[who], data);//*/
1764 //TEMP--Mirror of F03000? Yes, but only 32-bit CPUs can do it (i.e., NOT the 68K!)
1765 // PLUS, you would handle this in the GPU/DSP WriteLong code! Not here!
1766 //Need to check for writes in the range of $18FA70 + 8000...
1768 if (offset >= 0x18FA70 && offset < (0x18FA70 + 8000))
1769 WriteLog("JWW: Word %04X written at %08X by %s\n", data, offset, whoName[who]);//*/
1770 /*if (offset >= 0x2C00 && offset <= 0x2CFF)
1771 WriteLog("Jaguar: Word %04X written to TOC+%02X by %s\n", data, offset-0x2C00, whoName[who]);//*/
1775 // First 2M is mirrored in the $0 - $7FFFFF range
1776 if (offset
<= 0x7FFFFE)
1781 1A 69 F0 ($0000) -> Starfield
1782 1A 73 C8 ($0001) -> Final clearing blit & bitmap blit?
1785 1A 8F E8 ($0004) -> "Jaguar" small color logo?
1794 //This MUST be done by the 68K!
1795 /*if (offset == 0x670C)
1796 WriteLog("Jaguar: %s writing to location $670C...\n", whoName[who]);*/
1798 /*extern bool doGPUDis;
1799 //if ((offset == 0x100000 + 75522) && who == GPU) // 76,226 -> 75522
1800 if ((offset == 0x100000 + 128470) && who == GPU) // 107,167 -> 128470 (384 x 250 screen size 16BPP)
1801 //if ((offset >= 0x100000 && offset <= 0x12C087) && who == GPU)
1802 doGPUDis = true;//*/
1803 /*if (offset == 0x100000 + 128470) // 107,167 -> 128470 (384 x 250 screen size 16BPP)
1804 WriteLog("JWW: Writing value %04X at %08X by %s...\n", data, offset, whoName[who]);
1805 if ((data & 0xFF00) != 0x7700)
1806 WriteLog("JWW: Writing value %04X at %08X by %s...\n", data, offset, whoName[who]);//*/
1807 /*if ((offset >= 0x100000 && offset <= 0x147FFF) && who == GPU)
1809 /*if ((data & 0xFF00) != 0x7700 && who == GPU)
1810 WriteLog("JWW: Writing value %04X at %08X by %s...\n", data, offset, whoName[who]);//*/
1811 /*if ((offset >= 0x100000 + 0x48000 && offset <= 0x12C087 + 0x48000) && who == GPU)
1813 /*extern bool doGPUDis;
1814 if (offset == 0x120216 && who == GPU)
1815 doGPUDis = true;//*/
1816 /*extern uint32_t gpu_pc;
1817 if (who == GPU && (gpu_pc == 0xF03604 || gpu_pc == 0xF03638))
1819 uint32_t base = offset - (offset > 0x148000 ? 0x148000 : 0x100000);
1820 uint32_t y = base / 0x300;
1821 uint32_t x = (base - (y * 0x300)) / 2;
1822 WriteLog("JWW: Writing starfield star %04X at %08X (%u/%u) [%s]\n", data, offset, x, y, (gpu_pc == 0xF03604 ? "s" : "L"));
1825 JWW: Writing starfield star 775E at 0011F650 (555984/1447)
1827 //if (offset == (0x001E17F8 + 0x34))
1828 /*if (who == GPU && offset == (0x001E17F8 + 0x34))
1830 // WriteLog("JWW: Write at %08X written to by %s.\n", 0x001E17F8 + 0x34, whoName[who]);//*/
1831 /*extern uint32_t gpu_pc;
1832 if (who == GPU && (gpu_pc == 0xF03604 || gpu_pc == 0xF03638))
1834 extern int objectPtr;
1835 // if (offset > 0x148000)
1838 if (starCount > objectPtr)
1841 // if (starCount == 1)
1842 // WriteLog("--> Drawing 1st star...\n");
1844 // uint32_t base = offset - (offset > 0x148000 ? 0x148000 : 0x100000);
1845 // uint32_t y = base / 0x300;
1846 // uint32_t x = (base - (y * 0x300)) / 2;
1847 // WriteLog("JWW: Writing starfield star %04X at %08X (%u/%u) [%s]\n", data, offset, x, y, (gpu_pc == 0xF03604 ? "s" : "L"));
1849 //A star of interest...
1850 //-->JWW: Writing starfield star 77C9 at 0011D31A (269/155) [s]
1851 //1st trail +3(x), -1(y) -> 272, 154 -> 0011D020
1852 //JWW: Blitter writing echo 77B3 at 0011D022...
1854 //extern bool doGPUDis;
1855 /*if (offset == 0x11D022 + 0x48000 || offset == 0x11D022)// && who == GPU)
1858 WriteLog("JWW: %s writing echo %04X at %08X...\n", whoName[who], data, offset);
1861 if (offset == 0x11D31A + 0x48000 || offset == 0x11D31A)
1862 WriteLog("JWW: %s writing star %04X at %08X...\n", whoName[who], data, offset);//*/
1864 jaguarMainRAM
[(offset
+0) & (vjs
.DRAM_size
- 1)] = data
>> 8;
1865 jaguarMainRAM
[(offset
+1) & (vjs
.DRAM_size
- 1)] = data
& 0xFF;
1868 else if (offset
>= 0xDFFF00 && offset
<= 0xDFFFFE)
1870 CDROMWriteWord(offset
, data
, who
);
1873 else if (offset
>= 0xF00000 && offset
<= 0xF0FFFE)
1875 TOMWriteWord(offset
, data
, who
);
1878 else if (offset
>= 0xF10000 && offset
<= 0xF1FFFE)
1880 JERRYWriteWord(offset
, data
, who
);
1883 // Don't bomb on attempts to write to ROM
1884 else if (offset
>= 0x800000 && offset
<= 0xEFFFFF)
1887 jaguar_unknown_writeword(offset
, data
, who
);
1891 // We really should re-do this so that it does *real* 32-bit access... !!! FIX !!!
1892 uint32_t JaguarReadLong(uint32_t offset
, uint32_t who
/*=UNKNOWN*/)
1894 return (JaguarReadWord(offset
, who
) << 16) | JaguarReadWord(offset
+2, who
);
1898 // We really should re-do this so that it does *real* 32-bit access... !!! FIX !!!
1899 void JaguarWriteLong(uint32_t offset
, uint32_t data
, uint32_t who
/*=UNKNOWN*/)
1901 /* extern bool doDSPDis;
1902 if (offset < 0x400 && !doDSPDis)
1904 WriteLog("JLW: Write to %08X by %s... Starting DSP log!\n\n", offset, whoName[who]);
1907 /*if (offset == 0x0100)//64*4)
1908 WriteLog("M68K: %s wrote dword to VI vector value %08X...\n", whoName[who], data);//*/
1910 JaguarWriteWord(offset
, data
>> 16, who
);
1911 JaguarWriteWord(offset
+2, data
& 0xFFFF, who
);
1915 void JaguarSetScreenBuffer(uint32_t * buffer
)
1917 // This is in TOM, but we set it here...
1918 screenBuffer
= buffer
;
1922 void JaguarSetScreenPitch(uint32_t pitch
)
1924 // This is in TOM, but we set it here...
1925 screenPitch
= pitch
;
1930 // Jaguar console initialization
1932 void JaguarInit(void)
1934 // For randomizing RAM
1935 srand((unsigned int)time(NULL
));
1937 // Contents of local RAM are quasi-stable; we simulate this by randomizing RAM contents
1938 for(uint32_t i
=0; i
<vjs
.DRAM_size
; i
+=4)
1939 *((uint32_t *)(&jaguarMainRAM
[i
])) = rand();
1941 #ifdef CPU_DEBUG_MEMORY
1942 memset(readMem
, 0x00, 0x400000);
1943 memset(writeMemMin
, 0xFF, 0x400000);
1944 memset(writeMemMax
, 0x00, 0x400000);
1946 // memset(jaguarMainRAM, 0x00, 0x200000);
1947 // memset(jaguar_mainRom, 0xFF, 0x200000); // & set it to all Fs...
1948 // memset(jaguar_mainRom, 0x00, 0x200000); // & set it to all 0s...
1949 //NOTE: This *doesn't* fix FlipOut...
1950 //Or does it? Hmm...
1951 //Seems to want $01010101... Dunno why. Investigate!
1952 // memset(jaguarMainROM, 0x01, 0x600000); // & set it to all 01s...
1953 // memset(jaguar_mainRom, 0xFF, 0x600000); // & set it to all Fs...
1954 lowerField
= false; // Reset the lower field flag
1955 //temp, for crappy crap that sux
1956 memset(jaguarMainRAM
+ 0x804, 0xFF, 4);
1958 m68k_pulse_reset(); // Need to do this so UAE disasm doesn't segfault on exit
1967 //New timer based code stuffola...
1968 void HalflineCallback(void);
1969 void RenderCallback(void);
1970 void JaguarReset(void)
1972 // Only problem with this approach: It wipes out RAM loaded files...!
1973 // Contents of local RAM are quasi-stable; we simulate this by randomizing RAM contents
1974 for(uint32_t i
=8; i
<vjs
.DRAM_size
; i
+=4)
1975 *((uint32_t *)(&jaguarMainRAM
[i
])) = rand();
1977 // New timer base code stuffola...
1978 InitializeEventList();
1979 //Need to change this so it uses the single RAM space and load the BIOS
1980 //into it somewhere...
1981 //Also, have to change this here and in JaguarReadXX() currently
1982 // Only use the system BIOS if it's available...! (it's always available now!)
1983 // AND only if a jaguar cartridge has been inserted.
1984 if (vjs
.useJaguarBIOS
&& jaguarCartInserted
&& !vjs
.hardwareTypeAlpine
&& !vjs
.softTypeDebugger
)
1985 memcpy(jaguarMainRAM
, jagMemSpace
+ 0xE00000, 8);
1987 SET32(jaguarMainRAM
, 4, jaguarRunAddress
);
1989 // WriteLog("jaguar_reset():\n");
1995 m68k_pulse_reset(); // Reset the 68000
1996 WriteLog("Jaguar: 68K reset. PC=%06X SP=%08X\n", m68k_get_reg(NULL
, M68K_REG_PC
), m68k_get_reg(NULL
, M68K_REG_A7
));
1998 lowerField
= false; // Reset the lower field flag
1999 // SetCallbackTime(ScanlineCallback, 63.5555);
2000 // SetCallbackTime(ScanlineCallback, 31.77775);
2001 SetCallbackTime(HalflineCallback
, (vjs
.hardwareTypeNTSC
? 31.777777777 : 32.0));
2005 void JaguarDone(void)
2007 #ifdef CPU_DEBUG_MEMORY
2008 /* WriteLog("\nJaguar: Memory Usage Stats (return addresses)\n\n");
2010 for(uint32_t i=0; i<=raPtr; i++)
2012 WriteLog("\t%08X\n", returnAddr[i]);
2013 WriteLog("M68000 disassembly at $%08X...\n", returnAddr[i] - 16);
2014 jaguar_dasm(returnAddr[i] - 16, 16);
2019 /* int start = 0, end = 0;
2020 bool endTriggered = false, startTriggered = false;
2021 for(int i=0; i<0x400000; i++)
2023 if (readMem[i] && writeMemMin[i] != 0xFF && writeMemMax != 0x00)
2025 if (!startTriggered)
2026 startTriggered = true, endTriggered = false, start = i;
2028 WriteLog("\t\tMin/Max @ %06X: %u/%u\n", i, writeMemMin[i], writeMemMax[i]);
2034 end = i - 1, endTriggered = true, startTriggered = false;
2035 WriteLog("\tMemory range accessed: %06X - %06X\n", start, end);
2042 // for(int i=M68K_REG_A0; i<=M68K_REG_A7; i++)
2043 // WriteLog("\tA%i = 0x%.8x\n", i-M68K_REG_A0, m68k_get_reg(NULL, (m68k_register_t)i));
2044 int32_t topOfStack
= m68k_get_reg(NULL
, M68K_REG_A7
);
2045 WriteLog("M68K: Top of stack: %08X -> (%08X). Stack trace:\n", topOfStack
, JaguarReadLong(topOfStack
));
2047 for(int i
=-2; i
<9; i
++)
2048 WriteLog("%06X: %08X\n", topOfStack
+ (i
* 4), JaguarReadLong(topOfStack
+ (i
* 4)));
2050 uint32_t address
= topOfStack
- (4 * 4 * 3);
2052 for(int i
=0; i
<10; i
++)
2054 WriteLog("%06X:", address
);
2056 for(int j
=0; j
<4; j
++)
2058 WriteLog(" %08X", JaguarReadLong(address
));
2066 /* WriteLog("\nM68000 disassembly at $802288...\n");
2067 jaguar_dasm(0x802288, 3);
2068 WriteLog("\nM68000 disassembly at $802200...\n");
2069 jaguar_dasm(0x802200, 500);
2070 WriteLog("\nM68000 disassembly at $802518...\n");
2071 jaguar_dasm(0x802518, 100);//*/
2073 /* WriteLog("\n\nM68000 disassembly at $803F00 (look @ $803F2A)...\n");
2074 jaguar_dasm(0x803F00, 500);
2077 /* WriteLog("\n\nM68000 disassembly at $802B00 (look @ $802B5E)...\n");
2078 jaguar_dasm(0x802B00, 500);
2081 /* WriteLog("\n\nM68000 disassembly at $809900 (look @ $8099F8)...\n");
2082 jaguar_dasm(0x809900, 500);
2085 /* WriteLog("\n\nDump of $8093C8:\n\n");
2086 for(int i=0x8093C8; i<0x809900; i+=4)
2087 WriteLog("%06X: %08X\n", i, JaguarReadLong(i));//*/
2088 /* WriteLog("\n\nM68000 disassembly at $90006C...\n");
2089 jaguar_dasm(0x90006C, 500);
2091 /* WriteLog("\n\nM68000 disassembly at $1AC000...\n");
2092 jaguar_dasm(0x1AC000, 6000);
2095 // WriteLog("Jaguar: CD BIOS version %04X\n", JaguarReadWord(0x3004));
2096 WriteLog("Jaguar: Interrupt enable = $%02X\n", TOMReadByte(0xF000E1, JAGUAR
) & 0x1F);
2097 WriteLog("Jaguar: Video interrupt is %s (line=%u)\n", ((TOMIRQEnabled(IRQ_VIDEO
))
2098 && (JaguarInterruptHandlerIsValid(64))) ? "enabled" : "disabled", TOMReadWord(0xF0004E, JAGUAR
));
2099 M68K_show_context();
2108 // temp, until debugger is in place
2109 //00802016: jsr $836F1A.l
2110 //0080201C: jsr $836B30.l
2111 //00802022: jsr $836B18.l
2112 //00802028: jsr $8135F0.l
2113 //00813C1E: jsr $813F76.l
2114 //00802038: jsr $836D00.l
2115 //00802098: jsr $8373A4.l
2116 //008020A2: jsr $83E24A.l
2117 //008020BA: jsr $83E156.l
2118 //008020C6: jsr $83E19C.l
2119 //008020E6: jsr $8445E8.l
2120 //008020EC: jsr $838C20.l
2121 //0080211A: jsr $838ED6.l
2122 //00802124: jsr $89CA56.l
2123 //0080212A: jsr $802B48.l
2125 WriteLog("-------------------------------------------\n");
2126 JaguarDasm(0x8445E8, 0x200);
2127 WriteLog("-------------------------------------------\n");
2128 JaguarDasm(0x838C20, 0x200);
2129 WriteLog("-------------------------------------------\n");
2130 JaguarDasm(0x838ED6, 0x200);
2131 WriteLog("-------------------------------------------\n");
2132 JaguarDasm(0x89CA56, 0x200);
2133 WriteLog("-------------------------------------------\n");
2134 JaguarDasm(0x802B48, 0x200);
2135 WriteLog("\n\nM68000 disassembly at $802000...\n");
2136 JaguarDasm(0x802000, 6000);
2139 /* WriteLog("\n\nM68000 disassembly at $6004...\n");
2140 JaguarDasm(0x6004, 10000);
2142 // WriteLog("\n\nM68000 disassembly at $802000...\n");
2143 // JaguarDasm(0x802000, 0x1000);
2144 // WriteLog("\n\nM68000 disassembly at $4100...\n");
2145 // JaguarDasm(0x4100, 200);
2146 // WriteLog("\n\nM68000 disassembly at $800800...\n");
2147 // JaguarDasm(0x800800, 0x1000);
2151 // Temp debugging stuff
2153 void DumpMainMemory(void)
2155 FILE * fp
= fopen("./memdump.bin", "wb");
2160 fwrite(jaguarMainRAM
, 1, vjs
.DRAM_size
, fp
);
2165 uint8_t * GetRamPtr(void)
2167 return jaguarMainRAM
;
2172 // New Jaguar execution stack
2173 // This executes 1 frame's worth of code.
2176 void JaguarExecuteNew(void)
2182 double timeToNextEvent
= GetTimeToNextEvent();
2183 //WriteLog("JEN: Time to next event (%u) is %f usec (%u RISC cycles)...\n", nextEvent, timeToNextEvent, USEC_TO_RISC_CYCLES(timeToNextEvent));
2185 m68k_execute(USEC_TO_M68K_CYCLES(timeToNextEvent
));
2188 GPUExec(USEC_TO_RISC_CYCLES(timeToNextEvent
));
2196 // Step over function
2197 void JaguarStepOver(int depth
)
2200 //bool case55 = false;
2216 switch (M68KGetCurrentOpcodeFamily())
2235 //m68kSR = m68k_get_reg(NULL, M68K_REG_SR);
2236 if (m68k_get_reg(NULL
, M68K_REG_SR
) & 0x4)
2251 JaguarStepOver(depth
+1);
2269 #pragma message("Warning: !!! Need to verify the Jaguar Step Over function !!!")
2271 #warning "!!! Need to verify the Jaguar Step Over function !!!"
2276 // Step into function
2277 void JaguarStepInto(void)
2279 // double timeToNextEvent = GetTimeToNextEvent();
2281 m68k_execute(USEC_TO_M68K_CYCLES(0));
2282 // m68k_execute(USEC_TO_M68K_CYCLES(timeToNextEvent));
2285 GPUExec(USEC_TO_RISC_CYCLES(0));
2287 // HandleNextEvent();
2289 #pragma message("Warning: !!! Need to verify the Jaguar Step Into function !!!")
2291 #warning "!!! Need to verify the Jaguar Step Into function !!!"
2297 // The thing to keep in mind is that the VC is advanced every HALF line,
2298 // regardless of whether the display is interlaced or not. The only difference
2299 // with an interlaced display is that the high bit of VC will be set when the
2300 // lower field is being rendered. (NB: The high bit of VC is ALWAYS set on the
2301 // lower field, regardless of whether it's in interlace mode or not.
2302 // NB2: Seems it doesn't always, not sure what the constraint is...)
2304 // Normally, TVs will render a full frame in 1/30s (NTSC) or 1/25s (PAL) by
2305 // rendering two fields that are slighty vertically offset from each other.
2306 // Each field is created in 1/60s (NTSC) or 1/50s (PAL), and every other line
2307 // is rendered in this mode so that each field, when overlaid on each other,
2308 // will yield the final picture at the full resolution for the full frame.
2310 // We execute a half frame in each timeslice (1/60s NTSC, 1/50s PAL).
2311 // Since the number of lines in a FULL frame is 525 for NTSC, 625 for PAL,
2312 // it will be half this number for a half frame. BUT, since we're counting
2313 // HALF lines, we double this number and we're back at 525 for NTSC, 625 for
2316 // Scanline times are 63.5555... μs in NTSC and 64 μs in PAL
2317 // Half line times are, naturally, half of this. :-P
2319 void HalflineCallback(void)
2321 uint16_t vc
= TOMReadWord(0xF00006, JAGUAR
);
2322 uint16_t vp
= TOMReadWord(0xF0003E, JAGUAR
) + 1;
2323 uint16_t vi
= TOMReadWord(0xF0004E, JAGUAR
);
2324 // uint16_t vbb = TOMReadWord(0xF00040, JAGUAR);
2327 // Each # of lines is for a full frame == 1/30s (NTSC), 1/25s (PAL).
2328 // So we cut the number of half-lines in a frame in half. :-P
2329 uint16_t numHalfLines
= ((vjs
.hardwareTypeNTSC
? 525 : 625) * 2) / 2;
2331 if ((vc
& 0x7FF) >= numHalfLines
)
2333 lowerField
= !lowerField
;
2334 // If we're rendering the lower field, set the high bit (#11, counting
2336 vc
= (lowerField
? 0x0800 : 0x0000);
2339 //WriteLog("HLC: Currently on line %u (VP=%u)...\n", vc, vp);
2340 TOMWriteWord(0xF00006, vc
, JAGUAR
);
2342 // Time for Vertical Interrupt?
2343 if ((vc
& 0x7FF) == vi
&& (vc
& 0x7FF) > 0 && TOMIRQEnabled(IRQ_VIDEO
))
2345 // We don't have to worry about autovectors & whatnot because the Jaguar
2346 // tells you through its HW registers who sent the interrupt...
2347 TOMSetPendingVideoInt();
2351 TOMExecHalfline(vc
, true);
2353 //Change this to VBB???
2354 //Doesn't seem to matter (at least for Flip Out & I-War)
2355 if ((vc
& 0x7FF) == 0)
2362 SetCallbackTime(HalflineCallback
, (vjs
.hardwareTypeNTSC
? 31.777777777 : 32.0));