keyboards/yosino58/serial.c

   1 /*
   2  * WARNING: be careful changing this code, it is very timing dependent
   3  *
   4  * 2018-10-28 checked
   5  *  avr-gcc 4.9.2
   6  *  avr-gcc 5.4.0
   7  *  avr-gcc 7.3.0
   8  */
   9
  10 #ifndef F_CPU
  11 #define F_CPU 16000000
  12 #endif
  13
  14 #include <avr/io.h>
  15 #include <avr/interrupt.h>
  16 #include <util/delay.h>
  17 #include <stddef.h>
  18 #include <stdbool.h>
  19 #include "serial.h"
  20
  21 #ifdef SOFT_SERIAL_PIN
  22
  23 #ifdef __AVR_ATmega32U4__
  24   // if using ATmega32U4 I2C, can not use PD0 and PD1 in soft serial.
  25   #ifdef USE_I2C
  26     #if SOFT_SERIAL_PIN == D0 || SOFT_SERIAL_PIN == D1
  27       #error Using ATmega32U4 I2C, so can not use PD0, PD1
  28     #endif
  29   #endif
  30
  31   #if SOFT_SERIAL_PIN >= D0 && SOFT_SERIAL_PIN <= D3
  32     #define SERIAL_PIN_DDR   DDRD
  33     #define SERIAL_PIN_PORT  PORTD
  34     #define SERIAL_PIN_INPUT PIND
  35     #if SOFT_SERIAL_PIN == D0
  36       #define SERIAL_PIN_MASK _BV(PD0)
  37       #define EIMSK_BIT       _BV(INT0)
  38       #define EICRx_BIT       (~(_BV(ISC00) | _BV(ISC01)))
  39       #define SERIAL_PIN_INTERRUPT INT0_vect
  40     #elif  SOFT_SERIAL_PIN == D1
  41       #define SERIAL_PIN_MASK _BV(PD1)
  42       #define EIMSK_BIT       _BV(INT1)
  43       #define EICRx_BIT       (~(_BV(ISC10) | _BV(ISC11)))
  44       #define SERIAL_PIN_INTERRUPT INT1_vect
  45     #elif  SOFT_SERIAL_PIN == D2
  46       #define SERIAL_PIN_MASK _BV(PD2)
  47       #define EIMSK_BIT       _BV(INT2)
  48       #define EICRx_BIT       (~(_BV(ISC20) | _BV(ISC21)))
  49       #define SERIAL_PIN_INTERRUPT INT2_vect
  50     #elif  SOFT_SERIAL_PIN == D3
  51       #define SERIAL_PIN_MASK _BV(PD3)
  52       #define EIMSK_BIT       _BV(INT3)
  53       #define EICRx_BIT       (~(_BV(ISC30) | _BV(ISC31)))
  54       #define SERIAL_PIN_INTERRUPT INT3_vect
  55     #endif
  56   #elif  SOFT_SERIAL_PIN == E6
  57     #define SERIAL_PIN_DDR   DDRE
  58     #define SERIAL_PIN_PORT  PORTE
  59     #define SERIAL_PIN_INPUT PINE
  60     #define SERIAL_PIN_MASK  _BV(PE6)
  61     #define EIMSK_BIT        _BV(INT6)
  62     #define EICRx_BIT        (~(_BV(ISC60) | _BV(ISC61)))
  63     #define SERIAL_PIN_INTERRUPT INT6_vect
  64   #else
  65   #error invalid SOFT_SERIAL_PIN value
  66   #endif
  67
  68 #else
  69  #error serial.c now support ATmega32U4 only
  70 #endif
  71
  72 //////////////// for backward compatibility ////////////////////////////////
  73 #ifndef SERIAL_USE_MULTI_TRANSACTION
  74 /* --- USE Simple API (OLD API, compatible with let's split serial.c) */
  75   #if SERIAL_SLAVE_BUFFER_LENGTH > 0
  76   uint8_t volatile serial_slave_buffer[SERIAL_SLAVE_BUFFER_LENGTH] = {0};
  77   #endif
  78   #if SERIAL_MASTER_BUFFER_LENGTH > 0
  79   uint8_t volatile serial_master_buffer[SERIAL_MASTER_BUFFER_LENGTH] = {0};
  80   #endif
  81   uint8_t volatile status0 = 0;
  82
  83 SSTD_t transactions[] = {
  84     { (uint8_t *)&status0,
  85   #if SERIAL_MASTER_BUFFER_LENGTH > 0
  86       sizeof(serial_master_buffer), (uint8_t *)serial_master_buffer,
  87   #else
  88       0, (uint8_t *)NULL,
  89   #endif
  90   #if SERIAL_SLAVE_BUFFER_LENGTH > 0
  91       sizeof(serial_slave_buffer), (uint8_t *)serial_slave_buffer
  92   #else
  93       0, (uint8_t *)NULL,
  94   #endif
  95   }
  96 };
  97
  98 void serial_master_init(void)
  99 { soft_serial_initiator_init(transactions, TID_LIMIT(transactions)); }
 100
 101 void serial_slave_init(void)
 102 { soft_serial_target_init(transactions, TID_LIMIT(transactions)); }
 103
 104 // 0 => no error
 105 // 1 => slave did not respond
 106 // 2 => checksum error
 107 int serial_update_buffers()
 108 {
 109     int result;
 110     result = soft_serial_transaction();
 111     return result;
 112 }
 113
 114 #endif // end of Simple API (OLD API, compatible with let's split serial.c)
 115 ////////////////////////////////////////////////////////////////////////////
 116
 117 #define ALWAYS_INLINE __attribute__((always_inline))
 118 #define NO_INLINE __attribute__((noinline))
 119 #define _delay_sub_us(x)    __builtin_avr_delay_cycles(x)
 120
 121 // parity check
 122 #define ODD_PARITY 1
 123 #define EVEN_PARITY 0
 124 #define PARITY EVEN_PARITY
 125
 126 #ifdef SERIAL_DELAY
 127   // custom setup in config.h
 128   // #define TID_SEND_ADJUST 2
 129   // #define SERIAL_DELAY 6             // micro sec
 130   // #define READ_WRITE_START_ADJUST 30 // cycles
 131   // #define READ_WRITE_WIDTH_ADJUST 8 // cycles
 132 #else
 133 // ============ Standard setups ============
 134
 135 #ifndef SELECT_SOFT_SERIAL_SPEED
 136 #define SELECT_SOFT_SERIAL_SPEED 1
 137 //  0: about 189kbps
 138 //  1: about 137kbps (default)
 139 //  2: about 75kbps
 140 //  3: about 39kbps
 141 //  4: about 26kbps
 142 //  5: about 20kbps
 143 #endif
 144
 145 #if __GNUC__ < 6
 146   #define TID_SEND_ADJUST 14
 147 #else
 148   #define TID_SEND_ADJUST 2
 149 #endif
 150
 151 #if SELECT_SOFT_SERIAL_SPEED == 0
 152   // Very High speed
 153   #define SERIAL_DELAY 4             // micro sec
 154   #if __GNUC__ < 6
 155     #define READ_WRITE_START_ADJUST 33 // cycles
 156     #define READ_WRITE_WIDTH_ADJUST 3 // cycles
 157   #else
 158     #define READ_WRITE_START_ADJUST 34 // cycles
 159     #define READ_WRITE_WIDTH_ADJUST 7 // cycles
 160   #endif
 161 #elif SELECT_SOFT_SERIAL_SPEED == 1
 162   // High speed
 163   #define SERIAL_DELAY 6             // micro sec
 164   #if __GNUC__ < 6
 165     #define READ_WRITE_START_ADJUST 30 // cycles
 166     #define READ_WRITE_WIDTH_ADJUST 3 // cycles
 167   #else
 168     #define READ_WRITE_START_ADJUST 33 // cycles
 169     #define READ_WRITE_WIDTH_ADJUST 7 // cycles
 170   #endif
 171 #elif SELECT_SOFT_SERIAL_SPEED == 2
 172   // Middle speed
 173   #define SERIAL_DELAY 12            // micro sec
 174   #define READ_WRITE_START_ADJUST 30 // cycles
 175   #if __GNUC__ < 6
 176     #define READ_WRITE_WIDTH_ADJUST 3 // cycles
 177   #else
 178     #define READ_WRITE_WIDTH_ADJUST 7 // cycles
 179   #endif
 180 #elif SELECT_SOFT_SERIAL_SPEED == 3
 181   // Low speed
 182   #define SERIAL_DELAY 24            // micro sec
 183   #define READ_WRITE_START_ADJUST 30 // cycles
 184   #if __GNUC__ < 6
 185     #define READ_WRITE_WIDTH_ADJUST 3 // cycles
 186   #else
 187     #define READ_WRITE_WIDTH_ADJUST 7 // cycles
 188   #endif
 189 #elif SELECT_SOFT_SERIAL_SPEED == 4
 190   // Very Low speed
 191   #define SERIAL_DELAY 36            // micro sec
 192   #define READ_WRITE_START_ADJUST 30 // cycles
 193   #if __GNUC__ < 6
 194     #define READ_WRITE_WIDTH_ADJUST 3 // cycles
 195   #else
 196     #define READ_WRITE_WIDTH_ADJUST 7 // cycles
 197   #endif
 198 #elif SELECT_SOFT_SERIAL_SPEED == 5
 199   // Ultra Low speed
 200   #define SERIAL_DELAY 48            // micro sec
 201   #define READ_WRITE_START_ADJUST 30 // cycles
 202   #if __GNUC__ < 6
 203     #define READ_WRITE_WIDTH_ADJUST 3 // cycles
 204   #else
 205     #define READ_WRITE_WIDTH_ADJUST 7 // cycles
 206   #endif
 207 #else
 208 #error invalid SELECT_SOFT_SERIAL_SPEED value
 209 #endif /* SELECT_SOFT_SERIAL_SPEED */
 210 #endif /* SERIAL_DELAY */
 211
 212 #define SERIAL_DELAY_HALF1 (SERIAL_DELAY/2)
 213 #define SERIAL_DELAY_HALF2 (SERIAL_DELAY - SERIAL_DELAY/2)
 214
 215 #define SLAVE_INT_WIDTH_US 1
 216 #ifndef SERIAL_USE_MULTI_TRANSACTION
 217   #define SLAVE_INT_RESPONSE_TIME SERIAL_DELAY
 218 #else
 219   #define SLAVE_INT_ACK_WIDTH_UNIT 2
 220   #define SLAVE_INT_ACK_WIDTH 4
 221 #endif
 222
 223 static SSTD_t *Transaction_table = NULL;
 224 static uint8_t Transaction_table_size = 0;
 225
 226 inline static void serial_delay(void) ALWAYS_INLINE;
 227 inline static
 228 void serial_delay(void) {
 229   _delay_us(SERIAL_DELAY);
 230 }
 231
 232 inline static void serial_delay_half1(void) ALWAYS_INLINE;
 233 inline static
 234 void serial_delay_half1(void) {
 235   _delay_us(SERIAL_DELAY_HALF1);
 236 }
 237
 238 inline static void serial_delay_half2(void) ALWAYS_INLINE;
 239 inline static
 240 void serial_delay_half2(void) {
 241   _delay_us(SERIAL_DELAY_HALF2);
 242 }
 243
 244 inline static void serial_output(void) ALWAYS_INLINE;
 245 inline static
 246 void serial_output(void) {
 247   SERIAL_PIN_DDR |= SERIAL_PIN_MASK;
 248 }
 249
 250 // make the serial pin an input with pull-up resistor
 251 inline static void serial_input_with_pullup(void) ALWAYS_INLINE;
 252 inline static
 253 void serial_input_with_pullup(void) {
 254   SERIAL_PIN_DDR  &= ~SERIAL_PIN_MASK;
 255   SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
 256 }
 257
 258 inline static uint8_t serial_read_pin(void) ALWAYS_INLINE;
 259 inline static
 260 uint8_t serial_read_pin(void) {
 261   return !!(SERIAL_PIN_INPUT & SERIAL_PIN_MASK);
 262 }
 263
 264 inline static void serial_low(void) ALWAYS_INLINE;
 265 inline static
 266 void serial_low(void) {
 267   SERIAL_PIN_PORT &= ~SERIAL_PIN_MASK;
 268 }
 269
 270 inline static void serial_high(void) ALWAYS_INLINE;
 271 inline static
 272 void serial_high(void) {
 273   SERIAL_PIN_PORT |= SERIAL_PIN_MASK;
 274 }
 275
 276 void soft_serial_initiator_init(SSTD_t *sstd_table, int sstd_table_size)
 277 {
 278     Transaction_table = sstd_table;
 279     Transaction_table_size = (uint8_t)sstd_table_size;
 280     serial_output();
 281     serial_high();
 282 }
 283
 284 void soft_serial_target_init(SSTD_t *sstd_table, int sstd_table_size)
 285 {
 286     Transaction_table = sstd_table;
 287     Transaction_table_size = (uint8_t)sstd_table_size;
 288     serial_input_with_pullup();
 289
 290     // Enable INT0-INT3,INT6
 291     EIMSK |= EIMSK_BIT;
 292 #if SERIAL_PIN_MASK == _BV(PE6)
 293     // Trigger on falling edge of INT6
 294     EICRB &= EICRx_BIT;
 295 #else
 296     // Trigger on falling edge of INT0-INT3
 297     EICRA &= EICRx_BIT;
 298 #endif
 299 }
 300
 301 // Used by the sender to synchronize timing with the reciver.
 302 static void sync_recv(void) NO_INLINE;
 303 static
 304 void sync_recv(void) {
 305   for (uint8_t i = 0; i < SERIAL_DELAY*5 && serial_read_pin(); i++ ) {
 306   }
 307   // This shouldn't hang if the target disconnects because the
 308   // serial line will float to high if the target does disconnect.
 309   while (!serial_read_pin());
 310 }
 311
 312 // Used by the reciver to send a synchronization signal to the sender.
 313 static void sync_send(void) NO_INLINE;
 314 static
 315 void sync_send(void) {
 316   serial_low();
 317   serial_delay();
 318   serial_high();
 319 }
 320
 321 // Reads a byte from the serial line
 322 static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) NO_INLINE;
 323 static uint8_t serial_read_chunk(uint8_t *pterrcount, uint8_t bit) {
 324     uint8_t byte, i, p, pb;
 325
 326   _delay_sub_us(READ_WRITE_START_ADJUST);
 327   for( i = 0, byte = 0, p = PARITY; i < bit; i++ ) {
 328       serial_delay_half1();   // read the middle of pulses
 329       if( serial_read_pin() ) {
 330           byte = (byte << 1) | 1; p ^= 1;
 331       } else {
 332           byte = (byte << 1) | 0; p ^= 0;
 333       }
 334       _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
 335       serial_delay_half2();
 336   }
 337   /* recive parity bit */
 338   serial_delay_half1();   // read the middle of pulses
 339   pb = serial_read_pin();
 340   _delay_sub_us(READ_WRITE_WIDTH_ADJUST);
 341   serial_delay_half2();
 342
 343   *pterrcount += (p != pb)? 1 : 0;
 344
 345   return byte;
 346 }
 347
 348 // Sends a byte with MSB ordering
 349 void serial_write_chunk(uint8_t data, uint8_t bit) NO_INLINE;
 350 void serial_write_chunk(uint8_t data, uint8_t bit) {
 351     uint8_t b, p;
 352     for( p = PARITY, b = 1<<(bit-1); b ; b >>= 1) {
 353         if(data & b) {
 354             serial_high(); p ^= 1;
 355         } else {
 356             serial_low();  p ^= 0;
 357         }
 358         serial_delay();
 359     }
 360     /* send parity bit */
 361     if(p & 1) { serial_high(); }
 362     else      { serial_low(); }
 363     serial_delay();
 364
 365     serial_low(); // sync_send() / senc_recv() need raise edge
 366 }
 367
 368 static void serial_send_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
 369 static
 370 void serial_send_packet(uint8_t *buffer, uint8_t size) {
 371   for (uint8_t i = 0; i < size; ++i) {
 372     uint8_t data;
 373     data = buffer[i];
 374     sync_send();
 375     serial_write_chunk(data,8);
 376   }
 377 }
 378
 379 static uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) NO_INLINE;
 380 static
 381 uint8_t serial_recive_packet(uint8_t *buffer, uint8_t size) {
 382   uint8_t pecount = 0;
 383   for (uint8_t i = 0; i < size; ++i) {
 384     uint8_t data;
 385     sync_recv();
 386     data = serial_read_chunk(&pecount, 8);
 387     buffer[i] = data;
 388   }
 389   return pecount == 0;
 390 }
 391
 392 inline static
 393 void change_sender2reciver(void) {
 394     sync_send();          //0
 395     serial_delay_half1(); //1
 396     serial_low();         //2
 397     serial_input_with_pullup(); //2
 398     serial_delay_half1(); //3
 399 }
 400
 401 inline static
 402 void change_reciver2sender(void) {
 403     sync_recv();     //0
 404     serial_delay();  //1
 405     serial_low();    //3
 406     serial_output(); //3
 407     serial_delay_half1(); //4
 408 }
 409
 410 static inline uint8_t nibble_bits_count(uint8_t bits)
 411 {
 412     bits = (bits & 0x5) + (bits >> 1 & 0x5);
 413     bits = (bits & 0x3) + (bits >> 2 & 0x3);
 414     return bits;
 415 }
 416
 417 // interrupt handle to be used by the target device
 418 ISR(SERIAL_PIN_INTERRUPT) {
 419
 420 #ifndef SERIAL_USE_MULTI_TRANSACTION
 421   serial_low();
 422   serial_output();
 423   SSTD_t *trans = Transaction_table;
 424 #else
 425   // recive transaction table index
 426   uint8_t tid, bits;
 427   uint8_t pecount = 0;
 428   sync_recv();
 429   bits = serial_read_chunk(&pecount,7);
 430   tid = bits>>3;
 431   bits = (bits&7) != nibble_bits_count(tid);
 432   if( bits || pecount> 0 || tid > Transaction_table_size ) {
 433       return;
 434   }
 435   serial_delay_half1();
 436
 437   serial_high(); // response step1 low->high
 438   serial_output();
 439   _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT*SLAVE_INT_ACK_WIDTH);
 440   SSTD_t *trans = &Transaction_table[tid];
 441   serial_low(); // response step2 ack high->low
 442 #endif
 443
 444   // target send phase
 445   if( trans->target2initiator_buffer_size > 0 )
 446       serial_send_packet((uint8_t *)trans->target2initiator_buffer,
 447                          trans->target2initiator_buffer_size);
 448   // target switch to input
 449   change_sender2reciver();
 450
 451   // target recive phase
 452   if( trans->initiator2target_buffer_size > 0 ) {
 453       if (serial_recive_packet((uint8_t *)trans->initiator2target_buffer,
 454                                trans->initiator2target_buffer_size) ) {
 455           *trans->status = TRANSACTION_ACCEPTED;
 456       } else {
 457           *trans->status = TRANSACTION_DATA_ERROR;
 458       }
 459   } else {
 460       *trans->status = TRANSACTION_ACCEPTED;
 461   }
 462
 463   sync_recv(); //weit initiator output to high
 464 }
 465
 466 /////////
 467 //  start transaction by initiator
 468 //
 469 // int  soft_serial_transaction(int sstd_index)
 470 //
 471 // Returns:
 472 //    TRANSACTION_END
 473 //    TRANSACTION_NO_RESPONSE
 474 //    TRANSACTION_DATA_ERROR
 475 // this code is very time dependent, so we need to disable interrupts
 476 #ifndef SERIAL_USE_MULTI_TRANSACTION
 477 int  soft_serial_transaction(void) {
 478   SSTD_t *trans = Transaction_table;
 479 #else
 480 int  soft_serial_transaction(int sstd_index) {
 481   if( sstd_index > Transaction_table_size )
 482       return TRANSACTION_TYPE_ERROR;
 483   SSTD_t *trans = &Transaction_table[sstd_index];
 484 #endif
 485   cli();
 486
 487   // signal to the target that we want to start a transaction
 488   serial_output();
 489   serial_low();
 490   _delay_us(SLAVE_INT_WIDTH_US);
 491
 492 #ifndef SERIAL_USE_MULTI_TRANSACTION
 493   // wait for the target response
 494   serial_input_with_pullup();
 495   _delay_us(SLAVE_INT_RESPONSE_TIME);
 496
 497   // check if the target is present
 498   if (serial_read_pin()) {
 499     // target failed to pull the line low, assume not present
 500     serial_output();
 501     serial_high();
 502     *trans->status = TRANSACTION_NO_RESPONSE;
 503     sei();
 504     return TRANSACTION_NO_RESPONSE;
 505   }
 506
 507 #else
 508   // send transaction table index
 509   int tid = (sstd_index<<3) | (7 & nibble_bits_count(sstd_index));
 510   sync_send();
 511   _delay_sub_us(TID_SEND_ADJUST);
 512   serial_write_chunk(tid, 7);
 513   serial_delay_half1();
 514
 515   // wait for the target response (step1 low->high)
 516   serial_input_with_pullup();
 517   while( !serial_read_pin() ) {
 518       _delay_sub_us(2);
 519   }
 520
 521   // check if the target is present (step2 high->low)
 522   for( int i = 0; serial_read_pin(); i++ ) {
 523       if (i > SLAVE_INT_ACK_WIDTH + 1) {
 524           // slave failed to pull the line low, assume not present
 525           serial_output();
 526           serial_high();
 527           *trans->status = TRANSACTION_NO_RESPONSE;
 528           sei();
 529           return TRANSACTION_NO_RESPONSE;
 530       }
 531       _delay_sub_us(SLAVE_INT_ACK_WIDTH_UNIT);
 532   }
 533 #endif
 534
 535   // initiator recive phase
 536   // if the target is present syncronize with it
 537   if( trans->target2initiator_buffer_size > 0 ) {
 538       if (!serial_recive_packet((uint8_t *)trans->target2initiator_buffer,
 539                                 trans->target2initiator_buffer_size) ) {
 540           serial_output();
 541           serial_high();
 542           *trans->status = TRANSACTION_DATA_ERROR;
 543           sei();
 544           return TRANSACTION_DATA_ERROR;
 545       }
 546    }
 547
 548   // initiator switch to output
 549   change_reciver2sender();
 550
 551   // initiator send phase
 552   if( trans->initiator2target_buffer_size > 0 ) {
 553       serial_send_packet((uint8_t *)trans->initiator2target_buffer,
 554                          trans->initiator2target_buffer_size);
 555   }
 556
 557   // always, release the line when not in use
 558   sync_send();
 559
 560   *trans->status = TRANSACTION_END;
 561   sei();
 562   return TRANSACTION_END;
 563 }
 564
 565 #ifdef SERIAL_USE_MULTI_TRANSACTION
 566 int soft_serial_get_and_clean_status(int sstd_index) {
 567     SSTD_t *trans = &Transaction_table[sstd_index];
 568     cli();
 569     int retval = *trans->status;
 570     *trans->status = 0;;
 571     sei();
 572     return retval;
 573 }
 574 #endif
 575
 576 #endif
 577
 578 // Helix serial.c history
 579 //   2018-1-29 fork from let's split and add PD2, modify sync_recv() (#2308, bceffdefc)
 580 //   2018-6-28 bug fix master to slave comm and speed up (#3255, 1038bbef4)
 581 //             (adjusted with avr-gcc 4.9.2)
 582 //   2018-7-13 remove USE_SERIAL_PD2 macro (#3374, f30d6dd78)
 583 //             (adjusted with avr-gcc 4.9.2)
 584 //   2018-8-11 add support multi-type transaction (#3608, feb5e4aae)
 585 //             (adjusted with avr-gcc 4.9.2)
 586 //   2018-10-21 fix serial and RGB animation conflict (#4191, 4665e4fff)
 587 //             (adjusted with avr-gcc 7.3.0)
 588 //   2018-10-28 re-adjust compiler depend value of delay (#4269, 8517f8a66)
 589 //             (adjusted with avr-gcc 5.4.0, 7.3.0)