| 931a52d1 |
1 | #ifndef CONFIG_H |
| 2 | #define CONFIG_H |
| 3 | |
| 4 | #include "config_common.h" |
| 5 | |
| 6 | /* USB Device descriptor parameter */ |
| 7 | #define VENDOR_ID 0xFEED |
| 8 | #define PRODUCT_ID 0x6060 |
| 9 | #define DEVICE_VER 0x0001 |
| 10 | #define MANUFACTURER inachie |
| 11 | #define PRODUCT paladin64 |
| 12 | #define DESCRIPTION Paladin64 ALPS 64 keyboard with trackpoint and underglow |
| 13 | |
| 14 | /* key matrix size */ |
| 15 | #define MATRIX_ROWS 8 |
| 16 | #define MATRIX_COLS 8 |
| 17 | |
| 18 | #ifdef PS2_USE_USART |
| 19 | #define PS2_CLOCK_PORT PORTD |
| 20 | #define PS2_CLOCK_PIN PIND |
| 21 | #define PS2_CLOCK_DDR DDRD |
| 22 | #define PS2_CLOCK_BIT 5 |
| 23 | #define PS2_DATA_PORT PORTD |
| 24 | #define PS2_DATA_PIN PIND |
| 25 | #define PS2_DATA_DDR DDRD |
| 26 | #define PS2_DATA_BIT 2 |
| 27 | |
| 28 | /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling |
| 29 | * edge */ |
| 30 | /* set DDR of CLOCK as input to be slave */ |
| 31 | #define PS2_USART_INIT() do { \ |
| 32 | PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \ |
| 33 | PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \ |
| 34 | UCSR1C = ((1 << UMSEL10) | \ |
| 35 | (3 << UPM10) | \ |
| 36 | (0 << USBS1) | \ |
| 37 | (3 << UCSZ10) | \ |
| 38 | (0 << UCPOL1)); \ |
| 39 | UCSR1A = 0; \ |
| 40 | UBRR1H = 0; \ |
| 41 | UBRR1L = 0; \ |
| 42 | } while (0) |
| 43 | #define PS2_USART_RX_INT_ON() do { \ |
| 44 | UCSR1B = ((1 << RXCIE1) | \ |
| 45 | (1 << RXEN1)); \ |
| 46 | } while (0) |
| 47 | #define PS2_USART_RX_POLL_ON() do { \ |
| 48 | UCSR1B = (1 << RXEN1); \ |
| 49 | } while (0) |
| 50 | #define PS2_USART_OFF() do { \ |
| 51 | UCSR1C = 0; \ |
| 52 | UCSR1B &= ~((1 << RXEN1) | \ |
| 53 | (1 << TXEN1)); \ |
| 54 | } while (0) |
| 55 | #define PS2_USART_RX_READY (UCSR1A & (1<<RXC1)) |
| 56 | #define PS2_USART_RX_DATA UDR1 |
| 57 | #define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1))) |
| 58 | #define PS2_USART_RX_VECT USART1_RX_vect |
| 59 | #endif |
| 60 | |
| 61 | #ifdef PS2_USE_INT |
| 62 | #define PS2_CLOCK_PORT PORTD |
| 63 | #define PS2_CLOCK_PIN PIND |
| 64 | #define PS2_CLOCK_DDR DDRD |
| 65 | #define PS2_CLOCK_BIT 2 |
| 66 | #define PS2_DATA_PORT PORTD |
| 67 | #define PS2_DATA_PIN PIND |
| 68 | #define PS2_DATA_DDR DDRD |
| 69 | #define PS2_DATA_BIT 5 |
| 70 | |
| 71 | #define PS2_INT_INIT() do { \ |
| 72 | EICRA |= ((1<<ISC21) | \ |
| 73 | (0<<ISC20)); \ |
| 74 | } while (0) |
| 75 | #define PS2_INT_ON() do { \ |
| 76 | EIMSK |= (1<<INT2); \ |
| 77 | } while (0) |
| 78 | #define PS2_INT_OFF() do { \ |
| 79 | EIMSK &= ~(1<<INT2); \ |
| 80 | } while (0) |
| 81 | #define PS2_INT_VECT INT2_vect |
| 82 | |
| 83 | #endif |
| 84 | |
| 85 | /* key matrix pins */ |
| 86 | #define MATRIX_ROW_PINS { C6, B6, B5, B4, D7, D6, B0, D3 } |
| 87 | #define MATRIX_COL_PINS { C7, F7, F6, F5, F4, F1, F0, D1 } |
| 88 | #define UNUSED_PINS |
| 89 | |
| 90 | /* COL2ROW or ROW2COL */ |
| 91 | #define DIODE_DIRECTION COL2ROW |
| 92 | |
| 93 | /* number of backlight levels */ |
| 94 | |
| 95 | #ifdef BACKLIGHT_PIN |
| 96 | #define BACKLIGHT_LEVELS 3 |
| 97 | #endif |
| 98 | |
| 99 | /* Set 0 if debouncing isn't needed */ |
| faaaa134 |
100 | #define DEBOUNCE 5 |
| 931a52d1 |
101 | |
| 102 | /* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */ |
| 103 | #define LOCKING_SUPPORT_ENABLE |
| 104 | |
| 105 | /* Locking resynchronize hack */ |
| 106 | #define LOCKING_RESYNC_ENABLE |
| 107 | |
| 931a52d1 |
108 | #define RGB_DI_PIN D0 |
| 109 | #ifdef RGB_DI_PIN |
| 110 | #define RGBLIGHT_ANIMATIONS |
| 111 | #define RGBLED_NUM 14 |
| 112 | #define RGBLIGHT_HUE_STEP 10 |
| 113 | #define RGBLIGHT_SAT_STEP 17 |
| 114 | #define RGBLIGHT_VAL_STEP 12 |
| 115 | #endif |
| 116 | |
| 117 | #endif |
HCoop / jackhill / qmk / firmware.git / blame