[jackhill/guix/guix.git] / gnu / packages / fpga.scm

;;; GNU Guix --- Functional package management for GNU
;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
;;; Copyright © 2016, 2017 Theodoros Foradis <theodoros@foradis.org>
;;; Copyright © 2018, 2019 Tobias Geerinckx-Rice <me@tobias.gr>
;;; Copyright © 2019 Amin Bandali <mab@gnu.org>
;;;
;;; This file is part of GNU Guix.
;;;
;;; GNU Guix is free software; you can redistribute it and/or modify it
;;; under the terms of the GNU General Public License as published by
;;; the Free Software Foundation; either version 3 of the License, or (at
;;; your option) any later version.
;;;
;;; GNU Guix is distributed in the hope that it will be useful, but
;;; WITHOUT ANY WARRANTY; without even the implied warranty of
;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;;; GNU General Public License for more details.
;;;
;;; You should have received a copy of the GNU General Public License
;;; along with GNU Guix.  If not, see <http://www.gnu.org/licenses/>.

(define-module (gnu packages fpga)
  #:use-module ((guix licenses) #:prefix license:)
  #:use-module (guix packages)
  #:use-module (guix download)
  #:use-module (guix git-download)
  #:use-module (guix build-system gnu)
  #:use-module (guix build-system cmake)
  #:use-module (gnu packages)
  #:use-module (gnu packages compression)
  #:use-module (gnu packages pkg-config)
  #:use-module (gnu packages tcl)
  #:use-module (gnu packages readline)
  #:use-module (gnu packages python)
  #:use-module (gnu packages bison)
  #:use-module (gnu packages flex)
  #:use-module (gnu packages gtk)
  #:use-module (gnu packages graphviz)
  #:use-module (gnu packages libffi)
  #:use-module (gnu packages linux)
  #:use-module (gnu packages maths)
  #:use-module (gnu packages perl)
  #:use-module (gnu packages ghostscript)
  #:use-module (gnu packages gperf)
  #:use-module (gnu packages gawk)
  #:use-module (gnu packages version-control)
  #:use-module (gnu packages libftdi))

(define-public abc
 (let ((commit "5ae4b975c49c")
       (revision "1"))
  (package
    (name "abc")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method url-fetch)
              (uri
               (string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
              (file-name (string-append name "-" version "-checkout.zip"))
              (sha256
                (base32
                   "1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("unzip" ,unzip)))
    (inputs
     `(("readline" ,readline)))
    (arguments
     `(#:tests? #f ; no check target
       #:phases
       (modify-phases %standard-phases
         (delete 'configure)
         (replace 'install
           (lambda* (#:key outputs #:allow-other-keys)
             (let* ((out (assoc-ref outputs "out"))
                    (out-bin (string-append out "/bin")))
               (install-file "abc" out-bin)))))))
    (home-page "http://people.eecs.berkeley.edu/~alanmi/abc/")
    (synopsis "Sequential logic synthesis and formal verification")
    (description "ABC is a program for sequential logic synthesis and
formal verification.")
    (license
      (license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))

(define-public iverilog
  (package
    (name "iverilog")
    (version "10.3")
    (source (origin
              (method url-fetch)
              (uri
               (string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
                              "verilog-" version ".tar.gz"))
              (sha256
               (base32
                "1vv88ckvfwq7mrysyjnilsrcrzm9d173kp9w5ivwh6rdw7klbgc6"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("flex" ,flex)
       ("bison" ,bison)
       ("ghostscript" ,ghostscript)))   ; ps2pdf
    (home-page "http://iverilog.icarus.com/")
    (synopsis "FPGA Verilog simulation and synthesis tool")
    (description "Icarus Verilog is a Verilog simulation and synthesis tool.
It operates as a compiler, compiling source code written in Verilog
(IEEE-1364) into some target format.
For batch simulation, the compiler can generate an intermediate form
called vvp assembly.
This intermediate form is executed by @command{vvp}.
For synthesis, the compiler generates netlists in the desired format.")
    ;; GPL2 only because of:
    ;; - ./driver/iverilog.man.in
    ;; - ./iverilog-vpi.man.in
    ;; - ./tgt-fpga/iverilog-fpga.man
    ;; - ./vvp/vvp.man.in
    ;; Otherwise would be GPL2+.
    ;; You have to accept both GPL2 and LGPL2.1+.
    (license (list license:gpl2 license:lgpl2.1+))))

(define-public yosys
  (package
    (name "yosys")
    (version "0.9")
    (source (origin
              (method git-fetch)
              (uri (git-reference
                    (url "https://github.com/cliffordwolf/yosys.git")
                    (commit (string-append "yosys-" version))
                    (recursive? #t))) ; for the ‘iverilog’ submodule
              (sha256
                (base32
                   "0lb9r055h8y1vj2z8gm4ip0v06j5mk7f9zx9gi67kkqb7g4rhjli"))
              (file-name (git-file-name name version))
              (modules '((guix build utils)))
              (snippet
               '(begin
                  (substitute* "Makefile"
                    (("ABCREV = .*") "ABCREV = default\n"))
                  #t))))
    (build-system gnu-build-system)
    (arguments
     `(#:test-target "test"
       #:make-flags (list "CC=gcc"
                          "CXX=g++"
                          (string-append "PREFIX=" %output))
       #:phases
       (modify-phases %standard-phases
         (add-before 'configure 'fix-paths
           (lambda _
             (substitute* "./passes/cmds/show.cc"
               (("exec xdot") (string-append "exec " (which "xdot")))
               (("dot -") (string-append (which "dot") " -"))
               (("fuser") (which "fuser")))
             #t))
         (replace 'configure
           (lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
             (apply invoke "make" "config-gcc" make-flags)))
         (add-after 'configure 'prepare-abc
           (lambda* (#:key inputs #:allow-other-keys)
             (let* ((sourceabc (assoc-ref inputs "abc"))
                    (sourcebin (string-append sourceabc "/bin"))
                    (source (string-append sourcebin "/abc")))
                   (mkdir-p "abc")
                   (call-with-output-file "abc/Makefile"
                     (lambda (port)
                       (format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
                   (copy-file source "abc/abc")
                   (invoke "chmod" "+w" "abc/abc"))))
          (add-before 'check 'fix-iverilog-references
             (lambda* (#:key inputs native-inputs #:allow-other-keys)
               (let* ((xinputs (or native-inputs inputs))
                      (xdirname (assoc-ref xinputs "iverilog"))
                      (iverilog (string-append xdirname "/bin/iverilog")))
                     (substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
                                    "./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
                                    "./techlibs/ice40/tests/test_bram.sh"
                                    "./techlibs/ice40/tests/test_ffs.sh"
                                    "./techlibs/xilinx/tests/bram1.sh"
                                    "./techlibs/xilinx/tests/bram2.sh"
                                    "./tests/bram/run-single.sh"
                                    "./tests/realmath/run-test.sh"
                                    "./tests/simple/run-test.sh"
                                    "./tests/techmap/mem_simple_4x1_runtest.sh"
                                    "./tests/tools/autotest.sh"
                                    "./tests/vloghtb/common.sh")
                        (("if ! which iverilog") "if ! true")
                        (("iverilog ") (string-append iverilog " "))
                        (("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
                                                                iverilog "\"")))
                     #t))))))
    (native-inputs
     `(("pkg-config" ,pkg-config)
       ("python" ,python)
       ("bison" ,bison)
       ("flex" ,flex)
       ("gawk" , gawk) ; for the tests and "make" progress pretty-printing
       ("tcl" ,tcl) ; tclsh for the tests
       ("iverilog" ,iverilog))) ; for the tests
    (inputs
     `(("tcl" ,tcl)
       ("readline" ,readline)
       ("libffi" ,libffi)
       ("graphviz" ,graphviz)
       ("psmisc" ,psmisc)
       ("xdot" ,xdot)
       ("abc" ,abc)))
    (propagated-inputs
     `(("z3" ,z3))) ; should be in path for yosys-smtbmc
    (home-page "http://www.clifford.at/yosys/")
    (synopsis "FPGA Verilog RTL synthesizer")
    (description "Yosys synthesizes Verilog-2005.")
    (license license:isc)))

(define-public icestorm
  (let ((commit "c0cbae88ab47a3879aacf80d53b6a85710682a6b")
        (revision "2"))
   (package
    (name "icestorm")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method git-fetch)
              (uri (git-reference
                     (url "https://github.com/cliffordwolf/icestorm.git")
                     (commit commit)))
              (file-name (string-append name "-" version "-checkout"))
              (sha256
                (base32
                   "0bqm0rpywm64yvbq75klpyzb1g9sdsp1kvdlyqg4hvm8jw9w8lya"))))
    (build-system gnu-build-system)
    (arguments
     `(#:tests? #f ; no unit tests that don't need an FPGA exist.
       #:make-flags (list "CC=gcc" "CXX=g++"
                          (string-append "PREFIX=" (assoc-ref %outputs "out")))
       #:phases
        (modify-phases %standard-phases
          (add-after 'unpack 'remove-usr-local
            (lambda _
              (substitute* "iceprog/Makefile"
                (("-I/usr/local/include") "")
                (("-L/usr/local/lib") ""))
              #t))
          (add-after 'remove-usr-local 'fix-usr-local
            (lambda* (#:key outputs #:allow-other-keys)
              (substitute* "icebox/icebox_vlog.py"
                (("/usr/local/share") (string-append (assoc-ref outputs "out") "/share")))
              #t))
          (delete 'configure))))
    (inputs
     `(("libftdi" ,libftdi)))
    (native-inputs
     `(("python-3" ,python)
       ("pkg-config" ,pkg-config)))
    (home-page "http://www.clifford.at/icestorm/")
    (synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
    (description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
Includes the actual FTDI connector.")
    (license license:isc))))

(define-public arachne-pnr
  (let ((commit "840bdfdeb38809f9f6af4d89dd7b22959b176fdd")
        (revision "2"))
   (package
    (name "arachne-pnr")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method git-fetch)
              (uri (git-reference
                     (url "https://github.com/YosysHQ/arachne-pnr.git")
                     (commit commit)))
              (file-name (string-append name "-" version "-checkout"))
              (sha256
                (base32
                   "1dqvjvgvsridybishv4pnigw9gypxh7r7nrqp9z9qq92v7c5rxzl"))))
    (build-system gnu-build-system)
    (arguments
     `(#:test-target "test"
       #:make-flags
       (list (string-append "DESTDIR=" (assoc-ref %outputs "out"))
             (string-append "ICEBOX=" (string-append
                                       (assoc-ref %build-inputs "icestorm")
                                       "/share/icebox")))
       #:phases (modify-phases %standard-phases
       (replace 'configure
         (lambda* (#:key outputs inputs #:allow-other-keys)
           (substitute* '("./tests/fsm/generate.py"
                          "./tests/combinatorial/generate.py")
             (("#!/usr/bin/python") "#!/usr/bin/python2"))
           #t)))))
    (inputs
     `(("icestorm" ,icestorm)))
    (native-inputs
     `(("git" ,git)  ; for determining its own version string
       ("yosys" ,yosys) ; for tests
       ("perl" ,perl) ; for shasum
       ("python-2" ,python-2))) ; for tests
    (home-page "https://github.com/YosysHQ/arachne-pnr")
    (synopsis "Place-and-Route tool for FPGAs")
    (description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
    (license license:gpl2))))

(define-public gtkwave
  (package
    (name "gtkwave")
    (version "3.3.101")
    (source (origin
              (method url-fetch)
              (uri (string-append "http://gtkwave.sourceforge.net/"
                                  "gtkwave-" version ".tar.gz"))
              (sha256
               (base32
                "1j6capxwgi8aj3sgqg1r7161icni9y8y93g1rl3bzd3s40jcyhsz"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("gperf" ,gperf)
       ("pkg-config" ,pkg-config)))
    (inputs
     `(("tcl" ,tcl)
       ("tk" ,tk)
       ("gtk+-2" ,gtk+-2)))
    (arguments
     `(#:configure-flags
       (list (string-append "--with-tcl="
                            (assoc-ref %build-inputs "tcl")
                            "/lib")
             (string-append "--with-tk="
                            (assoc-ref %build-inputs "tk")
                            "/lib"))))

    (synopsis "Waveform viewer for FPGA simulator trace files")
    (description "This package is a waveform viewer for FPGA
simulator trace files (@dfn{FST}).")
    (home-page "http://gtkwave.sourceforge.net/")
    ;; Exception against free government use in tcl_np.c and tcl_np.h.
    (license (list license:gpl2+ license:expat license:tcl/tk))))
Commit	Line	Data
adba5f08 DM	1	;;; GNU Guix --- Functional package management for GNU
adba5f08 DM	2	;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
d109b1e8	3	;;; Copyright © 2016, 2017 Theodoros Foradis <theodoros@foradis.org>
7e6764c1	4	;;; Copyright © 2018, 2019 Tobias Geerinckx-Rice <me@tobias.gr>
a3143063	5	;;; Copyright © 2019 Amin Bandali <mab@gnu.org>
adba5f08 DM	6	;;;
	7	;;; This file is part of GNU Guix.
	8	;;;
	9	;;; GNU Guix is free software; you can redistribute it and/or modify it
	10	;;; under the terms of the GNU General Public License as published by
	11	;;; the Free Software Foundation; either version 3 of the License, or (at
	12	;;; your option) any later version.
	13	;;;
	14	;;; GNU Guix is distributed in the hope that it will be useful, but
	15	;;; WITHOUT ANY WARRANTY; without even the implied warranty of
	16	;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	;;; GNU General Public License for more details.
	18	;;;
	19	;;; You should have received a copy of the GNU General Public License
	20	;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>.
	21
	22	(define-module (gnu packages fpga)
	23	#:use-module ((guix licenses) #:prefix license:)
	24	#:use-module (guix packages)
	25	#:use-module (guix download)
	26	#:use-module (guix git-download)
	27	#:use-module (guix build-system gnu)
	28	#:use-module (guix build-system cmake)
	29	#:use-module (gnu packages)
148585c2	30	#:use-module (gnu packages compression)
adba5f08 DM	31	#:use-module (gnu packages pkg-config)
	32	#:use-module (gnu packages tcl)
	33	#:use-module (gnu packages readline)
	34	#:use-module (gnu packages python)
	35	#:use-module (gnu packages bison)
	36	#:use-module (gnu packages flex)
adc2f048	37	#:use-module (gnu packages gtk)
f90f6b68	38	#:use-module (gnu packages graphviz)
adba5f08	39	#:use-module (gnu packages libffi)
f90f6b68	40	#:use-module (gnu packages linux)
85cdab64	41	#:use-module (gnu packages maths)
adba5f08 DM	42	#:use-module (gnu packages perl)
adba5f08 DM	43	#:use-module (gnu packages ghostscript)
adc2f048	44	#:use-module (gnu packages gperf)
adba5f08 DM	45	#:use-module (gnu packages gawk)
	46	#:use-module (gnu packages version-control)
	47	#:use-module (gnu packages libftdi))
	48
	49	(define-public abc
	50	(let ((commit "5ae4b975c49c")
	51	(revision "1"))
	52	(package
	53	(name "abc")
	54	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	55	(source (origin
	56	(method url-fetch)
	57	(uri
	58	(string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
	59	(file-name (string-append name "-" version "-checkout.zip"))
	60	(sha256
	61	(base32
	62	"1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
	63	(build-system gnu-build-system)
	64	(native-inputs
	65	`(("unzip" ,unzip)))
	66	(inputs
	67	`(("readline" ,readline)))
	68	(arguments
	69	`(#:tests? #f ; no check target
	70	#:phases
	71	(modify-phases %standard-phases
	72	(delete 'configure)
	73	(replace 'install
	74	(lambda* (#:key outputs #:allow-other-keys)
	75	(let* ((out (assoc-ref outputs "out"))
	76	(out-bin (string-append out "/bin")))
	77	(install-file "abc" out-bin)))))))
	78	(home-page "http://people.eecs.berkeley.edu/~alanmi/abc/")
	79	(synopsis "Sequential logic synthesis and formal verification")
	80	(description "ABC is a program for sequential logic synthesis and
	81	formal verification.")
	82	(license
	83	(license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))
44721336 DM	84
	85	(define-public iverilog
	86	(package
	87	(name "iverilog")
f27cb0f1	88	(version "10.3")
44721336 DM	89	(source (origin
	90	(method url-fetch)
	91	(uri
	92	(string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
	93	"verilog-" version ".tar.gz"))
	94	(sha256
f27cb0f1 TGR	95	(base32
f27cb0f1 TGR	96	"1vv88ckvfwq7mrysyjnilsrcrzm9d173kp9w5ivwh6rdw7klbgc6"))))
44721336 DM	97	(build-system gnu-build-system)
	98	(native-inputs
	99	`(("flex" ,flex)
	100	("bison" ,bison)
f27cb0f1	101	("ghostscript" ,ghostscript))) ; ps2pdf
44721336 DM	102	(home-page "http://iverilog.icarus.com/")
	103	(synopsis "FPGA Verilog simulation and synthesis tool")
	104	(description "Icarus Verilog is a Verilog simulation and synthesis tool.
	105	It operates as a compiler, compiling source code written in Verilog
	106	(IEEE-1364) into some target format.
	107	For batch simulation, the compiler can generate an intermediate form
	108	called vvp assembly.
77659ff3	109	This intermediate form is executed by @command{vvp}.
44721336 DM	110	For synthesis, the compiler generates netlists in the desired format.")
	111	;; GPL2 only because of:
	112	;; - ./driver/iverilog.man.in
	113	;; - ./iverilog-vpi.man.in
	114	;; - ./tgt-fpga/iverilog-fpga.man
	115	;; - ./vvp/vvp.man.in
	116	;; Otherwise would be GPL2+.
	117	;; You have to accept both GPL2 and LGPL2.1+.
	118	(license (list license:gpl2 license:lgpl2.1+))))
92fc940f DM	119
	120	(define-public yosys
	121	(package
	122	(name "yosys")
922c8486	123	(version "0.9")
92fc940f	124	(source (origin
21fc352b TGR	125	(method git-fetch)
	126	(uri (git-reference
	127	(url "https://github.com/cliffordwolf/yosys.git")
	128	(commit (string-append "yosys-" version))
	129	(recursive? #t))) ; for the ‘iverilog’ submodule
92fc940f DM	130	(sha256
92fc940f DM	131	(base32
922c8486	132	"0lb9r055h8y1vj2z8gm4ip0v06j5mk7f9zx9gi67kkqb7g4rhjli"))
21fc352b	133	(file-name (git-file-name name version))
92fc940f DM	134	(modules '((guix build utils)))
92fc940f DM	135	(snippet
6cbee49d MW	136	'(begin
	137	(substitute* "Makefile"
	138	(("ABCREV = .*") "ABCREV = default\n"))
	139	#t))))
92fc940f DM	140	(build-system gnu-build-system)
	141	(arguments
	142	`(#:test-target "test"
	143	#:make-flags (list "CC=gcc"
	144	"CXX=g++"
	145	(string-append "PREFIX=" %output))
	146	#:phases
	147	(modify-phases %standard-phases
f90f6b68 TF	148	(add-before 'configure 'fix-paths
	149	(lambda _
	150	(substitute* "./passes/cmds/show.cc"
	151	(("exec xdot") (string-append "exec " (which "xdot")))
	152	(("dot -") (string-append (which "dot") " -"))
	153	(("fuser") (which "fuser")))
	154	#t))
92fc940f DM	155	(replace 'configure
92fc940f DM	156	(lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
99f6ef9a	157	(apply invoke "make" "config-gcc" make-flags)))
92fc940f DM	158	(add-after 'configure 'prepare-abc
	159	(lambda* (#:key inputs #:allow-other-keys)
	160	(let* ((sourceabc (assoc-ref inputs "abc"))
	161	(sourcebin (string-append sourceabc "/bin"))
	162	(source (string-append sourcebin "/abc")))
	163	(mkdir-p "abc")
	164	(call-with-output-file "abc/Makefile"
	165	(lambda (port)
	166	(format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
	167	(copy-file source "abc/abc")
99f6ef9a	168	(invoke "chmod" "+w" "abc/abc"))))
92fc940f DM	169	(add-before 'check 'fix-iverilog-references
	170	(lambda* (#:key inputs native-inputs #:allow-other-keys)
	171	(let* ((xinputs (or native-inputs inputs))
	172	(xdirname (assoc-ref xinputs "iverilog"))
	173	(iverilog (string-append xdirname "/bin/iverilog")))
	174	(substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
	175	"./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
	176	"./techlibs/ice40/tests/test_bram.sh"
	177	"./techlibs/ice40/tests/test_ffs.sh"
	178	"./techlibs/xilinx/tests/bram1.sh"
	179	"./techlibs/xilinx/tests/bram2.sh"
	180	"./tests/bram/run-single.sh"
	181	"./tests/realmath/run-test.sh"
	182	"./tests/simple/run-test.sh"
	183	"./tests/techmap/mem_simple_4x1_runtest.sh"
	184	"./tests/tools/autotest.sh"
	185	"./tests/vloghtb/common.sh")
	186	(("if ! which iverilog") "if ! true")
	187	(("iverilog ") (string-append iverilog " "))
	188	(("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
	189	iverilog "\"")))
	190	#t))))))
92fc940f DM	191	(native-inputs
	192	`(("pkg-config" ,pkg-config)
	193	("python" ,python)
	194	("bison" ,bison)
	195	("flex" ,flex)
	196	("gawk" , gawk) ; for the tests and "make" progress pretty-printing
	197	("tcl" ,tcl) ; tclsh for the tests
	198	("iverilog" ,iverilog))) ; for the tests
	199	(inputs
	200	`(("tcl" ,tcl)
	201	("readline" ,readline)
	202	("libffi" ,libffi)
f90f6b68 TF	203	("graphviz" ,graphviz)
	204	("psmisc" ,psmisc)
	205	("xdot" ,xdot)
92fc940f	206	("abc" ,abc)))
85cdab64 TF	207	(propagated-inputs
85cdab64 TF	208	`(("z3" ,z3))) ; should be in path for yosys-smtbmc
92fc940f DM	209	(home-page "http://www.clifford.at/yosys/")
	210	(synopsis "FPGA Verilog RTL synthesizer")
	211	(description "Yosys synthesizes Verilog-2005.")
	212	(license license:isc)))
36aa11c7 DM	213
36aa11c7 DM	214	(define-public icestorm
72dd271c DM	215	(let ((commit "c0cbae88ab47a3879aacf80d53b6a85710682a6b")
72dd271c DM	216	(revision "2"))
36aa11c7 DM	217	(package
	218	(name "icestorm")
	219	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	220	(source (origin
	221	(method git-fetch)
	222	(uri (git-reference
	223	(url "https://github.com/cliffordwolf/icestorm.git")
	224	(commit commit)))
	225	(file-name (string-append name "-" version "-checkout"))
	226	(sha256
	227	(base32
72dd271c	228	"0bqm0rpywm64yvbq75klpyzb1g9sdsp1kvdlyqg4hvm8jw9w8lya"))))
36aa11c7 DM	229	(build-system gnu-build-system)
	230	(arguments
	231	`(#:tests? #f ; no unit tests that don't need an FPGA exist.
	232	#:make-flags (list "CC=gcc" "CXX=g++"
	233	(string-append "PREFIX=" (assoc-ref %outputs "out")))
	234	#:phases
	235	(modify-phases %standard-phases
	236	(add-after 'unpack 'remove-usr-local
	237	(lambda _
	238	(substitute* "iceprog/Makefile"
	239	(("-I/usr/local/include") "")
	240	(("-L/usr/local/lib") ""))
	241	#t))
b500dc2e TF	242	(add-after 'remove-usr-local 'fix-usr-local
	243	(lambda* (#:key outputs #:allow-other-keys)
	244	(substitute* "icebox/icebox_vlog.py"
	245	(("/usr/local/share") (string-append (assoc-ref outputs "out") "/share")))
	246	#t))
36aa11c7 DM	247	(delete 'configure))))
	248	(inputs
	249	`(("libftdi" ,libftdi)))
	250	(native-inputs
	251	`(("python-3" ,python)
	252	("pkg-config" ,pkg-config)))
	253	(home-page "http://www.clifford.at/icestorm/")
	254	(synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
	255	(description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
	256	Includes the actual FTDI connector.")
	257	(license license:isc))))
bca3797b DM	258
bca3797b DM	259	(define-public arachne-pnr
e82baf69 AB	260	(let ((commit "840bdfdeb38809f9f6af4d89dd7b22959b176fdd")
e82baf69 AB	261	(revision "2"))
bca3797b DM	262	(package
	263	(name "arachne-pnr")
	264	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	265	(source (origin
	266	(method git-fetch)
	267	(uri (git-reference
e82baf69	268	(url "https://github.com/YosysHQ/arachne-pnr.git")
bca3797b DM	269	(commit commit)))
	270	(file-name (string-append name "-" version "-checkout"))
	271	(sha256
	272	(base32
e82baf69	273	"1dqvjvgvsridybishv4pnigw9gypxh7r7nrqp9z9qq92v7c5rxzl"))))
bca3797b DM	274	(build-system gnu-build-system)
	275	(arguments
	276	`(#:test-target "test"
eccd3f6d DM	277	#:make-flags
	278	(list (string-append "DESTDIR=" (assoc-ref %outputs "out"))
	279	(string-append "ICEBOX=" (string-append
	280	(assoc-ref %build-inputs "icestorm")
	281	"/share/icebox")))
bca3797b DM	282	#:phases (modify-phases %standard-phases
	283	(replace 'configure
	284	(lambda* (#:key outputs inputs #:allow-other-keys)
bca3797b DM	285	(substitute* '("./tests/fsm/generate.py"
	286	"./tests/combinatorial/generate.py")
	287	(("#!/usr/bin/python") "#!/usr/bin/python2"))
	288	#t)))))
	289	(inputs
	290	`(("icestorm" ,icestorm)))
	291	(native-inputs
	292	`(("git" ,git) ; for determining its own version string
	293	("yosys" ,yosys) ; for tests
	294	("perl" ,perl) ; for shasum
	295	("python-2" ,python-2))) ; for tests
e82baf69	296	(home-page "https://github.com/YosysHQ/arachne-pnr")
bca3797b DM	297	(synopsis "Place-and-Route tool for FPGAs")
	298	(description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
	299	(license license:gpl2))))
adc2f048 DM	300
	301	(define-public gtkwave
	302	(package
	303	(name "gtkwave")
7e6764c1	304	(version "3.3.101")
adc2f048 DM	305	(source (origin
	306	(method url-fetch)
	307	(uri (string-append "http://gtkwave.sourceforge.net/"
315d7dda	308	"gtkwave-" version ".tar.gz"))
adc2f048 DM	309	(sha256
adc2f048 DM	310	(base32
7e6764c1	311	"1j6capxwgi8aj3sgqg1r7161icni9y8y93g1rl3bzd3s40jcyhsz"))))
adc2f048 DM	312	(build-system gnu-build-system)
	313	(native-inputs
	314	`(("gperf" ,gperf)
	315	("pkg-config" ,pkg-config)))
	316	(inputs
	317	`(("tcl" ,tcl)
	318	("tk" ,tk)
	319	("gtk+-2" ,gtk+-2)))
	320	(arguments
	321	`(#:configure-flags
	322	(list (string-append "--with-tcl="
	323	(assoc-ref %build-inputs "tcl")
	324	"/lib")
	325	(string-append "--with-tk="
	326	(assoc-ref %build-inputs "tk")
	327	"/lib"))))
	328
	329	(synopsis "Waveform viewer for FPGA simulator trace files")
	330	(description "This package is a waveform viewer for FPGA
1e6191bb	331	simulator trace files (@dfn{FST}).")
adc2f048	332	(home-page "http://gtkwave.sourceforge.net/")
1e6191bb	333	;; Exception against free government use in tcl_np.c and tcl_np.h.
adc2f048	334	(license (list license:gpl2+ license:expat license:tcl/tk))))