[jackhill/guix/guix.git] / gnu / packages / fpga.scm

;;; GNU Guix --- Functional package management for GNU
;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
;;; Copyright © 2016, 2017 Theodoros Foradis <theodoros@foradis.org>
;;; Copyright © 2018 Tobias Geerinckx-Rice <me@tobias.gr>
;;;
;;; This file is part of GNU Guix.
;;;
;;; GNU Guix is free software; you can redistribute it and/or modify it
;;; under the terms of the GNU General Public License as published by
;;; the Free Software Foundation; either version 3 of the License, or (at
;;; your option) any later version.
;;;
;;; GNU Guix is distributed in the hope that it will be useful, but
;;; WITHOUT ANY WARRANTY; without even the implied warranty of
;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;;; GNU General Public License for more details.
;;;
;;; You should have received a copy of the GNU General Public License
;;; along with GNU Guix.  If not, see <http://www.gnu.org/licenses/>.

(define-module (gnu packages fpga)
  #:use-module ((guix licenses) #:prefix license:)
  #:use-module (guix packages)
  #:use-module (guix download)
  #:use-module (guix git-download)
  #:use-module (guix build-system gnu)
  #:use-module (guix build-system cmake)
  #:use-module (gnu packages)
  #:use-module (gnu packages compression)
  #:use-module (gnu packages pkg-config)
  #:use-module (gnu packages tcl)
  #:use-module (gnu packages readline)
  #:use-module (gnu packages python)
  #:use-module (gnu packages bison)
  #:use-module (gnu packages flex)
  #:use-module (gnu packages gtk)
  #:use-module (gnu packages graphviz)
  #:use-module (gnu packages libffi)
  #:use-module (gnu packages linux)
  #:use-module (gnu packages maths)
  #:use-module (gnu packages perl)
  #:use-module (gnu packages ghostscript)
  #:use-module (gnu packages gperf)
  #:use-module (gnu packages gawk)
  #:use-module (gnu packages version-control)
  #:use-module (gnu packages libftdi))

(define-public abc
 (let ((commit "5ae4b975c49c")
       (revision "1"))
  (package
    (name "abc")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method url-fetch)
              (uri
               (string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
              (file-name (string-append name "-" version "-checkout.zip"))
              (sha256
                (base32
                   "1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("unzip" ,unzip)))
    (inputs
     `(("readline" ,readline)))
    (arguments
     `(#:tests? #f ; no check target
       #:phases
       (modify-phases %standard-phases
         (delete 'configure)
         (replace 'install
           (lambda* (#:key outputs #:allow-other-keys)
             (let* ((out (assoc-ref outputs "out"))
                    (out-bin (string-append out "/bin")))
               (install-file "abc" out-bin)))))))
    (home-page "http://people.eecs.berkeley.edu/~alanmi/abc/")
    (synopsis "Sequential logic synthesis and formal verification")
    (description "ABC is a program for sequential logic synthesis and
formal verification.")
    (license
      (license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))

(define-public iverilog
  (package
    (name "iverilog")
    (version "10.2")
    (source (origin
              (method url-fetch)
              (uri
               (string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
                              "verilog-" version ".tar.gz"))
              (sha256
                (base32
                   "0075x5nsxwkrgn7b3635il9kw7mslckaji518pdmwdrdn7fxppln"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("flex" ,flex)
       ("bison" ,bison)
       ("ghostscript" ,ghostscript))) ; ps2pdf
    (home-page "http://iverilog.icarus.com/")
    (synopsis "FPGA Verilog simulation and synthesis tool")
    (description "Icarus Verilog is a Verilog simulation and synthesis tool.
It operates as a compiler, compiling source code written in Verilog
(IEEE-1364) into some target format.
For batch simulation, the compiler can generate an intermediate form
called vvp assembly.
This intermediate form is executed by @command{vvp}.
For synthesis, the compiler generates netlists in the desired format.")
    ;; GPL2 only because of:
    ;; - ./driver/iverilog.man.in
    ;; - ./iverilog-vpi.man.in
    ;; - ./tgt-fpga/iverilog-fpga.man
    ;; - ./vvp/vvp.man.in
    ;; Otherwise would be GPL2+.
    ;; You have to accept both GPL2 and LGPL2.1+.
    (license (list license:gpl2 license:lgpl2.1+))))

(define-public yosys
  (package
    (name "yosys")
    (version "0.7")
    (source (origin
              (method url-fetch)
              (uri
               (string-append "https://github.com/cliffordwolf/yosys/archive/"
                              name "-" version ".tar.gz"))
              (sha256
                (base32
                   "0vkfdn4phvkjqlnpqlr6q5f97bgjc3312vj5jf0vf85zqv88dy9x"))
              (file-name (string-append name "-" version "-checkout.tar.gz"))
              (modules '((guix build utils)))
              (snippet
               '(begin
                  (substitute* "Makefile"
                    (("ABCREV = .*") "ABCREV = default\n"))
                  #t))))
    (build-system gnu-build-system)
    (arguments
     `(#:test-target "test"
       #:make-flags (list "CC=gcc"
                          "CXX=g++"
                          (string-append "PREFIX=" %output))
       #:phases
       (modify-phases %standard-phases
         (add-before 'configure 'fix-paths
           (lambda _
             (substitute* "./passes/cmds/show.cc"
               (("exec xdot") (string-append "exec " (which "xdot")))
               (("dot -") (string-append (which "dot") " -"))
               (("fuser") (which "fuser")))
             #t))
         (replace 'configure
           (lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
             (apply invoke "make" "config-gcc" make-flags)))
         (add-after 'configure 'prepare-abc
           (lambda* (#:key inputs #:allow-other-keys)
             (let* ((sourceabc (assoc-ref inputs "abc"))
                    (sourcebin (string-append sourceabc "/bin"))
                    (source (string-append sourcebin "/abc")))
                   (mkdir-p "abc")
                   (call-with-output-file "abc/Makefile"
                     (lambda (port)
                       (format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
                   (copy-file source "abc/abc")
                   (invoke "chmod" "+w" "abc/abc"))))
          (add-before 'check 'fix-iverilog-references
             (lambda* (#:key inputs native-inputs #:allow-other-keys)
               (let* ((xinputs (or native-inputs inputs))
                      (xdirname (assoc-ref xinputs "iverilog"))
                      (iverilog (string-append xdirname "/bin/iverilog")))
                     (substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
                                    "./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
                                    "./techlibs/ice40/tests/test_bram.sh"
                                    "./techlibs/ice40/tests/test_ffs.sh"
                                    "./techlibs/xilinx/tests/bram1.sh"
                                    "./techlibs/xilinx/tests/bram2.sh"
                                    "./tests/bram/run-single.sh"
                                    "./tests/realmath/run-test.sh"
                                    "./tests/simple/run-test.sh"
                                    "./tests/techmap/mem_simple_4x1_runtest.sh"
                                    "./tests/tools/autotest.sh"
                                    "./tests/vloghtb/common.sh")
                        (("if ! which iverilog") "if ! true")
                        (("iverilog ") (string-append iverilog " "))
                        (("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
                                                                iverilog "\"")))
                     #t))))))
    (native-inputs
     `(("pkg-config" ,pkg-config)
       ("python" ,python)
       ("bison" ,bison)
       ("flex" ,flex)
       ("gawk" , gawk) ; for the tests and "make" progress pretty-printing
       ("tcl" ,tcl) ; tclsh for the tests
       ("iverilog" ,iverilog))) ; for the tests
    (inputs
     `(("tcl" ,tcl)
       ("readline" ,readline)
       ("libffi" ,libffi)
       ("graphviz" ,graphviz)
       ("psmisc" ,psmisc)
       ("xdot" ,xdot)
       ("abc" ,abc)))
    (propagated-inputs
     `(("z3" ,z3))) ; should be in path for yosys-smtbmc
    (home-page "http://www.clifford.at/yosys/")
    (synopsis "FPGA Verilog RTL synthesizer")
    (description "Yosys synthesizes Verilog-2005.")
    (license license:isc)))

(define-public icestorm
  (let ((commit "12b2295c9087d94b75e374bb205ae4d76cf17e2f")
        (revision "1"))
   (package
    (name "icestorm")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method git-fetch)
              (uri (git-reference
                     (url "https://github.com/cliffordwolf/icestorm.git")
                     (commit commit)))
              (file-name (string-append name "-" version "-checkout"))
              (sha256
                (base32
                   "1mmzlqvap6w8n4qzv3idvy51arkgn03692ssplwncy3akjrbsd2b"))))
    (build-system gnu-build-system)
    (arguments
     `(#:tests? #f ; no unit tests that don't need an FPGA exist.
       #:make-flags (list "CC=gcc" "CXX=g++"
                          (string-append "PREFIX=" (assoc-ref %outputs "out")))
       #:phases
        (modify-phases %standard-phases
          (add-after 'unpack 'remove-usr-local
            (lambda _
              (substitute* "iceprog/Makefile"
                (("-I/usr/local/include") "")
                (("-L/usr/local/lib") ""))
              #t))
          (add-after 'remove-usr-local 'fix-usr-local
            (lambda* (#:key outputs #:allow-other-keys)
              (substitute* "icebox/icebox_vlog.py"
                (("/usr/local/share") (string-append (assoc-ref outputs "out") "/share")))
              #t))
          (delete 'configure))))
    (inputs
     `(("libftdi" ,libftdi)))
    (native-inputs
     `(("python-3" ,python)
       ("pkg-config" ,pkg-config)))
    (home-page "http://www.clifford.at/icestorm/")
    (synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
    (description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
Includes the actual FTDI connector.")
    (license license:isc))))

(define-public arachne-pnr
  (let ((commit "52e69ed207342710080d85c7c639480e74a021d7")
        (revision "1"))
   (package
    (name "arachne-pnr")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method git-fetch)
              (uri (git-reference
                     (url "https://github.com/cseed/arachne-pnr.git")
                     (commit commit)))
              (file-name (string-append name "-" version "-checkout"))
              (sha256
                (base32
                   "15bdw5yxj76lxrwksp6liwmr6l1x77isf4bs50ys9rsnmiwh8c3w"))))
    (build-system gnu-build-system)
    (arguments
     `(#:test-target "test"
       #:phases (modify-phases %standard-phases
       (replace 'configure
         (lambda* (#:key outputs inputs #:allow-other-keys)
           (substitute* '("Makefile")
             (("DESTDIR = .*") (string-append "DESTDIR = "
                                             (assoc-ref outputs "out")
                                             "\n"))
             (("ICEBOX = .*") (string-append "ICEBOX = "
                                             (assoc-ref inputs "icestorm")
                                             "/share/icebox\n")))
           (substitute* '("./tests/fsm/generate.py"
                          "./tests/combinatorial/generate.py")
             (("#!/usr/bin/python") "#!/usr/bin/python2"))
           #t)))))
    (inputs
     `(("icestorm" ,icestorm)))
    (native-inputs
     `(("git" ,git)  ; for determining its own version string
       ("yosys" ,yosys) ; for tests
       ("perl" ,perl) ; for shasum
       ("python-2" ,python-2))) ; for tests
    (home-page "https://github.com/cseed/arachne-pnr")
    (synopsis "Place-and-Route tool for FPGAs")
    (description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
    (license license:gpl2))))

(define-public gtkwave
  (package
    (name "gtkwave")
    (version "3.3.91")
    (source (origin
              (method url-fetch)
              (uri (string-append "http://gtkwave.sourceforge.net/"
                                  name "-" version ".tar.gz"))
              (sha256
               (base32
                "1vp9qj3wyfwm36jk3pajvi09xvc1m1crf3d4gphfbs6nkyx2z942"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("gperf" ,gperf)
       ("pkg-config" ,pkg-config)))
    (inputs
     `(("tcl" ,tcl)
       ("tk" ,tk)
       ("gtk+-2" ,gtk+-2)))
    (arguments
     `(#:configure-flags
       (list (string-append "--with-tcl="
                            (assoc-ref %build-inputs "tcl")
                            "/lib")
             (string-append "--with-tk="
                            (assoc-ref %build-inputs "tk")
                            "/lib"))))

    (synopsis "Waveform viewer for FPGA simulator trace files")
    (description "This package is a waveform viewer for FPGA
simulator trace files (FST).")
    (home-page "http://gtkwave.sourceforge.net/")
    ;; Exception against free government use in tcl_np.c and tcl_np.h
    (license (list license:gpl2+ license:expat license:tcl/tk))))
Commit	Line	Data
adba5f08 DM	1	;;; GNU Guix --- Functional package management for GNU
adba5f08 DM	2	;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
d109b1e8	3	;;; Copyright © 2016, 2017 Theodoros Foradis <theodoros@foradis.org>
c046904d	4	;;; Copyright © 2018 Tobias Geerinckx-Rice <me@tobias.gr>
adba5f08 DM	5	;;;
	6	;;; This file is part of GNU Guix.
	7	;;;
	8	;;; GNU Guix is free software; you can redistribute it and/or modify it
	9	;;; under the terms of the GNU General Public License as published by
	10	;;; the Free Software Foundation; either version 3 of the License, or (at
	11	;;; your option) any later version.
	12	;;;
	13	;;; GNU Guix is distributed in the hope that it will be useful, but
	14	;;; WITHOUT ANY WARRANTY; without even the implied warranty of
	15	;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	;;; GNU General Public License for more details.
	17	;;;
	18	;;; You should have received a copy of the GNU General Public License
	19	;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>.
	20
	21	(define-module (gnu packages fpga)
	22	#:use-module ((guix licenses) #:prefix license:)
	23	#:use-module (guix packages)
	24	#:use-module (guix download)
	25	#:use-module (guix git-download)
	26	#:use-module (guix build-system gnu)
	27	#:use-module (guix build-system cmake)
	28	#:use-module (gnu packages)
148585c2	29	#:use-module (gnu packages compression)
adba5f08 DM	30	#:use-module (gnu packages pkg-config)
	31	#:use-module (gnu packages tcl)
	32	#:use-module (gnu packages readline)
	33	#:use-module (gnu packages python)
	34	#:use-module (gnu packages bison)
	35	#:use-module (gnu packages flex)
adc2f048	36	#:use-module (gnu packages gtk)
f90f6b68	37	#:use-module (gnu packages graphviz)
adba5f08	38	#:use-module (gnu packages libffi)
f90f6b68	39	#:use-module (gnu packages linux)
85cdab64	40	#:use-module (gnu packages maths)
adba5f08 DM	41	#:use-module (gnu packages perl)
adba5f08 DM	42	#:use-module (gnu packages ghostscript)
adc2f048	43	#:use-module (gnu packages gperf)
adba5f08 DM	44	#:use-module (gnu packages gawk)
	45	#:use-module (gnu packages version-control)
	46	#:use-module (gnu packages libftdi))
	47
	48	(define-public abc
	49	(let ((commit "5ae4b975c49c")
	50	(revision "1"))
	51	(package
	52	(name "abc")
	53	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	54	(source (origin
	55	(method url-fetch)
	56	(uri
	57	(string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
	58	(file-name (string-append name "-" version "-checkout.zip"))
	59	(sha256
	60	(base32
	61	"1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
	62	(build-system gnu-build-system)
	63	(native-inputs
	64	`(("unzip" ,unzip)))
	65	(inputs
	66	`(("readline" ,readline)))
	67	(arguments
	68	`(#:tests? #f ; no check target
	69	#:phases
	70	(modify-phases %standard-phases
	71	(delete 'configure)
	72	(replace 'install
	73	(lambda* (#:key outputs #:allow-other-keys)
	74	(let* ((out (assoc-ref outputs "out"))
	75	(out-bin (string-append out "/bin")))
	76	(install-file "abc" out-bin)))))))
	77	(home-page "http://people.eecs.berkeley.edu/~alanmi/abc/")
	78	(synopsis "Sequential logic synthesis and formal verification")
	79	(description "ABC is a program for sequential logic synthesis and
	80	formal verification.")
	81	(license
	82	(license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))
44721336 DM	83
	84	(define-public iverilog
	85	(package
	86	(name "iverilog")
c046904d	87	(version "10.2")
44721336 DM	88	(source (origin
	89	(method url-fetch)
	90	(uri
	91	(string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
	92	"verilog-" version ".tar.gz"))
	93	(sha256
	94	(base32
c046904d	95	"0075x5nsxwkrgn7b3635il9kw7mslckaji518pdmwdrdn7fxppln"))))
44721336 DM	96	(build-system gnu-build-system)
	97	(native-inputs
	98	`(("flex" ,flex)
	99	("bison" ,bison)
	100	("ghostscript" ,ghostscript))) ; ps2pdf
	101	(home-page "http://iverilog.icarus.com/")
	102	(synopsis "FPGA Verilog simulation and synthesis tool")
	103	(description "Icarus Verilog is a Verilog simulation and synthesis tool.
	104	It operates as a compiler, compiling source code written in Verilog
	105	(IEEE-1364) into some target format.
	106	For batch simulation, the compiler can generate an intermediate form
	107	called vvp assembly.
77659ff3	108	This intermediate form is executed by @command{vvp}.
44721336 DM	109	For synthesis, the compiler generates netlists in the desired format.")
	110	;; GPL2 only because of:
	111	;; - ./driver/iverilog.man.in
	112	;; - ./iverilog-vpi.man.in
	113	;; - ./tgt-fpga/iverilog-fpga.man
	114	;; - ./vvp/vvp.man.in
	115	;; Otherwise would be GPL2+.
	116	;; You have to accept both GPL2 and LGPL2.1+.
	117	(license (list license:gpl2 license:lgpl2.1+))))
92fc940f DM	118
	119	(define-public yosys
	120	(package
	121	(name "yosys")
9a93f574	122	(version "0.7")
92fc940f DM	123	(source (origin
	124	(method url-fetch)
	125	(uri
	126	(string-append "https://github.com/cliffordwolf/yosys/archive/"
	127	name "-" version ".tar.gz"))
	128	(sha256
	129	(base32
9a93f574	130	"0vkfdn4phvkjqlnpqlr6q5f97bgjc3312vj5jf0vf85zqv88dy9x"))
92fc940f DM	131	(file-name (string-append name "-" version "-checkout.tar.gz"))
	132	(modules '((guix build utils)))
	133	(snippet
6cbee49d MW	134	'(begin
	135	(substitute* "Makefile"
	136	(("ABCREV = .*") "ABCREV = default\n"))
	137	#t))))
92fc940f DM	138	(build-system gnu-build-system)
	139	(arguments
	140	`(#:test-target "test"
	141	#:make-flags (list "CC=gcc"
	142	"CXX=g++"
	143	(string-append "PREFIX=" %output))
	144	#:phases
	145	(modify-phases %standard-phases
f90f6b68 TF	146	(add-before 'configure 'fix-paths
	147	(lambda _
	148	(substitute* "./passes/cmds/show.cc"
	149	(("exec xdot") (string-append "exec " (which "xdot")))
	150	(("dot -") (string-append (which "dot") " -"))
	151	(("fuser") (which "fuser")))
	152	#t))
92fc940f DM	153	(replace 'configure
92fc940f DM	154	(lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
99f6ef9a	155	(apply invoke "make" "config-gcc" make-flags)))
92fc940f DM	156	(add-after 'configure 'prepare-abc
	157	(lambda* (#:key inputs #:allow-other-keys)
	158	(let* ((sourceabc (assoc-ref inputs "abc"))
	159	(sourcebin (string-append sourceabc "/bin"))
	160	(source (string-append sourcebin "/abc")))
	161	(mkdir-p "abc")
	162	(call-with-output-file "abc/Makefile"
	163	(lambda (port)
	164	(format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
	165	(copy-file source "abc/abc")
99f6ef9a	166	(invoke "chmod" "+w" "abc/abc"))))
92fc940f DM	167	(add-before 'check 'fix-iverilog-references
	168	(lambda* (#:key inputs native-inputs #:allow-other-keys)
	169	(let* ((xinputs (or native-inputs inputs))
	170	(xdirname (assoc-ref xinputs "iverilog"))
	171	(iverilog (string-append xdirname "/bin/iverilog")))
	172	(substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
	173	"./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
	174	"./techlibs/ice40/tests/test_bram.sh"
	175	"./techlibs/ice40/tests/test_ffs.sh"
	176	"./techlibs/xilinx/tests/bram1.sh"
	177	"./techlibs/xilinx/tests/bram2.sh"
	178	"./tests/bram/run-single.sh"
	179	"./tests/realmath/run-test.sh"
	180	"./tests/simple/run-test.sh"
	181	"./tests/techmap/mem_simple_4x1_runtest.sh"
	182	"./tests/tools/autotest.sh"
	183	"./tests/vloghtb/common.sh")
	184	(("if ! which iverilog") "if ! true")
	185	(("iverilog ") (string-append iverilog " "))
	186	(("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
	187	iverilog "\"")))
	188	#t))))))
92fc940f DM	189	(native-inputs
	190	`(("pkg-config" ,pkg-config)
	191	("python" ,python)
	192	("bison" ,bison)
	193	("flex" ,flex)
	194	("gawk" , gawk) ; for the tests and "make" progress pretty-printing
	195	("tcl" ,tcl) ; tclsh for the tests
	196	("iverilog" ,iverilog))) ; for the tests
	197	(inputs
	198	`(("tcl" ,tcl)
	199	("readline" ,readline)
	200	("libffi" ,libffi)
f90f6b68 TF	201	("graphviz" ,graphviz)
	202	("psmisc" ,psmisc)
	203	("xdot" ,xdot)
92fc940f	204	("abc" ,abc)))
85cdab64 TF	205	(propagated-inputs
85cdab64 TF	206	`(("z3" ,z3))) ; should be in path for yosys-smtbmc
92fc940f DM	207	(home-page "http://www.clifford.at/yosys/")
	208	(synopsis "FPGA Verilog RTL synthesizer")
	209	(description "Yosys synthesizes Verilog-2005.")
	210	(license license:isc)))
36aa11c7 DM	211
	212	(define-public icestorm
	213	(let ((commit "12b2295c9087d94b75e374bb205ae4d76cf17e2f")
	214	(revision "1"))
	215	(package
	216	(name "icestorm")
	217	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	218	(source (origin
	219	(method git-fetch)
	220	(uri (git-reference
	221	(url "https://github.com/cliffordwolf/icestorm.git")
	222	(commit commit)))
	223	(file-name (string-append name "-" version "-checkout"))
	224	(sha256
	225	(base32
	226	"1mmzlqvap6w8n4qzv3idvy51arkgn03692ssplwncy3akjrbsd2b"))))
	227	(build-system gnu-build-system)
	228	(arguments
	229	`(#:tests? #f ; no unit tests that don't need an FPGA exist.
	230	#:make-flags (list "CC=gcc" "CXX=g++"
	231	(string-append "PREFIX=" (assoc-ref %outputs "out")))
	232	#:phases
	233	(modify-phases %standard-phases
	234	(add-after 'unpack 'remove-usr-local
	235	(lambda _
	236	(substitute* "iceprog/Makefile"
	237	(("-I/usr/local/include") "")
	238	(("-L/usr/local/lib") ""))
	239	#t))
b500dc2e TF	240	(add-after 'remove-usr-local 'fix-usr-local
	241	(lambda* (#:key outputs #:allow-other-keys)
	242	(substitute* "icebox/icebox_vlog.py"
	243	(("/usr/local/share") (string-append (assoc-ref outputs "out") "/share")))
	244	#t))
36aa11c7 DM	245	(delete 'configure))))
	246	(inputs
	247	`(("libftdi" ,libftdi)))
	248	(native-inputs
	249	`(("python-3" ,python)
	250	("pkg-config" ,pkg-config)))
	251	(home-page "http://www.clifford.at/icestorm/")
	252	(synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
	253	(description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
	254	Includes the actual FTDI connector.")
	255	(license license:isc))))
bca3797b DM	256
	257	(define-public arachne-pnr
	258	(let ((commit "52e69ed207342710080d85c7c639480e74a021d7")
	259	(revision "1"))
	260	(package
	261	(name "arachne-pnr")
	262	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	263	(source (origin
	264	(method git-fetch)
	265	(uri (git-reference
	266	(url "https://github.com/cseed/arachne-pnr.git")
	267	(commit commit)))
	268	(file-name (string-append name "-" version "-checkout"))
	269	(sha256
	270	(base32
	271	"15bdw5yxj76lxrwksp6liwmr6l1x77isf4bs50ys9rsnmiwh8c3w"))))
	272	(build-system gnu-build-system)
	273	(arguments
	274	`(#:test-target "test"
	275	#:phases (modify-phases %standard-phases
	276	(replace 'configure
	277	(lambda* (#:key outputs inputs #:allow-other-keys)
	278	(substitute* '("Makefile")
	279	(("DESTDIR = .*") (string-append "DESTDIR = "
	280	(assoc-ref outputs "out")
	281	"\n"))
	282	(("ICEBOX = .*") (string-append "ICEBOX = "
	283	(assoc-ref inputs "icestorm")
	284	"/share/icebox\n")))
	285	(substitute* '("./tests/fsm/generate.py"
	286	"./tests/combinatorial/generate.py")
	287	(("#!/usr/bin/python") "#!/usr/bin/python2"))
	288	#t)))))
	289	(inputs
	290	`(("icestorm" ,icestorm)))
	291	(native-inputs
	292	`(("git" ,git) ; for determining its own version string
	293	("yosys" ,yosys) ; for tests
	294	("perl" ,perl) ; for shasum
	295	("python-2" ,python-2))) ; for tests
	296	(home-page "https://github.com/cseed/arachne-pnr")
	297	(synopsis "Place-and-Route tool for FPGAs")
	298	(description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
	299	(license license:gpl2))))
adc2f048 DM	300
	301	(define-public gtkwave
	302	(package
	303	(name "gtkwave")
55e3e1ce	304	(version "3.3.91")
adc2f048 DM	305	(source (origin
	306	(method url-fetch)
	307	(uri (string-append "http://gtkwave.sourceforge.net/"
	308	name "-" version ".tar.gz"))
	309	(sha256
	310	(base32
55e3e1ce	311	"1vp9qj3wyfwm36jk3pajvi09xvc1m1crf3d4gphfbs6nkyx2z942"))))
adc2f048 DM	312	(build-system gnu-build-system)
	313	(native-inputs
	314	`(("gperf" ,gperf)
	315	("pkg-config" ,pkg-config)))
	316	(inputs
	317	`(("tcl" ,tcl)
	318	("tk" ,tk)
	319	("gtk+-2" ,gtk+-2)))
	320	(arguments
	321	`(#:configure-flags
	322	(list (string-append "--with-tcl="
	323	(assoc-ref %build-inputs "tcl")
	324	"/lib")
	325	(string-append "--with-tk="
	326	(assoc-ref %build-inputs "tk")
	327	"/lib"))))
	328
	329	(synopsis "Waveform viewer for FPGA simulator trace files")
	330	(description "This package is a waveform viewer for FPGA
	331	simulator trace files (FST).")
	332	(home-page "http://gtkwave.sourceforge.net/")
	333	;; Exception against free government use in tcl_np.c and tcl_np.h
	334	(license (list license:gpl2+ license:expat license:tcl/tk))))