[jackhill/guix/guix.git] / gnu / packages / fpga.scm

;;; GNU Guix --- Functional package management for GNU
;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
;;; Copyright © 2016, 2017 Theodoros Foradis <theodoros@foradis.org>
;;; Copyright © 2018, 2019, 2020 Tobias Geerinckx-Rice <me@tobias.gr>
;;; Copyright © 2019 Amin Bandali <bandali@gnu.org>
;;;
;;; This file is part of GNU Guix.
;;;
;;; GNU Guix is free software; you can redistribute it and/or modify it
;;; under the terms of the GNU General Public License as published by
;;; the Free Software Foundation; either version 3 of the License, or (at
;;; your option) any later version.
;;;
;;; GNU Guix is distributed in the hope that it will be useful, but
;;; WITHOUT ANY WARRANTY; without even the implied warranty of
;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;;; GNU General Public License for more details.
;;;
;;; You should have received a copy of the GNU General Public License
;;; along with GNU Guix.  If not, see <http://www.gnu.org/licenses/>.

(define-module (gnu packages fpga)
  #:use-module ((guix licenses) #:prefix license:)
  #:use-module (guix packages)
  #:use-module (guix download)
  #:use-module (guix git-download)
  #:use-module (guix build-system gnu)
  #:use-module (guix build-system cmake)
  #:use-module (gnu packages)
  #:use-module (gnu packages compression)
  #:use-module (gnu packages pkg-config)
  #:use-module (gnu packages tcl)
  #:use-module (gnu packages readline)
  #:use-module (gnu packages python)
  #:use-module (gnu packages bison)
  #:use-module (gnu packages flex)
  #:use-module (gnu packages gtk)
  #:use-module (gnu packages graphviz)
  #:use-module (gnu packages libffi)
  #:use-module (gnu packages linux)
  #:use-module (gnu packages maths)
  #:use-module (gnu packages perl)
  #:use-module (gnu packages ghostscript)
  #:use-module (gnu packages gperf)
  #:use-module (gnu packages gawk)
  #:use-module (gnu packages version-control)
  #:use-module (gnu packages qt)
  #:use-module (gnu packages boost)
  #:use-module (gnu packages algebra)
  #:use-module (gnu packages libftdi))

(define-public abc
 (let ((commit "5ae4b975c49c")
       (revision "1"))
  (package
    (name "abc")
    (version (git-version "0.0" revision commit))
    (source (origin
              (method url-fetch)
              (uri
               (string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
              (file-name (string-append name "-" version "-checkout.zip"))
              (sha256
               (base32
                "1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("unzip" ,unzip)))
    (inputs
     `(("readline" ,readline)))
    (arguments
     `(#:tests? #f ; no check target
       #:phases
       (modify-phases %standard-phases
         (delete 'configure)
         (replace 'install
           (lambda* (#:key outputs #:allow-other-keys)
             (let* ((out (assoc-ref outputs "out"))
                    (out-bin (string-append out "/bin")))
               (install-file "abc" out-bin)))))))
    (home-page "https://people.eecs.berkeley.edu/~alanmi/abc/")
    (synopsis "Sequential logic synthesis and formal verification")
    (description "ABC is a program for sequential logic synthesis and
formal verification.")
    (license
      (license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))

(define-public iverilog
  (package
    (name "iverilog")
    (version "10.3")
    (source (origin
              (method url-fetch)
              (uri
               (string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
                              "verilog-" version ".tar.gz"))
              (sha256
               (base32
                "1vv88ckvfwq7mrysyjnilsrcrzm9d173kp9w5ivwh6rdw7klbgc6"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("flex" ,flex)
       ("bison" ,bison)
       ("ghostscript" ,ghostscript)))   ; ps2pdf
    (home-page "http://iverilog.icarus.com/")
    (synopsis "FPGA Verilog simulation and synthesis tool")
    (description "Icarus Verilog is a Verilog simulation and synthesis tool.
It operates as a compiler, compiling source code written in Verilog
(IEEE-1364) into some target format.
For batch simulation, the compiler can generate an intermediate form
called vvp assembly.
This intermediate form is executed by @command{vvp}.
For synthesis, the compiler generates netlists in the desired format.")
    ;; GPL2 only because of:
    ;; - ./driver/iverilog.man.in
    ;; - ./iverilog-vpi.man.in
    ;; - ./tgt-fpga/iverilog-fpga.man
    ;; - ./vvp/vvp.man.in
    ;; Otherwise would be GPL2+.
    ;; You have to accept both GPL2 and LGPL2.1+.
    (license (list license:gpl2 license:lgpl2.1+))))

(define-public yosys
  (package
    (name "yosys")
    (version "0.9")
    (source (origin
              (method git-fetch)
              (uri (git-reference
                    (url "https://github.com/cliffordwolf/yosys")
                    (commit (string-append "yosys-" version))
                    (recursive? #t))) ; for the ‘iverilog’ submodule
              (sha256
                (base32
                   "0lb9r055h8y1vj2z8gm4ip0v06j5mk7f9zx9gi67kkqb7g4rhjli"))
              (file-name (git-file-name name version))
              (modules '((guix build utils)))
              (snippet
               '(begin
                  (substitute* "Makefile"
                    (("ABCREV = .*") "ABCREV = default\n"))
                  #t))))
    (build-system gnu-build-system)
    (arguments
     `(#:test-target "test"
       #:make-flags (list "CC=gcc"
                          "CXX=g++"
                          (string-append "PREFIX=" %output))
       #:phases
       (modify-phases %standard-phases
         (add-before 'configure 'fix-paths
           (lambda _
             (substitute* "./passes/cmds/show.cc"
               (("exec xdot") (string-append "exec " (which "xdot")))
               (("dot -") (string-append (which "dot") " -"))
               (("fuser") (which "fuser")))
             #t))
         (replace 'configure
           (lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
             (apply invoke "make" "config-gcc" make-flags)))
         (add-after 'configure 'prepare-abc
           (lambda* (#:key inputs #:allow-other-keys)
             (let* ((sourceabc (assoc-ref inputs "abc"))
                    (sourcebin (string-append sourceabc "/bin"))
                    (source (string-append sourcebin "/abc")))
                   (mkdir-p "abc")
                   (call-with-output-file "abc/Makefile"
                     (lambda (port)
                       (format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
                   (copy-file source "abc/abc")
                   (invoke "chmod" "+w" "abc/abc"))))
          (add-before 'check 'fix-iverilog-references
             (lambda* (#:key inputs native-inputs #:allow-other-keys)
               (let* ((xinputs (or native-inputs inputs))
                      (xdirname (assoc-ref xinputs "iverilog"))
                      (iverilog (string-append xdirname "/bin/iverilog")))
                     (substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
                                    "./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
                                    "./techlibs/ice40/tests/test_bram.sh"
                                    "./techlibs/ice40/tests/test_ffs.sh"
                                    "./techlibs/xilinx/tests/bram1.sh"
                                    "./techlibs/xilinx/tests/bram2.sh"
                                    "./tests/bram/run-single.sh"
                                    "./tests/realmath/run-test.sh"
                                    "./tests/simple/run-test.sh"
                                    "./tests/techmap/mem_simple_4x1_runtest.sh"
                                    "./tests/tools/autotest.sh"
                                    "./tests/vloghtb/common.sh")
                        (("if ! which iverilog") "if ! true")
                        (("iverilog ") (string-append iverilog " "))
                        (("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
                                                                iverilog "\"")))
                     #t))))))
    (native-inputs
     `(("pkg-config" ,pkg-config)
       ("python" ,python)
       ("bison" ,bison)
       ("flex" ,flex)
       ("gawk" , gawk) ; for the tests and "make" progress pretty-printing
       ("tcl" ,tcl) ; tclsh for the tests
       ("iverilog" ,iverilog))) ; for the tests
    (inputs
     `(("tcl" ,tcl)
       ("readline" ,readline)
       ("libffi" ,libffi)
       ("graphviz" ,graphviz)
       ("psmisc" ,psmisc)
       ("xdot" ,xdot)
       ("abc" ,abc)))
    (propagated-inputs
     `(("z3" ,z3))) ; should be in path for yosys-smtbmc
    (home-page "http://www.clifford.at/yosys/")
    (synopsis "FPGA Verilog RTL synthesizer")
    (description "Yosys synthesizes Verilog-2005.")
    (license license:isc)))

(define-public icestorm
  (let ((commit "0ec00d892a91cc68e45479b46161f649caea2933")
        (revision "3"))
   (package
    (name "icestorm")
    (version (git-version "0.0" revision commit))
    (source (origin
              (method git-fetch)
              (uri (git-reference
                     (url "https://github.com/cliffordwolf/icestorm")
                     (commit commit)))
              (file-name (git-file-name name version))
              (sha256
                (base32
                   "1qlh99fafb7xga702k64fmc9m700nsddrfgcq4x8qn8fplsb64f1"))))
    (build-system gnu-build-system)
    (arguments
     `(#:tests? #f ; no unit tests that don't need an FPGA exist.
       #:make-flags (list "CC=gcc" "CXX=g++"
                          (string-append "PREFIX=" (assoc-ref %outputs "out")))
       #:phases
        (modify-phases %standard-phases
          (add-after 'unpack 'remove-usr-local
            (lambda _
              (substitute* "iceprog/Makefile"
                (("-I/usr/local/include") "")
                (("-L/usr/local/lib") ""))
              #t))
          (add-after 'remove-usr-local 'fix-usr-local
            (lambda* (#:key outputs #:allow-other-keys)
              (substitute* "icebox/icebox_vlog.py"
                (("/usr/local/share") (string-append (assoc-ref outputs "out") "/share")))
              #t))
          (delete 'configure))))
    (inputs
     `(("libftdi" ,libftdi)))
    (native-inputs
     `(("python-3" ,python)
       ("pkg-config" ,pkg-config)))
    (home-page "http://www.clifford.at/icestorm/")
    (synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
    (description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
Includes the actual FTDI connector.")
    (license license:isc))))

(define-public nextpnr-ice40
  (let [(commit "fbe486df459909065d6852a7495a212dfd2accef")
        (revision "1")]
    (package
      (name "nextpnr-ice40")
      (version (git-version "0.0.0" revision commit))
      (source
        (origin
          (method git-fetch)
          (uri (git-reference
                 (url "git://github.com/YosysHQ/nextpnr")
                 (commit commit)))
          (file-name (git-file-name name version))
          (sha256
           (base32
            "1fmxsywgs45g88ra7ips5s2niiiwrkyxdcy742ws18dfk2y4vi9c"))))
      (inputs
       `(("boost" ,boost)
         ("eigen" ,eigen)
         ("icestorm" ,icestorm)
         ("python" ,python)
         ("qtbase" ,qtbase)
         ("yosys" ,yosys)))
      (build-system cmake-build-system)
      (arguments
       `(#:configure-flags `("-DARCH=ice40"
                             ,(string-append "-DICEBOX_ROOT="
                                             (assoc-ref %build-inputs "icestorm")
                                             "/share/icebox"))
         #:tests? #f))
      (synopsis "Place-and-Route tool for FPGAs")
      (description "Nextpnr aims to be a vendor neutral, timing driven,
FOSS FPGA place and route tool.")
      (home-page "https://github.com/YosysHQ/nextpnr")
      (license license:expat))))

(define-public arachne-pnr
  (let ((commit "840bdfdeb38809f9f6af4d89dd7b22959b176fdd")
        (revision "2"))
   (package
    (name "arachne-pnr")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method git-fetch)
              (uri (git-reference
                     (url "https://github.com/YosysHQ/arachne-pnr")
                     (commit commit)))
              (file-name (git-file-name name version))
              (sha256
                (base32
                   "1dqvjvgvsridybishv4pnigw9gypxh7r7nrqp9z9qq92v7c5rxzl"))))
    (build-system gnu-build-system)
    (arguments
     `(#:test-target "test"
       #:make-flags
       (list (string-append "DESTDIR=" (assoc-ref %outputs "out"))
             (string-append "ICEBOX=" (string-append
                                       (assoc-ref %build-inputs "icestorm")
                                       "/share/icebox")))
       #:phases (modify-phases %standard-phases
       (replace 'configure
         (lambda* (#:key outputs inputs #:allow-other-keys)
           (substitute* '("./tests/fsm/generate.py"
                          "./tests/combinatorial/generate.py")
             (("#!/usr/bin/python") "#!/usr/bin/python2"))
           #t)))))
    (inputs
     `(("icestorm" ,icestorm)))
    (native-inputs
     `(("git" ,git)  ; for determining its own version string
       ("yosys" ,yosys) ; for tests
       ("perl" ,perl) ; for shasum
       ("python-2" ,python-2))) ; for tests
    (home-page "https://github.com/YosysHQ/arachne-pnr")
    (synopsis "Place-and-Route tool for FPGAs")
    (description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
    (license license:gpl2))))

(define-public gtkwave
  (package
    (name "gtkwave")
    (version "3.3.106")
    (source
     (origin
       (method url-fetch)
       (uri (list (string-append "mirror://sourceforge/gtkwave/"
                                 "gtkwave-" version "/"
                                 "gtkwave-" version ".tar.gz")
                  (string-append "http://gtkwave.sourceforge.net/"
                                 "gtkwave-" version ".tar.gz")))
       (sha256
        (base32 "1pyij6dlmapjyzrmn255fkf8gyhz8i4vaipd75a68i2bnq021nn8"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("gperf" ,gperf)
       ("pkg-config" ,pkg-config)))
    (inputs
     `(("tcl" ,tcl)
       ("tk" ,tk)
       ("gtk+-2" ,gtk+-2)))
    (arguments
     `(#:configure-flags
       (list (string-append "--with-tcl="
                            (assoc-ref %build-inputs "tcl")
                            "/lib")
             (string-append "--with-tk="
                            (assoc-ref %build-inputs "tk")
                            "/lib"))))

    (synopsis "Waveform viewer for FPGA simulator trace files")
    (description "This package is a waveform viewer for FPGA
simulator trace files (@dfn{FST}).")
    (home-page "http://gtkwave.sourceforge.net/")
    ;; Exception against free government use in tcl_np.c and tcl_np.h.
    (license (list license:gpl2+ license:expat license:tcl/tk))))
Commit	Line	Data
adba5f08 DM	1	;;; GNU Guix --- Functional package management for GNU
adba5f08 DM	2	;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
d109b1e8	3	;;; Copyright © 2016, 2017 Theodoros Foradis <theodoros@foradis.org>
82f81ffa	4	;;; Copyright © 2018, 2019, 2020 Tobias Geerinckx-Rice <me@tobias.gr>
c2cf286c	5	;;; Copyright © 2019 Amin Bandali <bandali@gnu.org>
adba5f08 DM	6	;;;
	7	;;; This file is part of GNU Guix.
	8	;;;
	9	;;; GNU Guix is free software; you can redistribute it and/or modify it
	10	;;; under the terms of the GNU General Public License as published by
	11	;;; the Free Software Foundation; either version 3 of the License, or (at
	12	;;; your option) any later version.
	13	;;;
	14	;;; GNU Guix is distributed in the hope that it will be useful, but
	15	;;; WITHOUT ANY WARRANTY; without even the implied warranty of
	16	;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	;;; GNU General Public License for more details.
	18	;;;
	19	;;; You should have received a copy of the GNU General Public License
	20	;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>.
	21
	22	(define-module (gnu packages fpga)
	23	#:use-module ((guix licenses) #:prefix license:)
	24	#:use-module (guix packages)
	25	#:use-module (guix download)
	26	#:use-module (guix git-download)
	27	#:use-module (guix build-system gnu)
	28	#:use-module (guix build-system cmake)
	29	#:use-module (gnu packages)
148585c2	30	#:use-module (gnu packages compression)
adba5f08 DM	31	#:use-module (gnu packages pkg-config)
	32	#:use-module (gnu packages tcl)
	33	#:use-module (gnu packages readline)
	34	#:use-module (gnu packages python)
	35	#:use-module (gnu packages bison)
	36	#:use-module (gnu packages flex)
adc2f048	37	#:use-module (gnu packages gtk)
f90f6b68	38	#:use-module (gnu packages graphviz)
adba5f08	39	#:use-module (gnu packages libffi)
f90f6b68	40	#:use-module (gnu packages linux)
85cdab64	41	#:use-module (gnu packages maths)
adba5f08 DM	42	#:use-module (gnu packages perl)
adba5f08 DM	43	#:use-module (gnu packages ghostscript)
adc2f048	44	#:use-module (gnu packages gperf)
adba5f08 DM	45	#:use-module (gnu packages gawk)
adba5f08 DM	46	#:use-module (gnu packages version-control)
363989e6	47	#:use-module (gnu packages qt)
	48	#:use-module (gnu packages boost)
	49	#:use-module (gnu packages algebra)
adba5f08 DM	50	#:use-module (gnu packages libftdi))
	51
	52	(define-public abc
	53	(let ((commit "5ae4b975c49c")
	54	(revision "1"))
	55	(package
	56	(name "abc")
ec299312	57	(version (git-version "0.0" revision commit))
adba5f08 DM	58	(source (origin
	59	(method url-fetch)
	60	(uri
	61	(string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
	62	(file-name (string-append name "-" version "-checkout.zip"))
	63	(sha256
ec299312 JK	64	(base32
ec299312 JK	65	"1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
adba5f08 DM	66	(build-system gnu-build-system)
	67	(native-inputs
	68	`(("unzip" ,unzip)))
	69	(inputs
	70	`(("readline" ,readline)))
	71	(arguments
	72	`(#:tests? #f ; no check target
	73	#:phases
	74	(modify-phases %standard-phases
	75	(delete 'configure)
	76	(replace 'install
	77	(lambda* (#:key outputs #:allow-other-keys)
	78	(let* ((out (assoc-ref outputs "out"))
	79	(out-bin (string-append out "/bin")))
	80	(install-file "abc" out-bin)))))))
3bc9f9e7	81	(home-page "https://people.eecs.berkeley.edu/~alanmi/abc/")
adba5f08 DM	82	(synopsis "Sequential logic synthesis and formal verification")
	83	(description "ABC is a program for sequential logic synthesis and
	84	formal verification.")
	85	(license
	86	(license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))
44721336 DM	87
	88	(define-public iverilog
	89	(package
	90	(name "iverilog")
f27cb0f1	91	(version "10.3")
44721336 DM	92	(source (origin
	93	(method url-fetch)
	94	(uri
	95	(string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
	96	"verilog-" version ".tar.gz"))
	97	(sha256
f27cb0f1 TGR	98	(base32
f27cb0f1 TGR	99	"1vv88ckvfwq7mrysyjnilsrcrzm9d173kp9w5ivwh6rdw7klbgc6"))))
44721336 DM	100	(build-system gnu-build-system)
	101	(native-inputs
	102	`(("flex" ,flex)
	103	("bison" ,bison)
f27cb0f1	104	("ghostscript" ,ghostscript))) ; ps2pdf
44721336 DM	105	(home-page "http://iverilog.icarus.com/")
	106	(synopsis "FPGA Verilog simulation and synthesis tool")
	107	(description "Icarus Verilog is a Verilog simulation and synthesis tool.
	108	It operates as a compiler, compiling source code written in Verilog
	109	(IEEE-1364) into some target format.
	110	For batch simulation, the compiler can generate an intermediate form
	111	called vvp assembly.
77659ff3	112	This intermediate form is executed by @command{vvp}.
44721336 DM	113	For synthesis, the compiler generates netlists in the desired format.")
	114	;; GPL2 only because of:
	115	;; - ./driver/iverilog.man.in
	116	;; - ./iverilog-vpi.man.in
	117	;; - ./tgt-fpga/iverilog-fpga.man
	118	;; - ./vvp/vvp.man.in
	119	;; Otherwise would be GPL2+.
	120	;; You have to accept both GPL2 and LGPL2.1+.
	121	(license (list license:gpl2 license:lgpl2.1+))))
92fc940f DM	122
	123	(define-public yosys
	124	(package
	125	(name "yosys")
922c8486	126	(version "0.9")
92fc940f	127	(source (origin
21fc352b TGR	128	(method git-fetch)
21fc352b TGR	129	(uri (git-reference
b0e7b699	130	(url "https://github.com/cliffordwolf/yosys")
21fc352b TGR	131	(commit (string-append "yosys-" version))
21fc352b TGR	132	(recursive? #t))) ; for the ‘iverilog’ submodule
92fc940f DM	133	(sha256
92fc940f DM	134	(base32
922c8486	135	"0lb9r055h8y1vj2z8gm4ip0v06j5mk7f9zx9gi67kkqb7g4rhjli"))
21fc352b	136	(file-name (git-file-name name version))
92fc940f DM	137	(modules '((guix build utils)))
92fc940f DM	138	(snippet
6cbee49d MW	139	'(begin
	140	(substitute* "Makefile"
	141	(("ABCREV = .*") "ABCREV = default\n"))
	142	#t))))
92fc940f DM	143	(build-system gnu-build-system)
	144	(arguments
	145	`(#:test-target "test"
	146	#:make-flags (list "CC=gcc"
	147	"CXX=g++"
	148	(string-append "PREFIX=" %output))
	149	#:phases
	150	(modify-phases %standard-phases
f90f6b68 TF	151	(add-before 'configure 'fix-paths
	152	(lambda _
	153	(substitute* "./passes/cmds/show.cc"
	154	(("exec xdot") (string-append "exec " (which "xdot")))
	155	(("dot -") (string-append (which "dot") " -"))
	156	(("fuser") (which "fuser")))
	157	#t))
92fc940f DM	158	(replace 'configure
92fc940f DM	159	(lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
99f6ef9a	160	(apply invoke "make" "config-gcc" make-flags)))
92fc940f DM	161	(add-after 'configure 'prepare-abc
	162	(lambda* (#:key inputs #:allow-other-keys)
	163	(let* ((sourceabc (assoc-ref inputs "abc"))
	164	(sourcebin (string-append sourceabc "/bin"))
	165	(source (string-append sourcebin "/abc")))
	166	(mkdir-p "abc")
	167	(call-with-output-file "abc/Makefile"
	168	(lambda (port)
	169	(format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
	170	(copy-file source "abc/abc")
99f6ef9a	171	(invoke "chmod" "+w" "abc/abc"))))
92fc940f DM	172	(add-before 'check 'fix-iverilog-references
	173	(lambda* (#:key inputs native-inputs #:allow-other-keys)
	174	(let* ((xinputs (or native-inputs inputs))
	175	(xdirname (assoc-ref xinputs "iverilog"))
	176	(iverilog (string-append xdirname "/bin/iverilog")))
	177	(substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
	178	"./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
	179	"./techlibs/ice40/tests/test_bram.sh"
	180	"./techlibs/ice40/tests/test_ffs.sh"
	181	"./techlibs/xilinx/tests/bram1.sh"
	182	"./techlibs/xilinx/tests/bram2.sh"
	183	"./tests/bram/run-single.sh"
	184	"./tests/realmath/run-test.sh"
	185	"./tests/simple/run-test.sh"
	186	"./tests/techmap/mem_simple_4x1_runtest.sh"
	187	"./tests/tools/autotest.sh"
	188	"./tests/vloghtb/common.sh")
	189	(("if ! which iverilog") "if ! true")
	190	(("iverilog ") (string-append iverilog " "))
	191	(("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
	192	iverilog "\"")))
	193	#t))))))
92fc940f DM	194	(native-inputs
	195	`(("pkg-config" ,pkg-config)
	196	("python" ,python)
	197	("bison" ,bison)
	198	("flex" ,flex)
	199	("gawk" , gawk) ; for the tests and "make" progress pretty-printing
	200	("tcl" ,tcl) ; tclsh for the tests
	201	("iverilog" ,iverilog))) ; for the tests
	202	(inputs
	203	`(("tcl" ,tcl)
	204	("readline" ,readline)
	205	("libffi" ,libffi)
f90f6b68 TF	206	("graphviz" ,graphviz)
	207	("psmisc" ,psmisc)
	208	("xdot" ,xdot)
92fc940f	209	("abc" ,abc)))
85cdab64 TF	210	(propagated-inputs
85cdab64 TF	211	`(("z3" ,z3))) ; should be in path for yosys-smtbmc
92fc940f DM	212	(home-page "http://www.clifford.at/yosys/")
	213	(synopsis "FPGA Verilog RTL synthesizer")
	214	(description "Yosys synthesizes Verilog-2005.")
	215	(license license:isc)))
36aa11c7 DM	216
36aa11c7 DM	217	(define-public icestorm
179be4bb	218	(let ((commit "0ec00d892a91cc68e45479b46161f649caea2933")
179be4bb	219	(revision "3"))
36aa11c7 DM	220	(package
36aa11c7 DM	221	(name "icestorm")
ec299312	222	(version (git-version "0.0" revision commit))
36aa11c7 DM	223	(source (origin
	224	(method git-fetch)
	225	(uri (git-reference
b0e7b699	226	(url "https://github.com/cliffordwolf/icestorm")
36aa11c7	227	(commit commit)))
ec299312	228	(file-name (git-file-name name version))
36aa11c7 DM	229	(sha256
36aa11c7 DM	230	(base32
179be4bb	231	"1qlh99fafb7xga702k64fmc9m700nsddrfgcq4x8qn8fplsb64f1"))))
36aa11c7 DM	232	(build-system gnu-build-system)
	233	(arguments
	234	`(#:tests? #f ; no unit tests that don't need an FPGA exist.
	235	#:make-flags (list "CC=gcc" "CXX=g++"
	236	(string-append "PREFIX=" (assoc-ref %outputs "out")))
	237	#:phases
	238	(modify-phases %standard-phases
	239	(add-after 'unpack 'remove-usr-local
	240	(lambda _
	241	(substitute* "iceprog/Makefile"
	242	(("-I/usr/local/include") "")
	243	(("-L/usr/local/lib") ""))
	244	#t))
b500dc2e TF	245	(add-after 'remove-usr-local 'fix-usr-local
	246	(lambda* (#:key outputs #:allow-other-keys)
	247	(substitute* "icebox/icebox_vlog.py"
	248	(("/usr/local/share") (string-append (assoc-ref outputs "out") "/share")))
	249	#t))
36aa11c7 DM	250	(delete 'configure))))
	251	(inputs
	252	`(("libftdi" ,libftdi)))
	253	(native-inputs
	254	`(("python-3" ,python)
	255	("pkg-config" ,pkg-config)))
	256	(home-page "http://www.clifford.at/icestorm/")
	257	(synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
	258	(description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
	259	Includes the actual FTDI connector.")
	260	(license license:isc))))
bca3797b	261
363989e6	262	(define-public nextpnr-ice40
09d18c67 MFG	263	(let [(commit "fbe486df459909065d6852a7495a212dfd2accef")
09d18c67 MFG	264	(revision "1")]
29bf0aa3 EF	265	(package
	266	(name "nextpnr-ice40")
	267	(version (git-version "0.0.0" revision commit))
	268	(source
	269	(origin
	270	(method git-fetch)
	271	(uri (git-reference
	272	(url "git://github.com/YosysHQ/nextpnr")
	273	(commit commit)))
	274	(file-name (git-file-name name version))
	275	(sha256
	276	(base32
09d18c67	277	"1fmxsywgs45g88ra7ips5s2niiiwrkyxdcy742ws18dfk2y4vi9c"))))
29bf0aa3	278	(inputs
7dffabf8	279	`(("boost" ,boost)
29bf0aa3	280	("eigen" ,eigen)
7dffabf8	281	("icestorm" ,icestorm)
29bf0aa3	282	("python" ,python)
7dffabf8 EF	283	("qtbase" ,qtbase)
7dffabf8 EF	284	("yosys" ,yosys)))
29bf0aa3 EF	285	(build-system cmake-build-system)
	286	(arguments
	287	`(#:configure-flags `("-DARCH=ice40"
	288	,(string-append "-DICEBOX_ROOT="
	289	(assoc-ref %build-inputs "icestorm")
	290	"/share/icebox"))
	291	#:tests? #f))
	292	(synopsis "Place-and-Route tool for FPGAs")
	293	(description "Nextpnr aims to be a vendor neutral, timing driven,
a4649802	294	FOSS FPGA place and route tool.")
29bf0aa3 EF	295	(home-page "https://github.com/YosysHQ/nextpnr")
29bf0aa3 EF	296	(license license:expat))))
363989e6	297
bca3797b	298	(define-public arachne-pnr
e82baf69 AB	299	(let ((commit "840bdfdeb38809f9f6af4d89dd7b22959b176fdd")
e82baf69 AB	300	(revision "2"))
bca3797b DM	301	(package
	302	(name "arachne-pnr")
	303	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	304	(source (origin
	305	(method git-fetch)
	306	(uri (git-reference
b0e7b699	307	(url "https://github.com/YosysHQ/arachne-pnr")
bca3797b	308	(commit commit)))
ec299312	309	(file-name (git-file-name name version))
bca3797b DM	310	(sha256
bca3797b DM	311	(base32
e82baf69	312	"1dqvjvgvsridybishv4pnigw9gypxh7r7nrqp9z9qq92v7c5rxzl"))))
bca3797b DM	313	(build-system gnu-build-system)
	314	(arguments
	315	`(#:test-target "test"
eccd3f6d DM	316	#:make-flags
	317	(list (string-append "DESTDIR=" (assoc-ref %outputs "out"))
	318	(string-append "ICEBOX=" (string-append
	319	(assoc-ref %build-inputs "icestorm")
	320	"/share/icebox")))
bca3797b DM	321	#:phases (modify-phases %standard-phases
	322	(replace 'configure
	323	(lambda* (#:key outputs inputs #:allow-other-keys)
bca3797b DM	324	(substitute* '("./tests/fsm/generate.py"
	325	"./tests/combinatorial/generate.py")
	326	(("#!/usr/bin/python") "#!/usr/bin/python2"))
	327	#t)))))
	328	(inputs
	329	`(("icestorm" ,icestorm)))
	330	(native-inputs
	331	`(("git" ,git) ; for determining its own version string
	332	("yosys" ,yosys) ; for tests
	333	("perl" ,perl) ; for shasum
	334	("python-2" ,python-2))) ; for tests
e82baf69	335	(home-page "https://github.com/YosysHQ/arachne-pnr")
bca3797b DM	336	(synopsis "Place-and-Route tool for FPGAs")
	337	(description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
	338	(license license:gpl2))))
adc2f048 DM	339
	340	(define-public gtkwave
	341	(package
	342	(name "gtkwave")
603628e4	343	(version "3.3.106")
82f81ffa TGR	344	(source
	345	(origin
	346	(method url-fetch)
	347	(uri (list (string-append "mirror://sourceforge/gtkwave/"
	348	"gtkwave-" version "/"
	349	"gtkwave-" version ".tar.gz")
	350	(string-append "http://gtkwave.sourceforge.net/"
	351	"gtkwave-" version ".tar.gz")))
	352	(sha256
603628e4	353	(base32 "1pyij6dlmapjyzrmn255fkf8gyhz8i4vaipd75a68i2bnq021nn8"))))
adc2f048 DM	354	(build-system gnu-build-system)
	355	(native-inputs
	356	`(("gperf" ,gperf)
	357	("pkg-config" ,pkg-config)))
	358	(inputs
	359	`(("tcl" ,tcl)
	360	("tk" ,tk)
	361	("gtk+-2" ,gtk+-2)))
	362	(arguments
	363	`(#:configure-flags
	364	(list (string-append "--with-tcl="
	365	(assoc-ref %build-inputs "tcl")
	366	"/lib")
	367	(string-append "--with-tk="
	368	(assoc-ref %build-inputs "tk")
	369	"/lib"))))
	370
	371	(synopsis "Waveform viewer for FPGA simulator trace files")
	372	(description "This package is a waveform viewer for FPGA
1e6191bb	373	simulator trace files (@dfn{FST}).")
adc2f048	374	(home-page "http://gtkwave.sourceforge.net/")
1e6191bb	375	;; Exception against free government use in tcl_np.c and tcl_np.h.
adc2f048	376	(license (list license:gpl2+ license:expat license:tcl/tk))))