[hcoop/debian/mlton.git] / debian / patches / riscv64.patch

--- a/basis-library/mlton/platform.sig
+++ b/basis-library/mlton/platform.sig
@@ -10,7 +10,7 @@
       structure Arch:
          sig
             datatype t = Alpha | AMD64 | ARM | ARM64 | HPPA | IA64 | m68k |
-                         MIPS | MIPS64 | PowerPC | PowerPC64 | S390 | Sparc | X86
+                         MIPS | MIPS64 | PowerPC | PowerPC64 | RISCV64 | S390 | Sparc | X86
 
             val fromString: string -> t option
             val host: t
--- a/basis-library/mlton/platform.sml
+++ b/basis-library/mlton/platform.sml
@@ -28,6 +28,7 @@
                 (MIPS64, "MIPS64"),
                 (PowerPC, "PowerPC"),
                 (PowerPC64, "PowerPC64"),
+                (RISCV64, "RISCV64"),
                 (S390, "S390"),
                 (Sparc, "Sparc"),
                 (X86, "X86")]
--- a/basis-library/primitive/prim-mlton.sml
+++ b/basis-library/primitive/prim-mlton.sml
@@ -157,6 +157,7 @@
              | MIPS64
              | PowerPC
              | PowerPC64
+             | RISCV64
              | S390
              | Sparc
              | X86
@@ -174,6 +175,7 @@
                 | "mips64" => MIPS64
                 | "powerpc" => PowerPC
                 | "powerpc64" => PowerPC64
+                | "riscv64" => RISCV64
                 | "s390" => S390
                 | "sparc" => Sparc
                 | "x86" => X86
--- a/bin/platform
+++ b/bin/platform
@@ -130,6 +130,9 @@
 Power*)
         HOST_ARCH=powerpc
 ;;
+riscv64)
+	HOST_ARCH=riscv64
+;;
 s390*)
         HOST_ARCH=s390
 ;;
--- a/doc/guide/src/MLtonPlatform.adoc
+++ b/doc/guide/src/MLtonPlatform.adoc
@@ -8,7 +8,7 @@
       structure Arch:
          sig
             datatype t = Alpha | AMD64 | ARM | ARM64 | HPPA | IA64 | m68k
-                       | MIPS | PowerPC | PowerPC64 | S390 | Sparc | X86
+                       | MIPS | PowerPC | PowerPC64 | RISCV64 | S390 | Sparc | X86
 
             val fromString: string -> t option
             val host: t
--- a/lib/stubs/mlton-stubs/mlton.sml
+++ b/lib/stubs/mlton-stubs/mlton.sml
@@ -159,7 +159,7 @@
             structure Arch =
                struct
                   datatype t = Alpha | AMD64 | ARM | ARM64 | HPPA | IA64 | m68k |
-                               MIPS | MIPS64 | PowerPC | PowerPC64 | S390 | Sparc | X86
+                               MIPS | MIPS64 | PowerPC | PowerPC64 | RISCV64 | S390 | Sparc | X86
 
                   val all = [(Alpha, "Alpha"),
                              (AMD64, "AMD64"),
@@ -172,6 +172,7 @@
                              (MIPS64, "MIPS64"),
                              (PowerPC, "PowerPC"),
                              (PowerPC64, "PowerPC64"),
+                             (RISCV64, "RISCV64"),
                              (S390, "S390"),
                              (Sparc, "Sparc"),
                              (X86, "X86")]
--- a/lib/stubs/mlton-stubs/platform.sig
+++ b/lib/stubs/mlton-stubs/platform.sig
@@ -10,7 +10,7 @@
       structure Arch:
          sig
             datatype t = Alpha | AMD64 | ARM | ARM64 | HPPA | IA64 | m68k |
-                         MIPS | MIPS64 | PowerPC | PowerPC64 | S390 | Sparc | X86
+                         MIPS | MIPS64 | PowerPC | PowerPC64 | RISCV64 | S390 | Sparc | X86
 
             val fromString: string -> t option
             val host: t
--- a/mlton/main/main.fun
+++ b/mlton/main/main.fun
@@ -193,6 +193,7 @@
        | IA64 => true
        | MIPS => true
        | MIPS64 => true
+       | RISCV64 => true
        | Sparc => true
        | S390 => true
        | _ => false
--- a/runtime/cenv.h
+++ b/runtime/cenv.h
@@ -109,6 +109,8 @@
 #include "platform/powerpc64.h"
 #elif (defined (__ppc__)) || (defined (__powerpc__))
 #include "platform/powerpc.h"
+#elif (defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64)
+#include "platform/riscv64.h"
 #elif (defined (__s390__))
 #include "platform/s390.h"
 #elif (defined (__sparc__))
--- a/runtime/platform/linux.c
+++ b/runtime/platform/linux.c
@@ -30,6 +30,9 @@
 #elif (defined (__ppc__)) || (defined (__powerpc__))
         ucontext_t* ucp = (ucontext_t*)context;
         GC_handleSigProf ((code_pointer) ucp->uc_mcontext.regs->nip);
+#elif (defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64)
+        ucontext_t* ucp = (ucontext_t*)context;
+        GC_handleSigProf ((code_pointer) ucp->uc_mcontext.__gregs[REG_PC]);
 #elif (defined (__sparc__))
         struct sigcontext* scp = (struct sigcontext*)context;
 #if __WORDSIZE == 64
--- /dev/null
+++ b/runtime/platform/riscv64.h
@@ -0,0 +1 @@
+#define MLton_Platform_Arch_host "riscv64"
Commit	Line	Data
a441e504 WT	1	--- a/basis-library/mlton/platform.sig
	2	+++ b/basis-library/mlton/platform.sig
	3	@@ -10,7 +10,7 @@
	4	structure Arch:
	5	sig
	6	datatype t = Alpha \| AMD64 \| ARM \| ARM64 \| HPPA \| IA64 \| m68k \|
	7	- MIPS \| MIPS64 \| PowerPC \| PowerPC64 \| S390 \| Sparc \| X86
	8	+ MIPS \| MIPS64 \| PowerPC \| PowerPC64 \| RISCV64 \| S390 \| Sparc \| X86
	9
	10	val fromString: string -> t option
	11	val host: t
	12	--- a/basis-library/mlton/platform.sml
	13	+++ b/basis-library/mlton/platform.sml
	14	@@ -28,6 +28,7 @@
	15	(MIPS64, "MIPS64"),
	16	(PowerPC, "PowerPC"),
	17	(PowerPC64, "PowerPC64"),
	18	+ (RISCV64, "RISCV64"),
	19	(S390, "S390"),
	20	(Sparc, "Sparc"),
	21	(X86, "X86")]
	22	--- a/basis-library/primitive/prim-mlton.sml
	23	+++ b/basis-library/primitive/prim-mlton.sml
	24	@@ -157,6 +157,7 @@
	25	\| MIPS64
	26	\| PowerPC
	27	\| PowerPC64
	28	+ \| RISCV64
	29	\| S390
	30	\| Sparc
	31	\| X86
	32	@@ -174,6 +175,7 @@
	33	\| "mips64" => MIPS64
	34	\| "powerpc" => PowerPC
	35	\| "powerpc64" => PowerPC64
	36	+ \| "riscv64" => RISCV64
	37	\| "s390" => S390
	38	\| "sparc" => Sparc
	39	\| "x86" => X86
	40	--- a/bin/platform
	41	+++ b/bin/platform
	42	@@ -130,6 +130,9 @@
	43	Power*)
	44	HOST_ARCH=powerpc
	45	;;
	46	+riscv64)
	47	+ HOST_ARCH=riscv64
	48	+;;
	49	s390*)
	50	HOST_ARCH=s390
	51	;;
	52	--- a/doc/guide/src/MLtonPlatform.adoc
	53	+++ b/doc/guide/src/MLtonPlatform.adoc
	54	@@ -8,7 +8,7 @@
	55	structure Arch:
	56	sig
	57	datatype t = Alpha \| AMD64 \| ARM \| ARM64 \| HPPA \| IA64 \| m68k
	58	- \| MIPS \| PowerPC \| PowerPC64 \| S390 \| Sparc \| X86
	59	+ \| MIPS \| PowerPC \| PowerPC64 \| RISCV64 \| S390 \| Sparc \| X86
	60
	61	val fromString: string -> t option
	62	val host: t
	63	--- a/lib/stubs/mlton-stubs/mlton.sml
	64	+++ b/lib/stubs/mlton-stubs/mlton.sml
65	@@ -159,7 +159,7 @@
66	structure Arch =
67	struct
68	datatype t = Alpha \| AMD64 \| ARM \| ARM64 \| HPPA \| IA64 \| m68k \|
69	- MIPS \| MIPS64 \| PowerPC \| PowerPC64 \| S390 \| Sparc \| X86
70	+ MIPS \| MIPS64 \| PowerPC \| PowerPC64 \| RISCV64 \| S390 \| Sparc \| X86
71
72	val all = [(Alpha, "Alpha"),
73	(AMD64, "AMD64"),
74	@@ -172,6 +172,7 @@
75	(MIPS64, "MIPS64"),
76	(PowerPC, "PowerPC"),
77	(PowerPC64, "PowerPC64"),
78	+ (RISCV64, "RISCV64"),
79	(S390, "S390"),
80	(Sparc, "Sparc"),
81	(X86, "X86")]
82	--- a/lib/stubs/mlton-stubs/platform.sig
83	+++ b/lib/stubs/mlton-stubs/platform.sig
84	@@ -10,7 +10,7 @@
85	structure Arch:
86	sig
87	datatype t = Alpha \| AMD64 \| ARM \| ARM64 \| HPPA \| IA64 \| m68k \|
88	- MIPS \| MIPS64 \| PowerPC \| PowerPC64 \| S390 \| Sparc \| X86
89	+ MIPS \| MIPS64 \| PowerPC \| PowerPC64 \| RISCV64 \| S390 \| Sparc \| X86
90
91	val fromString: string -> t option
92	val host: t
93	--- a/mlton/main/main.fun
94	+++ b/mlton/main/main.fun
95	@@ -193,6 +193,7 @@
96	\| IA64 => true
97	\| MIPS => true
98	\| MIPS64 => true
99	+ \| RISCV64 => true
100	\| Sparc => true
101	\| S390 => true
102	\| _ => false
103	--- a/runtime/cenv.h
104	+++ b/runtime/cenv.h
105	@@ -109,6 +109,8 @@
106	#include "platform/powerpc64.h"
107	#elif (defined (__ppc__)) \|\| (defined (__powerpc__))
108	#include "platform/powerpc.h"
109	+#elif (defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64)
110	+#include "platform/riscv64.h"
111	#elif (defined (__s390__))
112	#include "platform/s390.h"
113	#elif (defined (__sparc__))
114	--- a/runtime/platform/linux.c
115	+++ b/runtime/platform/linux.c
116	@@ -30,6 +30,9 @@
117	#elif (defined (__ppc__)) \|\| (defined (__powerpc__))
118	ucontext_t* ucp = (ucontext_t*)context;
119	GC_handleSigProf ((code_pointer) ucp->uc_mcontext.regs->nip);
120	+#elif (defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64)
121	+ ucontext_t* ucp = (ucontext_t*)context;
122	+ GC_handleSigProf ((code_pointer) ucp->uc_mcontext.__gregs[REG_PC]);
123	#elif (defined (__sparc__))
124	struct sigcontext* scp = (struct sigcontext*)context;
125	#if __WORDSIZE == 64
126	--- /dev/null
127	+++ b/runtime/platform/riscv64.h
128	@@ -0,0 +1 @@
129	+#define MLton_Platform_Arch_host "riscv64"