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cpp hygiene in the vm
[bpt/guile.git] / libguile / vm-i-scheme.c
CommitLineData
776491ca 1/* Copyright (C) 2001, 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc.
a98cef7e 2 *
560b9c25 3 * This library is free software; you can redistribute it and/or
53befeb7
NJ		 4 * modify it under the terms of the GNU Lesser General Public License
5 * as published by the Free Software Foundation; either version 3 of
6 * the License, or (at your option) any later version.
a98cef7e 7 *
53befeb7
NJ		 8 * This library is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
560b9c25
AW		 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * Lesser General Public License for more details.
a98cef7e 12 *
560b9c25
AW		 13 * You should have received a copy of the GNU Lesser General Public
14 * License along with this library; if not, write to the Free Software
53befeb7
NJ		 15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
16 * 02110-1301 USA
560b9c25 17 */
a98cef7e
KN		 18
19/* This file is included in vm_engine.c */
20
a80be762
KN		 21\f
22/*
23 * Predicates
24 */
25
93d197be 26#define ARGS1(a1) SCM a1 = sp[0];
11ea1aba
AW		 27#define ARGS2(a1,a2) SCM a1 = sp[-1], a2 = sp[0]; sp--; NULLSTACK (1);
28#define ARGS3(a1,a2,a3) SCM a1 = sp[-2], a2 = sp[-1], a3 = sp[0]; sp -= 2; NULLSTACK (2);
93d197be
AW		 29
30#define RETURN(x) do { *sp = x; NEXT; } while (0)
31
827dc8dc 32VM_DEFINE_FUNCTION (128, not, "not", 1)
a98cef7e 33{
a80be762 34 ARGS1 (x);
2533f10b 35 RETURN (scm_from_bool (scm_is_false (x)));
17e90c5e
KN		 36}
37
827dc8dc 38VM_DEFINE_FUNCTION (129, not_not, "not-not", 1)
17e90c5e 39{
a80be762 40 ARGS1 (x);
2533f10b 41 RETURN (scm_from_bool (!scm_is_false (x)));
17e90c5e
KN		 42}
43
827dc8dc 44VM_DEFINE_FUNCTION (130, eq, "eq?", 2)
17e90c5e 45{
a80be762 46 ARGS2 (x, y);
5c8cefe5 47 RETURN (scm_from_bool (scm_is_eq (x, y)));
17e90c5e
KN		 48}
49
827dc8dc 50VM_DEFINE_FUNCTION (131, not_eq, "not-eq?", 2)
17e90c5e 51{
a80be762 52 ARGS2 (x, y);
5c8cefe5 53 RETURN (scm_from_bool (!scm_is_eq (x, y)));
17e90c5e
KN		 54}
55
827dc8dc 56VM_DEFINE_FUNCTION (132, nullp, "null?", 1)
17e90c5e 57{
a80be762 58 ARGS1 (x);
2533f10b 59 RETURN (scm_from_bool (scm_is_null (x)));
a98cef7e
KN		 60}
61
827dc8dc 62VM_DEFINE_FUNCTION (133, not_nullp, "not-null?", 1)
a98cef7e 63{
a80be762 64 ARGS1 (x);
2533f10b 65 RETURN (scm_from_bool (!scm_is_null (x)));
a80be762
KN		 66}
67
9348168e
BT		 68VM_DEFINE_FUNCTION (134, nilp, "nil?", 1)
69{
70 ARGS1 (x);
71 RETURN (scm_from_bool (scm_is_lisp_false (x)));
72}
73
74VM_DEFINE_FUNCTION (135, not_nilp, "not-nil?", 1)
75{
76 ARGS1 (x);
77 RETURN (scm_from_bool (!scm_is_lisp_false (x)));
78}
79
80VM_DEFINE_FUNCTION (136, eqv, "eqv?", 2)
a80be762
KN		 81{
82 ARGS2 (x, y);
5c8cefe5 83 if (scm_is_eq (x, y))
a80be762
KN		 84 RETURN (SCM_BOOL_T);
85 if (SCM_IMP (x) || SCM_IMP (y))
86 RETURN (SCM_BOOL_F);
1865ad56 87 SYNC_REGISTER ();
a80be762
KN		 88 RETURN (scm_eqv_p (x, y));
89}
90
9348168e 91VM_DEFINE_FUNCTION (137, equal, "equal?", 2)
a80be762
KN		 92{
93 ARGS2 (x, y);
5c8cefe5 94 if (scm_is_eq (x, y))
a80be762
KN		 95 RETURN (SCM_BOOL_T);
96 if (SCM_IMP (x) || SCM_IMP (y))
97 RETURN (SCM_BOOL_F);
1865ad56 98 SYNC_REGISTER ();
a80be762 99 RETURN (scm_equal_p (x, y));
a98cef7e
KN		 100}
101
9348168e 102VM_DEFINE_FUNCTION (138, pairp, "pair?", 1)
a98cef7e 103{
a80be762 104 ARGS1 (x);
5c8cefe5 105 RETURN (scm_from_bool (scm_is_pair (x)));
a98cef7e
KN		 106}
107
9348168e 108VM_DEFINE_FUNCTION (139, listp, "list?", 1)
a98cef7e 109{
a80be762 110 ARGS1 (x);
9bd48cb1 111 RETURN (scm_from_bool (scm_ilength (x) >= 0));
a98cef7e
KN		 112}
113
9348168e 114VM_DEFINE_FUNCTION (140, symbolp, "symbol?", 1)
cf45ff03
AW		 115{
116 ARGS1 (x);
117 RETURN (scm_from_bool (scm_is_symbol (x)));
118}
119
9348168e 120VM_DEFINE_FUNCTION (141, vectorp, "vector?", 1)
cf45ff03
AW		 121{
122 ARGS1 (x);
123 RETURN (scm_from_bool (SCM_I_IS_VECTOR (x)));
124}
125
a80be762
KN		 126\f
127/*
128 * Basic data
129 */
130
9348168e 131VM_DEFINE_FUNCTION (142, cons, "cons", 2)
a98cef7e 132{
a80be762 133 ARGS2 (x, y);
52182d52
AW		 134 SYNC_BEFORE_GC ();
135 x = scm_cons (x, y);
a80be762 136 RETURN (x);
a98cef7e
KN		 137}
138
41e49280 139#define VM_VALIDATE_CONS(x, proc) \
53bdfcf0 140 VM_ASSERT (scm_is_pair (x), vm_error_not_a_pair (proc, x))
5e390de6 141
9348168e 142VM_DEFINE_FUNCTION (143, car, "car", 1)
a98cef7e 143{
a80be762 144 ARGS1 (x);
41e49280 145 VM_VALIDATE_CONS (x, "car");
a80be762 146 RETURN (SCM_CAR (x));
a98cef7e
KN		 147}
148
9348168e 149VM_DEFINE_FUNCTION (144, cdr, "cdr", 1)
a98cef7e 150{
a80be762 151 ARGS1 (x);
41e49280 152 VM_VALIDATE_CONS (x, "cdr");
a80be762 153 RETURN (SCM_CDR (x));
a98cef7e
KN		 154}
155
9348168e 156VM_DEFINE_INSTRUCTION (145, set_car, "set-car!", 0, 2, 0)
a98cef7e 157{
60ed31d2 158 SCM x, y;
eae2438d 159 POP2 (y, x);
41e49280 160 VM_VALIDATE_CONS (x, "set-car!");
a80be762 161 SCM_SETCAR (x, y);
60ed31d2 162 NEXT;
a98cef7e
KN		 163}
164
9348168e 165VM_DEFINE_INSTRUCTION (146, set_cdr, "set-cdr!", 0, 2, 0)
a98cef7e 166{
60ed31d2 167 SCM x, y;
eae2438d 168 POP2 (y, x);
41e49280 169 VM_VALIDATE_CONS (x, "set-cdr!");
a80be762 170 SCM_SETCDR (x, y);
60ed31d2 171 NEXT;
a98cef7e
KN		 172}
173
a80be762
KN		 174\f
175/*
176 * Numeric relational tests
177 */
178
b2b33168
AW		 179#define REL(crel,srel) \
180 { \
181 ARGS2 (x, y); \
182 if (SCM_I_INUMP (x) && SCM_I_INUMP (y)) \
183 RETURN (scm_from_bool (((scm_t_signed_bits) SCM_UNPACK (x)) \
184 crel ((scm_t_signed_bits) SCM_UNPACK (y)))); \
185 SYNC_REGISTER (); \
186 RETURN (srel (x, y)); \
187 }
a80be762 188
9348168e 189VM_DEFINE_FUNCTION (147, ee, "ee?", 2)
a80be762
KN		 190{
191 REL (==, scm_num_eq_p);
192}
193
9348168e 194VM_DEFINE_FUNCTION (148, lt, "lt?", 2)
a80be762
KN		 195{
196 REL (<, scm_less_p);
197}
198
9348168e 199VM_DEFINE_FUNCTION (149, le, "le?", 2)
a80be762
KN		 200{
201 REL (<=, scm_leq_p);
202}
203
9348168e 204VM_DEFINE_FUNCTION (150, gt, "gt?", 2)
a80be762
KN		 205{
206 REL (>, scm_gr_p);
207}
208
9348168e 209VM_DEFINE_FUNCTION (151, ge, "ge?", 2)
a80be762
KN		 210{
211 REL (>=, scm_geq_p);
212}
213
a0ec1ca1
AW		 214#undef REL
215
a80be762
KN		 216\f
217/*
218 * Numeric functions
219 */
220
e78d4bf9
LC		 221/* The maximum/minimum tagged integers. */
222#define INUM_MAX (INTPTR_MAX - 1)
223#define INUM_MIN (INTPTR_MIN + scm_tc2_int)
224
a80be762
KN		 225#define FUNC2(CFUNC,SFUNC) \
226{ \
d8eeb67c 227 ARGS2 (x, y); \
2d80426a 228 if (SCM_I_INUMP (x) && SCM_I_INUMP (y)) \
a80be762 229 { \
c0ee3245 230 scm_t_int64 n = SCM_I_INUM (x) CFUNC SCM_I_INUM (y);\
a80be762 231 if (SCM_FIXABLE (n)) \
2d80426a 232 RETURN (SCM_I_MAKINUM (n)); \
a80be762 233 } \
b2642276 234 SYNC_REGISTER (); \
a80be762
KN		 235 RETURN (SFUNC (x, y)); \
236}
237
0c57673a
LC		 238/* Assembly tagged integer arithmetic routines. This code uses the
239 `asm goto' feature introduced in GCC 4.5. */
240
241#if defined __x86_64__ && SCM_GNUC_PREREQ (4, 5)
242
243/* The macros below check the CPU's overflow flag to improve fixnum
244 arithmetic. The %rcx register is explicitly clobbered because `asm
245 goto' can't have outputs, in which case the `r' constraint could be
246 used to let the register allocator choose a register.
247
248 TODO: Use `cold' label attribute in GCC 4.6.
249 http://gcc.gnu.org/ml/gcc-patches/2010-10/msg01777.html */
250
251# define ASM_ADD(x, y) \
252 { \
253 asm volatile goto ("mov %1, %%rcx; " \
254 "test %[tag], %%cl; je %l[slow_add]; " \
255 "test %[tag], %0; je %l[slow_add]; " \
256 "add %0, %%rcx; jo %l[slow_add]; " \
257 "sub %[tag], %%rcx; " \
258 "mov %%rcx, (%[vsp])\n" \
259 : /* no outputs */ \
260 : "r" (x), "r" (y), \
261 [vsp] "r" (sp), [tag] "i" (scm_tc2_int) \
262 : "rcx", "memory" \
263 : slow_add); \
264 NEXT; \
265 } \
266 slow_add: \
267 do { } while (0)
268
269# define ASM_SUB(x, y) \
270 { \
271 asm volatile goto ("mov %0, %%rcx; " \
272 "test %[tag], %%cl; je %l[slow_sub]; " \
273 "test %[tag], %1; je %l[slow_sub]; " \
274 "sub %1, %%rcx; jo %l[slow_sub]; " \
275 "add %[tag], %%rcx; " \
276 "mov %%rcx, (%[vsp])\n" \
277 : /* no outputs */ \
278 : "r" (x), "r" (y), \
279 [vsp] "r" (sp), [tag] "i" (scm_tc2_int) \
280 : "rcx", "memory" \
281 : slow_sub); \
282 NEXT; \
283 } \
284 slow_sub: \
285 do { } while (0)
286
287#endif
288
289
9348168e 290VM_DEFINE_FUNCTION (152, add, "add", 2)
a80be762 291{
0c57673a 292#ifndef ASM_ADD
a80be762 293 FUNC2 (+, scm_sum);
0c57673a
LC		 294#else
295 ARGS2 (x, y);
296 ASM_ADD (x, y);
297 SYNC_REGISTER ();
298 RETURN (scm_sum (x, y));
299#endif
a80be762
KN		 300}
301
9348168e 302VM_DEFINE_FUNCTION (153, add1, "add1", 1)
7382f23e
AW		 303{
304 ARGS1 (x);
e78d4bf9
LC		 305
306 /* Check for overflow. */
b2b33168 307 if (SCM_LIKELY ((scm_t_intptr) SCM_UNPACK (x) < INUM_MAX))
7382f23e 308 {
e78d4bf9
LC		 309 SCM result;
310
311 /* Add the integers without untagging. */
b2b33168
AW		 312 result = SCM_PACK ((scm_t_intptr) SCM_UNPACK (x)
313 + (scm_t_intptr) SCM_UNPACK (SCM_I_MAKINUM (1))
e78d4bf9
LC		 314 - scm_tc2_int);
315
316 if (SCM_LIKELY (SCM_I_INUMP (result)))
317 RETURN (result);
7382f23e 318 }
e78d4bf9 319
7382f23e
AW		 320 SYNC_REGISTER ();
321 RETURN (scm_sum (x, SCM_I_MAKINUM (1)));
322}
323
9348168e 324VM_DEFINE_FUNCTION (154, sub, "sub", 2)
a80be762 325{
0c57673a 326#ifndef ASM_SUB
a80be762 327 FUNC2 (-, scm_difference);
0c57673a
LC		 328#else
329 ARGS2 (x, y);
330 ASM_SUB (x, y);
331 SYNC_REGISTER ();
332 RETURN (scm_difference (x, y));
333#endif
a80be762
KN		 334}
335
9348168e 336VM_DEFINE_FUNCTION (155, sub1, "sub1", 1)
7382f23e
AW		 337{
338 ARGS1 (x);
e78d4bf9
LC		 339
340 /* Check for underflow. */
b2b33168 341 if (SCM_LIKELY ((scm_t_intptr) SCM_UNPACK (x) > INUM_MIN))
7382f23e 342 {
e78d4bf9
LC		 343 SCM result;
344
345 /* Substract the integers without untagging. */
b2b33168
AW		 346 result = SCM_PACK ((scm_t_intptr) SCM_UNPACK (x)
347 - (scm_t_intptr) SCM_UNPACK (SCM_I_MAKINUM (1))
e78d4bf9
LC		 348 + scm_tc2_int);
349
350 if (SCM_LIKELY (SCM_I_INUMP (result)))
351 RETURN (result);
7382f23e 352 }
e78d4bf9 353
7382f23e
AW		 354 SYNC_REGISTER ();
355 RETURN (scm_difference (x, SCM_I_MAKINUM (1)));
356}
357
a0ec1ca1
AW		 358#undef ASM_ADD
359#undef ASM_SUB
360#undef FUNC2
361#undef INUM_MAX
362#undef INUM_MIN
0c57673a 363
9348168e 364VM_DEFINE_FUNCTION (156, mul, "mul", 2)
a80be762
KN		 365{
366 ARGS2 (x, y);
1865ad56 367 SYNC_REGISTER ();
a80be762
KN		 368 RETURN (scm_product (x, y));
369}
370
9348168e 371VM_DEFINE_FUNCTION (157, div, "div", 2)
a80be762
KN		 372{
373 ARGS2 (x, y);
1865ad56 374 SYNC_REGISTER ();
a80be762
KN		 375 RETURN (scm_divide (x, y));
376}
377
9348168e 378VM_DEFINE_FUNCTION (158, quo, "quo", 2)
a80be762
KN		 379{
380 ARGS2 (x, y);
1865ad56 381 SYNC_REGISTER ();
a80be762
KN		 382 RETURN (scm_quotient (x, y));
383}
384
9348168e 385VM_DEFINE_FUNCTION (159, rem, "rem", 2)
a80be762
KN		 386{
387 ARGS2 (x, y);
1865ad56 388 SYNC_REGISTER ();
a80be762
KN		 389 RETURN (scm_remainder (x, y));
390}
391
9348168e 392VM_DEFINE_FUNCTION (160, mod, "mod", 2)
a80be762
KN		 393{
394 ARGS2 (x, y);
1865ad56 395 SYNC_REGISTER ();
a80be762
KN		 396 RETURN (scm_modulo (x, y));
397}
398
9348168e 399VM_DEFINE_FUNCTION (161, ash, "ash", 2)
b10d9330
AW		 400{
401 ARGS2 (x, y);
402 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
403 {
404 if (SCM_I_INUM (y) < 0)
8ecd1943 405 /* Right shift, will be a fixnum. */
b10d9330 406 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) >> -SCM_I_INUM (y)));
8ecd1943
AW		 407 else
408 /* Left shift. See comments in scm_ash. */
409 {
e25f3727 410 scm_t_signed_bits nn, bits_to_shift;
8ecd1943
AW		 411
412 nn = SCM_I_INUM (x);
413 bits_to_shift = SCM_I_INUM (y);
414
415 if (bits_to_shift < SCM_I_FIXNUM_BIT-1
e25f3727 416 && ((scm_t_bits)
8ecd1943
AW		 417 (SCM_SRS (nn, (SCM_I_FIXNUM_BIT-1 - bits_to_shift)) + 1)
418 <= 1))
419 RETURN (SCM_I_MAKINUM (nn << bits_to_shift));
420 /* fall through */
421 }
b10d9330
AW		 422 /* fall through */
423 }
424 SYNC_REGISTER ();
425 RETURN (scm_ash (x, y));
426}
427
9348168e 428VM_DEFINE_FUNCTION (162, logand, "logand", 2)
b10d9330
AW		 429{
430 ARGS2 (x, y);
431 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
432 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) & SCM_I_INUM (y)));
433 SYNC_REGISTER ();
434 RETURN (scm_logand (x, y));
435}
436
9348168e 437VM_DEFINE_FUNCTION (163, logior, "logior", 2)
b10d9330
AW		 438{
439 ARGS2 (x, y);
440 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
441 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) | SCM_I_INUM (y)));
442 SYNC_REGISTER ();
443 RETURN (scm_logior (x, y));
444}
445
9348168e 446VM_DEFINE_FUNCTION (164, logxor, "logxor", 2)
b10d9330
AW		 447{
448 ARGS2 (x, y);
449 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
450 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) ^ SCM_I_INUM (y)));
451 SYNC_REGISTER ();
452 RETURN (scm_logxor (x, y));
453}
454
1e4b834a 455\f
d5a4f51f
AW		 456/*
457 * Strings
458 */
459
5ddd9645 460VM_DEFINE_FUNCTION (165, string_length, "string-length", 1)
d5a4f51f
AW		 461{
462 ARGS1 (str);
463 if (SCM_LIKELY (scm_is_string (str)))
464 RETURN (SCM_I_MAKINUM (scm_i_string_length (str)));
465 else
466 {
467 SYNC_REGISTER ();
468 RETURN (scm_string_length (str));
469 }
470}
471
5ddd9645 472VM_DEFINE_FUNCTION (166, string_ref, "string-ref", 2)
d5a4f51f
AW		 473{
474 scm_t_signed_bits i = 0;
475 ARGS2 (str, idx);
476 if (SCM_LIKELY (scm_is_string (str)
477 && SCM_I_INUMP (idx)
478 && ((i = SCM_I_INUM (idx)) >= 0)
479 && i < scm_i_string_length (str)))
480 RETURN (SCM_MAKE_CHAR (scm_i_string_ref (str, i)));
481 else
482 {
483 SYNC_REGISTER ();
484 RETURN (scm_string_ref (str, idx));
485 }
486}
487
488/* No string-set! instruction, as there is no good fast path there. */
489
490\f
1e4b834a 491/*
827dc8dc 492 * Vectors and arrays
1e4b834a 493 */
aec4a84a 494
5ddd9645 495VM_DEFINE_FUNCTION (167, vector_length, "vector-length", 1)
d5a4f51f
AW		 496{
497 ARGS1 (vect);
498 if (SCM_LIKELY (SCM_I_IS_VECTOR (vect)))
499 RETURN (SCM_I_MAKINUM (SCM_I_VECTOR_LENGTH (vect)));
500 else
501 {
502 SYNC_REGISTER ();
503 RETURN (scm_vector_length (vect));
504 }
505}
506
5ddd9645 507VM_DEFINE_FUNCTION (168, vector_ref, "vector-ref", 2)
d6f1ce3d 508{
e25f3727 509 scm_t_signed_bits i = 0;
d6f1ce3d 510 ARGS2 (vect, idx);
7b702b53 511 if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
d6f1ce3d
AW		 512 && SCM_I_INUMP (idx)
513 && ((i = SCM_I_INUM (idx)) >= 0)
514 && i < SCM_I_VECTOR_LENGTH (vect)))
515 RETURN (SCM_I_VECTOR_ELTS (vect)[i]);
516 else
9b29d607
AW		 517 {
518 SYNC_REGISTER ();
519 RETURN (scm_vector_ref (vect, idx));
520 }
d6f1ce3d
AW		 521}
522
5ddd9645 523VM_DEFINE_INSTRUCTION (169, vector_set, "vector-set", 0, 3, 0)
d6f1ce3d 524{
e25f3727 525 scm_t_signed_bits i = 0;
d6f1ce3d 526 SCM vect, idx, val;
eae2438d 527 POP3 (val, idx, vect);
7b702b53 528 if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
d6f1ce3d
AW		 529 && SCM_I_INUMP (idx)
530 && ((i = SCM_I_INUM (idx)) >= 0)
531 && i < SCM_I_VECTOR_LENGTH (vect)))
532 SCM_I_VECTOR_WELTS (vect)[i] = val;
533 else
9b29d607
AW		 534 {
535 SYNC_REGISTER ();
536 scm_vector_set_x (vect, idx, val);
537 }
d6f1ce3d
AW		 538 NEXT;
539}
540
5ddd9645 541VM_DEFINE_INSTRUCTION (170, make_array, "make-array", 3, -1, 1)
827dc8dc
AW		 542{
543 scm_t_uint32 len;
544 SCM shape, ret;
545
546 len = FETCH ();
547 len = (len << 8) + FETCH ();
548 len = (len << 8) + FETCH ();
549 POP (shape);
550 SYNC_REGISTER ();
384dce46 551 PRE_CHECK_UNDERFLOW (len);
827dc8dc
AW		 552 ret = scm_from_contiguous_array (shape, sp - len + 1, len);
553 DROPN (len);
554 PUSH (ret);
555 NEXT;
556}
557
558\f
559/*
560 * Structs
561 */
41e49280 562#define VM_VALIDATE_STRUCT(obj, proc) \
776491ca 563 VM_ASSERT (SCM_STRUCTP (obj), vm_error_not_a_struct (proc, obj))
827dc8dc 564
5ddd9645 565VM_DEFINE_FUNCTION (171, struct_p, "struct?", 1)
827dc8dc
AW		 566{
567 ARGS1 (obj);
568 RETURN (scm_from_bool (SCM_STRUCTP (obj)));
569}
570
5ddd9645 571VM_DEFINE_FUNCTION (172, struct_vtable, "struct-vtable", 1)
827dc8dc
AW		 572{
573 ARGS1 (obj);
41e49280 574 VM_VALIDATE_STRUCT (obj, "struct_vtable");
827dc8dc
AW		 575 RETURN (SCM_STRUCT_VTABLE (obj));
576}
577
5ddd9645 578VM_DEFINE_INSTRUCTION (173, make_struct, "make-struct", 2, -1, 1)
827dc8dc
AW		 579{
580 unsigned h = FETCH ();
581 unsigned l = FETCH ();
9a974fd3
AW		 582 scm_t_bits n = ((h << 8U) + l);
583 SCM vtable = sp[-(n - 1)];
584 const SCM *inits = sp - n + 2;
585 SCM ret;
827dc8dc 586
9823fd39
LC		 587 SYNC_REGISTER ();
588
827dc8dc
AW		 589 if (SCM_LIKELY (SCM_STRUCTP (vtable)
590 && SCM_VTABLE_FLAG_IS_SET (vtable, SCM_VTABLE_FLAG_SIMPLE)
9a974fd3
AW		 591 && (SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size) + 1
592 == n)
593 && !SCM_VTABLE_INSTANCE_FINALIZER (vtable)))
827dc8dc 594 {
9a974fd3
AW		 595 /* Verily, we are making a simple struct with the right number of
596 initializers, and no finalizer. */
597 ret = scm_words ((scm_t_bits)SCM_STRUCT_DATA (vtable) | scm_tc3_struct,
598 n + 1);
599 SCM_SET_CELL_WORD_1 (ret, (scm_t_bits)SCM_CELL_OBJECT_LOC (ret, 2));
600 memcpy (SCM_STRUCT_DATA (ret), inits, (n - 1) * sizeof (SCM));
827dc8dc 601 }
9a974fd3
AW		 602 else
603 ret = scm_c_make_structv (vtable, 0, n - 1, (scm_t_bits *) inits);
604
c99865c1 605 DROPN (n);
9a974fd3 606 PUSH (ret);
827dc8dc 607
9a974fd3 608 NEXT;
827dc8dc
AW		 609}
610
5ddd9645 611VM_DEFINE_FUNCTION (174, struct_ref, "struct-ref", 2)
827dc8dc
AW		 612{
613 ARGS2 (obj, pos);
614
615 if (SCM_LIKELY (SCM_STRUCTP (obj)
616 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
617 SCM_VTABLE_FLAG_SIMPLE)
618 && SCM_I_INUMP (pos)))
619 {
620 SCM vtable;
621 scm_t_bits index, len;
622
e25f3727
AW		 623 /* True, an inum is a signed value, but cast to unsigned it will
624 certainly be more than the length, so we will fall through if
625 index is negative. */
827dc8dc
AW		 626 index = SCM_I_INUM (pos);
627 vtable = SCM_STRUCT_VTABLE (obj);
628 len = SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size);
629
630 if (SCM_LIKELY (index < len))
631 {
632 scm_t_bits *data = SCM_STRUCT_DATA (obj);
633 RETURN (SCM_PACK (data[index]));
634 }
635 }
636
9823fd39 637 SYNC_REGISTER ();
827dc8dc
AW		 638 RETURN (scm_struct_ref (obj, pos));
639}
640
5ddd9645 641VM_DEFINE_FUNCTION (175, struct_set, "struct-set", 3)
827dc8dc
AW		 642{
643 ARGS3 (obj, pos, val);
644
645 if (SCM_LIKELY (SCM_STRUCTP (obj)
646 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
647 SCM_VTABLE_FLAG_SIMPLE)
648 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
649 SCM_VTABLE_FLAG_SIMPLE_RW)
650 && SCM_I_INUMP (pos)))
651 {
652 SCM vtable;
653 scm_t_bits index, len;
654
e25f3727 655 /* See above regarding index being >= 0. */
827dc8dc
AW		 656 index = SCM_I_INUM (pos);
657 vtable = SCM_STRUCT_VTABLE (obj);
658 len = SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size);
659 if (SCM_LIKELY (index < len))
660 {
661 scm_t_bits *data = SCM_STRUCT_DATA (obj);
662 data[index] = SCM_UNPACK (val);
663 RETURN (val);
664 }
665 }
666
9823fd39 667 SYNC_REGISTER ();
827dc8dc
AW		 668 RETURN (scm_struct_set_x (obj, pos, val));
669}
670
671\f
672/*
673 * GOOPS support
674 */
5ddd9645 675VM_DEFINE_FUNCTION (176, class_of, "class-of", 1)
827dc8dc
AW		 676{
677 ARGS1 (obj);
1a461493
AW		 678 if (SCM_INSTANCEP (obj))
679 RETURN (SCM_CLASS_OF (obj));
680 SYNC_REGISTER ();
681 RETURN (scm_class_of (obj));
827dc8dc
AW		 682}
683
e25f3727 684/* FIXME: No checking whatsoever. */
5ddd9645 685VM_DEFINE_FUNCTION (177, slot_ref, "slot-ref", 2)
827dc8dc
AW		 686{
687 size_t slot;
688 ARGS2 (instance, idx);
689 slot = SCM_I_INUM (idx);
690 RETURN (SCM_PACK (SCM_STRUCT_DATA (instance) [slot]));
691}
692
e25f3727 693/* FIXME: No checking whatsoever. */
5ddd9645 694VM_DEFINE_INSTRUCTION (178, slot_set, "slot-set", 0, 3, 0)
827dc8dc
AW		 695{
696 SCM instance, idx, val;
697 size_t slot;
eae2438d 698 POP3 (val, idx, instance);
827dc8dc
AW		 699 slot = SCM_I_INUM (idx);
700 SCM_STRUCT_DATA (instance) [slot] = SCM_UNPACK (val);
701 NEXT;
702}
703
704\f
705/*
706 * Bytevectors
707 */
41e49280 708#define VM_VALIDATE_BYTEVECTOR(x, proc) \
53bdfcf0 709 VM_ASSERT (SCM_BYTEVECTOR_P (x), vm_error_not_a_bytevector (proc, x))
e6eb2467
AW		 710
711#define BV_REF_WITH_ENDIANNESS(stem, fn_stem) \
712{ \
713 SCM endianness; \
714 POP (endianness); \
715 if (scm_is_eq (endianness, scm_i_native_endianness)) \
716 goto VM_LABEL (bv_##stem##_native_ref); \
717 { \
718 ARGS2 (bv, idx); \
9823fd39 719 SYNC_REGISTER (); \
e6eb2467
AW		 720 RETURN (scm_bytevector_##fn_stem##_ref (bv, idx, endianness)); \
721 } \
722}
723
daccfef4
LC		 724/* Return true (non-zero) if PTR has suitable alignment for TYPE. */
725#define ALIGNED_P(ptr, type) \
1002c774 726 ((scm_t_uintptr) (ptr) % alignof_type (type) == 0)
daccfef4 727
5ddd9645 728VM_DEFINE_FUNCTION (179, bv_u16_ref, "bv-u16-ref", 3)
e6eb2467 729BV_REF_WITH_ENDIANNESS (u16, u16)
5ddd9645 730VM_DEFINE_FUNCTION (180, bv_s16_ref, "bv-s16-ref", 3)
e6eb2467 731BV_REF_WITH_ENDIANNESS (s16, s16)
5ddd9645 732VM_DEFINE_FUNCTION (181, bv_u32_ref, "bv-u32-ref", 3)
e6eb2467 733BV_REF_WITH_ENDIANNESS (u32, u32)
5ddd9645 734VM_DEFINE_FUNCTION (182, bv_s32_ref, "bv-s32-ref", 3)
e6eb2467 735BV_REF_WITH_ENDIANNESS (s32, s32)
5ddd9645 736VM_DEFINE_FUNCTION (183, bv_u64_ref, "bv-u64-ref", 3)
e6eb2467 737BV_REF_WITH_ENDIANNESS (u64, u64)
5ddd9645 738VM_DEFINE_FUNCTION (184, bv_s64_ref, "bv-s64-ref", 3)
e6eb2467 739BV_REF_WITH_ENDIANNESS (s64, s64)
5ddd9645 740VM_DEFINE_FUNCTION (185, bv_f32_ref, "bv-f32-ref", 3)
e6eb2467 741BV_REF_WITH_ENDIANNESS (f32, ieee_single)
5ddd9645 742VM_DEFINE_FUNCTION (186, bv_f64_ref, "bv-f64-ref", 3)
e6eb2467
AW		 743BV_REF_WITH_ENDIANNESS (f64, ieee_double)
744
745#undef BV_REF_WITH_ENDIANNESS
746
9823fd39
LC		 747#define BV_FIXABLE_INT_REF(stem, fn_stem, type, size) \
748{ \
e25f3727 749 scm_t_signed_bits i; \
daccfef4 750 const scm_t_ ## type *int_ptr; \
9823fd39 751 ARGS2 (bv, idx); \
daccfef4 752 \
41e49280 753 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 754 i = SCM_I_INUM (idx); \
755 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
756 \
9823fd39 757 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 758 && (i >= 0) \
9823fd39 759 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC		 760 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
761 RETURN (SCM_I_MAKINUM (*int_ptr)); \
9823fd39
LC		 762 else \
763 { \
764 SYNC_REGISTER (); \
765 RETURN (scm_bytevector_ ## fn_stem ## _ref (bv, idx)); \
766 } \
767}
768
769#define BV_INT_REF(stem, type, size) \
770{ \
e25f3727 771 scm_t_signed_bits i; \
daccfef4 772 const scm_t_ ## type *int_ptr; \
9823fd39 773 ARGS2 (bv, idx); \
daccfef4 774 \
41e49280 775 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 776 i = SCM_I_INUM (idx); \
777 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
778 \
9823fd39 779 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 780 && (i >= 0) \
9823fd39 781 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC		 782 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
783 { \
784 scm_t_ ## type x = *int_ptr; \
9823fd39
LC		 785 if (SCM_FIXABLE (x)) \
786 RETURN (SCM_I_MAKINUM (x)); \
787 else \
788 { \
789 SYNC_REGISTER (); \
790 RETURN (scm_from_ ## type (x)); \
791 } \
792 } \
793 else \
794 { \
795 SYNC_REGISTER (); \
796 RETURN (scm_bytevector_ ## stem ## _native_ref (bv, idx)); \
797 } \
798}
799
800#define BV_FLOAT_REF(stem, fn_stem, type, size) \
801{ \
e25f3727 802 scm_t_signed_bits i; \
daccfef4 803 const type *float_ptr; \
9823fd39 804 ARGS2 (bv, idx); \
daccfef4 805 \
41e49280 806 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 807 i = SCM_I_INUM (idx); \
808 float_ptr = (type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
809 \
9823fd39
LC		 810 SYNC_REGISTER (); \
811 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 812 && (i >= 0) \
9823fd39 813 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC		 814 && (ALIGNED_P (float_ptr, type)))) \
815 RETURN (scm_from_double (*float_ptr)); \
9823fd39
LC		 816 else \
817 RETURN (scm_bytevector_ ## fn_stem ## _native_ref (bv, idx)); \
e6eb2467
AW		 818}
819
5ddd9645 820VM_DEFINE_FUNCTION (187, bv_u8_ref, "bv-u8-ref", 2)
e6eb2467 821BV_FIXABLE_INT_REF (u8, u8, uint8, 1)
5ddd9645 822VM_DEFINE_FUNCTION (188, bv_s8_ref, "bv-s8-ref", 2)
e6eb2467 823BV_FIXABLE_INT_REF (s8, s8, int8, 1)
5ddd9645 824VM_DEFINE_FUNCTION (189, bv_u16_native_ref, "bv-u16-native-ref", 2)
e6eb2467 825BV_FIXABLE_INT_REF (u16, u16_native, uint16, 2)
5ddd9645 826VM_DEFINE_FUNCTION (190, bv_s16_native_ref, "bv-s16-native-ref", 2)
e6eb2467 827BV_FIXABLE_INT_REF (s16, s16_native, int16, 2)
5ddd9645 828VM_DEFINE_FUNCTION (191, bv_u32_native_ref, "bv-u32-native-ref", 2)
dddacb23
LC		 829#if SIZEOF_VOID_P > 4
830BV_FIXABLE_INT_REF (u32, u32_native, uint32, 4)
831#else
e6eb2467 832BV_INT_REF (u32, uint32, 4)
dddacb23 833#endif
5ddd9645 834VM_DEFINE_FUNCTION (192, bv_s32_native_ref, "bv-s32-native-ref", 2)
dddacb23
LC		 835#if SIZEOF_VOID_P > 4
836BV_FIXABLE_INT_REF (s32, s32_native, int32, 4)
837#else
e6eb2467 838BV_INT_REF (s32, int32, 4)
dddacb23 839#endif
5ddd9645 840VM_DEFINE_FUNCTION (193, bv_u64_native_ref, "bv-u64-native-ref", 2)
e6eb2467 841BV_INT_REF (u64, uint64, 8)
5ddd9645 842VM_DEFINE_FUNCTION (194, bv_s64_native_ref, "bv-s64-native-ref", 2)
e6eb2467 843BV_INT_REF (s64, int64, 8)
5ddd9645 844VM_DEFINE_FUNCTION (195, bv_f32_native_ref, "bv-f32-native-ref", 2)
e6eb2467 845BV_FLOAT_REF (f32, ieee_single, float, 4)
5ddd9645 846VM_DEFINE_FUNCTION (196, bv_f64_native_ref, "bv-f64-native-ref", 2)
e6eb2467
AW		 847BV_FLOAT_REF (f64, ieee_double, double, 8)
848
849#undef BV_FIXABLE_INT_REF
850#undef BV_INT_REF
851#undef BV_FLOAT_REF
852
853
854
855#define BV_SET_WITH_ENDIANNESS(stem, fn_stem) \
856{ \
857 SCM endianness; \
858 POP (endianness); \
859 if (scm_is_eq (endianness, scm_i_native_endianness)) \
860 goto VM_LABEL (bv_##stem##_native_set); \
861 { \
eae2438d 862 SCM bv, idx, val; POP3 (val, idx, bv); \
ad301b6d 863 SYNC_REGISTER (); \
d6f1ce3d
AW		 864 scm_bytevector_##fn_stem##_set_x (bv, idx, val, endianness); \
865 NEXT; \
e6eb2467
AW		 866 } \
867}
868
5ddd9645 869VM_DEFINE_INSTRUCTION (197, bv_u16_set, "bv-u16-set", 0, 4, 0)
e6eb2467 870BV_SET_WITH_ENDIANNESS (u16, u16)
5ddd9645 871VM_DEFINE_INSTRUCTION (198, bv_s16_set, "bv-s16-set", 0, 4, 0)
e6eb2467 872BV_SET_WITH_ENDIANNESS (s16, s16)
5ddd9645 873VM_DEFINE_INSTRUCTION (199, bv_u32_set, "bv-u32-set", 0, 4, 0)
e6eb2467 874BV_SET_WITH_ENDIANNESS (u32, u32)
5ddd9645 875VM_DEFINE_INSTRUCTION (200, bv_s32_set, "bv-s32-set", 0, 4, 0)
e6eb2467 876BV_SET_WITH_ENDIANNESS (s32, s32)
5ddd9645 877VM_DEFINE_INSTRUCTION (201, bv_u64_set, "bv-u64-set", 0, 4, 0)
e6eb2467 878BV_SET_WITH_ENDIANNESS (u64, u64)
5ddd9645 879VM_DEFINE_INSTRUCTION (202, bv_s64_set, "bv-s64-set", 0, 4, 0)
e6eb2467 880BV_SET_WITH_ENDIANNESS (s64, s64)
5ddd9645 881VM_DEFINE_INSTRUCTION (203, bv_f32_set, "bv-f32-set", 0, 4, 0)
e6eb2467 882BV_SET_WITH_ENDIANNESS (f32, ieee_single)
5ddd9645 883VM_DEFINE_INSTRUCTION (204, bv_f64_set, "bv-f64-set", 0, 4, 0)
e6eb2467
AW		 884BV_SET_WITH_ENDIANNESS (f64, ieee_double)
885
886#undef BV_SET_WITH_ENDIANNESS
887
daccfef4
LC		 888#define BV_FIXABLE_INT_SET(stem, fn_stem, type, min, max, size) \
889{ \
e25f3727 890 scm_t_signed_bits i, j = 0; \
daccfef4
LC		 891 SCM bv, idx, val; \
892 scm_t_ ## type *int_ptr; \
893 \
eae2438d 894 POP3 (val, idx, bv); \
41e49280 895 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC		 896 i = SCM_I_INUM (idx); \
897 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
898 \
899 if (SCM_LIKELY (SCM_I_INUMP (idx) \
900 && (i >= 0) \
901 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
902 && (ALIGNED_P (int_ptr, scm_t_ ## type)) \
903 && (SCM_I_INUMP (val)) \
904 && ((j = SCM_I_INUM (val)) >= min) \
905 && (j <= max))) \
906 *int_ptr = (scm_t_ ## type) j; \
907 else \
ad301b6d
AW		 908 { \
909 SYNC_REGISTER (); \
910 scm_bytevector_ ## fn_stem ## _set_x (bv, idx, val); \
911 } \
daccfef4
LC		 912 NEXT; \
913}
914
915#define BV_INT_SET(stem, type, size) \
916{ \
e25f3727 917 scm_t_signed_bits i = 0; \
daccfef4
LC		 918 SCM bv, idx, val; \
919 scm_t_ ## type *int_ptr; \
920 \
eae2438d 921 POP3 (val, idx, bv); \
41e49280 922 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC		 923 i = SCM_I_INUM (idx); \
924 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
925 \
926 if (SCM_LIKELY (SCM_I_INUMP (idx) \
927 && (i >= 0) \
928 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
929 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
930 *int_ptr = scm_to_ ## type (val); \
931 else \
ad301b6d
AW		 932 { \
933 SYNC_REGISTER (); \
934 scm_bytevector_ ## stem ## _native_set_x (bv, idx, val); \
935 } \
936 NEXT; \
daccfef4
LC		 937}
938
ad301b6d
AW		 939#define BV_FLOAT_SET(stem, fn_stem, type, size) \
940{ \
941 scm_t_signed_bits i = 0; \
942 SCM bv, idx, val; \
943 type *float_ptr; \
944 \
eae2438d 945 POP3 (val, idx, bv); \
ad301b6d
AW		 946 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
947 i = SCM_I_INUM (idx); \
948 float_ptr = (type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
949 \
950 if (SCM_LIKELY (SCM_I_INUMP (idx) \
951 && (i >= 0) \
952 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
953 && (ALIGNED_P (float_ptr, type)))) \
954 *float_ptr = scm_to_double (val); \
955 else \
956 { \
957 SYNC_REGISTER (); \
958 scm_bytevector_ ## fn_stem ## _native_set_x (bv, idx, val); \
959 } \
960 NEXT; \
e6eb2467
AW		 961}
962
5ddd9645 963VM_DEFINE_INSTRUCTION (205, bv_u8_set, "bv-u8-set", 0, 3, 0)
e6eb2467 964BV_FIXABLE_INT_SET (u8, u8, uint8, 0, SCM_T_UINT8_MAX, 1)
5ddd9645 965VM_DEFINE_INSTRUCTION (206, bv_s8_set, "bv-s8-set", 0, 3, 0)
e6eb2467 966BV_FIXABLE_INT_SET (s8, s8, int8, SCM_T_INT8_MIN, SCM_T_INT8_MAX, 1)
5ddd9645 967VM_DEFINE_INSTRUCTION (207, bv_u16_native_set, "bv-u16-native-set", 0, 3, 0)
d6f1ce3d 968BV_FIXABLE_INT_SET (u16, u16_native, uint16, 0, SCM_T_UINT16_MAX, 2)
5ddd9645 969VM_DEFINE_INSTRUCTION (208, bv_s16_native_set, "bv-s16-native-set", 0, 3, 0)
d6f1ce3d 970BV_FIXABLE_INT_SET (s16, s16_native, int16, SCM_T_INT16_MIN, SCM_T_INT16_MAX, 2)
5ddd9645 971VM_DEFINE_INSTRUCTION (209, bv_u32_native_set, "bv-u32-native-set", 0, 3, 0)
dddacb23
LC		 972#if SIZEOF_VOID_P > 4
973BV_FIXABLE_INT_SET (u32, u32_native, uint32, 0, SCM_T_UINT32_MAX, 4)
974#else
e6eb2467 975BV_INT_SET (u32, uint32, 4)
dddacb23 976#endif
5ddd9645 977VM_DEFINE_INSTRUCTION (210, bv_s32_native_set, "bv-s32-native-set", 0, 3, 0)
dddacb23
LC		 978#if SIZEOF_VOID_P > 4
979BV_FIXABLE_INT_SET (s32, s32_native, int32, SCM_T_INT32_MIN, SCM_T_INT32_MAX, 4)
980#else
e6eb2467 981BV_INT_SET (s32, int32, 4)
dddacb23 982#endif
5ddd9645 983VM_DEFINE_INSTRUCTION (211, bv_u64_native_set, "bv-u64-native-set", 0, 3, 0)
e6eb2467 984BV_INT_SET (u64, uint64, 8)
5ddd9645 985VM_DEFINE_INSTRUCTION (212, bv_s64_native_set, "bv-s64-native-set", 0, 3, 0)
e6eb2467 986BV_INT_SET (s64, int64, 8)
5ddd9645 987VM_DEFINE_INSTRUCTION (213, bv_f32_native_set, "bv-f32-native-set", 0, 3, 0)
e6eb2467 988BV_FLOAT_SET (f32, ieee_single, float, 4)
5ddd9645 989VM_DEFINE_INSTRUCTION (214, bv_f64_native_set, "bv-f64-native-set", 0, 3, 0)
e6eb2467
AW		 990BV_FLOAT_SET (f64, ieee_double, double, 8)
991
992#undef BV_FIXABLE_INT_SET
993#undef BV_INT_SET
994#undef BV_FLOAT_SET
995
a0ec1ca1
AW		 996#undef ALIGNED_P
997#undef VM_VALIDATE_BYTEVECTOR
998
999#undef VM_VALIDATE_STRUCT
1000#undef VM_VALIDATE_CONS
1001
1002#undef ARGS1
1003#undef ARGS2
1004#undef ARGS3
1005#undef RETURN
1006
53e28ed9
AW		 1007/*
1008(defun renumber-ops ()
1009 "start from top of buffer and renumber 'VM_DEFINE_FOO (\n' sequences"
1010 (interactive "")
1011 (save-excursion
827dc8dc 1012 (let ((counter 127)) (goto-char (point-min))
53e28ed9
AW		 1013 (while (re-search-forward "^VM_DEFINE_[^ ]+ (\\([^,]+\\)," (point-max) t)
1014 (replace-match
1015 (number-to-string (setq counter (1+ counter)))
1016 t t nil 1)))))
1017*/
1e4b834a 1018
17e90c5e
KN		 1019/*
1020 Local Variables:
1021 c-file-style: "gnu"
1022 End:
1023*/
Unnamed repository; edit this file 'description' to name the repository.