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Merge remote-tracking branch 'origin/stable-2.0'
[bpt/guile.git] / libguile / vm-i-scheme.c
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eae2438d 1/* Copyright (C) 2001, 2009, 2010, 2011 Free Software Foundation, Inc.
a98cef7e 2 *
560b9c25 3 * This library is free software; you can redistribute it and/or
53befeb7
NJ		 4 * modify it under the terms of the GNU Lesser General Public License
5 * as published by the Free Software Foundation; either version 3 of
6 * the License, or (at your option) any later version.
a98cef7e 7 *
53befeb7
NJ		 8 * This library is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
560b9c25
AW		 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * Lesser General Public License for more details.
a98cef7e 12 *
560b9c25
AW		 13 * You should have received a copy of the GNU Lesser General Public
14 * License along with this library; if not, write to the Free Software
53befeb7
NJ		 15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
16 * 02110-1301 USA
560b9c25 17 */
a98cef7e
KN		 18
19/* This file is included in vm_engine.c */
20
a80be762
KN		 21\f
22/*
23 * Predicates
24 */
25
93d197be 26#define ARGS1(a1) SCM a1 = sp[0];
11ea1aba
AW		 27#define ARGS2(a1,a2) SCM a1 = sp[-1], a2 = sp[0]; sp--; NULLSTACK (1);
28#define ARGS3(a1,a2,a3) SCM a1 = sp[-2], a2 = sp[-1], a3 = sp[0]; sp -= 2; NULLSTACK (2);
93d197be
AW		 29
30#define RETURN(x) do { *sp = x; NEXT; } while (0)
31
827dc8dc 32VM_DEFINE_FUNCTION (128, not, "not", 1)
a98cef7e 33{
a80be762 34 ARGS1 (x);
2533f10b 35 RETURN (scm_from_bool (scm_is_false (x)));
17e90c5e
KN		 36}
37
827dc8dc 38VM_DEFINE_FUNCTION (129, not_not, "not-not", 1)
17e90c5e 39{
a80be762 40 ARGS1 (x);
2533f10b 41 RETURN (scm_from_bool (!scm_is_false (x)));
17e90c5e
KN		 42}
43
827dc8dc 44VM_DEFINE_FUNCTION (130, eq, "eq?", 2)
17e90c5e 45{
a80be762 46 ARGS2 (x, y);
5c8cefe5 47 RETURN (scm_from_bool (scm_is_eq (x, y)));
17e90c5e
KN		 48}
49
827dc8dc 50VM_DEFINE_FUNCTION (131, not_eq, "not-eq?", 2)
17e90c5e 51{
a80be762 52 ARGS2 (x, y);
5c8cefe5 53 RETURN (scm_from_bool (!scm_is_eq (x, y)));
17e90c5e
KN		 54}
55
827dc8dc 56VM_DEFINE_FUNCTION (132, nullp, "null?", 1)
17e90c5e 57{
a80be762 58 ARGS1 (x);
2533f10b 59 RETURN (scm_from_bool (scm_is_null (x)));
a98cef7e
KN		 60}
61
827dc8dc 62VM_DEFINE_FUNCTION (133, not_nullp, "not-null?", 1)
a98cef7e 63{
a80be762 64 ARGS1 (x);
2533f10b 65 RETURN (scm_from_bool (!scm_is_null (x)));
a80be762
KN		 66}
67
827dc8dc 68VM_DEFINE_FUNCTION (134, eqv, "eqv?", 2)
a80be762
KN		 69{
70 ARGS2 (x, y);
5c8cefe5 71 if (scm_is_eq (x, y))
a80be762
KN		 72 RETURN (SCM_BOOL_T);
73 if (SCM_IMP (x) || SCM_IMP (y))
74 RETURN (SCM_BOOL_F);
1865ad56 75 SYNC_REGISTER ();
a80be762
KN		 76 RETURN (scm_eqv_p (x, y));
77}
78
827dc8dc 79VM_DEFINE_FUNCTION (135, equal, "equal?", 2)
a80be762
KN		 80{
81 ARGS2 (x, y);
5c8cefe5 82 if (scm_is_eq (x, y))
a80be762
KN		 83 RETURN (SCM_BOOL_T);
84 if (SCM_IMP (x) || SCM_IMP (y))
85 RETURN (SCM_BOOL_F);
1865ad56 86 SYNC_REGISTER ();
a80be762 87 RETURN (scm_equal_p (x, y));
a98cef7e
KN		 88}
89
827dc8dc 90VM_DEFINE_FUNCTION (136, pairp, "pair?", 1)
a98cef7e 91{
a80be762 92 ARGS1 (x);
5c8cefe5 93 RETURN (scm_from_bool (scm_is_pair (x)));
a98cef7e
KN		 94}
95
827dc8dc 96VM_DEFINE_FUNCTION (137, listp, "list?", 1)
a98cef7e 97{
a80be762 98 ARGS1 (x);
9bd48cb1 99 RETURN (scm_from_bool (scm_ilength (x) >= 0));
a98cef7e
KN		 100}
101
cf45ff03
AW		 102VM_DEFINE_FUNCTION (138, symbolp, "symbol?", 1)
103{
104 ARGS1 (x);
105 RETURN (scm_from_bool (scm_is_symbol (x)));
106}
107
108VM_DEFINE_FUNCTION (139, vectorp, "vector?", 1)
109{
110 ARGS1 (x);
111 RETURN (scm_from_bool (SCM_I_IS_VECTOR (x)));
112}
113
a80be762
KN		 114\f
115/*
116 * Basic data
117 */
118
cf45ff03 119VM_DEFINE_FUNCTION (140, cons, "cons", 2)
a98cef7e 120{
a80be762
KN		 121 ARGS2 (x, y);
122 CONS (x, x, y);
123 RETURN (x);
a98cef7e
KN		 124}
125
41e49280 126#define VM_VALIDATE_CONS(x, proc) \
5e390de6 127 if (SCM_UNLIKELY (!scm_is_pair (x))) \
41e49280
AW		 128 { func_name = proc; \
129 finish_args = x; \
5e390de6
AW		 130 goto vm_error_not_a_pair; \
131 }
132
cf45ff03 133VM_DEFINE_FUNCTION (141, car, "car", 1)
a98cef7e 134{
a80be762 135 ARGS1 (x);
41e49280 136 VM_VALIDATE_CONS (x, "car");
a80be762 137 RETURN (SCM_CAR (x));
a98cef7e
KN		 138}
139
cf45ff03 140VM_DEFINE_FUNCTION (142, cdr, "cdr", 1)
a98cef7e 141{
a80be762 142 ARGS1 (x);
41e49280 143 VM_VALIDATE_CONS (x, "cdr");
a80be762 144 RETURN (SCM_CDR (x));
a98cef7e
KN		 145}
146
cf45ff03 147VM_DEFINE_INSTRUCTION (143, set_car, "set-car!", 0, 2, 0)
a98cef7e 148{
60ed31d2 149 SCM x, y;
eae2438d 150 POP2 (y, x);
41e49280 151 VM_VALIDATE_CONS (x, "set-car!");
a80be762 152 SCM_SETCAR (x, y);
60ed31d2 153 NEXT;
a98cef7e
KN		 154}
155
cf45ff03 156VM_DEFINE_INSTRUCTION (144, set_cdr, "set-cdr!", 0, 2, 0)
a98cef7e 157{
60ed31d2 158 SCM x, y;
eae2438d 159 POP2 (y, x);
41e49280 160 VM_VALIDATE_CONS (x, "set-cdr!");
a80be762 161 SCM_SETCDR (x, y);
60ed31d2 162 NEXT;
a98cef7e
KN		 163}
164
a80be762
KN		 165\f
166/*
167 * Numeric relational tests
168 */
169
170#undef REL
b2b33168
AW		 171#define REL(crel,srel) \
172 { \
173 ARGS2 (x, y); \
174 if (SCM_I_INUMP (x) && SCM_I_INUMP (y)) \
175 RETURN (scm_from_bool (((scm_t_signed_bits) SCM_UNPACK (x)) \
176 crel ((scm_t_signed_bits) SCM_UNPACK (y)))); \
177 SYNC_REGISTER (); \
178 RETURN (srel (x, y)); \
179 }
a80be762 180
cf45ff03 181VM_DEFINE_FUNCTION (145, ee, "ee?", 2)
a80be762
KN		 182{
183 REL (==, scm_num_eq_p);
184}
185
cf45ff03 186VM_DEFINE_FUNCTION (146, lt, "lt?", 2)
a80be762
KN		 187{
188 REL (<, scm_less_p);
189}
190
cf45ff03 191VM_DEFINE_FUNCTION (147, le, "le?", 2)
a80be762
KN		 192{
193 REL (<=, scm_leq_p);
194}
195
cf45ff03 196VM_DEFINE_FUNCTION (148, gt, "gt?", 2)
a80be762
KN		 197{
198 REL (>, scm_gr_p);
199}
200
cf45ff03 201VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
a80be762
KN		 202{
203 REL (>=, scm_geq_p);
204}
205
206\f
207/*
208 * Numeric functions
209 */
210
e78d4bf9 211/* The maximum/minimum tagged integers. */
0c57673a
LC		 212#undef INUM_MAX
213#undef INUM_MIN
e78d4bf9
LC		 214#define INUM_MAX (INTPTR_MAX - 1)
215#define INUM_MIN (INTPTR_MIN + scm_tc2_int)
216
a80be762
KN		 217#undef FUNC2
218#define FUNC2(CFUNC,SFUNC) \
219{ \
d8eeb67c 220 ARGS2 (x, y); \
2d80426a 221 if (SCM_I_INUMP (x) && SCM_I_INUMP (y)) \
a80be762 222 { \
c0ee3245 223 scm_t_int64 n = SCM_I_INUM (x) CFUNC SCM_I_INUM (y);\
a80be762 224 if (SCM_FIXABLE (n)) \
2d80426a 225 RETURN (SCM_I_MAKINUM (n)); \
a80be762 226 } \
b2642276 227 SYNC_REGISTER (); \
a80be762
KN		 228 RETURN (SFUNC (x, y)); \
229}
230
0c57673a
LC		 231/* Assembly tagged integer arithmetic routines. This code uses the
232 `asm goto' feature introduced in GCC 4.5. */
233
234#if defined __x86_64__ && SCM_GNUC_PREREQ (4, 5)
235
236/* The macros below check the CPU's overflow flag to improve fixnum
237 arithmetic. The %rcx register is explicitly clobbered because `asm
238 goto' can't have outputs, in which case the `r' constraint could be
239 used to let the register allocator choose a register.
240
241 TODO: Use `cold' label attribute in GCC 4.6.
242 http://gcc.gnu.org/ml/gcc-patches/2010-10/msg01777.html */
243
244# define ASM_ADD(x, y) \
245 { \
246 asm volatile goto ("mov %1, %%rcx; " \
247 "test %[tag], %%cl; je %l[slow_add]; " \
248 "test %[tag], %0; je %l[slow_add]; " \
249 "add %0, %%rcx; jo %l[slow_add]; " \
250 "sub %[tag], %%rcx; " \
251 "mov %%rcx, (%[vsp])\n" \
252 : /* no outputs */ \
253 : "r" (x), "r" (y), \
254 [vsp] "r" (sp), [tag] "i" (scm_tc2_int) \
255 : "rcx", "memory" \
256 : slow_add); \
257 NEXT; \
258 } \
259 slow_add: \
260 do { } while (0)
261
262# define ASM_SUB(x, y) \
263 { \
264 asm volatile goto ("mov %0, %%rcx; " \
265 "test %[tag], %%cl; je %l[slow_sub]; " \
266 "test %[tag], %1; je %l[slow_sub]; " \
267 "sub %1, %%rcx; jo %l[slow_sub]; " \
268 "add %[tag], %%rcx; " \
269 "mov %%rcx, (%[vsp])\n" \
270 : /* no outputs */ \
271 : "r" (x), "r" (y), \
272 [vsp] "r" (sp), [tag] "i" (scm_tc2_int) \
273 : "rcx", "memory" \
274 : slow_sub); \
275 NEXT; \
276 } \
277 slow_sub: \
278 do { } while (0)
279
280#endif
281
282
cf45ff03 283VM_DEFINE_FUNCTION (150, add, "add", 2)
a80be762 284{
0c57673a 285#ifndef ASM_ADD
a80be762 286 FUNC2 (+, scm_sum);
0c57673a
LC		 287#else
288 ARGS2 (x, y);
289 ASM_ADD (x, y);
290 SYNC_REGISTER ();
291 RETURN (scm_sum (x, y));
292#endif
a80be762
KN		 293}
294
cf45ff03 295VM_DEFINE_FUNCTION (151, add1, "add1", 1)
7382f23e
AW		 296{
297 ARGS1 (x);
e78d4bf9
LC		 298
299 /* Check for overflow. */
b2b33168 300 if (SCM_LIKELY ((scm_t_intptr) SCM_UNPACK (x) < INUM_MAX))
7382f23e 301 {
e78d4bf9
LC		 302 SCM result;
303
304 /* Add the integers without untagging. */
b2b33168
AW		 305 result = SCM_PACK ((scm_t_intptr) SCM_UNPACK (x)
306 + (scm_t_intptr) SCM_UNPACK (SCM_I_MAKINUM (1))
e78d4bf9
LC		 307 - scm_tc2_int);
308
309 if (SCM_LIKELY (SCM_I_INUMP (result)))
310 RETURN (result);
7382f23e 311 }
e78d4bf9 312
7382f23e
AW		 313 SYNC_REGISTER ();
314 RETURN (scm_sum (x, SCM_I_MAKINUM (1)));
315}
316
cf45ff03 317VM_DEFINE_FUNCTION (152, sub, "sub", 2)
a80be762 318{
0c57673a 319#ifndef ASM_SUB
a80be762 320 FUNC2 (-, scm_difference);
0c57673a
LC		 321#else
322 ARGS2 (x, y);
323 ASM_SUB (x, y);
324 SYNC_REGISTER ();
325 RETURN (scm_difference (x, y));
326#endif
a80be762
KN		 327}
328
cf45ff03 329VM_DEFINE_FUNCTION (153, sub1, "sub1", 1)
7382f23e
AW		 330{
331 ARGS1 (x);
e78d4bf9
LC		 332
333 /* Check for underflow. */
b2b33168 334 if (SCM_LIKELY ((scm_t_intptr) SCM_UNPACK (x) > INUM_MIN))
7382f23e 335 {
e78d4bf9
LC		 336 SCM result;
337
338 /* Substract the integers without untagging. */
b2b33168
AW		 339 result = SCM_PACK ((scm_t_intptr) SCM_UNPACK (x)
340 - (scm_t_intptr) SCM_UNPACK (SCM_I_MAKINUM (1))
e78d4bf9
LC		 341 + scm_tc2_int);
342
343 if (SCM_LIKELY (SCM_I_INUMP (result)))
344 RETURN (result);
7382f23e 345 }
e78d4bf9 346
7382f23e
AW		 347 SYNC_REGISTER ();
348 RETURN (scm_difference (x, SCM_I_MAKINUM (1)));
349}
350
0c57673a
LC		 351# undef ASM_ADD
352# undef ASM_SUB
353
cf45ff03 354VM_DEFINE_FUNCTION (154, mul, "mul", 2)
a80be762
KN		 355{
356 ARGS2 (x, y);
1865ad56 357 SYNC_REGISTER ();
a80be762
KN		 358 RETURN (scm_product (x, y));
359}
360
cf45ff03 361VM_DEFINE_FUNCTION (155, div, "div", 2)
a80be762
KN		 362{
363 ARGS2 (x, y);
1865ad56 364 SYNC_REGISTER ();
a80be762
KN		 365 RETURN (scm_divide (x, y));
366}
367
cf45ff03 368VM_DEFINE_FUNCTION (156, quo, "quo", 2)
a80be762
KN		 369{
370 ARGS2 (x, y);
1865ad56 371 SYNC_REGISTER ();
a80be762
KN		 372 RETURN (scm_quotient (x, y));
373}
374
cf45ff03 375VM_DEFINE_FUNCTION (157, rem, "rem", 2)
a80be762
KN		 376{
377 ARGS2 (x, y);
1865ad56 378 SYNC_REGISTER ();
a80be762
KN		 379 RETURN (scm_remainder (x, y));
380}
381
cf45ff03 382VM_DEFINE_FUNCTION (158, mod, "mod", 2)
a80be762
KN		 383{
384 ARGS2 (x, y);
1865ad56 385 SYNC_REGISTER ();
a80be762
KN		 386 RETURN (scm_modulo (x, y));
387}
388
cf45ff03 389VM_DEFINE_FUNCTION (159, ash, "ash", 2)
b10d9330
AW		 390{
391 ARGS2 (x, y);
392 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
393 {
394 if (SCM_I_INUM (y) < 0)
8ecd1943 395 /* Right shift, will be a fixnum. */
b10d9330 396 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) >> -SCM_I_INUM (y)));
8ecd1943
AW		 397 else
398 /* Left shift. See comments in scm_ash. */
399 {
e25f3727 400 scm_t_signed_bits nn, bits_to_shift;
8ecd1943
AW		 401
402 nn = SCM_I_INUM (x);
403 bits_to_shift = SCM_I_INUM (y);
404
405 if (bits_to_shift < SCM_I_FIXNUM_BIT-1
e25f3727 406 && ((scm_t_bits)
8ecd1943
AW		 407 (SCM_SRS (nn, (SCM_I_FIXNUM_BIT-1 - bits_to_shift)) + 1)
408 <= 1))
409 RETURN (SCM_I_MAKINUM (nn << bits_to_shift));
410 /* fall through */
411 }
b10d9330
AW		 412 /* fall through */
413 }
414 SYNC_REGISTER ();
415 RETURN (scm_ash (x, y));
416}
417
cf45ff03 418VM_DEFINE_FUNCTION (160, logand, "logand", 2)
b10d9330
AW		 419{
420 ARGS2 (x, y);
421 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
422 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) & SCM_I_INUM (y)));
423 SYNC_REGISTER ();
424 RETURN (scm_logand (x, y));
425}
426
cf45ff03 427VM_DEFINE_FUNCTION (161, logior, "logior", 2)
b10d9330
AW		 428{
429 ARGS2 (x, y);
430 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
431 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) | SCM_I_INUM (y)));
432 SYNC_REGISTER ();
433 RETURN (scm_logior (x, y));
434}
435
cf45ff03 436VM_DEFINE_FUNCTION (162, logxor, "logxor", 2)
b10d9330
AW		 437{
438 ARGS2 (x, y);
439 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
440 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) ^ SCM_I_INUM (y)));
441 SYNC_REGISTER ();
442 RETURN (scm_logxor (x, y));
443}
444
1e4b834a 445\f
d5a4f51f
AW		 446/*
447 * Strings
448 */
449
450VM_DEFINE_FUNCTION (163, string_length, "string-length", 1)
451{
452 ARGS1 (str);
453 if (SCM_LIKELY (scm_is_string (str)))
454 RETURN (SCM_I_MAKINUM (scm_i_string_length (str)));
455 else
456 {
457 SYNC_REGISTER ();
458 RETURN (scm_string_length (str));
459 }
460}
461
462VM_DEFINE_FUNCTION (164, string_ref, "string-ref", 2)
463{
464 scm_t_signed_bits i = 0;
465 ARGS2 (str, idx);
466 if (SCM_LIKELY (scm_is_string (str)
467 && SCM_I_INUMP (idx)
468 && ((i = SCM_I_INUM (idx)) >= 0)
469 && i < scm_i_string_length (str)))
470 RETURN (SCM_MAKE_CHAR (scm_i_string_ref (str, i)));
471 else
472 {
473 SYNC_REGISTER ();
474 RETURN (scm_string_ref (str, idx));
475 }
476}
477
478/* No string-set! instruction, as there is no good fast path there. */
479
480\f
1e4b834a 481/*
827dc8dc 482 * Vectors and arrays
1e4b834a 483 */
aec4a84a 484
d5a4f51f
AW		 485VM_DEFINE_FUNCTION (165, vector_length, "vector-length", 1)
486{
487 ARGS1 (vect);
488 if (SCM_LIKELY (SCM_I_IS_VECTOR (vect)))
489 RETURN (SCM_I_MAKINUM (SCM_I_VECTOR_LENGTH (vect)));
490 else
491 {
492 SYNC_REGISTER ();
493 RETURN (scm_vector_length (vect));
494 }
495}
496
497VM_DEFINE_FUNCTION (166, vector_ref, "vector-ref", 2)
d6f1ce3d 498{
e25f3727 499 scm_t_signed_bits i = 0;
d6f1ce3d 500 ARGS2 (vect, idx);
7b702b53 501 if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
d6f1ce3d
AW		 502 && SCM_I_INUMP (idx)
503 && ((i = SCM_I_INUM (idx)) >= 0)
504 && i < SCM_I_VECTOR_LENGTH (vect)))
505 RETURN (SCM_I_VECTOR_ELTS (vect)[i]);
506 else
9b29d607
AW		 507 {
508 SYNC_REGISTER ();
509 RETURN (scm_vector_ref (vect, idx));
510 }
d6f1ce3d
AW		 511}
512
d5a4f51f 513VM_DEFINE_INSTRUCTION (167, vector_set, "vector-set", 0, 3, 0)
d6f1ce3d 514{
e25f3727 515 scm_t_signed_bits i = 0;
d6f1ce3d 516 SCM vect, idx, val;
eae2438d 517 POP3 (val, idx, vect);
7b702b53 518 if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
d6f1ce3d
AW		 519 && SCM_I_INUMP (idx)
520 && ((i = SCM_I_INUM (idx)) >= 0)
521 && i < SCM_I_VECTOR_LENGTH (vect)))
522 SCM_I_VECTOR_WELTS (vect)[i] = val;
523 else
9b29d607
AW		 524 {
525 SYNC_REGISTER ();
526 scm_vector_set_x (vect, idx, val);
527 }
d6f1ce3d
AW		 528 NEXT;
529}
530
d5a4f51f 531VM_DEFINE_INSTRUCTION (168, make_array, "make-array", 3, -1, 1)
827dc8dc
AW		 532{
533 scm_t_uint32 len;
534 SCM shape, ret;
535
536 len = FETCH ();
537 len = (len << 8) + FETCH ();
538 len = (len << 8) + FETCH ();
539 POP (shape);
540 SYNC_REGISTER ();
384dce46 541 PRE_CHECK_UNDERFLOW (len);
827dc8dc
AW		 542 ret = scm_from_contiguous_array (shape, sp - len + 1, len);
543 DROPN (len);
544 PUSH (ret);
545 NEXT;
546}
547
548\f
549/*
550 * Structs
551 */
41e49280 552#define VM_VALIDATE_STRUCT(obj, proc) \
827dc8dc
AW		 553 if (SCM_UNLIKELY (!SCM_STRUCTP (obj))) \
554 { \
41e49280 555 func_name = proc; \
827dc8dc
AW		 556 finish_args = (obj); \
557 goto vm_error_not_a_struct; \
558 }
559
d5a4f51f 560VM_DEFINE_FUNCTION (169, struct_p, "struct?", 1)
827dc8dc
AW		 561{
562 ARGS1 (obj);
563 RETURN (scm_from_bool (SCM_STRUCTP (obj)));
564}
565
d5a4f51f 566VM_DEFINE_FUNCTION (170, struct_vtable, "struct-vtable", 1)
827dc8dc
AW		 567{
568 ARGS1 (obj);
41e49280 569 VM_VALIDATE_STRUCT (obj, "struct_vtable");
827dc8dc
AW		 570 RETURN (SCM_STRUCT_VTABLE (obj));
571}
572
d5a4f51f 573VM_DEFINE_INSTRUCTION (171, make_struct, "make-struct", 2, -1, 1)
827dc8dc
AW		 574{
575 unsigned h = FETCH ();
576 unsigned l = FETCH ();
9a974fd3
AW		 577 scm_t_bits n = ((h << 8U) + l);
578 SCM vtable = sp[-(n - 1)];
579 const SCM *inits = sp - n + 2;
580 SCM ret;
827dc8dc 581
9823fd39
LC		 582 SYNC_REGISTER ();
583
827dc8dc
AW		 584 if (SCM_LIKELY (SCM_STRUCTP (vtable)
585 && SCM_VTABLE_FLAG_IS_SET (vtable, SCM_VTABLE_FLAG_SIMPLE)
9a974fd3
AW		 586 && (SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size) + 1
587 == n)
588 && !SCM_VTABLE_INSTANCE_FINALIZER (vtable)))
827dc8dc 589 {
9a974fd3
AW		 590 /* Verily, we are making a simple struct with the right number of
591 initializers, and no finalizer. */
592 ret = scm_words ((scm_t_bits)SCM_STRUCT_DATA (vtable) | scm_tc3_struct,
593 n + 1);
594 SCM_SET_CELL_WORD_1 (ret, (scm_t_bits)SCM_CELL_OBJECT_LOC (ret, 2));
595 memcpy (SCM_STRUCT_DATA (ret), inits, (n - 1) * sizeof (SCM));
827dc8dc 596 }
9a974fd3
AW		 597 else
598 ret = scm_c_make_structv (vtable, 0, n - 1, (scm_t_bits *) inits);
599
c99865c1 600 DROPN (n);
9a974fd3 601 PUSH (ret);
827dc8dc 602
9a974fd3 603 NEXT;
827dc8dc
AW		 604}
605
d5a4f51f 606VM_DEFINE_FUNCTION (172, struct_ref, "struct-ref", 2)
827dc8dc
AW		 607{
608 ARGS2 (obj, pos);
609
610 if (SCM_LIKELY (SCM_STRUCTP (obj)
611 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
612 SCM_VTABLE_FLAG_SIMPLE)
613 && SCM_I_INUMP (pos)))
614 {
615 SCM vtable;
616 scm_t_bits index, len;
617
e25f3727
AW		 618 /* True, an inum is a signed value, but cast to unsigned it will
619 certainly be more than the length, so we will fall through if
620 index is negative. */
827dc8dc
AW		 621 index = SCM_I_INUM (pos);
622 vtable = SCM_STRUCT_VTABLE (obj);
623 len = SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size);
624
625 if (SCM_LIKELY (index < len))
626 {
627 scm_t_bits *data = SCM_STRUCT_DATA (obj);
628 RETURN (SCM_PACK (data[index]));
629 }
630 }
631
9823fd39 632 SYNC_REGISTER ();
827dc8dc
AW		 633 RETURN (scm_struct_ref (obj, pos));
634}
635
d5a4f51f 636VM_DEFINE_FUNCTION (173, struct_set, "struct-set", 3)
827dc8dc
AW		 637{
638 ARGS3 (obj, pos, val);
639
640 if (SCM_LIKELY (SCM_STRUCTP (obj)
641 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
642 SCM_VTABLE_FLAG_SIMPLE)
643 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
644 SCM_VTABLE_FLAG_SIMPLE_RW)
645 && SCM_I_INUMP (pos)))
646 {
647 SCM vtable;
648 scm_t_bits index, len;
649
e25f3727 650 /* See above regarding index being >= 0. */
827dc8dc
AW		 651 index = SCM_I_INUM (pos);
652 vtable = SCM_STRUCT_VTABLE (obj);
653 len = SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size);
654 if (SCM_LIKELY (index < len))
655 {
656 scm_t_bits *data = SCM_STRUCT_DATA (obj);
657 data[index] = SCM_UNPACK (val);
658 RETURN (val);
659 }
660 }
661
9823fd39 662 SYNC_REGISTER ();
827dc8dc
AW		 663 RETURN (scm_struct_set_x (obj, pos, val));
664}
665
666\f
667/*
668 * GOOPS support
669 */
d5a4f51f 670VM_DEFINE_FUNCTION (174, class_of, "class-of", 1)
827dc8dc
AW		 671{
672 ARGS1 (obj);
1a461493
AW		 673 if (SCM_INSTANCEP (obj))
674 RETURN (SCM_CLASS_OF (obj));
675 SYNC_REGISTER ();
676 RETURN (scm_class_of (obj));
827dc8dc
AW		 677}
678
e25f3727 679/* FIXME: No checking whatsoever. */
d5a4f51f 680VM_DEFINE_FUNCTION (175, slot_ref, "slot-ref", 2)
827dc8dc
AW		 681{
682 size_t slot;
683 ARGS2 (instance, idx);
684 slot = SCM_I_INUM (idx);
685 RETURN (SCM_PACK (SCM_STRUCT_DATA (instance) [slot]));
686}
687
e25f3727 688/* FIXME: No checking whatsoever. */
d5a4f51f 689VM_DEFINE_INSTRUCTION (176, slot_set, "slot-set", 0, 3, 0)
827dc8dc
AW		 690{
691 SCM instance, idx, val;
692 size_t slot;
eae2438d 693 POP3 (val, idx, instance);
827dc8dc
AW		 694 slot = SCM_I_INUM (idx);
695 SCM_STRUCT_DATA (instance) [slot] = SCM_UNPACK (val);
696 NEXT;
697}
698
699\f
700/*
701 * Bytevectors
702 */
41e49280 703#define VM_VALIDATE_BYTEVECTOR(x, proc) \
1b68d627
LC		 704 do \
705 { \
706 if (SCM_UNLIKELY (!SCM_BYTEVECTOR_P (x))) \
707 { \
41e49280 708 func_name = proc; \
1b68d627
LC		 709 finish_args = x; \
710 goto vm_error_not_a_bytevector; \
711 } \
712 } \
713 while (0)
e6eb2467
AW		 714
715#define BV_REF_WITH_ENDIANNESS(stem, fn_stem) \
716{ \
717 SCM endianness; \
718 POP (endianness); \
719 if (scm_is_eq (endianness, scm_i_native_endianness)) \
720 goto VM_LABEL (bv_##stem##_native_ref); \
721 { \
722 ARGS2 (bv, idx); \
9823fd39 723 SYNC_REGISTER (); \
e6eb2467
AW		 724 RETURN (scm_bytevector_##fn_stem##_ref (bv, idx, endianness)); \
725 } \
726}
727
daccfef4
LC		 728/* Return true (non-zero) if PTR has suitable alignment for TYPE. */
729#define ALIGNED_P(ptr, type) \
1002c774 730 ((scm_t_uintptr) (ptr) % alignof_type (type) == 0)
daccfef4 731
d5a4f51f 732VM_DEFINE_FUNCTION (177, bv_u16_ref, "bv-u16-ref", 3)
e6eb2467 733BV_REF_WITH_ENDIANNESS (u16, u16)
d5a4f51f 734VM_DEFINE_FUNCTION (178, bv_s16_ref, "bv-s16-ref", 3)
e6eb2467 735BV_REF_WITH_ENDIANNESS (s16, s16)
d5a4f51f 736VM_DEFINE_FUNCTION (179, bv_u32_ref, "bv-u32-ref", 3)
e6eb2467 737BV_REF_WITH_ENDIANNESS (u32, u32)
d5a4f51f 738VM_DEFINE_FUNCTION (180, bv_s32_ref, "bv-s32-ref", 3)
e6eb2467 739BV_REF_WITH_ENDIANNESS (s32, s32)
d5a4f51f 740VM_DEFINE_FUNCTION (181, bv_u64_ref, "bv-u64-ref", 3)
e6eb2467 741BV_REF_WITH_ENDIANNESS (u64, u64)
d5a4f51f 742VM_DEFINE_FUNCTION (182, bv_s64_ref, "bv-s64-ref", 3)
e6eb2467 743BV_REF_WITH_ENDIANNESS (s64, s64)
d5a4f51f 744VM_DEFINE_FUNCTION (183, bv_f32_ref, "bv-f32-ref", 3)
e6eb2467 745BV_REF_WITH_ENDIANNESS (f32, ieee_single)
d5a4f51f 746VM_DEFINE_FUNCTION (184, bv_f64_ref, "bv-f64-ref", 3)
e6eb2467
AW		 747BV_REF_WITH_ENDIANNESS (f64, ieee_double)
748
749#undef BV_REF_WITH_ENDIANNESS
750
9823fd39
LC		 751#define BV_FIXABLE_INT_REF(stem, fn_stem, type, size) \
752{ \
e25f3727 753 scm_t_signed_bits i; \
daccfef4 754 const scm_t_ ## type *int_ptr; \
9823fd39 755 ARGS2 (bv, idx); \
daccfef4 756 \
41e49280 757 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 758 i = SCM_I_INUM (idx); \
759 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
760 \
9823fd39 761 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 762 && (i >= 0) \
9823fd39 763 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC		 764 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
765 RETURN (SCM_I_MAKINUM (*int_ptr)); \
9823fd39
LC		 766 else \
767 { \
768 SYNC_REGISTER (); \
769 RETURN (scm_bytevector_ ## fn_stem ## _ref (bv, idx)); \
770 } \
771}
772
773#define BV_INT_REF(stem, type, size) \
774{ \
e25f3727 775 scm_t_signed_bits i; \
daccfef4 776 const scm_t_ ## type *int_ptr; \
9823fd39 777 ARGS2 (bv, idx); \
daccfef4 778 \
41e49280 779 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 780 i = SCM_I_INUM (idx); \
781 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
782 \
9823fd39 783 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 784 && (i >= 0) \
9823fd39 785 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC		 786 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
787 { \
788 scm_t_ ## type x = *int_ptr; \
9823fd39
LC		 789 if (SCM_FIXABLE (x)) \
790 RETURN (SCM_I_MAKINUM (x)); \
791 else \
792 { \
793 SYNC_REGISTER (); \
794 RETURN (scm_from_ ## type (x)); \
795 } \
796 } \
797 else \
798 { \
799 SYNC_REGISTER (); \
800 RETURN (scm_bytevector_ ## stem ## _native_ref (bv, idx)); \
801 } \
802}
803
804#define BV_FLOAT_REF(stem, fn_stem, type, size) \
805{ \
e25f3727 806 scm_t_signed_bits i; \
daccfef4 807 const type *float_ptr; \
9823fd39 808 ARGS2 (bv, idx); \
daccfef4 809 \
41e49280 810 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 811 i = SCM_I_INUM (idx); \
812 float_ptr = (type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
813 \
9823fd39
LC		 814 SYNC_REGISTER (); \
815 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 816 && (i >= 0) \
9823fd39 817 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC		 818 && (ALIGNED_P (float_ptr, type)))) \
819 RETURN (scm_from_double (*float_ptr)); \
9823fd39
LC		 820 else \
821 RETURN (scm_bytevector_ ## fn_stem ## _native_ref (bv, idx)); \
e6eb2467
AW		 822}
823
d5a4f51f 824VM_DEFINE_FUNCTION (185, bv_u8_ref, "bv-u8-ref", 2)
e6eb2467 825BV_FIXABLE_INT_REF (u8, u8, uint8, 1)
d5a4f51f 826VM_DEFINE_FUNCTION (186, bv_s8_ref, "bv-s8-ref", 2)
e6eb2467 827BV_FIXABLE_INT_REF (s8, s8, int8, 1)
d5a4f51f 828VM_DEFINE_FUNCTION (187, bv_u16_native_ref, "bv-u16-native-ref", 2)
e6eb2467 829BV_FIXABLE_INT_REF (u16, u16_native, uint16, 2)
d5a4f51f 830VM_DEFINE_FUNCTION (188, bv_s16_native_ref, "bv-s16-native-ref", 2)
e6eb2467 831BV_FIXABLE_INT_REF (s16, s16_native, int16, 2)
d5a4f51f 832VM_DEFINE_FUNCTION (189, bv_u32_native_ref, "bv-u32-native-ref", 2)
dddacb23
LC		 833#if SIZEOF_VOID_P > 4
834BV_FIXABLE_INT_REF (u32, u32_native, uint32, 4)
835#else
e6eb2467 836BV_INT_REF (u32, uint32, 4)
dddacb23 837#endif
d5a4f51f 838VM_DEFINE_FUNCTION (190, bv_s32_native_ref, "bv-s32-native-ref", 2)
dddacb23
LC		 839#if SIZEOF_VOID_P > 4
840BV_FIXABLE_INT_REF (s32, s32_native, int32, 4)
841#else
e6eb2467 842BV_INT_REF (s32, int32, 4)
dddacb23 843#endif
d5a4f51f 844VM_DEFINE_FUNCTION (191, bv_u64_native_ref, "bv-u64-native-ref", 2)
e6eb2467 845BV_INT_REF (u64, uint64, 8)
d5a4f51f 846VM_DEFINE_FUNCTION (192, bv_s64_native_ref, "bv-s64-native-ref", 2)
e6eb2467 847BV_INT_REF (s64, int64, 8)
d5a4f51f 848VM_DEFINE_FUNCTION (193, bv_f32_native_ref, "bv-f32-native-ref", 2)
e6eb2467 849BV_FLOAT_REF (f32, ieee_single, float, 4)
d5a4f51f 850VM_DEFINE_FUNCTION (194, bv_f64_native_ref, "bv-f64-native-ref", 2)
e6eb2467
AW		 851BV_FLOAT_REF (f64, ieee_double, double, 8)
852
853#undef BV_FIXABLE_INT_REF
854#undef BV_INT_REF
855#undef BV_FLOAT_REF
856
857
858
859#define BV_SET_WITH_ENDIANNESS(stem, fn_stem) \
860{ \
861 SCM endianness; \
862 POP (endianness); \
863 if (scm_is_eq (endianness, scm_i_native_endianness)) \
864 goto VM_LABEL (bv_##stem##_native_set); \
865 { \
eae2438d 866 SCM bv, idx, val; POP3 (val, idx, bv); \
ad301b6d 867 SYNC_REGISTER (); \
d6f1ce3d
AW		 868 scm_bytevector_##fn_stem##_set_x (bv, idx, val, endianness); \
869 NEXT; \
e6eb2467
AW		 870 } \
871}
872
d5a4f51f 873VM_DEFINE_INSTRUCTION (195, bv_u16_set, "bv-u16-set", 0, 4, 0)
e6eb2467 874BV_SET_WITH_ENDIANNESS (u16, u16)
d5a4f51f 875VM_DEFINE_INSTRUCTION (196, bv_s16_set, "bv-s16-set", 0, 4, 0)
e6eb2467 876BV_SET_WITH_ENDIANNESS (s16, s16)
d5a4f51f 877VM_DEFINE_INSTRUCTION (197, bv_u32_set, "bv-u32-set", 0, 4, 0)
e6eb2467 878BV_SET_WITH_ENDIANNESS (u32, u32)
d5a4f51f 879VM_DEFINE_INSTRUCTION (198, bv_s32_set, "bv-s32-set", 0, 4, 0)
e6eb2467 880BV_SET_WITH_ENDIANNESS (s32, s32)
d5a4f51f 881VM_DEFINE_INSTRUCTION (199, bv_u64_set, "bv-u64-set", 0, 4, 0)
e6eb2467 882BV_SET_WITH_ENDIANNESS (u64, u64)
d5a4f51f 883VM_DEFINE_INSTRUCTION (200, bv_s64_set, "bv-s64-set", 0, 4, 0)
e6eb2467 884BV_SET_WITH_ENDIANNESS (s64, s64)
d5a4f51f 885VM_DEFINE_INSTRUCTION (201, bv_f32_set, "bv-f32-set", 0, 4, 0)
e6eb2467 886BV_SET_WITH_ENDIANNESS (f32, ieee_single)
d5a4f51f 887VM_DEFINE_INSTRUCTION (202, bv_f64_set, "bv-f64-set", 0, 4, 0)
e6eb2467
AW		 888BV_SET_WITH_ENDIANNESS (f64, ieee_double)
889
890#undef BV_SET_WITH_ENDIANNESS
891
daccfef4
LC		 892#define BV_FIXABLE_INT_SET(stem, fn_stem, type, min, max, size) \
893{ \
e25f3727 894 scm_t_signed_bits i, j = 0; \
daccfef4
LC		 895 SCM bv, idx, val; \
896 scm_t_ ## type *int_ptr; \
897 \
eae2438d 898 POP3 (val, idx, bv); \
41e49280 899 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC		 900 i = SCM_I_INUM (idx); \
901 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
902 \
903 if (SCM_LIKELY (SCM_I_INUMP (idx) \
904 && (i >= 0) \
905 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
906 && (ALIGNED_P (int_ptr, scm_t_ ## type)) \
907 && (SCM_I_INUMP (val)) \
908 && ((j = SCM_I_INUM (val)) >= min) \
909 && (j <= max))) \
910 *int_ptr = (scm_t_ ## type) j; \
911 else \
ad301b6d
AW		 912 { \
913 SYNC_REGISTER (); \
914 scm_bytevector_ ## fn_stem ## _set_x (bv, idx, val); \
915 } \
daccfef4
LC		 916 NEXT; \
917}
918
919#define BV_INT_SET(stem, type, size) \
920{ \
e25f3727 921 scm_t_signed_bits i = 0; \
daccfef4
LC		 922 SCM bv, idx, val; \
923 scm_t_ ## type *int_ptr; \
924 \
eae2438d 925 POP3 (val, idx, bv); \
41e49280 926 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC		 927 i = SCM_I_INUM (idx); \
928 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
929 \
930 if (SCM_LIKELY (SCM_I_INUMP (idx) \
931 && (i >= 0) \
932 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
933 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
934 *int_ptr = scm_to_ ## type (val); \
935 else \
ad301b6d
AW		 936 { \
937 SYNC_REGISTER (); \
938 scm_bytevector_ ## stem ## _native_set_x (bv, idx, val); \
939 } \
940 NEXT; \
daccfef4
LC		 941}
942
ad301b6d
AW		 943#define BV_FLOAT_SET(stem, fn_stem, type, size) \
944{ \
945 scm_t_signed_bits i = 0; \
946 SCM bv, idx, val; \
947 type *float_ptr; \
948 \
eae2438d 949 POP3 (val, idx, bv); \
ad301b6d
AW		 950 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
951 i = SCM_I_INUM (idx); \
952 float_ptr = (type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
953 \
954 if (SCM_LIKELY (SCM_I_INUMP (idx) \
955 && (i >= 0) \
956 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
957 && (ALIGNED_P (float_ptr, type)))) \
958 *float_ptr = scm_to_double (val); \
959 else \
960 { \
961 SYNC_REGISTER (); \
962 scm_bytevector_ ## fn_stem ## _native_set_x (bv, idx, val); \
963 } \
964 NEXT; \
e6eb2467
AW		 965}
966
d5a4f51f 967VM_DEFINE_INSTRUCTION (203, bv_u8_set, "bv-u8-set", 0, 3, 0)
e6eb2467 968BV_FIXABLE_INT_SET (u8, u8, uint8, 0, SCM_T_UINT8_MAX, 1)
d5a4f51f 969VM_DEFINE_INSTRUCTION (204, bv_s8_set, "bv-s8-set", 0, 3, 0)
e6eb2467 970BV_FIXABLE_INT_SET (s8, s8, int8, SCM_T_INT8_MIN, SCM_T_INT8_MAX, 1)
d5a4f51f 971VM_DEFINE_INSTRUCTION (205, bv_u16_native_set, "bv-u16-native-set", 0, 3, 0)
d6f1ce3d 972BV_FIXABLE_INT_SET (u16, u16_native, uint16, 0, SCM_T_UINT16_MAX, 2)
d5a4f51f 973VM_DEFINE_INSTRUCTION (206, bv_s16_native_set, "bv-s16-native-set", 0, 3, 0)
d6f1ce3d 974BV_FIXABLE_INT_SET (s16, s16_native, int16, SCM_T_INT16_MIN, SCM_T_INT16_MAX, 2)
d5a4f51f 975VM_DEFINE_INSTRUCTION (207, bv_u32_native_set, "bv-u32-native-set", 0, 3, 0)
dddacb23
LC		 976#if SIZEOF_VOID_P > 4
977BV_FIXABLE_INT_SET (u32, u32_native, uint32, 0, SCM_T_UINT32_MAX, 4)
978#else
e6eb2467 979BV_INT_SET (u32, uint32, 4)
dddacb23 980#endif
d5a4f51f 981VM_DEFINE_INSTRUCTION (208, bv_s32_native_set, "bv-s32-native-set", 0, 3, 0)
dddacb23
LC		 982#if SIZEOF_VOID_P > 4
983BV_FIXABLE_INT_SET (s32, s32_native, int32, SCM_T_INT32_MIN, SCM_T_INT32_MAX, 4)
984#else
e6eb2467 985BV_INT_SET (s32, int32, 4)
dddacb23 986#endif
d5a4f51f 987VM_DEFINE_INSTRUCTION (209, bv_u64_native_set, "bv-u64-native-set", 0, 3, 0)
e6eb2467 988BV_INT_SET (u64, uint64, 8)
d5a4f51f 989VM_DEFINE_INSTRUCTION (210, bv_s64_native_set, "bv-s64-native-set", 0, 3, 0)
e6eb2467 990BV_INT_SET (s64, int64, 8)
d5a4f51f 991VM_DEFINE_INSTRUCTION (211, bv_f32_native_set, "bv-f32-native-set", 0, 3, 0)
e6eb2467 992BV_FLOAT_SET (f32, ieee_single, float, 4)
d5a4f51f 993VM_DEFINE_INSTRUCTION (212, bv_f64_native_set, "bv-f64-native-set", 0, 3, 0)
e6eb2467
AW		 994BV_FLOAT_SET (f64, ieee_double, double, 8)
995
996#undef BV_FIXABLE_INT_SET
997#undef BV_INT_SET
998#undef BV_FLOAT_SET
999
53e28ed9
AW		 1000/*
1001(defun renumber-ops ()
1002 "start from top of buffer and renumber 'VM_DEFINE_FOO (\n' sequences"
1003 (interactive "")
1004 (save-excursion
827dc8dc 1005 (let ((counter 127)) (goto-char (point-min))
53e28ed9
AW		 1006 (while (re-search-forward "^VM_DEFINE_[^ ]+ (\\([^,]+\\)," (point-max) t)
1007 (replace-match
1008 (number-to-string (setq counter (1+ counter)))
1009 t t nil 1)))))
1010*/
1e4b834a 1011
17e90c5e
KN		 1012/*
1013 Local Variables:
1014 c-file-style: "gnu"
1015 End:
1016*/
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