gcc4mbed/build/mbed.ld

   1 /*Copyright (C) 2011 by Sagar G V, Thejasvi M V
   2
   3 Permission is hereby granted, free of charge, to any person obtaining a copy
   4 of this software and associated documentation files (the "Software"), to deal
   5 in the Software without restriction, including without limitation the rights
   6 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   7 copies of the Software, and to permit persons to whom the Software is
   8 furnished to do so, subject to the following conditions:
   9
  10 The above copyright notice and this permission notice shall be included in
  11 all copies or substantial portions of the Software.
  12
  13 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  16 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  17 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  18 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  19 THE SOFTWARE.
  20 */
  21 /* Updates:
  22     Arthur Wolf & Adam Green in 2011 - Updated to work with mbed.
  23 */
  24
  25 OUTPUT_FORMAT ("elf32-littlearm")
  26 ENTRY(Reset_Handler)
  27 SEARCH_DIR(.)
  28
  29 MEMORY
  30 {
  31     /* LPC1768 : 512k ROM + 64k SRAM */
  32     /*------------------------------ */
  33
  34     /* On-chip ROM is a readable (r), executable region (x) */
  35     /* On-chip SRAM is a readable (r), writable (w) and */
  36     /* executable region (x) */
  37
  38     /* Main ROM region - 512k for LPC1768 */
  39     /*IROM (rx) : ORIGIN = 0x00000000, LENGTH = 512k  */
  40     IROM (rx) : ORIGIN = 16K, LENGTH = (512k - 16K)
  41
  42     /* local static RAM - 32k for LPC1768 */
  43     IRAM0 (rwx) : ORIGIN = 0x10000000, LENGTH = 32k
  44
  45     /* AHB SRAM - 16k + 16k for LPC1768 */
  46     IRAM1 (rwx) : ORIGIN = 0x2007C000, LENGTH = 16k
  47     IRAM2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16k
  48 }
  49
  50 /* SECTION command : Define mapping of input sections */
  51 /* into output sections. */
  52
  53 SECTIONS
  54 {
  55     /******************************************/
  56     /* code section */
  57
  58     /* "normal" code */
  59
  60     .text :
  61     {
  62         KEEP(*(RESET))
  63         *(.mbed_init)
  64         *(i.SystemInit)
  65         . = 0x000002FC;
  66         KEEP(*(.crp))
  67         . = 0x00000300;
  68         *(.text .text.*)
  69         *(.gnu.linkonce.t.*)
  70         *(.glue_7)
  71         *(.glue_7t)
  72         *(.gcc_except_table)
  73         *(.rodata .rodata*)
  74         *(.gnu.linkonce.r.*)
  75         . = ALIGN(4);
  76         KEEP(*(.init))
  77
  78         . = ALIGN(4);
  79         __preinit_array_start = .;
  80         KEEP (*(.preinit_array))
  81         __preinit_array_end = .;
  82
  83         . = ALIGN(4);
  84         __init_array_start = .;
  85         KEEP (*(SORT(.init_array.*)))
  86         KEEP (*(.init_array))
  87         __init_array_end = .;
  88
  89         . = ALIGN(0x4);
  90         KEEP (*crtbegin.o(.ctors))
  91         KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
  92         KEEP (*(SORT(.ctors.*)))
  93         KEEP (*crtend.o(.ctors))
  94
  95         . = ALIGN(4);
  96         KEEP(*(.fini))
  97
  98         . = ALIGN(4);
  99         __fini_array_start = .;
 100         KEEP (*(.fini_array))
 101         KEEP (*(SORT(.fini_array.*)))
 102         __fini_array_end = .;
 103
 104
 105         . = ALIGN(0x4);
 106         KEEP (*crtbegin.o(.dtors))
 107         KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
 108         KEEP (*(SORT(.dtors.*)))
 109         KEEP (*crtend.o(.dtors))
 110
 111         /* End Of .text section */
 112         _etext = .;
 113         _sifastcode = .;
 114     } >IROM
 115
 116
 117     __exidx_start = .;
 118     .ARM.exidx :
 119     {
 120         *(.ARM.exidx* .gnu.linkonce.armexidx.*)
 121     } >IROM
 122     __exidx_end = .;
 123
 124     /******************************************/
 125     /* data section */
 126     .data :
 127     {
 128         _sidata = LOADADDR (.data);
 129         . = ALIGN(4);
 130         _sdata = .;
 131         Image$$RW_IRAM1$$Base = .;
 132
 133         *(.ARM.__AT_0x10000000)
 134         *(vtable vtable.*)
 135         *(.data .data.*)
 136         *(.gnu.linkonce.d*)
 137
 138         . = ALIGN(4);
 139         _edata = . ;
 140     } >IRAM0 AT>IROM
 141
 142     /******************************************/
 143     /* For no-init variables section */
 144     .bss (NOLOAD) :
 145     {
 146         . = ALIGN(4);
 147         _sbss = . ;
 148
 149         *(.bss .bss.*)
 150         *(.gnu.linkonce.b*)
 151         *(COMMON)
 152
 153         . = ALIGN(4);
 154         _ebss = . ;
 155         Image$$RW_IRAM1$$ZI$$Limit = . ;
 156     } >IRAM0
 157
 158     /**************************************************/
 159     /* fastcode - copied at startup & executed in RAM */
 160
 161     .fastcode :
 162     {
 163       _sifastcode = LOADADDR (.fastcode);
 164       . = ALIGN (4);
 165       _sfastcode = . ;
 166
 167       *(.glue_7t) *(.glue_7)
 168       *(.fastcode)
 169
 170       /* add other modules here ... */
 171
 172       . = ALIGN (4);
 173       _efastcode = . ;
 174     } >IRAM0 AT>IROM
 175
 176     /******************************************/
 177     /* For stack section */
 178     .stackarea (NOLOAD) :
 179     {
 180         . = ALIGN(8);
 181         _sstack = .;
 182
 183         *(.stackarea .stackarea.*)
 184
 185         . = ALIGN(8);
 186         _estack = .;
 187
 188         . = ALIGN(4);
 189         _end = . ;
 190         PROVIDE (end = .);
 191     } > IRAM0
 192     _stack = ORIGIN(IRAM0) + LENGTH(IRAM0);
 193
 194     /******************************************/
 195     /* Code can explicitly ask for data to be
 196        placed in these higher RAM banks where
 197        they will be left uninitialized. */
 198     .AHBSRAM0 (NOLOAD):
 199     {
 200         Image$$RW_IRAM2$$Base = . ;
 201         *(AHBSRAM0)
 202         Image$$RW_IRAM2$$ZI$$Limit = .;
 203     } > IRAM1
 204
 205     .AHBSRAM1 (NOLOAD):
 206     {
 207         Image$$RW_IRAM3$$Base = . ;
 208         *(AHBSRAM1)
 209         Image$$RW_IRAM3$$ZI$$Limit = .;
 210     } > IRAM2
 211
 212
 213     /******************************************/
 214     /* Stabs debugging sections.  */
 215     .stab          0 : { *(.stab) }
 216     .stabstr       0 : { *(.stabstr) }
 217     .stab.excl     0 : { *(.stab.excl) }
 218     .stab.exclstr  0 : { *(.stab.exclstr) }
 219     .stab.index    0 : { *(.stab.index) }
 220     .stab.indexstr 0 : { *(.stab.indexstr) }
 221     /* .comment       0 : { *(.comment) } */
 222     /* DWARF debug sections.
 223      Symbols in the DWARF debugging sections are relative to the beginning
 224      of the section so we begin them at 0.  */
 225     /* DWARF 1 */
 226     .debug          0 : { *(.debug) }
 227     .line           0 : { *(.line) }
 228     /* GNU DWARF 1 extensions */
 229     .debug_srcinfo  0 : { *(.debug_srcinfo) }
 230     .debug_sfnames  0 : { *(.debug_sfnames) }
 231     /* DWARF 1.1 and DWARF 2 */
 232     .debug_aranges  0 : { *(.debug_aranges) }
 233     .debug_pubnames 0 : { *(.debug_pubnames) }
 234     /* DWARF 2 */
 235     .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
 236     .debug_abbrev   0 : { *(.debug_abbrev) }
 237     .debug_line     0 : { *(.debug_line) }
 238     .debug_frame    0 : { *(.debug_frame) }
 239     .debug_str      0 : { *(.debug_str) }
 240     .debug_loc      0 : { *(.debug_loc) }
 241     .debug_macinfo  0 : { *(.debug_macinfo) }
 242     /* SGI/MIPS DWARF 2 extensions */
 243     .debug_weaknames 0 : { *(.debug_weaknames) }
 244     .debug_funcnames 0 : { *(.debug_funcnames) }
 245     .debug_typenames 0 : { *(.debug_typenames) }
 246     .debug_varnames  0 : { *(.debug_varnames) }
 247 }