mbed/src/vendor/NXP/cmsis/LPC1768/core_cmInstr.h

   1 /**************************************************************************//**
   2  * @file     core_cmInstr.h
   3  * @brief    CMSIS Cortex-M Core Instruction Access Header File
   4  * @version  V3.03
   5  * @date     29. August 2012
   6  *
   7  * @note
   8  * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
   9  *
  10  * @par
  11  * ARM Limited (ARM) is supplying this software for use with Cortex-M
  12  * processor based microcontrollers.  This file can be freely distributed
  13  * within development tools that are supporting such ARM based processors.
  14  *
  15  * @par
  16  * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  17  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  18  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  19  * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  20  * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  21  *
  22  ******************************************************************************/
  23
  24 #ifndef __CORE_CMINSTR_H
  25 #define __CORE_CMINSTR_H
  26
  27
  28 /* ##########################  Core Instruction Access  ######################### */
  29 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
  30   Access to dedicated instructions
  31   @{
  32 */
  33
  34 #if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
  35 /* ARM armcc specific functions */
  36
  37 #if (__ARMCC_VERSION < 400677)
  38   #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
  39 #endif
  40
  41
  42 /** \brief  No Operation
  43
  44     No Operation does nothing. This instruction can be used for code alignment purposes.
  45  */
  46 #define __NOP                             __nop
  47
  48
  49 /** \brief  Wait For Interrupt
  50
  51     Wait For Interrupt is a hint instruction that suspends execution
  52     until one of a number of events occurs.
  53  */
  54 #define __WFI                             __wfi
  55
  56
  57 /** \brief  Wait For Event
  58
  59     Wait For Event is a hint instruction that permits the processor to enter
  60     a low-power state until one of a number of events occurs.
  61  */
  62 #define __WFE                             __wfe
  63
  64
  65 /** \brief  Send Event
  66
  67     Send Event is a hint instruction. It causes an event to be signaled to the CPU.
  68  */
  69 #define __SEV                             __sev
  70
  71
  72 /** \brief  Instruction Synchronization Barrier
  73
  74     Instruction Synchronization Barrier flushes the pipeline in the processor,
  75     so that all instructions following the ISB are fetched from cache or
  76     memory, after the instruction has been completed.
  77  */
  78 #define __ISB()                           __isb(0xF)
  79
  80
  81 /** \brief  Data Synchronization Barrier
  82
  83     This function acts as a special kind of Data Memory Barrier.
  84     It completes when all explicit memory accesses before this instruction complete.
  85  */
  86 #define __DSB()                           __dsb(0xF)
  87
  88
  89 /** \brief  Data Memory Barrier
  90
  91     This function ensures the apparent order of the explicit memory operations before
  92     and after the instruction, without ensuring their completion.
  93  */
  94 #define __DMB()                           __dmb(0xF)
  95
  96
  97 /** \brief  Reverse byte order (32 bit)
  98
  99     This function reverses the byte order in integer value.
 100
 101     \param [in]    value  Value to reverse
 102     \return               Reversed value
 103  */
 104 #define __REV                             __rev
 105
 106
 107 /** \brief  Reverse byte order (16 bit)
 108
 109     This function reverses the byte order in two unsigned short values.
 110
 111     \param [in]    value  Value to reverse
 112     \return               Reversed value
 113  */
 114 #ifndef __NO_EMBEDDED_ASM
 115 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
 116 {
 117   rev16 r0, r0
 118   bx lr
 119 }
 120 #endif
 121
 122 /** \brief  Reverse byte order in signed short value
 123
 124     This function reverses the byte order in a signed short value with sign extension to integer.
 125
 126     \param [in]    value  Value to reverse
 127     \return               Reversed value
 128  */
 129 #ifndef __NO_EMBEDDED_ASM
 130 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
 131 {
 132   revsh r0, r0
 133   bx lr
 134 }
 135 #endif
 136
 137
 138 /** \brief  Rotate Right in unsigned value (32 bit)
 139
 140     This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
 141
 142     \param [in]    value  Value to rotate
 143     \param [in]    value  Number of Bits to rotate
 144     \return               Rotated value
 145  */
 146 #define __ROR                             __ror
 147
 148
 149 /** \brief  Breakpoint
 150
 151     This function causes the processor to enter Debug state.
 152     Debug tools can use this to investigate system state when the instruction at a particular address is reached.
 153
 154     \param [in]    value  is ignored by the processor.
 155                    If required, a debugger can use it to store additional information about the breakpoint.
 156  */
 157 #define __BKPT(value)                       __breakpoint(value)
 158
 159
 160 #if       (__CORTEX_M >= 0x03)
 161
 162 /** \brief  Reverse bit order of value
 163
 164     This function reverses the bit order of the given value.
 165
 166     \param [in]    value  Value to reverse
 167     \return               Reversed value
 168  */
 169 #define __RBIT                            __rbit
 170
 171
 172 /** \brief  LDR Exclusive (8 bit)
 173
 174     This function performs a exclusive LDR command for 8 bit value.
 175
 176     \param [in]    ptr  Pointer to data
 177     \return             value of type uint8_t at (*ptr)
 178  */
 179 #define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
 180
 181
 182 /** \brief  LDR Exclusive (16 bit)
 183
 184     This function performs a exclusive LDR command for 16 bit values.
 185
 186     \param [in]    ptr  Pointer to data
 187     \return        value of type uint16_t at (*ptr)
 188  */
 189 #define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
 190
 191
 192 /** \brief  LDR Exclusive (32 bit)
 193
 194     This function performs a exclusive LDR command for 32 bit values.
 195
 196     \param [in]    ptr  Pointer to data
 197     \return        value of type uint32_t at (*ptr)
 198  */
 199 #define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
 200
 201
 202 /** \brief  STR Exclusive (8 bit)
 203
 204     This function performs a exclusive STR command for 8 bit values.
 205
 206     \param [in]  value  Value to store
 207     \param [in]    ptr  Pointer to location
 208     \return          0  Function succeeded
 209     \return          1  Function failed
 210  */
 211 #define __STREXB(value, ptr)              __strex(value, ptr)
 212
 213
 214 /** \brief  STR Exclusive (16 bit)
 215
 216     This function performs a exclusive STR command for 16 bit values.
 217
 218     \param [in]  value  Value to store
 219     \param [in]    ptr  Pointer to location
 220     \return          0  Function succeeded
 221     \return          1  Function failed
 222  */
 223 #define __STREXH(value, ptr)              __strex(value, ptr)
 224
 225
 226 /** \brief  STR Exclusive (32 bit)
 227
 228     This function performs a exclusive STR command for 32 bit values.
 229
 230     \param [in]  value  Value to store
 231     \param [in]    ptr  Pointer to location
 232     \return          0  Function succeeded
 233     \return          1  Function failed
 234  */
 235 #define __STREXW(value, ptr)              __strex(value, ptr)
 236
 237
 238 /** \brief  Remove the exclusive lock
 239
 240     This function removes the exclusive lock which is created by LDREX.
 241
 242  */
 243 #define __CLREX                           __clrex
 244
 245
 246 /** \brief  Signed Saturate
 247
 248     This function saturates a signed value.
 249
 250     \param [in]  value  Value to be saturated
 251     \param [in]    sat  Bit position to saturate to (1..32)
 252     \return             Saturated value
 253  */
 254 #define __SSAT                            __ssat
 255
 256
 257 /** \brief  Unsigned Saturate
 258
 259     This function saturates an unsigned value.
 260
 261     \param [in]  value  Value to be saturated
 262     \param [in]    sat  Bit position to saturate to (0..31)
 263     \return             Saturated value
 264  */
 265 #define __USAT                            __usat
 266
 267
 268 /** \brief  Count leading zeros
 269
 270     This function counts the number of leading zeros of a data value.
 271
 272     \param [in]  value  Value to count the leading zeros
 273     \return             number of leading zeros in value
 274  */
 275 #define __CLZ                             __clz
 276
 277 #endif /* (__CORTEX_M >= 0x03) */
 278
 279
 280
 281 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
 282 /* IAR iccarm specific functions */
 283
 284 #include <cmsis_iar.h>
 285
 286
 287 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
 288 /* TI CCS specific functions */
 289
 290 #include <cmsis_ccs.h>
 291
 292
 293 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
 294 /* GNU gcc specific functions */
 295
 296 /** \brief  No Operation
 297
 298     No Operation does nothing. This instruction can be used for code alignment purposes.
 299  */
 300 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
 301 {
 302   __ASM volatile ("nop");
 303 }
 304
 305
 306 /** \brief  Wait For Interrupt
 307
 308     Wait For Interrupt is a hint instruction that suspends execution
 309     until one of a number of events occurs.
 310  */
 311 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
 312 {
 313   __ASM volatile ("wfi");
 314 }
 315
 316
 317 /** \brief  Wait For Event
 318
 319     Wait For Event is a hint instruction that permits the processor to enter
 320     a low-power state until one of a number of events occurs.
 321  */
 322 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
 323 {
 324   __ASM volatile ("wfe");
 325 }
 326
 327
 328 /** \brief  Send Event
 329
 330     Send Event is a hint instruction. It causes an event to be signaled to the CPU.
 331  */
 332 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
 333 {
 334   __ASM volatile ("sev");
 335 }
 336
 337
 338 /** \brief  Instruction Synchronization Barrier
 339
 340     Instruction Synchronization Barrier flushes the pipeline in the processor,
 341     so that all instructions following the ISB are fetched from cache or
 342     memory, after the instruction has been completed.
 343  */
 344 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
 345 {
 346   __ASM volatile ("isb");
 347 }
 348
 349
 350 /** \brief  Data Synchronization Barrier
 351
 352     This function acts as a special kind of Data Memory Barrier.
 353     It completes when all explicit memory accesses before this instruction complete.
 354  */
 355 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
 356 {
 357   __ASM volatile ("dsb");
 358 }
 359
 360
 361 /** \brief  Data Memory Barrier
 362
 363     This function ensures the apparent order of the explicit memory operations before
 364     and after the instruction, without ensuring their completion.
 365  */
 366 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
 367 {
 368   __ASM volatile ("dmb");
 369 }
 370
 371
 372 /** \brief  Reverse byte order (32 bit)
 373
 374     This function reverses the byte order in integer value.
 375
 376     \param [in]    value  Value to reverse
 377     \return               Reversed value
 378  */
 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
 380 {
 381   uint32_t result;
 382
 383   __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
 384   return(result);
 385 }
 386
 387
 388 /** \brief  Reverse byte order (16 bit)
 389
 390     This function reverses the byte order in two unsigned short values.
 391
 392     \param [in]    value  Value to reverse
 393     \return               Reversed value
 394  */
 395 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
 396 {
 397   uint32_t result;
 398
 399   __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
 400   return(result);
 401 }
 402
 403
 404 /** \brief  Reverse byte order in signed short value
 405
 406     This function reverses the byte order in a signed short value with sign extension to integer.
 407
 408     \param [in]    value  Value to reverse
 409     \return               Reversed value
 410  */
 411 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
 412 {
 413   uint32_t result;
 414
 415   __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
 416   return(result);
 417 }
 418
 419
 420 /** \brief  Rotate Right in unsigned value (32 bit)
 421
 422     This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
 423
 424     \param [in]    value  Value to rotate
 425     \param [in]    value  Number of Bits to rotate
 426     \return               Rotated value
 427  */
 428 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 429 {
 430
 431   __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) );
 432   return(op1);
 433 }
 434
 435
 436 /** \brief  Breakpoint
 437
 438     This function causes the processor to enter Debug state.
 439     Debug tools can use this to investigate system state when the instruction at a particular address is reached.
 440
 441     \param [in]    value  is ignored by the processor.
 442                    If required, a debugger can use it to store additional information about the breakpoint.
 443  */
 444 #define __BKPT(value)                       __ASM volatile ("bkpt "#value)
 445
 446
 447 #if       (__CORTEX_M >= 0x03)
 448
 449 /** \brief  Reverse bit order of value
 450
 451     This function reverses the bit order of the given value.
 452
 453     \param [in]    value  Value to reverse
 454     \return               Reversed value
 455  */
 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
 457 {
 458   uint32_t result;
 459
 460    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
 461    return(result);
 462 }
 463
 464
 465 /** \brief  LDR Exclusive (8 bit)
 466
 467     This function performs a exclusive LDR command for 8 bit value.
 468
 469     \param [in]    ptr  Pointer to data
 470     \return             value of type uint8_t at (*ptr)
 471  */
 472 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
 473 {
 474     uint8_t result;
 475
 476    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
 477    return(result);
 478 }
 479
 480
 481 /** \brief  LDR Exclusive (16 bit)
 482
 483     This function performs a exclusive LDR command for 16 bit values.
 484
 485     \param [in]    ptr  Pointer to data
 486     \return        value of type uint16_t at (*ptr)
 487  */
 488 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
 489 {
 490     uint16_t result;
 491
 492    __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
 493    return(result);
 494 }
 495
 496
 497 /** \brief  LDR Exclusive (32 bit)
 498
 499     This function performs a exclusive LDR command for 32 bit values.
 500
 501     \param [in]    ptr  Pointer to data
 502     \return        value of type uint32_t at (*ptr)
 503  */
 504 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
 505 {
 506     uint32_t result;
 507
 508    __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
 509    return(result);
 510 }
 511
 512
 513 /** \brief  STR Exclusive (8 bit)
 514
 515     This function performs a exclusive STR command for 8 bit values.
 516
 517     \param [in]  value  Value to store
 518     \param [in]    ptr  Pointer to location
 519     \return          0  Function succeeded
 520     \return          1  Function failed
 521  */
 522 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
 523 {
 524    uint32_t result;
 525
 526    __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
 527    return(result);
 528 }
 529
 530
 531 /** \brief  STR Exclusive (16 bit)
 532
 533     This function performs a exclusive STR command for 16 bit values.
 534
 535     \param [in]  value  Value to store
 536     \param [in]    ptr  Pointer to location
 537     \return          0  Function succeeded
 538     \return          1  Function failed
 539  */
 540 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
 541 {
 542    uint32_t result;
 543
 544    __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
 545    return(result);
 546 }
 547
 548
 549 /** \brief  STR Exclusive (32 bit)
 550
 551     This function performs a exclusive STR command for 32 bit values.
 552
 553     \param [in]  value  Value to store
 554     \param [in]    ptr  Pointer to location
 555     \return          0  Function succeeded
 556     \return          1  Function failed
 557  */
 558 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
 559 {
 560    uint32_t result;
 561
 562    __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
 563    return(result);
 564 }
 565
 566
 567 /** \brief  Remove the exclusive lock
 568
 569     This function removes the exclusive lock which is created by LDREX.
 570
 571  */
 572 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
 573 {
 574   __ASM volatile ("clrex");
 575 }
 576
 577
 578 /** \brief  Signed Saturate
 579
 580     This function saturates a signed value.
 581
 582     \param [in]  value  Value to be saturated
 583     \param [in]    sat  Bit position to saturate to (1..32)
 584     \return             Saturated value
 585  */
 586 #define __SSAT(ARG1,ARG2) \
 587 ({                          \
 588   uint32_t __RES, __ARG1 = (ARG1); \
 589   __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
 590   __RES; \
 591  })
 592
 593
 594 /** \brief  Unsigned Saturate
 595
 596     This function saturates an unsigned value.
 597
 598     \param [in]  value  Value to be saturated
 599     \param [in]    sat  Bit position to saturate to (0..31)
 600     \return             Saturated value
 601  */
 602 #define __USAT(ARG1,ARG2) \
 603 ({                          \
 604   uint32_t __RES, __ARG1 = (ARG1); \
 605   __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
 606   __RES; \
 607  })
 608
 609
 610 /** \brief  Count leading zeros
 611
 612     This function counts the number of leading zeros of a data value.
 613
 614     \param [in]  value  Value to count the leading zeros
 615     \return             number of leading zeros in value
 616  */
 617 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
 618 {
 619   uint8_t result;
 620
 621   __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
 622   return(result);
 623 }
 624
 625 #endif /* (__CORTEX_M >= 0x03) */
 626
 627
 628
 629
 630 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
 631 /* TASKING carm specific functions */
 632
 633 /*
 634  * The CMSIS functions have been implemented as intrinsics in the compiler.
 635  * Please use "carm -?i" to get an up to date list of all intrinsics,
 636  * Including the CMSIS ones.
 637  */
 638
 639 #endif
 640
 641 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
 642
 643 #endif /* __CORE_CMINSTR_H */