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1 | /* |
2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio | |
3 | ||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | |
5 | you may not use this file except in compliance with the License. | |
6 | You may obtain a copy of the License at | |
7 | ||
8 | http://www.apache.org/licenses/LICENSE-2.0 | |
9 | ||
10 | Unless required by applicable law or agreed to in writing, software | |
11 | distributed under the License is distributed on an "AS IS" BASIS, | |
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |
13 | See the License for the specific language governing permissions and | |
14 | limitations under the License. | |
15 | */ | |
16 | ||
17 | #ifndef _MCUCONF_H_ | |
18 | #define _MCUCONF_H_ | |
19 | ||
20 | /* | |
21 | * STM32F0xx drivers configuration. | |
22 | * The following settings override the default settings present in | |
23 | * the various device driver implementation headers. | |
24 | * Note that the settings for each driver only have effect if the whole | |
25 | * driver is enabled in halconf.h. | |
26 | * | |
27 | * IRQ priorities: | |
28 | * 3...0 Lowest...Highest. | |
29 | * | |
30 | * DMA priorities: | |
31 | * 0...3 Lowest...Highest. | |
32 | */ | |
33 | ||
34 | #define STM32F0xx_MCUCONF | |
35 | // #define STM32F070xB | |
36 | ||
37 | /* | |
38 | * HAL driver system settings. | |
39 | */ | |
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40 | #define STM32_NO_INIT FALSE |
41 | #define STM32_PVD_ENABLE FALSE | |
42 | #define STM32_PLS STM32_PLS_LEV0 | |
43 | #define STM32_HSI_ENABLED TRUE | |
44 | #define STM32_HSI14_ENABLED TRUE | |
45 | #define STM32_HSI48_ENABLED FALSE | |
46 | #define STM32_LSI_ENABLED TRUE | |
47 | #define STM32_HSE_ENABLED FALSE | |
48 | #define STM32_LSE_ENABLED TRUE | |
49 | #define STM32_SW STM32_SW_PLL | |
50 | #define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2 | |
51 | #define STM32_PREDIV_VALUE 1 | |
52 | #define STM32_PLLMUL_VALUE 12 | |
53 | #define STM32_HPRE STM32_HPRE_DIV1 | |
54 | #define STM32_PPRE STM32_PPRE_DIV1 | |
55 | #define STM32_ADCSW STM32_ADCSW_HSI14 | |
56 | #define STM32_ADCPRE STM32_ADCPRE_DIV4 | |
57 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK | |
58 | #define STM32_ADCPRE STM32_ADCPRE_DIV4 | |
59 | #define STM32_ADCSW STM32_ADCSW_HSI14 | |
60 | #define STM32_USBSW STM32_USBSW_HSI48 | |
61 | #define STM32_CECSW STM32_CECSW_HSI | |
62 | #define STM32_I2C1SW STM32_I2C1SW_HSI | |
63 | #define STM32_USART1SW STM32_USART1SW_PCLK | |
64 | #define STM32_RTCSEL STM32_RTCSEL_LSE | |
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65 | |
66 | /* | |
26eef35f | 67 | * IRQ system settings. |
6b4549da | 68 | */ |
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69 | #define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3 |
70 | #define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3 | |
71 | #define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3 | |
72 | #define STM32_IRQ_EXTI16_IRQ_PRIORITY 3 | |
73 | #define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3 | |
74 | #define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3 | |
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75 | |
76 | /* | |
26eef35f | 77 | * ADC driver system settings. |
6b4549da | 78 | */ |
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79 | #define STM32_ADC_USE_ADC1 FALSE |
80 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 | |
81 | #define STM32_ADC_IRQ_PRIORITY 2 | |
82 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 | |
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83 | |
84 | /* | |
85 | * GPT driver system settings. | |
86 | */ | |
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87 | #define STM32_GPT_USE_TIM1 FALSE |
88 | #define STM32_GPT_USE_TIM2 FALSE | |
89 | #define STM32_GPT_USE_TIM3 FALSE | |
90 | #define STM32_GPT_USE_TIM14 FALSE | |
91 | #define STM32_GPT_TIM1_IRQ_PRIORITY 2 | |
92 | #define STM32_GPT_TIM2_IRQ_PRIORITY 2 | |
93 | #define STM32_GPT_TIM3_IRQ_PRIORITY 2 | |
94 | #define STM32_GPT_TIM14_IRQ_PRIORITY 2 | |
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95 | |
96 | /* | |
97 | * I2C driver system settings. | |
98 | */ | |
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99 | #define STM32_I2C_USE_I2C1 TRUE |
100 | #define STM32_I2C_USE_I2C2 FALSE | |
101 | #define STM32_I2C_BUSY_TIMEOUT 50 | |
102 | #define STM32_I2C_I2C1_IRQ_PRIORITY 3 | |
103 | #define STM32_I2C_I2C2_IRQ_PRIORITY 3 | |
104 | #define STM32_I2C_USE_DMA TRUE | |
105 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 | |
106 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 | |
107 | #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) | |
108 | #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) | |
109 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") | |
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110 | |
111 | /* | |
112 | * ICU driver system settings. | |
113 | */ | |
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114 | #define STM32_ICU_USE_TIM1 FALSE |
115 | #define STM32_ICU_USE_TIM2 FALSE | |
116 | #define STM32_ICU_USE_TIM3 FALSE | |
117 | #define STM32_ICU_TIM1_IRQ_PRIORITY 3 | |
118 | #define STM32_ICU_TIM2_IRQ_PRIORITY 3 | |
119 | #define STM32_ICU_TIM3_IRQ_PRIORITY 3 | |
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120 | |
121 | /* | |
122 | * PWM driver system settings. | |
123 | */ | |
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124 | #define STM32_PWM_USE_ADVANCED FALSE |
125 | #define STM32_PWM_USE_TIM1 FALSE | |
126 | #define STM32_PWM_USE_TIM2 FALSE | |
127 | #define STM32_PWM_USE_TIM3 TRUE | |
128 | #define STM32_PWM_TIM1_IRQ_PRIORITY 3 | |
129 | #define STM32_PWM_TIM2_IRQ_PRIORITY 3 | |
130 | #define STM32_PWM_TIM3_IRQ_PRIORITY 3 | |
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131 | |
132 | /* | |
133 | * SERIAL driver system settings. | |
134 | */ | |
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135 | #define STM32_SERIAL_USE_USART1 FALSE |
136 | #define STM32_SERIAL_USE_USART2 FALSE | |
137 | #define STM32_SERIAL_USART1_PRIORITY 3 | |
138 | #define STM32_SERIAL_USART2_PRIORITY 3 | |
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139 | |
140 | /* | |
141 | * SPI driver system settings. | |
142 | */ | |
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143 | #define STM32_SPI_USE_SPI1 FALSE |
144 | #define STM32_SPI_USE_SPI2 TRUE | |
145 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 | |
146 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 | |
147 | #define STM32_SPI_SPI1_IRQ_PRIORITY 2 | |
148 | #define STM32_SPI_SPI2_IRQ_PRIORITY 2 | |
149 | #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) | |
150 | #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) | |
151 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") | |
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152 | |
153 | /* | |
154 | * ST driver system settings. | |
155 | */ | |
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156 | #define STM32_ST_IRQ_PRIORITY 2 |
157 | #define STM32_ST_USE_TIMER 2 | |
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158 | |
159 | /* | |
160 | * UART driver system settings. | |
161 | */ | |
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162 | #define STM32_UART_USE_USART1 FALSE |
163 | #define STM32_UART_USE_USART2 FALSE | |
164 | #define STM32_UART_USART1_IRQ_PRIORITY 3 | |
165 | #define STM32_UART_USART2_IRQ_PRIORITY 3 | |
166 | #define STM32_UART_USART1_DMA_PRIORITY 0 | |
167 | #define STM32_UART_USART2_DMA_PRIORITY 0 | |
168 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") | |
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169 | |
170 | /* | |
171 | * USB driver system settings. | |
172 | */ | |
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173 | #define STM32_USB_USE_USB1 TRUE |
174 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE | |
175 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 3 | |
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176 | |
177 | #endif /* _MCUCONF_H_ */ |