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8ee389c9 PIN |
1 | /* |
2 | Copyright 2012 Jun Wako <wakojun@gmail.com> | |
3 | ||
4 | This program is free software: you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation, either version 2 of the License, or | |
7 | (at your option) any later version. | |
8 | ||
9 | This program is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | GNU General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU General Public License | |
15 | along with this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | ||
18 | #ifndef CONFIG_H | |
19 | #define CONFIG_H | |
20 | ||
21 | #include "config_common.h" | |
22 | ||
9838ddce PIN |
23 | #define USB_VENDOR_ID_LENOVO 0x17ef |
24 | #define USB_DEVICE_ID_LENOVO_TPKBD 0x6009 | |
25 | #define USB_DEVICE_ID_LENOVO_CUSBKBD 0x6047 | |
26 | #define USB_DEVICE_ID_LENOVO_CBTKBD 0x6048 | |
27 | #define USB_DEVICE_ID_LENOVO_TPPRODOCK 0x6067 | |
28 | ||
8ee389c9 | 29 | /* USB Device descriptor parameter */ |
9838ddce PIN |
30 | #define VENDOR_ID USB_VENDOR_ID_LENOVO |
31 | #define PRODUCT_ID USB_DEVICE_ID_LENOVO_CBTKBD | |
8ee389c9 PIN |
32 | #define DEVICE_VER 0x0001 |
33 | #define MANUFACTURER Priyadi | |
34 | #define PRODUCT Promethium Keyboard | |
0b54b323 | 35 | #define DESCRIPTION |
8ee389c9 PIN |
36 | |
37 | /* key matrix size */ | |
38 | #define MATRIX_ROWS 8 | |
39 | #define MATRIX_COLS 6 | |
40 | ||
41 | /* default pin-out */ | |
42 | #define MATRIX_COL_PINS { B6, B7, D6, C7, F6, F7 } | |
43 | #define MATRIX_ROW_PINS { D7, C6, D0, D1, F5, F4, F1, F0 } | |
44 | #define UNUSED_PINS | |
45 | ||
9fc3afbe PIN |
46 | /* |
47 | * Keyboard Matrix Assignments | |
48 | * | |
49 | * Change this to how you wired your keyboard | |
50 | * COLS: AVR pins used for columns, left to right | |
51 | * ROWS: AVR pins used for rows, top to bottom | |
52 | * DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode) | |
53 | * ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode) | |
54 | * | |
55 | */ | |
8ee389c9 PIN |
56 | #define DIODE_DIRECTION COL2ROW |
57 | ||
9fc3afbe PIN |
58 | // #define BACKLIGHT_PIN B7 |
59 | // #define BACKLIGHT_BREATHING | |
60 | // #define BACKLIGHT_LEVELS 3 | |
61 | ||
62 | /* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */ | |
63 | #define DEBOUNCING_DELAY 5 | |
64 | ||
65 | /* define if matrix has ghost (lacks anti-ghosting diodes) */ | |
8ee389c9 PIN |
66 | //#define MATRIX_HAS_GHOST |
67 | ||
68 | /* number of backlight levels */ | |
8ee389c9 PIN |
69 | |
70 | /* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */ | |
9fc3afbe | 71 | // #define LOCKING_SUPPORT_ENABLE |
8ee389c9 | 72 | /* Locking resynchronize hack */ |
9fc3afbe PIN |
73 | // #define LOCKING_RESYNC_ENABLE |
74 | ||
75 | /* | |
76 | * Force NKRO | |
77 | * | |
78 | * Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved | |
79 | * state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the | |
80 | * makefile for this to work.) | |
81 | * | |
82 | * If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N) | |
83 | * until the next keyboard reset. | |
84 | * | |
85 | * NKRO may prevent your keystrokes from being detected in the BIOS, but it is | |
86 | * fully operational during normal computer usage. | |
87 | * | |
88 | * For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N) | |
89 | * or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by | |
90 | * bootmagic, NKRO mode will always be enabled until it is toggled again during a | |
91 | * power-up. | |
92 | * | |
93 | */ | |
94 | //#define FORCE_NKRO | |
8ee389c9 PIN |
95 | |
96 | /* key combination for command */ | |
97 | #define IS_COMMAND() ( \ | |
98 | keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT) | MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RCTRL)) \ | |
99 | ) | |
100 | ||
9fc3afbe PIN |
101 | /* control how magic key switches layers */ |
102 | //#define MAGIC_KEY_SWITCH_LAYER_WITH_FKEYS true | |
103 | //#define MAGIC_KEY_SWITCH_LAYER_WITH_NKEYS true | |
104 | //#define MAGIC_KEY_SWITCH_LAYER_WITH_CUSTOM false | |
105 | ||
106 | /* override magic key keymap */ | |
107 | //#define MAGIC_KEY_SWITCH_LAYER_WITH_FKEYS | |
108 | //#define MAGIC_KEY_SWITCH_LAYER_WITH_NKEYS | |
109 | //#define MAGIC_KEY_SWITCH_LAYER_WITH_CUSTOM | |
110 | //#define MAGIC_KEY_HELP1 H | |
111 | //#define MAGIC_KEY_HELP2 SLASH | |
112 | //#define MAGIC_KEY_DEBUG D | |
113 | //#define MAGIC_KEY_DEBUG_MATRIX X | |
114 | //#define MAGIC_KEY_DEBUG_KBD K | |
115 | //#define MAGIC_KEY_DEBUG_MOUSE M | |
116 | //#define MAGIC_KEY_VERSION V | |
117 | //#define MAGIC_KEY_STATUS S | |
118 | //#define MAGIC_KEY_CONSOLE C | |
119 | //#define MAGIC_KEY_LAYER0_ALT1 ESC | |
120 | //#define MAGIC_KEY_LAYER0_ALT2 GRAVE | |
121 | //#define MAGIC_KEY_LAYER0 0 | |
122 | //#define MAGIC_KEY_LAYER1 1 | |
123 | //#define MAGIC_KEY_LAYER2 2 | |
124 | //#define MAGIC_KEY_LAYER3 3 | |
125 | //#define MAGIC_KEY_LAYER4 4 | |
126 | //#define MAGIC_KEY_LAYER5 5 | |
127 | //#define MAGIC_KEY_LAYER6 6 | |
128 | //#define MAGIC_KEY_LAYER7 7 | |
129 | //#define MAGIC_KEY_LAYER8 8 | |
130 | //#define MAGIC_KEY_LAYER9 9 | |
131 | //#define MAGIC_KEY_BOOTLOADER PAUSE | |
132 | //#define MAGIC_KEY_LOCK CAPS | |
133 | //#define MAGIC_KEY_EEPROM E | |
134 | //#define MAGIC_KEY_NKRO N | |
135 | //#define MAGIC_KEY_SLEEP_LED Z | |
136 | ||
8ee389c9 PIN |
137 | /* |
138 | * Feature disable options | |
139 | * These options are also useful to firmware size reduction. | |
140 | */ | |
141 | ||
142 | /* disable debug print */ | |
9fc3afbe | 143 | // #define NO_DEBUG |
8ee389c9 PIN |
144 | |
145 | /* disable print */ | |
9fc3afbe | 146 | // #define NO_PRINT |
8ee389c9 PIN |
147 | |
148 | /* disable action features */ | |
149 | //#define NO_ACTION_LAYER | |
150 | //#define NO_ACTION_TAPPING | |
151 | //#define NO_ACTION_ONESHOT | |
152 | //#define NO_ACTION_MACRO | |
153 | //#define NO_ACTION_FUNCTION | |
154 | ||
155 | /* PS/2 mouse */ | |
156 | #ifdef PS2_USE_BUSYWAIT | |
157 | # define PS2_CLOCK_PORT PORTD | |
158 | # define PS2_CLOCK_PIN PIND | |
159 | # define PS2_CLOCK_DDR DDRD | |
160 | # define PS2_CLOCK_BIT 1 | |
161 | # define PS2_DATA_PORT PORTD | |
162 | # define PS2_DATA_PIN PIND | |
163 | # define PS2_DATA_DDR DDRD | |
164 | # define PS2_DATA_BIT 2 | |
165 | #endif | |
166 | ||
167 | /* PS/2 mouse interrupt version */ | |
168 | #ifdef PS2_USE_INT | |
169 | /* uses INT1 for clock line(ATMega32U4) */ | |
170 | #define PS2_CLOCK_PORT PORTD | |
171 | #define PS2_CLOCK_PIN PIND | |
172 | #define PS2_CLOCK_DDR DDRD | |
173 | #define PS2_CLOCK_BIT 3 | |
174 | #define PS2_DATA_PORT PORTD | |
175 | #define PS2_DATA_PIN PIND | |
176 | #define PS2_DATA_DDR DDRD | |
177 | #define PS2_DATA_BIT 2 | |
178 | ||
179 | #define PS2_INT_INIT() do { \ | |
180 | EICRA |= ((1<<ISC31) | \ | |
181 | (0<<ISC30)); \ | |
182 | } while (0) | |
183 | #define PS2_INT_ON() do { \ | |
184 | EIMSK |= (1<<INT3); \ | |
185 | } while (0) | |
186 | #define PS2_INT_OFF() do { \ | |
187 | EIMSK &= ~(1<<INT3); \ | |
188 | } while (0) | |
189 | #define PS2_INT_VECT INT3_vect | |
190 | #endif | |
191 | ||
192 | /* PS/2 mouse USART version */ | |
193 | #ifdef PS2_USE_USART | |
8ee389c9 PIN |
194 | /* XCK for clock line and RXD for data line */ |
195 | #define PS2_CLOCK_PORT PORTD | |
196 | #define PS2_CLOCK_PIN PIND | |
197 | #define PS2_CLOCK_DDR DDRD | |
198 | #define PS2_CLOCK_BIT 5 | |
199 | #define PS2_DATA_PORT PORTD | |
200 | #define PS2_DATA_PIN PIND | |
201 | #define PS2_DATA_DDR DDRD | |
202 | #define PS2_DATA_BIT 2 | |
203 | ||
204 | /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ | |
205 | /* set DDR of CLOCK as input to be slave */ | |
206 | #define PS2_USART_INIT() do { \ | |
207 | PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \ | |
208 | PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \ | |
209 | UCSR1C = ((1 << UMSEL10) | \ | |
210 | (3 << UPM10) | \ | |
211 | (0 << USBS1) | \ | |
212 | (3 << UCSZ10) | \ | |
213 | (0 << UCPOL1)); \ | |
214 | UCSR1A = 0; \ | |
215 | UBRR1H = 0; \ | |
216 | UBRR1L = 0; \ | |
217 | } while (0) | |
218 | #define PS2_USART_RX_INT_ON() do { \ | |
219 | UCSR1B = ((1 << RXCIE1) | \ | |
220 | (1 << RXEN1)); \ | |
221 | } while (0) | |
222 | #define PS2_USART_RX_POLL_ON() do { \ | |
223 | UCSR1B = (1 << RXEN1); \ | |
224 | } while (0) | |
225 | #define PS2_USART_OFF() do { \ | |
226 | UCSR1C = 0; \ | |
227 | UCSR1B &= ~((1 << RXEN1) | \ | |
228 | (1 << TXEN1)); \ | |
229 | } while (0) | |
230 | #define PS2_USART_RX_READY (UCSR1A & (1<<RXC1)) | |
231 | #define PS2_USART_RX_DATA UDR1 | |
232 | #define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1))) | |
233 | #define PS2_USART_RX_VECT USART1_RX_vect | |
234 | #endif | |
8ee389c9 PIN |
235 | |
236 | ||
237 | #endif |