[jackhill/guix/guix.git] / gnu / packages / fpga.scm

;;; GNU Guix --- Functional package management for GNU
;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
;;;
;;; This file is part of GNU Guix.
;;;
;;; GNU Guix is free software; you can redistribute it and/or modify it
;;; under the terms of the GNU General Public License as published by
;;; the Free Software Foundation; either version 3 of the License, or (at
;;; your option) any later version.
;;;
;;; GNU Guix is distributed in the hope that it will be useful, but
;;; WITHOUT ANY WARRANTY; without even the implied warranty of
;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;;; GNU General Public License for more details.
;;;
;;; You should have received a copy of the GNU General Public License
;;; along with GNU Guix.  If not, see <http://www.gnu.org/licenses/>.

(define-module (gnu packages fpga)
  #:use-module ((guix licenses) #:prefix license:)
  #:use-module (guix packages)
  #:use-module (guix download)
  #:use-module (guix git-download)
  #:use-module (guix build-system gnu)
  #:use-module (guix build-system cmake)
  #:use-module (gnu packages)
  #:use-module (gnu packages pkg-config)
  #:use-module (gnu packages tcl)
  #:use-module (gnu packages readline)
  #:use-module (gnu packages python)
  #:use-module (gnu packages bison)
  #:use-module (gnu packages flex)
  #:use-module (gnu packages gtk)
  #:use-module (gnu packages libffi)
  #:use-module (gnu packages zip)
  #:use-module (gnu packages perl)
  #:use-module (gnu packages ghostscript)
  #:use-module (gnu packages gperf)
  #:use-module (gnu packages gawk)
  #:use-module (gnu packages version-control)
  #:use-module (gnu packages libftdi))

(define-public abc
 (let ((commit "5ae4b975c49c")
       (revision "1"))
  (package
    (name "abc")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method url-fetch)
              (uri
               (string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
              (file-name (string-append name "-" version "-checkout.zip"))
              (sha256
                (base32
                   "1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("unzip" ,unzip)))
    (inputs
     `(("readline" ,readline)))
    (arguments
     `(#:tests? #f ; no check target
       #:phases
       (modify-phases %standard-phases
         (delete 'configure)
         (replace 'install
           (lambda* (#:key outputs #:allow-other-keys)
             (let* ((out (assoc-ref outputs "out"))
                    (out-bin (string-append out "/bin")))
               (install-file "abc" out-bin)))))))
    (home-page "http://people.eecs.berkeley.edu/~alanmi/abc/")
    (synopsis "Sequential logic synthesis and formal verification")
    (description "ABC is a program for sequential logic synthesis and
formal verification.")
    (license
      (license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))

(define-public iverilog
  (package
    (name "iverilog")
    (version "10.1.1")
    (source (origin
              (method url-fetch)
              (uri
               (string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
                              "verilog-" version ".tar.gz"))
              (sha256
                (base32
                   "1nnassxvq30rnn0r2p85rkb2zwxk97p109y13x3vr365wzgpbapx"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("flex" ,flex)
       ("bison" ,bison)
       ("ghostscript" ,ghostscript))) ; ps2pdf
    (home-page "http://iverilog.icarus.com/")
    (synopsis "FPGA Verilog simulation and synthesis tool")
    (description "Icarus Verilog is a Verilog simulation and synthesis tool.
It operates as a compiler, compiling source code written in Verilog
(IEEE-1364) into some target format.
For batch simulation, the compiler can generate an intermediate form
called vvp assembly.
This intermediate form is executed by the ``vvp'' command.
For synthesis, the compiler generates netlists in the desired format.")
    ;; GPL2 only because of:
    ;; - ./driver/iverilog.man.in
    ;; - ./iverilog-vpi.man.in
    ;; - ./tgt-fpga/iverilog-fpga.man
    ;; - ./vvp/vvp.man.in
    ;; Otherwise would be GPL2+.
    ;; You have to accept both GPL2 and LGPL2.1+.
    (license (list license:gpl2 license:lgpl2.1+))))

(define-public yosys
  (package
    (name "yosys")
    (version "0.6")
    (source (origin
              (method url-fetch)
              (uri
               (string-append "https://github.com/cliffordwolf/yosys/archive/"
                              name "-" version ".tar.gz"))
              (sha256
                (base32
                   "02j0c0m9dfyjccynalf0aggj6gy20k7iphpkg5cn6sdirlkv8gmx"))
              (file-name (string-append name "-" version "-checkout.tar.gz"))
              (modules '((guix build utils)))
              (snippet
                '(substitute* "Makefile"
                   (("ABCREV = .*") "ABCREV = default\n")))))
    (build-system gnu-build-system)
    (arguments
     `(#:test-target "test"
       #:make-flags (list "CC=gcc"
                          "CXX=g++"
                          (string-append "PREFIX=" %output))
       #:phases
       (modify-phases %standard-phases
         (replace 'configure
           (lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
             (zero? (apply system* "make" "config-gcc" make-flags))))
         (add-after 'configure 'prepare-abc
           (lambda* (#:key inputs #:allow-other-keys)
             (let* ((sourceabc (assoc-ref inputs "abc"))
                    (sourcebin (string-append sourceabc "/bin"))
                    (source (string-append sourcebin "/abc")))
                   (mkdir-p "abc")
                   (call-with-output-file "abc/Makefile"
                     (lambda (port)
                       (format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
                   (copy-file source "abc/abc")
                   (zero? (system* "chmod" "+w" "abc/abc")))))
          (add-before 'check 'fix-iverilog-references
             (lambda* (#:key inputs native-inputs #:allow-other-keys)
               (let* ((xinputs (or native-inputs inputs))
                      (xdirname (assoc-ref xinputs "iverilog"))
                      (iverilog (string-append xdirname "/bin/iverilog")))
                     (substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
                                    "./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
                                    "./techlibs/ice40/tests/test_bram.sh"
                                    "./techlibs/ice40/tests/test_ffs.sh"
                                    "./techlibs/xilinx/tests/bram1.sh"
                                    "./techlibs/xilinx/tests/bram2.sh"
                                    "./tests/bram/run-single.sh"
                                    "./tests/realmath/run-test.sh"
                                    "./tests/simple/run-test.sh"
                                    "./tests/techmap/mem_simple_4x1_runtest.sh"
                                    "./tests/tools/autotest.sh"
                                    "./tests/vloghtb/common.sh")
                        (("if ! which iverilog") "if ! true")
                        (("iverilog ") (string-append iverilog " "))
                        (("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
                                                                iverilog "\"")))
                     #t))))))
    ;; TODO add xdot [patch the path to it here] as soon as I find out where it is.
    (native-inputs
     `(("pkg-config" ,pkg-config)
       ("python" ,python)
       ("bison" ,bison)
       ("flex" ,flex)
       ("gawk" , gawk) ; for the tests and "make" progress pretty-printing
       ("tcl" ,tcl) ; tclsh for the tests
       ("iverilog" ,iverilog))) ; for the tests
    (inputs
     `(("tcl" ,tcl)
       ("readline" ,readline)
       ("libffi" ,libffi)
       ("abc" ,abc)))
    (home-page "http://www.clifford.at/yosys/")
    (synopsis "FPGA Verilog RTL synthesizer")
    (description "Yosys synthesizes Verilog-2005.")
    (license license:isc)))

(define-public icestorm
  (let ((commit "12b2295c9087d94b75e374bb205ae4d76cf17e2f")
        (revision "1"))
   (package
    (name "icestorm")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method git-fetch)
              (uri (git-reference
                     (url "https://github.com/cliffordwolf/icestorm.git")
                     (commit commit)))
              (file-name (string-append name "-" version "-checkout"))
              (sha256
                (base32
                   "1mmzlqvap6w8n4qzv3idvy51arkgn03692ssplwncy3akjrbsd2b"))))
    (build-system gnu-build-system)
    (arguments
     `(#:tests? #f ; no unit tests that don't need an FPGA exist.
       #:make-flags (list "CC=gcc" "CXX=g++"
                          (string-append "PREFIX=" (assoc-ref %outputs "out")))
       #:phases
        (modify-phases %standard-phases
          (add-after 'unpack 'remove-usr-local
            (lambda _
              (substitute* "iceprog/Makefile"
                (("-I/usr/local/include") "")
                (("-L/usr/local/lib") ""))
              #t))
          (delete 'configure))))
    (inputs
     `(("libftdi" ,libftdi)))
    (native-inputs
     `(("python-3" ,python)
       ("pkg-config" ,pkg-config)))
    (home-page "http://www.clifford.at/icestorm/")
    (synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
    (description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
Includes the actual FTDI connector.")
    (license license:isc))))

(define-public arachne-pnr
  (let ((commit "52e69ed207342710080d85c7c639480e74a021d7")
        (revision "1"))
   (package
    (name "arachne-pnr")
    (version (string-append "0.0-" revision "-" (string-take commit 9)))
    (source (origin
              (method git-fetch)
              (uri (git-reference
                     (url "https://github.com/cseed/arachne-pnr.git")
                     (commit commit)))
              (file-name (string-append name "-" version "-checkout"))
              (sha256
                (base32
                   "15bdw5yxj76lxrwksp6liwmr6l1x77isf4bs50ys9rsnmiwh8c3w"))))
    (build-system gnu-build-system)
    (arguments
     `(#:test-target "test"
       #:phases (modify-phases %standard-phases
       (replace 'configure
         (lambda* (#:key outputs inputs #:allow-other-keys)
           (substitute* '("Makefile")
             (("DESTDIR = .*") (string-append "DESTDIR = "
                                             (assoc-ref outputs "out")
                                             "\n"))
             (("ICEBOX = .*") (string-append "ICEBOX = "
                                             (assoc-ref inputs "icestorm")
                                             "/share/icebox\n")))
           (substitute* '("./tests/fsm/generate.py"
                          "./tests/combinatorial/generate.py")
             (("#!/usr/bin/python") "#!/usr/bin/python2"))
           #t)))))
    (inputs
     `(("icestorm" ,icestorm)))
    (native-inputs
     `(("git" ,git)  ; for determining its own version string
       ("yosys" ,yosys) ; for tests
       ("perl" ,perl) ; for shasum
       ("python-2" ,python-2))) ; for tests
    (home-page "https://github.com/cseed/arachne-pnr")
    (synopsis "Place-and-Route tool for FPGAs")
    (description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
    (license license:gpl2))))

(define-public gtkwave
  (package
    (name "gtkwave")
    (version "3.3.76")
    (source (origin
              (method url-fetch)
              (uri (string-append "http://gtkwave.sourceforge.net/"
                                  name "-" version ".tar.gz"))
              (sha256
               (base32
                "1vlvavszb1jwwiixiagld88agjrjg0ix8qa4xnxj4ziw0q87jbmn"))))
    (build-system gnu-build-system)
    (native-inputs
     `(("gperf" ,gperf)
       ("pkg-config" ,pkg-config)))
    (inputs
     `(("tcl" ,tcl)
       ("tk" ,tk)
       ("gtk+-2" ,gtk+-2)))
    (arguments
     `(#:configure-flags
       (list (string-append "--with-tcl="
                            (assoc-ref %build-inputs "tcl")
                            "/lib")
             (string-append "--with-tk="
                            (assoc-ref %build-inputs "tk")
                            "/lib"))))

    (synopsis "Waveform viewer for FPGA simulator trace files")
    (description "This package is a waveform viewer for FPGA
simulator trace files (FST).")
    (home-page "http://gtkwave.sourceforge.net/")
    ;; Exception against free government use in tcl_np.c and tcl_np.h
    (license (list license:gpl2+ license:expat license:tcl/tk))))
Commit	Line	Data
adba5f08 DM	1	;;; GNU Guix --- Functional package management for GNU
	2	;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org>
	3	;;;
	4	;;; This file is part of GNU Guix.
	5	;;;
	6	;;; GNU Guix is free software; you can redistribute it and/or modify it
	7	;;; under the terms of the GNU General Public License as published by
	8	;;; the Free Software Foundation; either version 3 of the License, or (at
	9	;;; your option) any later version.
	10	;;;
	11	;;; GNU Guix is distributed in the hope that it will be useful, but
	12	;;; WITHOUT ANY WARRANTY; without even the implied warranty of
	13	;;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	;;; GNU General Public License for more details.
	15	;;;
	16	;;; You should have received a copy of the GNU General Public License
	17	;;; along with GNU Guix. If not, see <http://www.gnu.org/licenses/>.
	18
	19	(define-module (gnu packages fpga)
	20	#:use-module ((guix licenses) #:prefix license:)
	21	#:use-module (guix packages)
	22	#:use-module (guix download)
	23	#:use-module (guix git-download)
	24	#:use-module (guix build-system gnu)
	25	#:use-module (guix build-system cmake)
	26	#:use-module (gnu packages)
	27	#:use-module (gnu packages pkg-config)
	28	#:use-module (gnu packages tcl)
	29	#:use-module (gnu packages readline)
	30	#:use-module (gnu packages python)
	31	#:use-module (gnu packages bison)
	32	#:use-module (gnu packages flex)
adc2f048	33	#:use-module (gnu packages gtk)
adba5f08 DM	34	#:use-module (gnu packages libffi)
	35	#:use-module (gnu packages zip)
	36	#:use-module (gnu packages perl)
	37	#:use-module (gnu packages ghostscript)
adc2f048	38	#:use-module (gnu packages gperf)
adba5f08 DM	39	#:use-module (gnu packages gawk)
	40	#:use-module (gnu packages version-control)
	41	#:use-module (gnu packages libftdi))
	42
	43	(define-public abc
	44	(let ((commit "5ae4b975c49c")
	45	(revision "1"))
	46	(package
	47	(name "abc")
	48	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	49	(source (origin
	50	(method url-fetch)
	51	(uri
	52	(string-append "https://bitbucket.org/alanmi/abc/get/" commit ".zip"))
	53	(file-name (string-append name "-" version "-checkout.zip"))
	54	(sha256
	55	(base32
	56	"1syygi1x40rdryih3galr4q8yg1w5bvdzl75hd27v1xq0l5bz3d0"))))
	57	(build-system gnu-build-system)
	58	(native-inputs
	59	`(("unzip" ,unzip)))
	60	(inputs
	61	`(("readline" ,readline)))
	62	(arguments
	63	`(#:tests? #f ; no check target
	64	#:phases
	65	(modify-phases %standard-phases
	66	(delete 'configure)
	67	(replace 'install
	68	(lambda* (#:key outputs #:allow-other-keys)
	69	(let* ((out (assoc-ref outputs "out"))
	70	(out-bin (string-append out "/bin")))
	71	(install-file "abc" out-bin)))))))
	72	(home-page "http://people.eecs.berkeley.edu/~alanmi/abc/")
	73	(synopsis "Sequential logic synthesis and formal verification")
	74	(description "ABC is a program for sequential logic synthesis and
	75	formal verification.")
	76	(license
	77	(license:non-copyleft "https://fedoraproject.org/wiki/Licensing:MIT#Modern_Variants")))))
44721336 DM	78
	79	(define-public iverilog
	80	(package
	81	(name "iverilog")
	82	(version "10.1.1")
	83	(source (origin
	84	(method url-fetch)
	85	(uri
	86	(string-append "ftp://ftp.icarus.com/pub/eda/verilog/v10/"
	87	"verilog-" version ".tar.gz"))
	88	(sha256
	89	(base32
	90	"1nnassxvq30rnn0r2p85rkb2zwxk97p109y13x3vr365wzgpbapx"))))
	91	(build-system gnu-build-system)
	92	(native-inputs
	93	`(("flex" ,flex)
	94	("bison" ,bison)
	95	("ghostscript" ,ghostscript))) ; ps2pdf
	96	(home-page "http://iverilog.icarus.com/")
	97	(synopsis "FPGA Verilog simulation and synthesis tool")
	98	(description "Icarus Verilog is a Verilog simulation and synthesis tool.
	99	It operates as a compiler, compiling source code written in Verilog
	100	(IEEE-1364) into some target format.
	101	For batch simulation, the compiler can generate an intermediate form
	102	called vvp assembly.
	103	This intermediate form is executed by the ``vvp'' command.
	104	For synthesis, the compiler generates netlists in the desired format.")
	105	;; GPL2 only because of:
	106	;; - ./driver/iverilog.man.in
	107	;; - ./iverilog-vpi.man.in
	108	;; - ./tgt-fpga/iverilog-fpga.man
	109	;; - ./vvp/vvp.man.in
	110	;; Otherwise would be GPL2+.
	111	;; You have to accept both GPL2 and LGPL2.1+.
	112	(license (list license:gpl2 license:lgpl2.1+))))
92fc940f DM	113
	114	(define-public yosys
	115	(package
	116	(name "yosys")
	117	(version "0.6")
	118	(source (origin
	119	(method url-fetch)
	120	(uri
	121	(string-append "https://github.com/cliffordwolf/yosys/archive/"
	122	name "-" version ".tar.gz"))
	123	(sha256
	124	(base32
	125	"02j0c0m9dfyjccynalf0aggj6gy20k7iphpkg5cn6sdirlkv8gmx"))
	126	(file-name (string-append name "-" version "-checkout.tar.gz"))
	127	(modules '((guix build utils)))
	128	(snippet
	129	'(substitute* "Makefile"
	130	(("ABCREV = .*") "ABCREV = default\n")))))
	131	(build-system gnu-build-system)
	132	(arguments
	133	`(#:test-target "test"
	134	#:make-flags (list "CC=gcc"
	135	"CXX=g++"
	136	(string-append "PREFIX=" %output))
	137	#:phases
	138	(modify-phases %standard-phases
	139	(replace 'configure
	140	(lambda* (#:key inputs (make-flags '()) #:allow-other-keys)
	141	(zero? (apply system* "make" "config-gcc" make-flags))))
	142	(add-after 'configure 'prepare-abc
	143	(lambda* (#:key inputs #:allow-other-keys)
	144	(let* ((sourceabc (assoc-ref inputs "abc"))
	145	(sourcebin (string-append sourceabc "/bin"))
	146	(source (string-append sourcebin "/abc")))
	147	(mkdir-p "abc")
	148	(call-with-output-file "abc/Makefile"
	149	(lambda (port)
	150	(format port ".PHONY: all\nall:\n\tcp -f abc abc-default\n")))
	151	(copy-file source "abc/abc")
	152	(zero? (system* "chmod" "+w" "abc/abc")))))
	153	(add-before 'check 'fix-iverilog-references
	154	(lambda* (#:key inputs native-inputs #:allow-other-keys)
	155	(let* ((xinputs (or native-inputs inputs))
	156	(xdirname (assoc-ref xinputs "iverilog"))
	157	(iverilog (string-append xdirname "/bin/iverilog")))
	158	(substitute* '("./manual/CHAPTER_StateOfTheArt/synth.sh"
	159	"./manual/CHAPTER_StateOfTheArt/validate_tb.sh"
	160	"./techlibs/ice40/tests/test_bram.sh"
	161	"./techlibs/ice40/tests/test_ffs.sh"
	162	"./techlibs/xilinx/tests/bram1.sh"
	163	"./techlibs/xilinx/tests/bram2.sh"
	164	"./tests/bram/run-single.sh"
	165	"./tests/realmath/run-test.sh"
	166	"./tests/simple/run-test.sh"
	167	"./tests/techmap/mem_simple_4x1_runtest.sh"
	168	"./tests/tools/autotest.sh"
	169	"./tests/vloghtb/common.sh")
	170	(("if ! which iverilog") "if ! true")
	171	(("iverilog ") (string-append iverilog " "))
	172	(("iverilog_bin=\".*\"") (string-append "iverilog_bin=\""
	173	iverilog "\"")))
	174	#t))))))
	175	;; TODO add xdot [patch the path to it here] as soon as I find out where it is.
	176	(native-inputs
177	`(("pkg-config" ,pkg-config)
178	("python" ,python)
179	("bison" ,bison)
180	("flex" ,flex)
181	("gawk" , gawk) ; for the tests and "make" progress pretty-printing
182	("tcl" ,tcl) ; tclsh for the tests
183	("iverilog" ,iverilog))) ; for the tests
184	(inputs
185	`(("tcl" ,tcl)
186	("readline" ,readline)
187	("libffi" ,libffi)
188	("abc" ,abc)))
189	(home-page "http://www.clifford.at/yosys/")
190	(synopsis "FPGA Verilog RTL synthesizer")
191	(description "Yosys synthesizes Verilog-2005.")
192	(license license:isc)))
36aa11c7 DM	193
	194	(define-public icestorm
	195	(let ((commit "12b2295c9087d94b75e374bb205ae4d76cf17e2f")
	196	(revision "1"))
	197	(package
	198	(name "icestorm")
	199	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	200	(source (origin
	201	(method git-fetch)
	202	(uri (git-reference
	203	(url "https://github.com/cliffordwolf/icestorm.git")
	204	(commit commit)))
	205	(file-name (string-append name "-" version "-checkout"))
	206	(sha256
	207	(base32
	208	"1mmzlqvap6w8n4qzv3idvy51arkgn03692ssplwncy3akjrbsd2b"))))
	209	(build-system gnu-build-system)
	210	(arguments
	211	`(#:tests? #f ; no unit tests that don't need an FPGA exist.
	212	#:make-flags (list "CC=gcc" "CXX=g++"
	213	(string-append "PREFIX=" (assoc-ref %outputs "out")))
	214	#:phases
	215	(modify-phases %standard-phases
	216	(add-after 'unpack 'remove-usr-local
	217	(lambda _
	218	(substitute* "iceprog/Makefile"
	219	(("-I/usr/local/include") "")
	220	(("-L/usr/local/lib") ""))
	221	#t))
	222	(delete 'configure))))
	223	(inputs
	224	`(("libftdi" ,libftdi)))
	225	(native-inputs
	226	`(("python-3" ,python)
	227	("pkg-config" ,pkg-config)))
	228	(home-page "http://www.clifford.at/icestorm/")
	229	(synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools")
	230	(description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools.
	231	Includes the actual FTDI connector.")
	232	(license license:isc))))
bca3797b DM	233
	234	(define-public arachne-pnr
	235	(let ((commit "52e69ed207342710080d85c7c639480e74a021d7")
	236	(revision "1"))
	237	(package
	238	(name "arachne-pnr")
	239	(version (string-append "0.0-" revision "-" (string-take commit 9)))
	240	(source (origin
	241	(method git-fetch)
	242	(uri (git-reference
	243	(url "https://github.com/cseed/arachne-pnr.git")
	244	(commit commit)))
	245	(file-name (string-append name "-" version "-checkout"))
	246	(sha256
	247	(base32
	248	"15bdw5yxj76lxrwksp6liwmr6l1x77isf4bs50ys9rsnmiwh8c3w"))))
	249	(build-system gnu-build-system)
	250	(arguments
	251	`(#:test-target "test"
	252	#:phases (modify-phases %standard-phases
	253	(replace 'configure
	254	(lambda* (#:key outputs inputs #:allow-other-keys)
	255	(substitute* '("Makefile")
	256	(("DESTDIR = .*") (string-append "DESTDIR = "
	257	(assoc-ref outputs "out")
	258	"\n"))
	259	(("ICEBOX = .*") (string-append "ICEBOX = "
	260	(assoc-ref inputs "icestorm")
	261	"/share/icebox\n")))
	262	(substitute* '("./tests/fsm/generate.py"
	263	"./tests/combinatorial/generate.py")
	264	(("#!/usr/bin/python") "#!/usr/bin/python2"))
	265	#t)))))
	266	(inputs
	267	`(("icestorm" ,icestorm)))
	268	(native-inputs
	269	`(("git" ,git) ; for determining its own version string
	270	("yosys" ,yosys) ; for tests
	271	("perl" ,perl) ; for shasum
	272	("python-2" ,python-2))) ; for tests
	273	(home-page "https://github.com/cseed/arachne-pnr")
	274	(synopsis "Place-and-Route tool for FPGAs")
	275	(description "Arachne-PNR is a Place-and-Route Tool For FPGAs.")
	276	(license license:gpl2))))
adc2f048 DM	277
	278	(define-public gtkwave
	279	(package
	280	(name "gtkwave")
	281	(version "3.3.76")
	282	(source (origin
	283	(method url-fetch)
	284	(uri (string-append "http://gtkwave.sourceforge.net/"
	285	name "-" version ".tar.gz"))
	286	(sha256
	287	(base32
	288	"1vlvavszb1jwwiixiagld88agjrjg0ix8qa4xnxj4ziw0q87jbmn"))))
	289	(build-system gnu-build-system)
	290	(native-inputs
	291	`(("gperf" ,gperf)
	292	("pkg-config" ,pkg-config)))
	293	(inputs
	294	`(("tcl" ,tcl)
	295	("tk" ,tk)
	296	("gtk+-2" ,gtk+-2)))
	297	(arguments
	298	`(#:configure-flags
	299	(list (string-append "--with-tcl="
	300	(assoc-ref %build-inputs "tcl")
	301	"/lib")
	302	(string-append "--with-tk="
	303	(assoc-ref %build-inputs "tk")
	304	"/lib"))))
	305
	306	(synopsis "Waveform viewer for FPGA simulator trace files")
	307	(description "This package is a waveform viewer for FPGA
	308	simulator trace files (FST).")
	309	(home-page "http://gtkwave.sourceforge.net/")
	310	;; Exception against free government use in tcl_np.c and tcl_np.h
	311	(license (list license:gpl2+ license:expat license:tcl/tk))))