mlton/backend/allocate-registers.sig

   1 (* Copyright (C) 2009,2017 Matthew Fluet.
   2  * Copyright (C) 1999-2006 Henry Cejtin, Matthew Fluet, Suresh
   3  *    Jagannathan, and Stephen Weeks.
   4  * Copyright (C) 1997-2000 NEC Research Institute.
   5  *
   6  * MLton is released under a BSD-style license.
   7  * See the file MLton-LICENSE for details.
   8  *)
   9
  10 signature ALLOCATE_REGISTERS_STRUCTS =
  11    sig
  12       structure Rssa: RSSA
  13       structure Machine: MACHINE
  14       sharing Rssa.Runtime = Machine.Runtime
  15       sharing Rssa.Type = Machine.Type
  16    end
  17
  18 signature ALLOCATE_REGISTERS =
  19    sig
  20       include ALLOCATE_REGISTERS_STRUCTS
  21
  22       val allocate:
  23          {formalsStackOffsets: (Rssa.Var.t * Rssa.Type.t) vector -> Machine.StackOffset.t vector,
  24           function: Rssa.Function.t,
  25           varInfo: Rssa.Var.t -> {
  26                                   (* If (isSome operand) then a stack slot or
  27                                    * register needs to be allocated for the
  28                                    * variable.
  29                                    *)
  30                                   operand: Machine.Operand.t option ref option,
  31                                   ty: Machine.Type.t
  32                                   }
  33           }
  34          -> {(* If handlers are used, handlerLinkOffset gives the stack offsets
  35               * where the handler and link (old exnStack) should be stored.
  36               *)
  37              handlerLinkOffset: {handler: Bytes.t,
  38                                  link: Bytes.t} option,
  39              labelInfo:
  40              Rssa.Label.t -> {(* Live operands at the beginning of the block. *)
  41                               live: Machine.Operand.t vector,
  42                               (* Live operands at the beginning of the block,
  43                                * excepting its formals.
  44                                *)
  45                               liveNoFormals: Machine.Operand.t vector,
  46                               (* Size of frame including return address. *)
  47                               size: Bytes.t}}
  48    end