Add missing files

Add missing source file generated by external makefile

diff --git a/src/m68000/obj/cpuemu.c b/src/m68000/obj/cpuemu.c
new file mode 100644 (file)
index 0000000..a97db34
--- /dev/null
+++ b/src/m68000/obj/cpuemu.c
@@ -0,0 +1,60608 @@
+#include "cpudefs.h"
+#include "cpuextra.h"
+#include "inlines.h"
+#include "cputbl.h"
+#define CPUFUNC(x) x##_ff
+#ifdef NOFLAGS
+#include "noflags.h"
+#endif
+
+const int areg_byteinc[] = { 1, 1, 1, 1, 1, 1, 1, 2 };
+const int imm8_table[]   = { 8, 1, 2, 3, 4, 5, 6, 7 };
+
+const int movem_index1[256] = {
+0x08, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x06, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x07, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x06, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 
+};
+
+const int movem_index2[256] = {
+0xFFFFFFFF, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x01, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x00, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x01, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 
+};
+
+const int movem_next[256] = {
+0x00, 0x00, 0x00, 0x02, 0x00, 0x04, 0x04, 0x06, 0x00, 0x08, 0x08, 0x0A, 0x08, 0x0C, 0x0C, 0x0E, 
+0x00, 0x10, 0x10, 0x12, 0x10, 0x14, 0x14, 0x16, 0x10, 0x18, 0x18, 0x1A, 0x18, 0x1C, 0x1C, 0x1E, 
+0x00, 0x20, 0x20, 0x22, 0x20, 0x24, 0x24, 0x26, 0x20, 0x28, 0x28, 0x2A, 0x28, 0x2C, 0x2C, 0x2E, 
+0x20, 0x30, 0x30, 0x32, 0x30, 0x34, 0x34, 0x36, 0x30, 0x38, 0x38, 0x3A, 0x38, 0x3C, 0x3C, 0x3E, 
+0x00, 0x40, 0x40, 0x42, 0x40, 0x44, 0x44, 0x46, 0x40, 0x48, 0x48, 0x4A, 0x48, 0x4C, 0x4C, 0x4E, 
+0x40, 0x50, 0x50, 0x52, 0x50, 0x54, 0x54, 0x56, 0x50, 0x58, 0x58, 0x5A, 0x58, 0x5C, 0x5C, 0x5E, 
+0x40, 0x60, 0x60, 0x62, 0x60, 0x64, 0x64, 0x66, 0x60, 0x68, 0x68, 0x6A, 0x68, 0x6C, 0x6C, 0x6E, 
+0x60, 0x70, 0x70, 0x72, 0x70, 0x74, 0x74, 0x76, 0x70, 0x78, 0x78, 0x7A, 0x78, 0x7C, 0x7C, 0x7E, 
+0x00, 0x80, 0x80, 0x82, 0x80, 0x84, 0x84, 0x86, 0x80, 0x88, 0x88, 0x8A, 0x88, 0x8C, 0x8C, 0x8E, 
+0x80, 0x90, 0x90, 0x92, 0x90, 0x94, 0x94, 0x96, 0x90, 0x98, 0x98, 0x9A, 0x98, 0x9C, 0x9C, 0x9E, 
+0x80, 0xA0, 0xA0, 0xA2, 0xA0, 0xA4, 0xA4, 0xA6, 0xA0, 0xA8, 0xA8, 0xAA, 0xA8, 0xAC, 0xAC, 0xAE, 
+0xA0, 0xB0, 0xB0, 0xB2, 0xB0, 0xB4, 0xB4, 0xB6, 0xB0, 0xB8, 0xB8, 0xBA, 0xB8, 0xBC, 0xBC, 0xBE, 
+0x80, 0xC0, 0xC0, 0xC2, 0xC0, 0xC4, 0xC4, 0xC6, 0xC0, 0xC8, 0xC8, 0xCA, 0xC8, 0xCC, 0xCC, 0xCE, 
+0xC0, 0xD0, 0xD0, 0xD2, 0xD0, 0xD4, 0xD4, 0xD6, 0xD0, 0xD8, 0xD8, 0xDA, 0xD8, 0xDC, 0xDC, 0xDE, 
+0xC0, 0xE0, 0xE0, 0xE2, 0xE0, 0xE4, 0xE4, 0xE6, 0xE0, 0xE8, 0xE8, 0xEA, 0xE8, 0xEC, 0xEC, 0xEE, 
+0xE0, 0xF0, 0xF0, 0xF2, 0xF0, 0xF4, 0xF4, 0xF6, 0xF0, 0xF8, 0xF8, 0xFA, 0xF8, 0xFC, 0xFC, 0xFE, 
+};
+
+
+#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8)
+#define PART_1 1
+#define PART_2 1
+#define PART_3 1
+#define PART_4 1
+#define PART_5 1
+#define PART_6 1
+#define PART_7 1
+#define PART_8 1
+#endif
+
+#ifdef PART_1
+unsigned long CPUFUNC(op_0_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_10_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_18_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_20_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_28_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_30_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_38_4)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_39_4)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_3c_4)(uint32_t opcode) /* ORSR */
+{
+       OpcodeFamily = 4; CurrentInstrCycles = 20; 
+{      MakeSR();
+{      int16_t src = get_iword(2);
+       src &= 0xFF;
+       regs.sr |= src;
+       MakeFromSR();
+}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_40_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_50_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_58_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_60_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_68_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_70_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_78_4)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_79_4)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_7c_4)(uint32_t opcode) /* ORSR */
+{
+       OpcodeFamily = 4; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel18; }
+{      MakeSR();
+{      int16_t src = get_iword(2);
+       regs.sr |= src;
+       MakeFromSR();
+}}}m68k_incpc(4);
+endlabel18: ;
+return 20;
+}
+unsigned long CPUFUNC(op_80_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_90_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_98_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_a0_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_a8_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_b0_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_b8_4)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_b9_4)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_ilong(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_100_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_108_4)(uint32_t opcode) /* MVPMR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 29; CurrentInstrCycles = 16; 
+{      uint32_t memp = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      uint16_t val = (m68k_read_memory_8(memp) << 8) + m68k_read_memory_8(memp + 2);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_110_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_118_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_120_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 10; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_128_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_130_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_138_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_139_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 21; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_13a_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 2;
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_getpc () + 2;
+       dsta += (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_13b_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 3;
+       OpcodeFamily = 21; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_13c_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 21; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = get_ibyte(2);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_140_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_148_4)(uint32_t opcode) /* MVPMR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 29; CurrentInstrCycles = 24; 
+{      uint32_t memp = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      uint32_t val = (m68k_read_memory_8(memp) << 24) + (m68k_read_memory_8(memp + 2) << 16)
+              + (m68k_read_memory_8(memp + 4) << 8) + m68k_read_memory_8(memp + 6);
+       m68k_dreg(regs, dstreg) = (val);
+}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_150_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_158_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_160_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_168_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_170_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_178_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_179_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 22; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_17a_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 2;
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_getpc () + 2;
+       dsta += (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_17b_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 3;
+       OpcodeFamily = 22; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_180_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 10; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_dreg(regs, dstreg) = (dst);
+       if ( src < 16 ) { m68k_incpc(2); return 8; }
+}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_188_4)(uint32_t opcode) /* MVPRM */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 28; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+       uint32_t memp = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       m68k_write_memory_8(memp, src >> 8); m68k_write_memory_8(memp + 2, src);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_190_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_198_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1a0_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_1a8_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1b0_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1b8_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1b9_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 23; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_1ba_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 2;
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_getpc () + 2;
+       dsta += (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1bb_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 3;
+       OpcodeFamily = 23; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1c0_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1c8_4)(uint32_t opcode) /* MVPRM */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 28; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+       uint32_t memp = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       m68k_write_memory_8(memp, src >> 24); m68k_write_memory_8(memp + 2, src >> 16);
+       m68k_write_memory_8(memp + 4, src >> 8); m68k_write_memory_8(memp + 6, src);
+}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_1d0_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1d8_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1e0_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_1e8_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1f0_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1f8_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1f9_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 24; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_1fa_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 2;
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_getpc () + 2;
+       dsta += (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1fb_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 3;
+       OpcodeFamily = 24; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_200_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_210_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_218_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_220_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_228_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_230_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_238_4)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_239_4)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_23c_4)(uint32_t opcode) /* ANDSR */
+{
+       OpcodeFamily = 5; CurrentInstrCycles = 20; 
+{      MakeSR();
+{      int16_t src = get_iword(2);
+       src |= 0xFF00;
+       regs.sr &= src;
+       MakeFromSR();
+}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_240_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_250_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_258_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_260_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_268_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_270_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_278_4)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_279_4)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_27c_4)(uint32_t opcode) /* ANDSR */
+{
+       OpcodeFamily = 5; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel89; }
+{      MakeSR();
+{      int16_t src = get_iword(2);
+       regs.sr &= src;
+       MakeFromSR();
+}}}m68k_incpc(4);
+endlabel89: ;
+return 20;
+}
+unsigned long CPUFUNC(op_280_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_290_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_298_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_2a0_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_2a8_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_2b0_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_2b8_4)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_2b9_4)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_ilong(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_400_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_410_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_418_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_420_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_428_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_430_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_438_4)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_439_4)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_440_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_450_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_458_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_460_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_468_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_470_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_478_4)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_479_4)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_480_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_490_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_498_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_4a0_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_4a8_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_4b0_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_4b8_4)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_4b9_4)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_ilong(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_600_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_610_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_618_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_620_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_628_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_630_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_638_4)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_639_4)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_640_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_650_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_658_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_660_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_668_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_670_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_678_4)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_679_4)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_680_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_690_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_698_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_6a0_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_6a8_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_6b0_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_6b8_4)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_6b9_4)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_ilong(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_800_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 10; 
+{{     int16_t src = get_iword(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(4);
+return 10;
+}
+unsigned long CPUFUNC(op_810_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_818_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_820_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 14; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_828_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_830_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_838_4)(uint32_t opcode) /* BTST */
+{
+       OpcodeFamily = 21; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_839_4)(uint32_t opcode) /* BTST */
+{
+       OpcodeFamily = 21; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_83a_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 21; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_83b_4)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 21; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_83c_4)(uint32_t opcode) /* BTST */
+{
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      int8_t dst = get_ibyte(4);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_840_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_850_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_858_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_860_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_868_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_870_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_878_4)(uint32_t opcode) /* BCHG */
+{
+       OpcodeFamily = 22; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_879_4)(uint32_t opcode) /* BCHG */
+{
+       OpcodeFamily = 22; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_87a_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 22; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_87b_4)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 22; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_880_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 14; 
+{{     int16_t src = get_iword(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_dreg(regs, dstreg) = (dst);
+       if ( src < 16 ) { m68k_incpc(4); return 12; }
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_890_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_898_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8a0_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_8a8_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8b0_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_8b8_4)(uint32_t opcode) /* BCLR */
+{
+       OpcodeFamily = 23; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8b9_4)(uint32_t opcode) /* BCLR */
+{
+       OpcodeFamily = 23; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_8ba_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 23; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8bb_4)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 23; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_8c0_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_8d0_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8d8_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8e0_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_8e8_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8f0_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_8f8_4)(uint32_t opcode) /* BSET */
+{
+       OpcodeFamily = 24; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8f9_4)(uint32_t opcode) /* BSET */
+{
+       OpcodeFamily = 24; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_8fa_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 24; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8fb_4)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 24; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_a00_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_a10_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_a18_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_a20_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_a28_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_a30_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_a38_4)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_a39_4)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_a3c_4)(uint32_t opcode) /* EORSR */
+{
+       OpcodeFamily = 6; CurrentInstrCycles = 20; 
+{      MakeSR();
+{      int16_t src = get_iword(2);
+       src &= 0xFF;
+       regs.sr ^= src;
+       MakeFromSR();
+}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_a40_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_a50_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_a58_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_a60_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_a68_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_a70_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_a78_4)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_a79_4)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_a7c_4)(uint32_t opcode) /* EORSR */
+{
+       OpcodeFamily = 6; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel204; }
+{      MakeSR();
+{      int16_t src = get_iword(2);
+       regs.sr ^= src;
+       MakeFromSR();
+}}}m68k_incpc(4);
+endlabel204: ;
+return 20;
+}
+#endif
+
+#ifdef PART_2
+unsigned long CPUFUNC(op_a80_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_a90_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_a98_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_aa0_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_aa8_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_ab0_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_ab8_4)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_ab9_4)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_ilong(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_c00_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_c10_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c18_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c20_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_c28_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c30_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_c38_4)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c39_4)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_ilong(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_c3a_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c3b_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_c40_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_c50_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c58_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c60_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_c68_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c70_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_c78_4)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c79_4)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_c7a_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword(4);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c7b_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_c80_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(6);
+return 14;
+}
+unsigned long CPUFUNC(op_c90_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_c98_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_ca0_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 22; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_ca8_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_cb0_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 26; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_cb8_4)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_cb9_4)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_ilong(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(10);
+return 28;
+}
+unsigned long CPUFUNC(op_cba_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 25; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_getpc () + 6;
+       dsta += (int32_t)(int16_t)get_iword(6);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_cbb_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 25; CurrentInstrCycles = 26; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t tmppc = m68k_getpc() + 6;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword(6));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_1000_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_1008_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_1010_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1018_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1020_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_1028_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1030_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_1038_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1039_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_103a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_103b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_103c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_1080_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1088_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1090_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1098_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_10a0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_10a8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10b0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_10b8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10b9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_10ba_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10bb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_10bc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_10c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_10c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_10d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_10d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_10e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_10e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_10f8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10f9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_10fa_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10fb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_10fc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1100_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1108_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1110_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1118_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1120_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_1128_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1130_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1138_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1139_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_113a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_113b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_113c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1140_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1148_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1150_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1158_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1160_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1168_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_1170_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_1178_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_1179_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_117a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_117b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_117c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_1180_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_1188_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_1190_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1198_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_11a0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_11a8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11b0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_11b8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11b9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_11ba_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11bb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_11bc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_11c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_11c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_11d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_11d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_11e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_11e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_11f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11f8_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_11f9_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_11fa_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_11fb_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11fc_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_13c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_13c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_13d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_13d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_13e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_13e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_13f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_13f8_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_13f9_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(10);
+return 28;
+}
+unsigned long CPUFUNC(op_13fa_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_13fb_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_13fc_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte(2);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_2000_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_2008_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_2010_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2018_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2020_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_2028_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2030_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_2038_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2039_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_203a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_203b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_203c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = get_ilong(2);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_2040_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_2048_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_2050_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2058_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2060_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_2068_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2070_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_2078_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2079_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_207a_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_207b_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_207c_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_2080_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2088_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2090_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_2098_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_20a0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_20a8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20b0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_20b8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20b9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_20ba_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20bb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_20bc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_20c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_20c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_20d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_20d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_20e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_20e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_20f8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20f9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_20fa_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20fb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_20fc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_2100_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2108_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2110_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_2118_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_2120_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_2128_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_2130_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_2138_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+#endif
+
+#ifdef PART_3
+unsigned long CPUFUNC(op_2139_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_213a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_213b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_213c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_2140_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2148_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2150_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_2158_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_2160_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_2168_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_2170_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_2178_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_2179_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_217a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_217b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_217c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_2180_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_2188_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_2190_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_2198_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_21a0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 28;
+}
+unsigned long CPUFUNC(op_21a8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21b0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 32;
+}
+unsigned long CPUFUNC(op_21b8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21b9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 34; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_21ba_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21bb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 32;
+}
+unsigned long CPUFUNC(op_21bc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_21c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_21c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_21d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_21d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_21e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_21e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_21f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21f8_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_21f9_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_21fa_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_21fb_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21fc_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_23c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_23c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_23d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_23d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_23e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_23e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_23f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 34; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_23f8_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_23f9_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 36; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_23fa_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_23fb_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 34; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_23fc_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong(2);
+{      uint32_t dsta = get_ilong(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(10);
+return 28;
+}
+unsigned long CPUFUNC(op_3000_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_3008_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_3010_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3018_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3020_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_3028_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3030_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_3038_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3039_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_303a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_303b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_303c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_3040_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_3048_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_3050_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3058_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3060_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_3068_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3070_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_3078_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3079_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_307a_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_307b_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_307c_4)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_3080_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3088_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3090_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_3098_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_30a0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_30a8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30b0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_30b8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30b9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_30ba_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30bb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_30bc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_30c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_30c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_30d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_30d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_30e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_30e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_30f8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30f9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_30fa_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30fb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_30fc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3100_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3108_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3110_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_3118_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_3120_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_3128_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_3130_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_3138_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_3139_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_313a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_313b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_313c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3140_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3148_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3150_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_3158_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_3160_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_3168_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_3170_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_3178_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_3179_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_317a_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_317b_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_317c_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_3180_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_3188_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_3190_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_3198_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_31a0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_31a8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31b0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_31b8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31b9_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_31ba_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31bb_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_31bc_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_31c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_31c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_31d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_31d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_31e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_31e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_31f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31f8_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_31f9_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_31fa_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_31fb_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31fc_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_33c0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_33c8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_33d0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_33d8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_33e0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_33e8_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_33f0_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_33f8_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_33f9_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(10);
+return 28;
+}
+unsigned long CPUFUNC(op_33fa_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_33fb_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_33fc_4)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword(2);
+{      uint32_t dsta = get_ilong(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_4000_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
+}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4010_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4018_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4020_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4028_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4030_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4038_4)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4039_4)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4040_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4050_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4058_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4060_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4068_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4070_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4078_4)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4079_4)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4080_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, srcreg) = (newv);
+}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_4090_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_4098_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_40a0_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_40a8_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_40b0_4)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_40b8_4)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_40b9_4)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_40c0_4)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 6;  
+{{     MakeSR();
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
+}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_40d0_4)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       MakeSR();
+       m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_40d8_4)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += 2;
+       MakeSR();
+       m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_40e0_4)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       m68k_areg (regs, srcreg) = srca;
+       MakeSR();
+       m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_40e8_4)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+       MakeSR();
+       m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_40f0_4)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+       MakeSR();
+       m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_40f8_4)(uint32_t opcode) /* MVSR2 */
+{
+       OpcodeFamily = 32; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+       MakeSR();
+       m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_40f9_4)(uint32_t opcode) /* MVSR2 */
+{
+       OpcodeFamily = 32; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+       MakeSR();
+       m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4180_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 10; 
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel587; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel587; }
+}}}endlabel587: ;
+return 10;
+}
+unsigned long CPUFUNC(op_4190_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel588; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel588; }
+}}}}endlabel588: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4198_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel589; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel589; }
+}}}}endlabel589: ;
+return 14;
+}
+unsigned long CPUFUNC(op_41a0_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 16; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel590; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel590; }
+}}}}endlabel590: ;
+return 16;
+}
+unsigned long CPUFUNC(op_41a8_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 18; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel591; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel591; }
+}}}}endlabel591: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41b0_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 20; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel592; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel592; }
+}}}}endlabel592: ;
+return 20;
+}
+unsigned long CPUFUNC(op_41b8_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 18; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel593; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel593; }
+}}}}endlabel593: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41b9_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 22; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(6);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel594; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel594; }
+}}}}endlabel594: ;
+return 22;
+}
+unsigned long CPUFUNC(op_41ba_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 18; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel595; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel595; }
+}}}}endlabel595: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41bb_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 20; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel596; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel596; }
+}}}}endlabel596: ;
+return 20;
+}
+unsigned long CPUFUNC(op_41bc_4)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel597; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel597; }
+}}}endlabel597: ;
+return 14;
+}
+unsigned long CPUFUNC(op_41d0_4)(uint32_t opcode) /* LEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 4;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_41e8_4)(uint32_t opcode) /* LEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_41f0_4)(uint32_t opcode) /* LEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_41f8_4)(uint32_t opcode) /* LEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 8;  
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_41f9_4)(uint32_t opcode) /* LEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 12; 
+{{     uint32_t srca = get_ilong(2);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_41fa_4)(uint32_t opcode) /* LEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_41fb_4)(uint32_t opcode) /* LEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_4200_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 4;  
+{{     CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4210_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_write_memory_8(srca,0);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4218_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_write_memory_8(srca,0);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4220_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_write_memory_8(srca,0);
+}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4228_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_write_memory_8(srca,0);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4230_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_write_memory_8(srca,0);
+}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4238_4)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_write_memory_8(srca,0);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4239_4)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_write_memory_8(srca,0);
+}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4240_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 4;  
+{{     CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4250_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_write_memory_16(srca,0);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4258_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += 2;
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_write_memory_16(srca,0);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4260_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       m68k_areg (regs, srcreg) = srca;
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_write_memory_16(srca,0);
+}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4268_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_write_memory_16(srca,0);
+}}m68k_incpc(4);
+return 16;
+}
+#endif
+
+#ifdef PART_4
+unsigned long CPUFUNC(op_4270_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_write_memory_16(srca,0);
+}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4278_4)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_write_memory_16(srca,0);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4279_4)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_write_memory_16(srca,0);
+}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4280_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 6;  
+{{     CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_dreg(regs, srcreg) = (0);
+}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_4290_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_write_memory_32(srca,0);
+}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_4298_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += 4;
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_write_memory_32(srca,0);
+}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_42a0_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       m68k_areg (regs, srcreg) = srca;
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_write_memory_32(srca,0);
+}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_42a8_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_write_memory_32(srca,0);
+}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_42b0_4)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_write_memory_32(srca,0);
+}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_42b8_4)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_write_memory_32(srca,0);
+}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_42b9_4)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_write_memory_32(srca,0);
+}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_4400_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff);
+}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4410_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4418_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4420_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4428_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4430_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4438_4)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4439_4)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4440_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
+}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4450_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4458_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4460_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4468_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4470_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4478_4)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4479_4)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4480_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, srcreg) = (dst);
+}}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_4490_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_4498_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_44a0_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_44a8_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_44b0_4)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_44b8_4)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_44b9_4)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_44c0_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_44d0_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_44d8_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_44e0_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(2);
+return 18;
+}
+unsigned long CPUFUNC(op_44e8_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_44f0_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(4);
+return 22;
+}
+unsigned long CPUFUNC(op_44f8_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_44f9_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_44fa_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_44fb_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}m68k_incpc(4);
+return 22;
+}
+unsigned long CPUFUNC(op_44fc_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword(2);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4600_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4610_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_write_memory_8(srca,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4618_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_write_memory_8(srca,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4620_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_write_memory_8(srca,dst);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4628_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_write_memory_8(srca,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4630_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_write_memory_8(srca,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4638_4)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_write_memory_8(srca,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4639_4)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_write_memory_8(srca,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4640_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4650_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_write_memory_16(srca,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4658_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_write_memory_16(srca,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4660_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_write_memory_16(srca,dst);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4668_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_write_memory_16(srca,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4670_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_write_memory_16(srca,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4678_4)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_write_memory_16(srca,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4679_4)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_write_memory_16(srca,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4680_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (dst);
+}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_4690_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_write_memory_32(srca,dst);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_4698_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_write_memory_32(srca,dst);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_46a0_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_write_memory_32(srca,dst);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_46a8_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_write_memory_32(srca,dst);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_46b0_4)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_write_memory_32(srca,dst);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_46b8_4)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_write_memory_32(srca,dst);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_46b9_4)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_write_memory_32(srca,dst);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_46c0_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 12; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel688; }
+{{     int16_t src = m68k_dreg(regs, srcreg);
+       regs.sr = src;
+       MakeFromSR();
+}}}m68k_incpc(2);
+endlabel688: ;
+return 12;
+}
+unsigned long CPUFUNC(op_46d0_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel689; }
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(2);
+endlabel689: ;
+return 16;
+}
+unsigned long CPUFUNC(op_46d8_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel690; }
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(2);
+endlabel690: ;
+return 16;
+}
+unsigned long CPUFUNC(op_46e0_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 18; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel691; }
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(2);
+endlabel691: ;
+return 18;
+}
+unsigned long CPUFUNC(op_46e8_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel692; }
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+endlabel692: ;
+return 20;
+}
+unsigned long CPUFUNC(op_46f0_4)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 22; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel693; }
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+endlabel693: ;
+return 22;
+}
+unsigned long CPUFUNC(op_46f8_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel694; }
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+endlabel694: ;
+return 20;
+}
+unsigned long CPUFUNC(op_46f9_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 24; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel695; }
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(6);
+endlabel695: ;
+return 24;
+}
+unsigned long CPUFUNC(op_46fa_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel696; }
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+endlabel696: ;
+return 20;
+}
+unsigned long CPUFUNC(op_46fb_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 22; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel697; }
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+endlabel697: ;
+return 22;
+}
+unsigned long CPUFUNC(op_46fc_4)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel698; }
+{{     int16_t src = get_iword(2);
+       regs.sr = src;
+       MakeFromSR();
+}}}m68k_incpc(4);
+endlabel698: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4800_4)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 6;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
+}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_4810_4)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4818_4)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4820_4)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4828_4)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4830_4)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4838_4)(uint32_t opcode) /* NBCD */
+{
+       OpcodeFamily = 17; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4839_4)(uint32_t opcode) /* NBCD */
+{
+       OpcodeFamily = 17; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(srca,newv);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4840_4)(uint32_t opcode) /* SWAP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 34; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (dst);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4850_4)(uint32_t opcode) /* PEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 57; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       m68k_areg (regs, 7) = dsta;
+       m68k_write_memory_32(dsta,srca);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4868_4)(uint32_t opcode) /* PEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 57; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       m68k_areg (regs, 7) = dsta;
+       m68k_write_memory_32(dsta,srca);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4870_4)(uint32_t opcode) /* PEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 57; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       m68k_areg (regs, 7) = dsta;
+       m68k_write_memory_32(dsta,srca);
+}}}m68k_incpc(4);
+return 22;
+}
+unsigned long CPUFUNC(op_4878_4)(uint32_t opcode) /* PEA */
+{
+       OpcodeFamily = 57; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       m68k_areg (regs, 7) = dsta;
+       m68k_write_memory_32(dsta,srca);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4879_4)(uint32_t opcode) /* PEA */
+{
+       OpcodeFamily = 57; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       m68k_areg (regs, 7) = dsta;
+       m68k_write_memory_32(dsta,srca);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_487a_4)(uint32_t opcode) /* PEA */
+{
+       OpcodeFamily = 57; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       m68k_areg (regs, 7) = dsta;
+       m68k_write_memory_32(dsta,srca);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_487b_4)(uint32_t opcode) /* PEA */
+{
+       OpcodeFamily = 57; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       m68k_areg (regs, 7) = dsta;
+       m68k_write_memory_32(dsta,srca);
+}}}m68k_incpc(4);
+return 22;
+}
+unsigned long CPUFUNC(op_4880_4)(uint32_t opcode) /* EXT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 36; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint16_t dst = (int16_t)(int8_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4890_4)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 8;  
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(4);
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_48a0_4)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 8;  
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) - 0;
+{      uint16_t amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
+       while (amask) { srca -= 2; m68k_write_memory_16(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; retcycles+=4; }
+       while (dmask) { srca -= 2; m68k_write_memory_16(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; retcycles+=4; }
+       m68k_areg(regs, dstreg) = srca;
+}}}m68k_incpc(4);
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_48a8_4)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(6);
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_48b0_4)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 14; 
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(6);
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_48b8_4)(uint32_t opcode) /* MVMLE */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = (int32_t)(int16_t)get_iword(4);
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(6);
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_48b9_4)(uint32_t opcode) /* MVMLE */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = get_ilong(4);
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(8);
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_48c0_4)(uint32_t opcode) /* EXT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 36; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = (int32_t)(int16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (dst);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_48d0_4)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 8;  
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(4);
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_48e0_4)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 8;  
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) - 0;
+{      uint16_t amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
+       while (amask) { srca -= 4; m68k_write_memory_32(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; retcycles+=8; }
+       while (dmask) { srca -= 4; m68k_write_memory_32(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; retcycles+=8; }
+       m68k_areg(regs, dstreg) = srca;
+}}}m68k_incpc(4);
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_48e8_4)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(6);
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_48f0_4)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 14; 
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(6);
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_48f8_4)(uint32_t opcode) /* MVMLE */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = (int32_t)(int16_t)get_iword(4);
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(6);
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_48f9_4)(uint32_t opcode) /* MVMLE */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword(2);
+       retcycles = 0;
+{      uint32_t srca = get_ilong(4);
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(8);
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4a00_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4a10_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_4a18_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_4a20_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_4a28_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_4a30_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_4a38_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_4a39_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_4a3a_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_4a3b_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_4a3c_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_4a40_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4a48_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4a50_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_4a58_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_4a60_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_4a68_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_4a70_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_4a78_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_4a79_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_4a7a_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_4a7b_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_4a7c_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_4a80_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4a88_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4a90_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4a98_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4aa0_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4aa8_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4ab0_4)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4ab8_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4ab9_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4aba_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4abb_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4abc_4)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     int32_t src = get_ilong(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_4ac0_4)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4ad0_4)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_write_memory_8(srca,src);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4ad8_4)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_write_memory_8(srca,src);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4ae0_4)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_write_memory_8(srca,src);
+}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_4ae8_4)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_write_memory_8(srca,src);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4af0_4)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_write_memory_8(srca,src);
+}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_4af8_4)(uint32_t opcode) /* TAS */
+{
+       OpcodeFamily = 98; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_write_memory_8(srca,src);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4af9_4)(uint32_t opcode) /* TAS */
+{
+       OpcodeFamily = 98; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_write_memory_8(srca,src);
+}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_4c90_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(4);
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_4c98_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+       m68k_areg(regs, dstreg) = srca;
+}}}m68k_incpc(4);
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_4ca8_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(6);
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cb0_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 18; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(6);
+ return (18+retcycles);
+}
+unsigned long CPUFUNC(op_4cb8_4)(uint32_t opcode) /* MVMEL */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = (int32_t)(int16_t)get_iword(4);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(6);
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cb9_4)(uint32_t opcode) /* MVMEL */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 20; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = get_ilong(4);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(8);
+ return (20+retcycles);
+}
+unsigned long CPUFUNC(op_4cba_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = 2;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_getpc () + 4;
+       srca += (int32_t)(int16_t)get_iword(4);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(6);
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cbb_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = 3;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 18; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(4));
+       BusCyclePenalty += 2;
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}m68k_incpc(6);
+ return (18+retcycles);
+}
+unsigned long CPUFUNC(op_4cd0_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(4);
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_4cd8_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+       m68k_areg(regs, dstreg) = srca;
+}}}m68k_incpc(4);
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_4ce8_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(6);
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cf0_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 18; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+       BusCyclePenalty += 2;
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(6);
+ return (18+retcycles);
+}
+unsigned long CPUFUNC(op_4cf8_4)(uint32_t opcode) /* MVMEL */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = (int32_t)(int16_t)get_iword(4);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(6);
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cf9_4)(uint32_t opcode) /* MVMEL */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 20; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = get_ilong(4);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(8);
+ return (20+retcycles);
+}
+unsigned long CPUFUNC(op_4cfa_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = 2;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_getpc () + 4;
+       srca += (int32_t)(int16_t)get_iword(4);
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(6);
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cfb_4)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = 3;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 18; 
+{      uint16_t mask = get_iword(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(4));
+       BusCyclePenalty += 2;
+{      while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}m68k_incpc(6);
+ return (18+retcycles);
+}
+unsigned long CPUFUNC(op_4e40_4)(uint32_t opcode) /* TRAP */
+{
+       uint32_t srcreg = (opcode & 15);
+       OpcodeFamily = 39; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+m68k_incpc(2);
+       Exception(src+32,0,M68000_EXC_SRC_CPU);
+}}return 4;
+}
+unsigned long CPUFUNC(op_4e50_4)(uint32_t opcode) /* LINK */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 47; CurrentInstrCycles = 18; 
+{{     uint32_t olda = m68k_areg(regs, 7) - 4;
+       m68k_areg (regs, 7) = olda;
+{      int32_t src = m68k_areg(regs, srcreg);
+       m68k_write_memory_32(olda,src);
+       m68k_areg(regs, srcreg) = (m68k_areg(regs, 7));
+{      int16_t offs = get_iword(2);
+       m68k_areg(regs, 7) += offs;
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4e58_4)(uint32_t opcode) /* UNLK */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 48; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+       m68k_areg(regs, 7) = src;
+{      uint32_t olda = m68k_areg(regs, 7);
+{      int32_t old = m68k_read_memory_32(olda);
+       m68k_areg(regs, 7) += 4;
+       m68k_areg(regs, srcreg) = (old);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4e60_4)(uint32_t opcode) /* MVR2USP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 40; CurrentInstrCycles = 4;  
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel791; }
+{{     int32_t src = m68k_areg(regs, srcreg);
+       regs.usp = src;
+}}}m68k_incpc(2);
+endlabel791: ;
+return 4;
+}
+unsigned long CPUFUNC(op_4e68_4)(uint32_t opcode) /* MVUSP2R */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 41; CurrentInstrCycles = 4;  
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel792; }
+{{     m68k_areg(regs, srcreg) = (regs.usp);
+}}}m68k_incpc(2);
+endlabel792: ;
+return 4;
+}
+unsigned long CPUFUNC(op_4e70_4)(uint32_t opcode) /* RESET */
+{
+       OpcodeFamily = 42; CurrentInstrCycles = 132;
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel793; }
+{}}m68k_incpc(2);
+endlabel793: ;
+return 132;
+}
+unsigned long CPUFUNC(op_4e71_4)(uint32_t opcode) /* NOP */
+{
+       OpcodeFamily = 43; CurrentInstrCycles = 4;  
+{}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4e72_4)(uint32_t opcode) /* STOP */
+{
+       OpcodeFamily = 44; CurrentInstrCycles = 4;  
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel795; }
+{{     int16_t src = get_iword(2);
+       regs.sr = src;
+       MakeFromSR();
+       m68k_setstopped(1);
+}}}m68k_incpc(4);
+endlabel795: ;
+return 4;
+}
+unsigned long CPUFUNC(op_4e73_4)(uint32_t opcode) /* RTE */
+{
+       OpcodeFamily = 45; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel796; }
+{{     uint32_t sra = m68k_areg(regs, 7);
+{      int16_t sr = m68k_read_memory_16(sra);
+       m68k_areg(regs, 7) += 2;
+{      uint32_t pca = m68k_areg(regs, 7);
+{      int32_t pc = m68k_read_memory_32(pca);
+       m68k_areg(regs, 7) += 4;
+       regs.sr = sr; m68k_setpc_rte(pc);
+       MakeFromSR();
+}}}}}}endlabel796: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4e74_4)(uint32_t opcode) /* RTD */
+{
+       OpcodeFamily = 46; CurrentInstrCycles = 16; 
+{{     uint32_t pca = m68k_areg(regs, 7);
+{      int32_t pc = m68k_read_memory_32(pca);
+       m68k_areg(regs, 7) += 4;
+{      int16_t offs = get_iword(2);
+       m68k_areg(regs, 7) += offs;
+       m68k_setpc_rte(pc);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_4e75_4)(uint32_t opcode) /* RTS */
+{
+       OpcodeFamily = 49; CurrentInstrCycles = 16; 
+{      m68k_do_rts();
+}return 16;
+}
+unsigned long CPUFUNC(op_4e76_4)(uint32_t opcode) /* TRAPV */
+{
+       OpcodeFamily = 50; CurrentInstrCycles = 4;  
+{m68k_incpc(2);
+       if (GET_VFLG) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel799; }
+}endlabel799: ;
+return 4;
+}
+unsigned long CPUFUNC(op_4e77_4)(uint32_t opcode) /* RTR */
+{
+       OpcodeFamily = 51; CurrentInstrCycles = 20; 
+{      MakeSR();
+{      uint32_t sra = m68k_areg(regs, 7);
+{      int16_t sr = m68k_read_memory_16(sra);
+       m68k_areg(regs, 7) += 2;
+{      uint32_t pca = m68k_areg(regs, 7);
+{      int32_t pc = m68k_read_memory_32(pca);
+       m68k_areg(regs, 7) += 4;
+       regs.sr &= 0xFF00; sr &= 0xFF;
+       regs.sr |= sr; m68k_setpc(pc);
+       MakeFromSR();
+}}}}}return 20;
+}
+unsigned long CPUFUNC(op_4e90_4)(uint32_t opcode) /* JSR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 52; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       uint32_t oldpc = m68k_getpc () + 2;
+       m68k_do_jsr(m68k_getpc() + 2, srca);
+}}return 16;
+}
+unsigned long CPUFUNC(op_4ea8_4)(uint32_t opcode) /* JSR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 52; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+       uint32_t oldpc = m68k_getpc () + 4;
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+}}return 18;
+}
+unsigned long CPUFUNC(op_4eb0_4)(uint32_t opcode) /* JSR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 52; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+       uint32_t oldpc = m68k_getpc () + 4;
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+}}return 22;
+}
+unsigned long CPUFUNC(op_4eb8_4)(uint32_t opcode) /* JSR */
+{
+       OpcodeFamily = 52; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+       uint32_t oldpc = m68k_getpc () + 4;
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+}}return 18;
+}
+unsigned long CPUFUNC(op_4eb9_4)(uint32_t opcode) /* JSR */
+{
+       OpcodeFamily = 52; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+       uint32_t oldpc = m68k_getpc () + 6;
+       m68k_do_jsr(m68k_getpc() + 6, srca);
+}}return 20;
+}
+unsigned long CPUFUNC(op_4eba_4)(uint32_t opcode) /* JSR */
+{
+       OpcodeFamily = 52; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+       uint32_t oldpc = m68k_getpc () + 4;
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+}}return 18;
+}
+unsigned long CPUFUNC(op_4ebb_4)(uint32_t opcode) /* JSR */
+{
+       OpcodeFamily = 52; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+       uint32_t oldpc = m68k_getpc () + 4;
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+}}return 22;
+}
+unsigned long CPUFUNC(op_4ed0_4)(uint32_t opcode) /* JMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 53; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_setpc(srca);
+}}return 8;
+}
+unsigned long CPUFUNC(op_4ee8_4)(uint32_t opcode) /* JMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 53; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+       m68k_setpc(srca);
+}}return 10;
+}
+unsigned long CPUFUNC(op_4ef0_4)(uint32_t opcode) /* JMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 53; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+       m68k_setpc(srca);
+}}return 14;
+}
+unsigned long CPUFUNC(op_4ef8_4)(uint32_t opcode) /* JMP */
+{
+       OpcodeFamily = 53; CurrentInstrCycles = 10; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+       m68k_setpc(srca);
+}}return 10;
+}
+unsigned long CPUFUNC(op_4ef9_4)(uint32_t opcode) /* JMP */
+{
+       OpcodeFamily = 53; CurrentInstrCycles = 12; 
+{{     uint32_t srca = get_ilong(2);
+       m68k_setpc(srca);
+}}return 12;
+}
+unsigned long CPUFUNC(op_4efa_4)(uint32_t opcode) /* JMP */
+{
+       OpcodeFamily = 53; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+       m68k_setpc(srca);
+}}return 10;
+}
+unsigned long CPUFUNC(op_4efb_4)(uint32_t opcode) /* JMP */
+{
+       OpcodeFamily = 53; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+       m68k_setpc(srca);
+}}return 14;
+}
+unsigned long CPUFUNC(op_5000_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5010_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5018_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+#endif
+
+#ifdef PART_5
+unsigned long CPUFUNC(op_5020_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5028_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5030_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5038_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5039_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5040_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5048_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_5050_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5058_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5060_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5068_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5070_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5078_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5079_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5080_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_5088_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_5090_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_5098_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_50a0_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_50a8_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_50b0_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 26; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_50b8_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_50b9_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 28; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_50c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(0) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_50c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(0)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel842: ;
+return 12;
+}
+unsigned long CPUFUNC(op_50d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(0) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_50d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(0) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_50e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(0) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_50e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(0) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_50f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(0) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_50f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(0) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_50f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(0) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5100_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5110_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5118_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5120_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5128_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5130_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5138_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5139_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5140_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5148_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_5150_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5158_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5160_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5168_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5170_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5178_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5179_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5180_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_5188_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_5190_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_5198_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_51a0_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_51a8_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_51b0_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 26; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_51b8_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_51b9_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 28; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_51c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(1) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_51c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(1)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel877: ;
+return 12;
+}
+unsigned long CPUFUNC(op_51d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(1) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_51d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(1) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_51e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(1) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_51e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(1) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_51f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(1) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_51f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(1) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_51f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(1) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_52c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(2) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_52c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(2)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel886: ;
+return 12;
+}
+unsigned long CPUFUNC(op_52d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(2) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_52d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(2) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_52e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(2) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_52e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(2) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_52f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(2) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_52f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(2) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_52f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(2) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_53c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(3) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_53c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(3)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel895: ;
+return 12;
+}
+unsigned long CPUFUNC(op_53d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(3) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_53d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(3) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_53e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(3) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_53e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(3) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_53f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(3) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_53f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(3) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_53f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(3) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_54c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(4) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_54c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(4)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel904: ;
+return 12;
+}
+unsigned long CPUFUNC(op_54d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(4) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_54d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(4) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_54e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(4) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_54e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(4) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_54f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(4) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_54f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(4) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_54f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(4) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_55c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(5) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_55c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(5)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel913: ;
+return 12;
+}
+unsigned long CPUFUNC(op_55d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(5) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_55d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(5) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_55e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(5) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_55e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(5) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_55f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(5) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_55f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(5) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_55f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(5) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_56c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(6) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_56c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(6)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel922: ;
+return 12;
+}
+unsigned long CPUFUNC(op_56d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(6) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_56d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(6) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_56e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(6) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_56e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(6) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_56f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(6) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_56f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(6) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_56f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(6) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_57c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(7) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_57c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(7)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel931: ;
+return 12;
+}
+unsigned long CPUFUNC(op_57d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(7) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_57d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(7) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_57e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(7) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_57e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(7) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_57f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(7) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_57f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(7) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_57f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(7) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_58c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(8) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_58c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(8)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel940: ;
+return 12;
+}
+unsigned long CPUFUNC(op_58d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(8) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_58d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(8) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_58e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(8) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_58e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(8) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_58f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(8) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_58f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(8) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_58f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(8) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_59c0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(9) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_59c8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(9)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel949: ;
+return 12;
+}
+unsigned long CPUFUNC(op_59d0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(9) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_59d8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(9) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_59e0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(9) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_59e8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(9) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_59f0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(9) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_59f8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(9) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_59f9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(9) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5ac0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(10) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5ac8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(10)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel958: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5ad0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(10) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5ad8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(10) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5ae0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(10) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5ae8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(10) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5af0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(10) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5af8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(10) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5af9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(10) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5bc0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(11) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5bc8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(11)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel967: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5bd0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(11) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5bd8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(11) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5be0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(11) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5be8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(11) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5bf0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(11) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5bf8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(11) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5bf9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(11) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5cc0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(12) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5cc8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(12)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel976: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5cd0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(12) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5cd8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(12) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5ce0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(12) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5ce8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(12) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5cf0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(12) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5cf8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(12) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5cf9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(12) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5dc0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(13) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5dc8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(13)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel985: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5dd0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(13) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5dd8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(13) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5de0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(13) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5de8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(13) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5df0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(13) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5df8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(13) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5df9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(13) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5ec0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(14) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5ec8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(14)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel994: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5ed0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(14) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5ed8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(14) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5ee0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(14) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_5ee8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(14) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5ef0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(14) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5ef8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(14) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5ef9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(14) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_5fc0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(15) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_5fc8_4)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword(2);
+       if (!cctrue(15)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       m68k_incpc((int32_t)offs + 2);
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+endlabel1003: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5fd0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(15) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5fd8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(15) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_5fe0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(15) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(2);
+return 14;
+}
+#endif
+
+#ifdef PART_6
+unsigned long CPUFUNC(op_5fe8_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(15) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5ff0_4)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(15) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_5ff8_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int val = cctrue(15) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_5ff9_4)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int val = cctrue(15) ? 0xff : 0;
+       m68k_write_memory_8(srca,val);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_6000_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(0)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1011: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6001_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(0)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1012: ;
+return 8;
+}
+unsigned long CPUFUNC(op_60ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(0)) goto endlabel1013;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1013;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(0)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1013: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6100_4)(uint32_t opcode) /* BSR */
+{
+       OpcodeFamily = 54; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword(2);
+       int32_t s = (int32_t)src + 2;
+       m68k_do_bsr(m68k_getpc() + 4, s);
+}}return 18;
+}
+unsigned long CPUFUNC(op_6101_4)(uint32_t opcode) /* BSR */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 54; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+       int32_t s = (int32_t)src + 2;
+       m68k_do_bsr(m68k_getpc() + 2, s);
+}}return 18;
+}
+unsigned long CPUFUNC(op_61ff_4)(uint32_t opcode) /* BSR */
+{
+       OpcodeFamily = 54; CurrentInstrCycles = 18; 
+{{     int32_t src = get_ilong(2);
+       int32_t s = (int32_t)src + 2;
+       m68k_do_bsr(m68k_getpc() + 6, s);
+}}return 18;
+}
+unsigned long CPUFUNC(op_6200_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(2)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1017: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6201_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(2)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1018: ;
+return 8;
+}
+unsigned long CPUFUNC(op_62ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(2)) goto endlabel1019;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1019;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(2)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1019: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6300_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(3)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1020: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6301_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(3)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1021: ;
+return 8;
+}
+unsigned long CPUFUNC(op_63ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(3)) goto endlabel1022;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1022;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(3)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1022: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6400_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(4)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1023: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6401_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(4)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1024: ;
+return 8;
+}
+unsigned long CPUFUNC(op_64ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(4)) goto endlabel1025;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1025;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(4)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1025: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6500_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(5)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1026: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6501_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(5)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1027: ;
+return 8;
+}
+unsigned long CPUFUNC(op_65ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(5)) goto endlabel1028;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1028;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(5)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1028: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6600_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(6)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1029: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6601_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(6)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1030: ;
+return 8;
+}
+unsigned long CPUFUNC(op_66ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(6)) goto endlabel1031;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1031;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(6)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1031: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6700_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(7)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1032: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6701_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(7)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1033: ;
+return 8;
+}
+unsigned long CPUFUNC(op_67ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(7)) goto endlabel1034;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1034;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(7)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1034: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6800_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(8)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1035: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6801_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(8)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1036: ;
+return 8;
+}
+unsigned long CPUFUNC(op_68ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(8)) goto endlabel1037;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1037;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(8)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1037: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6900_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(9)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1038: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6901_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(9)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1039: ;
+return 8;
+}
+unsigned long CPUFUNC(op_69ff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(9)) goto endlabel1040;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1040;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(9)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1040: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6a00_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(10)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1041: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6a01_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(10)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1042: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6aff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(10)) goto endlabel1043;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1043;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(10)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1043: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6b00_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(11)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1044: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6b01_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(11)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1045: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6bff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(11)) goto endlabel1046;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1046;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(11)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1046: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6c00_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(12)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1047: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6c01_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(12)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1048: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6cff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(12)) goto endlabel1049;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1049;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(12)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1049: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6d00_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(13)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1050: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6d01_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(13)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1051: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6dff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(13)) goto endlabel1052;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1052;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(13)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1052: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6e00_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(14)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1053: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6e01_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(14)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1054: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6eff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(14)) goto endlabel1055;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1055;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(14)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1055: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6f00_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+       if (!cctrue(15)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+endlabel1056: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6f01_4)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(15)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+endlabel1057: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6fff_4)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(15)) goto endlabel1058;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel1058;
+{      int32_t src = get_ilong(2);
+       if (!cctrue(15)) goto didnt_jump;
+       m68k_incpc ((int32_t)src + 2);
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+endlabel1058: ;
+return 12;
+}
+unsigned long CPUFUNC(op_7000_4)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_8000_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_8010_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_8018_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_8020_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_8028_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_8030_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_8038_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_8039_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_803a_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_803b_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_803c_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_8040_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_8050_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_8058_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_8060_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_8068_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_8070_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_8078_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_8079_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_807a_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_807b_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_807c_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_8080_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_8090_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_8098_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_80a0_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_80a8_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_80b0_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_80b8_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_80b9_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_80ba_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_80bb_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_80bc_4)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_80c0_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 4;  
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1093; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}endlabel1093: ;
+ return (4+retcycles);
+}
+unsigned long CPUFUNC(op_80d0_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1094; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1094: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_80d8_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1095; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1095: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_80e0_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 10; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1096; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1096: ;
+ return (10+retcycles);
+}
+unsigned long CPUFUNC(op_80e8_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1097; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1097: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_80f0_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1098; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1098: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_80f8_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1099; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1099: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_80f9_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 16; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(6);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1100; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1100: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_80fa_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1101; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1101: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_80fb_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1102; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}endlabel1102: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_80fc_4)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = get_iword(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1103; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}endlabel1103: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_8100_4)(uint32_t opcode) /* SBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 10; CurrentInstrCycles = 6;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      uint16_t newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = (dst & 0xF0) - (src & 0xF0);
+       uint16_t newv, tmp_newv;
+       int bcd = 0;
+       newv = tmp_newv = newv_hi + newv_lo;
+       if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
+       if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
+       SET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       SET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_8108_4)(uint32_t opcode) /* SBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 10; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint16_t newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = (dst & 0xF0) - (src & 0xF0);
+       uint16_t newv, tmp_newv;
+       int bcd = 0;
+       newv = tmp_newv = newv_hi + newv_lo;
+       if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
+       if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
+       SET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       SET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}m68k_incpc(2);
+return 18;
+}
+unsigned long CPUFUNC(op_8110_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_8118_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_8120_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_8128_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8130_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_8138_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8139_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8150_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_8158_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_8160_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_8168_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8170_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_8178_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8179_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8190_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_8198_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_81a0_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_81a8_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_81b0_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_81b8_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_81b9_4)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_81c0_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 4;  
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1127; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}endlabel1127: ;
+ return (4+retcycles);
+}
+unsigned long CPUFUNC(op_81d0_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1128; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1128: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_81d8_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1129; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1129: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_81e0_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 10; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1130; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1130: ;
+ return (10+retcycles);
+}
+unsigned long CPUFUNC(op_81e8_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1131; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1131: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_81f0_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1132; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1132: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_81f8_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1133; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1133: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_81f9_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 16; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(6);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1134; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1134: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_81fa_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1135; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1135: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_81fb_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1136; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}endlabel1136: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_81fc_4)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = get_iword(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1137; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}endlabel1137: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_9000_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_9010_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_9018_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_9020_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_9028_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_9030_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_9038_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_9039_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_903a_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_903b_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_903c_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_9040_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_9048_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_9050_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_9058_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_9060_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_9068_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_9070_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_9078_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_9079_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_907a_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_907b_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_907c_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_9080_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_9088_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_9090_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_9098_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_90a0_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_90a8_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_90b0_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_90b8_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_90b9_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_90ba_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_90bb_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_90bc_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_90c0_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_90c8_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_90d0_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_90d8_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_90e0_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_90e8_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_90f0_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_90f8_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_90f9_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_90fa_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_90fb_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_90fc_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_9100_4)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_9108_4)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 18;
+}
+unsigned long CPUFUNC(op_9110_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_9118_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_9120_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_9128_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_9130_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_9138_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_9139_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_9140_4)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_9148_4)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 18;
+}
+unsigned long CPUFUNC(op_9150_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_9158_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_9160_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_9168_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_9170_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_9178_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_9179_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_9180_4)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_9188_4)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 30;
+}
+unsigned long CPUFUNC(op_9190_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_9198_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_91a0_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_91a8_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_91b0_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_91b8_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_91b9_4)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_91c0_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_91c8_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_91d0_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_91d8_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_91e0_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_91e8_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_91f0_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_91f8_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_91f9_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_91fa_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_91fb_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_91fc_4)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_b000_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_b010_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_b018_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_b020_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_b028_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_b030_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_b038_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_b039_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_b03a_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_b03b_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+#endif
+
+#ifdef PART_7
+unsigned long CPUFUNC(op_b03c_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_b040_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_b048_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_b050_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_b058_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_b060_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_b068_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_b070_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_b078_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_b079_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_b07a_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_b07b_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_b07c_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_b080_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_b088_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_b090_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_b098_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_b0a0_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_b0a8_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_b0b0_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_b0b8_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_b0b9_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_b0ba_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_b0bb_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_b0bc_4)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(6);
+return 14;
+}
+unsigned long CPUFUNC(op_b0c0_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 6;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_b0c8_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 6;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_b0d0_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_b0d8_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_b0e0_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_b0e8_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_b0f0_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_b0f8_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_b0f9_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_b0fa_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_b0fb_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 16; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_b0fc_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 10; 
+{{     int16_t src = get_iword(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+return 10;
+}
+unsigned long CPUFUNC(op_b100_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_b108_4)(uint32_t opcode) /* CMPM */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 26; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_b110_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_b118_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_b120_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_b128_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_b130_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_b138_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_b139_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_b140_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_b148_4)(uint32_t opcode) /* CMPM */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 26; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_b150_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_b158_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_b160_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_b168_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_b170_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_b178_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_b179_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_b180_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_b188_4)(uint32_t opcode) /* CMPM */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 26; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_b190_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_b198_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_b1a0_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_b1a8_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_b1b0_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_b1b8_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_b1b9_4)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_b1c0_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_b1c8_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_b1d0_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_b1d8_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_b1e0_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_b1e8_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_b1f0_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_b1f8_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_b1f9_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_b1fa_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_b1fb_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_b1fc_4)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(6);
+return 14;
+}
+unsigned long CPUFUNC(op_c000_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_c010_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_c018_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_c020_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_c028_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c030_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_c038_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c039_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c03a_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c03b_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_c03c_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_c040_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_c050_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_c058_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_c060_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_c068_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c070_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_c078_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c079_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c07a_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c07b_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_c07c_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_c080_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_c090_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_c098_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_c0a0_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_c0a8_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_c0b0_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_c0b8_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_c0b9_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_c0ba_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_c0bb_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_c0bc_4)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c0c0_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 38; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}m68k_incpc(2);
+ return (38+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0d0_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 42; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(2);
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0d8_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 42; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(2);
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0e0_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 44; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(2);
+ return (44+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0e8_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 46; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(4);
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0f0_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 48; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(4);
+ return (48+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0f8_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 46; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(4);
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0f9_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 50; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(6);
+ return (50+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0fa_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 46; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(4);
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0fb_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 48; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}m68k_incpc(4);
+ return (48+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0fc_4)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 42; 
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}m68k_incpc(4);
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c100_4)(uint32_t opcode) /* ABCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 14; CurrentInstrCycles = 6;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      uint16_t newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = (src & 0xF0) + (dst & 0xF0);
+       uint16_t newv, tmp_newv;
+       int cflg;
+       newv = tmp_newv = newv_hi + newv_lo;    if (newv_lo > 9) { newv += 6; }
+       cflg = (newv & 0x3F0) > 0x90;
+       if (cflg) newv += 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       SET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_c108_4)(uint32_t opcode) /* ABCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 14; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint16_t newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = (src & 0xF0) + (dst & 0xF0);
+       uint16_t newv, tmp_newv;
+       int cflg;
+       newv = tmp_newv = newv_hi + newv_lo;    if (newv_lo > 9) { newv += 6; }
+       cflg = (newv & 0x3F0) > 0x90;
+       if (cflg) newv += 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       SET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}m68k_incpc(2);
+return 18;
+}
+unsigned long CPUFUNC(op_c110_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_c118_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_c120_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_c128_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_c130_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_c138_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_c139_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_c140_4)(uint32_t opcode) /* EXG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 35; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       m68k_dreg(regs, srcreg) = (dst);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_c148_4)(uint32_t opcode) /* EXG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 35; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+       m68k_areg(regs, srcreg) = (dst);
+       m68k_areg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_c150_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_c158_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_c160_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_c168_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_c170_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_c178_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_c179_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_c188_4)(uint32_t opcode) /* EXG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 35; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+       m68k_dreg(regs, srcreg) = (dst);
+       m68k_areg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_c190_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_c198_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_c1a0_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_c1a8_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_c1b0_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_c1b8_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_c1b9_4)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_c1c0_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 38; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}m68k_incpc(2);
+ return (38+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1d0_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 42; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(2);
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1d8_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 42; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(2);
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1e0_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 44; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(2);
+ return (44+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1e8_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 46; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(4);
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1f0_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 48; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(4);
+ return (48+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1f8_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 46; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(4);
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1f9_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 50; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(6);
+ return (50+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1fa_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 46; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(4);
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1fb_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 48; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}m68k_incpc(4);
+ return (48+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1fc_4)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 42; 
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}m68k_incpc(4);
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_d000_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_d010_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d018_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d020_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_d028_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_d030_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_d038_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_d039_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_d03a_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_d03b_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_d03c_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_d040_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_d048_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_d050_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d058_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d060_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_d068_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_d070_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_d078_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_d079_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_d07a_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_d07b_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_d07c_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_d080_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d088_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d090_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_d098_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_d0a0_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_d0a8_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d0b0_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_d0b8_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d0b9_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_d0ba_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d0bb_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_d0bc_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_d0c0_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d0c8_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d0d0_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_d0d8_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_d0e0_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_d0e8_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_d0f0_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d0f8_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_d0f9_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_d0fa_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_d0fb_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d0fc_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_d100_4)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_d108_4)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 18;
+}
+unsigned long CPUFUNC(op_d110_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_d118_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_d120_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_d128_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_d130_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d138_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_d139_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_d140_4)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_d148_4)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{      int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 18;
+}
+unsigned long CPUFUNC(op_d150_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_d158_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_d160_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_d168_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_d170_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d178_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_d179_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_d180_4)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d188_4)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 30;
+}
+unsigned long CPUFUNC(op_d190_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_d198_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_d1a0_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{      int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_d1a8_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_d1b0_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_d1b8_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_d1b9_4)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong(2);
+{      int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_d1c0_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d1c8_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_d1d0_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+#endif
+
+#ifdef PART_8
+unsigned long CPUFUNC(op_d1d8_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_d1e0_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{      int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_d1e8_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d1f0_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_d1f8_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d1f9_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_d1fa_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword(2);
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_d1fb_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+       BusCyclePenalty += 2;
+{      int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_d1fc_4)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_e000_4)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       uint32_t sign = (0x80 & val) >> 7;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               val = 0xff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xff << (8 - cnt)) & (uint32_t)-sign;
+               val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e008_4)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_CFLG ((cnt == 8) & (val >> 7));
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e010_4)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (7 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e018_4)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t hival;
+       cnt &= 7;
+       hival = val << (8 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xff;
+       SET_CFLG ((val & 0x80) >> 7);
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e020_4)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       uint32_t sign = (0x80 & val) >> 7;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               val = 0xff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xff << (8 - cnt)) & (uint32_t)-sign;
+               val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e028_4)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_CFLG ((cnt == 8) & (val >> 7));
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e030_4)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 36) cnt -= 36;
+       if (cnt >= 18) cnt -= 18;
+       if (cnt >= 9) cnt -= 9;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (7 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e038_4)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {  uint32_t hival;
+       cnt &= 7;
+       hival = val << (8 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xff;
+       SET_CFLG ((val & 0x80) >> 7);
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e040_4)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = (0x8000 & val) >> 15;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               val = 0xffff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xffff << (16 - cnt)) & (uint32_t)-sign;
+               val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e048_4)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_CFLG ((cnt == 16) & (val >> 15));
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e050_4)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (15 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e058_4)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t hival;
+       cnt &= 15;
+       hival = val << (16 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xffff;
+       SET_CFLG ((val & 0x8000) >> 15);
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e060_4)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = (0x8000 & val) >> 15;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               val = 0xffff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xffff << (16 - cnt)) & (uint32_t)-sign;
+               val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e068_4)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_CFLG ((cnt == 16) & (val >> 15));
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e070_4)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 34) cnt -= 34;
+       if (cnt >= 17) cnt -= 17;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (15 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e078_4)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {  uint32_t hival;
+       cnt &= 15;
+       hival = val << (16 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xffff;
+       SET_CFLG ((val & 0x8000) >> 15);
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e080_4)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       uint32_t sign = (0x80000000 & val) >> 31;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               val = 0xffffffff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xffffffff << (32 - cnt)) & (uint32_t)-sign;
+               val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e088_4)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_CFLG ((cnt == 32) & (val >> 31));
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e090_4)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (31 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xffffffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e098_4)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t hival;
+       cnt &= 31;
+       hival = val << (32 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xffffffff;
+       SET_CFLG ((val & 0x80000000) >> 31);
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0a0_4)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       uint32_t sign = (0x80000000 & val) >> 31;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               val = 0xffffffff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xffffffff << (32 - cnt)) & (uint32_t)-sign;
+               val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0a8_4)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_CFLG ((cnt == 32) & (val >> 31));
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0b0_4)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 33) cnt -= 33;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (31 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xffffffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0b8_4)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {  uint32_t hival;
+       cnt &= 31;
+       hival = val << (32 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xffffffff;
+       SET_CFLG ((val & 0x80000000) >> 31);
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0d0_4)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e0d8_4)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e0e0_4)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_e0e8_4)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e0f0_4)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_e0f8_4)(uint32_t opcode) /* ASRW */
+{
+       OpcodeFamily = 72; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e0f9_4)(uint32_t opcode) /* ASRW */
+{
+       OpcodeFamily = 72; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_e100_4)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 8 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               uint32_t mask = (0xff << (7 - cnt)) & 0xff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x80) >> 7);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e108_4)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_CFLG (cnt == 8 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x80) >> 7);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e110_4)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (7 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e118_4)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t loval;
+       cnt &= 7;
+       loval = val >> (8 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e120_4)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 8 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               uint32_t mask = (0xff << (7 - cnt)) & 0xff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x80) >> 7);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e128_4)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_CFLG (cnt == 8 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x80) >> 7);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e130_4)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 36) cnt -= 36;
+       if (cnt >= 18) cnt -= 18;
+       if (cnt >= 9) cnt -= 9;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (7 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e138_4)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {
+       uint32_t loval;
+       cnt &= 7;
+       loval = val >> (8 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e140_4)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 16 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               uint32_t mask = (0xffff << (15 - cnt)) & 0xffff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x8000) >> 15);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e148_4)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_CFLG (cnt == 16 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x8000) >> 15);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e150_4)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (15 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e158_4)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t loval;
+       cnt &= 15;
+       loval = val >> (16 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xffff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e160_4)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 16 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               uint32_t mask = (0xffff << (15 - cnt)) & 0xffff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x8000) >> 15);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e168_4)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_CFLG (cnt == 16 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x8000) >> 15);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e170_4)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 34) cnt -= 34;
+       if (cnt >= 17) cnt -= 17;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (15 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e178_4)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {
+       uint32_t loval;
+       cnt &= 15;
+       loval = val >> (16 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xffff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e180_4)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 32 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               uint32_t mask = (0xffffffff << (31 - cnt)) & 0xffffffff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x80000000) >> 31);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e188_4)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_CFLG (cnt == 32 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x80000000) >> 31);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e190_4)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (31 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xffffffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e198_4)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t loval;
+       cnt &= 31;
+       loval = val >> (32 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xffffffff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1a0_4)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 32 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               uint32_t mask = (0xffffffff << (31 - cnt)) & 0xffffffff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x80000000) >> 31);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1a8_4)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_CFLG (cnt == 32 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x80000000) >> 31);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1b0_4)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 33) cnt -= 33;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (31 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xffffffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1b8_4)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {
+       uint32_t loval;
+       cnt &= 31;
+       loval = val >> (32 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xffffffff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1d0_4)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e1d8_4)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e1e0_4)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_e1e8_4)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e1f0_4)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_e1f8_4)(uint32_t opcode) /* ASLW */
+{
+       OpcodeFamily = 73; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e1f9_4)(uint32_t opcode) /* ASLW */
+{
+       OpcodeFamily = 73; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_e2d0_4)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e2d8_4)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e2e0_4)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_e2e8_4)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e2f0_4)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_e2f8_4)(uint32_t opcode) /* LSRW */
+{
+       OpcodeFamily = 74; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e2f9_4)(uint32_t opcode) /* LSRW */
+{
+       OpcodeFamily = 74; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_e3d0_4)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e3d8_4)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e3e0_4)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_e3e8_4)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e3f0_4)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_e3f8_4)(uint32_t opcode) /* LSLW */
+{
+       OpcodeFamily = 75; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e3f9_4)(uint32_t opcode) /* LSLW */
+{
+       OpcodeFamily = 75; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_e4d0_4)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e4d8_4)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e4e0_4)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_e4e8_4)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e4f0_4)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_e4f8_4)(uint32_t opcode) /* ROXRW */
+{
+       OpcodeFamily = 79; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e4f9_4)(uint32_t opcode) /* ROXRW */
+{
+       OpcodeFamily = 79; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_e5d0_4)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e5d8_4)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e5e0_4)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_e5e8_4)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e5f0_4)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_e5f8_4)(uint32_t opcode) /* ROXLW */
+{
+       OpcodeFamily = 78; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e5f9_4)(uint32_t opcode) /* ROXLW */
+{
+       OpcodeFamily = 78; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_e6d0_4)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e6d8_4)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e6e0_4)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_e6e8_4)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e6f0_4)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_e6f8_4)(uint32_t opcode) /* RORW */
+{
+       OpcodeFamily = 77; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e6f9_4)(uint32_t opcode) /* RORW */
+{
+       OpcodeFamily = 77; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_e7d0_4)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e7d8_4)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_e7e0_4)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_e7e8_4)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e7f0_4)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+       BusCyclePenalty += 2;
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_e7f8_4)(uint32_t opcode) /* ROLW */
+{
+       OpcodeFamily = 76; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_e7f9_4)(uint32_t opcode) /* ROLW */
+{
+       OpcodeFamily = 76; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong(2);
+{      int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       m68k_write_memory_16(dataa,val);
+}}}}m68k_incpc(6);
+return 20;
+}
+#endif
+
+
+#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8)
+#define PART_1 1
+#define PART_2 1
+#define PART_3 1
+#define PART_4 1
+#define PART_5 1
+#define PART_6 1
+#define PART_7 1
+#define PART_8 1
+#endif
+
+#ifdef PART_1
+unsigned long CPUFUNC(op_0_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_10_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_18_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_20_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_28_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_30_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_38_5)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_39_5)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_3c_5)(uint32_t opcode) /* ORSR */
+{
+       OpcodeFamily = 4; CurrentInstrCycles = 20; 
+{      MakeSR();
+{      int16_t src = get_iword_prefetch(2);
+       src &= 0xFF;
+       regs.sr |= src;
+       MakeFromSR();
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 20;
+}
+unsigned long CPUFUNC(op_40_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_50_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1591;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1591: ;
+return 16;
+}
+unsigned long CPUFUNC(op_58_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1592;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1592: ;
+return 16;
+}
+unsigned long CPUFUNC(op_60_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1593;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1593: ;
+return 18;
+}
+unsigned long CPUFUNC(op_68_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1594;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1594: ;
+return 20;
+}
+unsigned long CPUFUNC(op_70_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1595;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1595: ;
+return 22;
+}
+unsigned long CPUFUNC(op_78_5)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1596;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1596: ;
+return 20;
+}
+unsigned long CPUFUNC(op_79_5)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1597;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1597: ;
+return 24;
+}
+unsigned long CPUFUNC(op_7c_5)(uint32_t opcode) /* ORSR */
+{
+       OpcodeFamily = 4; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1598; }
+{      MakeSR();
+{      int16_t src = get_iword_prefetch(2);
+       regs.sr |= src;
+       MakeFromSR();
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1598: ;
+return 20;
+}
+unsigned long CPUFUNC(op_80_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_90_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1600;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1600: ;
+return 28;
+}
+unsigned long CPUFUNC(op_98_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1601;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1601: ;
+return 28;
+}
+unsigned long CPUFUNC(op_a0_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1602;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1602: ;
+return 30;
+}
+unsigned long CPUFUNC(op_a8_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1603;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1603: ;
+return 32;
+}
+unsigned long CPUFUNC(op_b0_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1604;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1604: ;
+return 34;
+}
+unsigned long CPUFUNC(op_b8_5)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1605;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1605: ;
+return 32;
+}
+unsigned long CPUFUNC(op_b9_5)(uint32_t opcode) /* OR */
+{
+       OpcodeFamily = 1; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1606;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1606: ;
+return 36;
+}
+unsigned long CPUFUNC(op_100_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_108_5)(uint32_t opcode) /* MVPMR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 29; CurrentInstrCycles = 16; 
+{      uint32_t memp = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      uint16_t val = (m68k_read_memory_8(memp) << 8) + m68k_read_memory_8(memp + 2);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_110_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_118_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_120_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 10; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_128_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_130_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_138_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_139_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 21; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_13a_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 2;
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_getpc () + 2;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_13b_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 3;
+       OpcodeFamily = 21; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_13c_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 21; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = get_ibyte_prefetch(2);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_140_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_148_5)(uint32_t opcode) /* MVPMR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 29; CurrentInstrCycles = 24; 
+{      uint32_t memp = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      uint32_t val = (m68k_read_memory_8(memp) << 24) + (m68k_read_memory_8(memp + 2) << 16)
+              + (m68k_read_memory_8(memp + 4) << 8) + m68k_read_memory_8(memp + 6);
+       m68k_dreg(regs, dstreg) = (val);
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 24;
+}
+unsigned long CPUFUNC(op_150_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_158_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_160_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_168_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_170_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_178_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_179_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 22; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_17a_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 2;
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_getpc () + 2;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_17b_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 3;
+       OpcodeFamily = 22; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_180_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 10; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_dreg(regs, dstreg) = (dst);
+       if ( src < 16 ) { m68k_incpc(2); return 8; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_188_5)(uint32_t opcode) /* MVPRM */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 28; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+       uint32_t memp = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       m68k_write_memory_8(memp, src >> 8); m68k_write_memory_8(memp + 2, src);
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_190_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_198_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_1a0_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_1a8_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1b0_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_1b8_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1b9_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 23; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_1ba_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 2;
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_getpc () + 2;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1bb_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 3;
+       OpcodeFamily = 23; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_1c0_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_1c8_5)(uint32_t opcode) /* MVPRM */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 28; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+       uint32_t memp = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       m68k_write_memory_8(memp, src >> 24); m68k_write_memory_8(memp + 2, src >> 16);
+       m68k_write_memory_8(memp + 4, src >> 8); m68k_write_memory_8(memp + 6, src);
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 24;
+}
+unsigned long CPUFUNC(op_1d0_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_1d8_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_1e0_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_1e8_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1f0_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_1f8_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1f9_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 24; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_1fa_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 2;
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_getpc () + 2;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1fb_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = 3;
+       OpcodeFamily = 24; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_200_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_210_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_218_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_220_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_228_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_230_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_238_5)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_239_5)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_23c_5)(uint32_t opcode) /* ANDSR */
+{
+       OpcodeFamily = 5; CurrentInstrCycles = 20; 
+{      MakeSR();
+{      int16_t src = get_iword_prefetch(2);
+       src |= 0xFF00;
+       regs.sr &= src;
+       MakeFromSR();
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 20;
+}
+unsigned long CPUFUNC(op_240_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_250_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1662;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1662: ;
+return 16;
+}
+unsigned long CPUFUNC(op_258_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1663;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1663: ;
+return 16;
+}
+unsigned long CPUFUNC(op_260_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1664;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1664: ;
+return 18;
+}
+unsigned long CPUFUNC(op_268_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1665;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1665: ;
+return 20;
+}
+unsigned long CPUFUNC(op_270_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1666;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1666: ;
+return 22;
+}
+unsigned long CPUFUNC(op_278_5)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1667;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1667: ;
+return 20;
+}
+unsigned long CPUFUNC(op_279_5)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1668;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1668: ;
+return 24;
+}
+unsigned long CPUFUNC(op_27c_5)(uint32_t opcode) /* ANDSR */
+{
+       OpcodeFamily = 5; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1669; }
+{      MakeSR();
+{      int16_t src = get_iword_prefetch(2);
+       regs.sr &= src;
+       MakeFromSR();
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1669: ;
+return 20;
+}
+unsigned long CPUFUNC(op_280_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_290_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1671;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1671: ;
+return 28;
+}
+unsigned long CPUFUNC(op_298_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1672;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1672: ;
+return 28;
+}
+unsigned long CPUFUNC(op_2a0_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1673;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1673: ;
+return 30;
+}
+unsigned long CPUFUNC(op_2a8_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1674;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1674: ;
+return 32;
+}
+unsigned long CPUFUNC(op_2b0_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1675;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1675: ;
+return 34;
+}
+unsigned long CPUFUNC(op_2b8_5)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1676;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1676: ;
+return 32;
+}
+unsigned long CPUFUNC(op_2b9_5)(uint32_t opcode) /* AND */
+{
+       OpcodeFamily = 2; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1677;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1677: ;
+return 36;
+}
+unsigned long CPUFUNC(op_400_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_410_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_418_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_420_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_428_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_430_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 22;
+}
+unsigned long CPUFUNC(op_438_5)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_439_5)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 24;
+}
+unsigned long CPUFUNC(op_440_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_450_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1687;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1687: ;
+return 16;
+}
+unsigned long CPUFUNC(op_458_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1688;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1688: ;
+return 16;
+}
+unsigned long CPUFUNC(op_460_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1689;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1689: ;
+return 18;
+}
+unsigned long CPUFUNC(op_468_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1690;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1690: ;
+return 20;
+}
+unsigned long CPUFUNC(op_470_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1691;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1691: ;
+return 22;
+}
+unsigned long CPUFUNC(op_478_5)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1692;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1692: ;
+return 20;
+}
+unsigned long CPUFUNC(op_479_5)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1693;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1693: ;
+return 24;
+}
+unsigned long CPUFUNC(op_480_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_490_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1695;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1695: ;
+return 28;
+}
+unsigned long CPUFUNC(op_498_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1696;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1696: ;
+return 28;
+}
+unsigned long CPUFUNC(op_4a0_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1697;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1697: ;
+return 30;
+}
+unsigned long CPUFUNC(op_4a8_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1698;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1698: ;
+return 32;
+}
+unsigned long CPUFUNC(op_4b0_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1699;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1699: ;
+return 34;
+}
+unsigned long CPUFUNC(op_4b8_5)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1700;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1700: ;
+return 32;
+}
+unsigned long CPUFUNC(op_4b9_5)(uint32_t opcode) /* SUB */
+{
+       OpcodeFamily = 7; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1701;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1701: ;
+return 36;
+}
+unsigned long CPUFUNC(op_600_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_610_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_618_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_620_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_628_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_630_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 22;
+}
+unsigned long CPUFUNC(op_638_5)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_639_5)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 24;
+}
+unsigned long CPUFUNC(op_640_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_650_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1711;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1711: ;
+return 16;
+}
+unsigned long CPUFUNC(op_658_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1712;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1712: ;
+return 16;
+}
+unsigned long CPUFUNC(op_660_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1713;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1713: ;
+return 18;
+}
+unsigned long CPUFUNC(op_668_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1714;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1714: ;
+return 20;
+}
+unsigned long CPUFUNC(op_670_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1715;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1715: ;
+return 22;
+}
+unsigned long CPUFUNC(op_678_5)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1716;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1716: ;
+return 20;
+}
+unsigned long CPUFUNC(op_679_5)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1717;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel1717: ;
+return 24;
+}
+unsigned long CPUFUNC(op_680_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_690_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1719;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1719: ;
+return 28;
+}
+unsigned long CPUFUNC(op_698_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1720;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1720: ;
+return 28;
+}
+unsigned long CPUFUNC(op_6a0_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1721;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1721: ;
+return 30;
+}
+unsigned long CPUFUNC(op_6a8_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1722;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1722: ;
+return 32;
+}
+unsigned long CPUFUNC(op_6b0_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1723;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1723: ;
+return 34;
+}
+unsigned long CPUFUNC(op_6b8_5)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1724;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1724: ;
+return 32;
+}
+unsigned long CPUFUNC(op_6b9_5)(uint32_t opcode) /* ADD */
+{
+       OpcodeFamily = 11; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1725;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel1725: ;
+return 36;
+}
+unsigned long CPUFUNC(op_800_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 10; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 10;
+}
+unsigned long CPUFUNC(op_810_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_818_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_820_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 14; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_828_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_830_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 21; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 18;
+}
+unsigned long CPUFUNC(op_838_5)(uint32_t opcode) /* BTST */
+{
+       OpcodeFamily = 21; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_839_5)(uint32_t opcode) /* BTST */
+{
+       OpcodeFamily = 21; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+return 20;
+}
+unsigned long CPUFUNC(op_83a_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 21; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_83b_5)(uint32_t opcode) /* BTST */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 21; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 18;
+}
+unsigned long CPUFUNC(op_83c_5)(uint32_t opcode) /* BTST */
+{
+       OpcodeFamily = 21; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int8_t dst = get_ibyte_prefetch(4);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_840_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+       m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_850_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_858_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_860_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_868_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_870_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 22; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_878_5)(uint32_t opcode) /* BCHG */
+{
+       OpcodeFamily = 22; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_879_5)(uint32_t opcode) /* BCHG */
+{
+       OpcodeFamily = 22; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_87a_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 22; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_87b_5)(uint32_t opcode) /* BCHG */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 22; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       dst ^= (1 << src);
+       SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_880_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 14; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+       m68k_dreg(regs, dstreg) = (dst);
+       if ( src < 16 ) { m68k_incpc(4); return 12; }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_890_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_898_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_8a0_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_8a8_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_8b0_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 23; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_8b8_5)(uint32_t opcode) /* BCLR */
+{
+       OpcodeFamily = 23; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_8b9_5)(uint32_t opcode) /* BCLR */
+{
+       OpcodeFamily = 23; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_8ba_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 23; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_8bb_5)(uint32_t opcode) /* BCLR */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 23; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst &= ~(1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_8c0_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= 31;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+       m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_8d0_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_8d8_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_8e0_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_8e8_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_8f0_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 24; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_8f8_5)(uint32_t opcode) /* BSET */
+{
+       OpcodeFamily = 24; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_8f9_5)(uint32_t opcode) /* BSET */
+{
+       OpcodeFamily = 24; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_8fa_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 24; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_8fb_5)(uint32_t opcode) /* BSET */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 24; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= 7;
+       SET_ZFLG (1 ^ ((dst >> src) & 1));
+       dst |= (1 << src);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,dst);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_a00_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_a10_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_a18_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_a20_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_a28_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_a30_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 22; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_a38_5)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_a39_5)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 24; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_a3c_5)(uint32_t opcode) /* EORSR */
+{
+       OpcodeFamily = 6; CurrentInstrCycles = 20; 
+{      MakeSR();
+{      int16_t src = get_iword_prefetch(2);
+       src &= 0xFF;
+       regs.sr ^= src;
+       MakeFromSR();
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 20;
+}
+unsigned long CPUFUNC(op_a40_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_a50_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1777;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1777: ;
+return 16;
+}
+unsigned long CPUFUNC(op_a58_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1778;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1778: ;
+return 16;
+}
+unsigned long CPUFUNC(op_a60_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1779;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1779: ;
+return 18;
+}
+unsigned long CPUFUNC(op_a68_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1780;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1780: ;
+return 20;
+}
+unsigned long CPUFUNC(op_a70_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 22; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1781;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1781: ;
+return 22;
+}
+unsigned long CPUFUNC(op_a78_5)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1782;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1782: ;
+return 20;
+}
+unsigned long CPUFUNC(op_a79_5)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 24; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1783;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel1783: ;
+return 24;
+}
+unsigned long CPUFUNC(op_a7c_5)(uint32_t opcode) /* EORSR */
+{
+       OpcodeFamily = 6; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1784; }
+{      MakeSR();
+{      int16_t src = get_iword_prefetch(2);
+       regs.sr ^= src;
+       MakeFromSR();
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1784: ;
+return 20;
+}
+#endif
+
+#ifdef PART_2
+unsigned long CPUFUNC(op_a80_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_a90_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1786;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1786: ;
+return 28;
+}
+unsigned long CPUFUNC(op_a98_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1787;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1787: ;
+return 28;
+}
+unsigned long CPUFUNC(op_aa0_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 30; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1788;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1788: ;
+return 30;
+}
+unsigned long CPUFUNC(op_aa8_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1789;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1789: ;
+return 32;
+}
+unsigned long CPUFUNC(op_ab0_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 34; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1790;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1790: ;
+return 34;
+}
+unsigned long CPUFUNC(op_ab8_5)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 32; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1791;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1791: ;
+return 32;
+}
+unsigned long CPUFUNC(op_ab9_5)(uint32_t opcode) /* EOR */
+{
+       OpcodeFamily = 3; CurrentInstrCycles = 36; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1792;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel1792: ;
+return 36;
+}
+unsigned long CPUFUNC(op_c00_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_c10_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_c18_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_c20_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_c28_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_c30_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 18;
+}
+unsigned long CPUFUNC(op_c38_5)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_c39_5)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+return 20;
+}
+unsigned long CPUFUNC(op_c3a_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(4);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_c3b_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 18;
+}
+unsigned long CPUFUNC(op_c40_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_c50_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1804;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1804: ;
+return 12;
+}
+unsigned long CPUFUNC(op_c58_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1805;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1805: ;
+return 12;
+}
+unsigned long CPUFUNC(op_c60_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1806;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1806: ;
+return 14;
+}
+unsigned long CPUFUNC(op_c68_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1807;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1807: ;
+return 16;
+}
+unsigned long CPUFUNC(op_c70_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1808;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1808: ;
+return 18;
+}
+unsigned long CPUFUNC(op_c78_5)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1809;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1809: ;
+return 16;
+}
+unsigned long CPUFUNC(op_c79_5)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1810;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+endlabel1810: ;
+return 20;
+}
+unsigned long CPUFUNC(op_c7a_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_getpc () + 4;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1811;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1811: ;
+return 16;
+}
+unsigned long CPUFUNC(op_c7b_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1812;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1812: ;
+return 18;
+}
+unsigned long CPUFUNC(op_c80_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_c90_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1814;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1814: ;
+return 20;
+}
+unsigned long CPUFUNC(op_c98_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1815;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1815: ;
+return 20;
+}
+unsigned long CPUFUNC(op_ca0_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 22; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1816;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1816: ;
+return 22;
+}
+unsigned long CPUFUNC(op_ca8_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1817;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+endlabel1817: ;
+return 24;
+}
+unsigned long CPUFUNC(op_cb0_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 26; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1818;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+endlabel1818: ;
+return 26;
+}
+unsigned long CPUFUNC(op_cb8_5)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1819;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+endlabel1819: ;
+return 24;
+}
+unsigned long CPUFUNC(op_cb9_5)(uint32_t opcode) /* CMP */
+{
+       OpcodeFamily = 25; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1820;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(10);
+fill_prefetch_0 ();
+endlabel1820: ;
+return 28;
+}
+unsigned long CPUFUNC(op_cba_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 2;
+       OpcodeFamily = 25; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_getpc () + 6;
+       dsta += (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1821;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+endlabel1821: ;
+return 24;
+}
+unsigned long CPUFUNC(op_cbb_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = 3;
+       OpcodeFamily = 25; CurrentInstrCycles = 26; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t tmppc = m68k_getpc() + 6;
+       uint32_t dsta = get_disp_ea_000(tmppc, get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1822;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+endlabel1822: ;
+return 26;
+}
+unsigned long CPUFUNC(op_1000_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_1008_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_1010_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_1018_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_1020_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_1028_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_1030_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_1038_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_1039_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_103a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_103b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_103c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_1080_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 8;
+}
+unsigned long CPUFUNC(op_1088_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 8;
+}
+unsigned long CPUFUNC(op_1090_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_1098_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_10a0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_10a8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_10b0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_10b8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_10b9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_10ba_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_10bb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_10bc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_10c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 8;
+}
+unsigned long CPUFUNC(op_10c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 8;
+}
+unsigned long CPUFUNC(op_10d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_10d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_10e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_10e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_10f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_10f8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_10f9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_10fa_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_10fb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_10fc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_1100_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 8;
+}
+unsigned long CPUFUNC(op_1108_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 8;
+}
+unsigned long CPUFUNC(op_1110_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_1118_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_1120_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_1128_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1130_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_1138_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1139_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_113a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_113b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_113c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+       m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_1140_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_1148_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_1150_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1158_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_1160_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_1168_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_1170_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_1178_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_1179_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_117a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_117b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_117c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_1180_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_1188_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_1190_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_1198_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_11a0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_11a8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_11b0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_11b8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_11b9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 26;
+}
+unsigned long CPUFUNC(op_11ba_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_11bb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_11bc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_11c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_11c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_11d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_11d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_11e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_11e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_11f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_11f8_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_11f9_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_11fa_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_11fb_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_11fc_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_13c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_13c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_13d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_13d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = get_ilong_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_13e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 22;
+}
+unsigned long CPUFUNC(op_13e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_13f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 26;
+}
+unsigned long CPUFUNC(op_13f8_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_13f9_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 28;
+}
+unsigned long CPUFUNC(op_13fa_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 24;
+}
+unsigned long CPUFUNC(op_13fb_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 26;
+}
+unsigned long CPUFUNC(op_13fc_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int8_t src = get_ibyte_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_2000_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_2008_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_2010_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1921;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel1921: ;
+return 12;
+}
+unsigned long CPUFUNC(op_2018_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1922;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel1922: ;
+return 12;
+}
+unsigned long CPUFUNC(op_2020_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1923;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel1923: ;
+return 14;
+}
+unsigned long CPUFUNC(op_2028_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1924;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1924: ;
+return 16;
+}
+unsigned long CPUFUNC(op_2030_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1925;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1925: ;
+return 18;
+}
+unsigned long CPUFUNC(op_2038_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1926;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1926: ;
+return 16;
+}
+unsigned long CPUFUNC(op_2039_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1927;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1927: ;
+return 20;
+}
+unsigned long CPUFUNC(op_203a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1928;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1928: ;
+return 16;
+}
+unsigned long CPUFUNC(op_203b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1929;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1929: ;
+return 18;
+}
+unsigned long CPUFUNC(op_203c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_2040_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_2048_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_2050_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1933;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel1933: ;
+return 12;
+}
+unsigned long CPUFUNC(op_2058_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1934;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel1934: ;
+return 12;
+}
+unsigned long CPUFUNC(op_2060_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1935;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel1935: ;
+return 14;
+}
+unsigned long CPUFUNC(op_2068_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1936;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1936: ;
+return 16;
+}
+unsigned long CPUFUNC(op_2070_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1937;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1937: ;
+return 18;
+}
+unsigned long CPUFUNC(op_2078_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1938;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1938: ;
+return 16;
+}
+unsigned long CPUFUNC(op_2079_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1939;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel1939: ;
+return 20;
+}
+unsigned long CPUFUNC(op_207a_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1940;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1940: ;
+return 16;
+}
+unsigned long CPUFUNC(op_207b_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1941;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel1941: ;
+return 18;
+}
+unsigned long CPUFUNC(op_207c_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t val = src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_2080_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1943;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1943: ;
+return 12;
+}
+unsigned long CPUFUNC(op_2088_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1944;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1944: ;
+return 12;
+}
+unsigned long CPUFUNC(op_2090_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1945;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1945;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1945: ;
+return 20;
+}
+unsigned long CPUFUNC(op_2098_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1946;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1946;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1946: ;
+return 20;
+}
+unsigned long CPUFUNC(op_20a0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1947;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1947;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1947: ;
+return 22;
+}
+unsigned long CPUFUNC(op_20a8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1948;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1948;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1948: ;
+return 24;
+}
+unsigned long CPUFUNC(op_20b0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1949;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1949;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1949: ;
+return 26;
+}
+unsigned long CPUFUNC(op_20b8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1950;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1950;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1950: ;
+return 24;
+}
+unsigned long CPUFUNC(op_20b9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1951;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1951;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1951: ;
+return 28;
+}
+unsigned long CPUFUNC(op_20ba_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1952;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1952;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1952: ;
+return 24;
+}
+unsigned long CPUFUNC(op_20bb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1953;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1953;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1953: ;
+return 26;
+}
+unsigned long CPUFUNC(op_20bc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1954;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1954: ;
+return 20;
+}
+unsigned long CPUFUNC(op_20c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1955;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1955: ;
+return 12;
+}
+unsigned long CPUFUNC(op_20c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1956;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1956: ;
+return 12;
+}
+unsigned long CPUFUNC(op_20d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1957;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1957;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1957: ;
+return 20;
+}
+unsigned long CPUFUNC(op_20d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1958;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1958;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1958: ;
+return 20;
+}
+unsigned long CPUFUNC(op_20e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1959;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1959;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1959: ;
+return 22;
+}
+unsigned long CPUFUNC(op_20e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1960;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1960;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1960: ;
+return 24;
+}
+unsigned long CPUFUNC(op_20f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1961;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1961;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1961: ;
+return 26;
+}
+unsigned long CPUFUNC(op_20f8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1962;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1962;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1962: ;
+return 24;
+}
+unsigned long CPUFUNC(op_20f9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1963;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1963;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1963: ;
+return 28;
+}
+unsigned long CPUFUNC(op_20fa_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1964;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1964;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1964: ;
+return 24;
+}
+unsigned long CPUFUNC(op_20fb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1965;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1965;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1965: ;
+return 26;
+}
+unsigned long CPUFUNC(op_20fc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1966;
+       }
+{      m68k_areg(regs, dstreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1966: ;
+return 20;
+}
+unsigned long CPUFUNC(op_2100_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1967;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1967: ;
+return 12;
+}
+unsigned long CPUFUNC(op_2108_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1968;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1968: ;
+return 12;
+}
+unsigned long CPUFUNC(op_2110_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1969;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1969;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1969: ;
+return 20;
+}
+unsigned long CPUFUNC(op_2118_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1970;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1970;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1970: ;
+return 20;
+}
+unsigned long CPUFUNC(op_2120_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1971;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1971;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1971: ;
+return 22;
+}
+unsigned long CPUFUNC(op_2128_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1972;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1972;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1972: ;
+return 24;
+}
+unsigned long CPUFUNC(op_2130_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1973;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1973;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1973: ;
+return 26;
+}
+unsigned long CPUFUNC(op_2138_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1974;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1974;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1974: ;
+return 24;
+}
+#endif
+
+#ifdef PART_3
+unsigned long CPUFUNC(op_2139_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1975;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1975;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1975: ;
+return 28;
+}
+unsigned long CPUFUNC(op_213a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1976;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1976;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1976: ;
+return 24;
+}
+unsigned long CPUFUNC(op_213b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1977;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1977;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1977: ;
+return 26;
+}
+unsigned long CPUFUNC(op_213c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1978;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1978: ;
+return 20;
+}
+unsigned long CPUFUNC(op_2140_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1979;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1979: ;
+return 16;
+}
+unsigned long CPUFUNC(op_2148_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1980;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1980: ;
+return 16;
+}
+unsigned long CPUFUNC(op_2150_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1981;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1981;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1981: ;
+return 24;
+}
+unsigned long CPUFUNC(op_2158_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1982;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1982;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1982: ;
+return 24;
+}
+unsigned long CPUFUNC(op_2160_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1983;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1983;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1983: ;
+return 26;
+}
+unsigned long CPUFUNC(op_2168_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1984;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1984;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1984: ;
+return 28;
+}
+unsigned long CPUFUNC(op_2170_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1985;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1985;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1985: ;
+return 30;
+}
+unsigned long CPUFUNC(op_2178_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1986;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1986;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1986: ;
+return 28;
+}
+unsigned long CPUFUNC(op_2179_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1987;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1987;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1987: ;
+return 32;
+}
+unsigned long CPUFUNC(op_217a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1988;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1988;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1988: ;
+return 28;
+}
+unsigned long CPUFUNC(op_217b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1989;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1989;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1989: ;
+return 30;
+}
+unsigned long CPUFUNC(op_217c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1990;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1990: ;
+return 24;
+}
+unsigned long CPUFUNC(op_2180_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1991;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1991: ;
+return 18;
+}
+unsigned long CPUFUNC(op_2188_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1992;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel1992: ;
+return 18;
+}
+unsigned long CPUFUNC(op_2190_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1993;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1993;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1993: ;
+return 26;
+}
+unsigned long CPUFUNC(op_2198_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1994;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1994;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1994: ;
+return 26;
+}
+unsigned long CPUFUNC(op_21a0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1995;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1995;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1995: ;
+return 28;
+}
+unsigned long CPUFUNC(op_21a8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1996;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1996;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1996: ;
+return 30;
+}
+unsigned long CPUFUNC(op_21b0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1997;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1997;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1997: ;
+return 32;
+}
+unsigned long CPUFUNC(op_21b8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1998;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1998;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1998: ;
+return 30;
+}
+unsigned long CPUFUNC(op_21b9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 34; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1999;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel1999;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel1999: ;
+return 34;
+}
+unsigned long CPUFUNC(op_21ba_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2000;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2000;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2000: ;
+return 30;
+}
+unsigned long CPUFUNC(op_21bb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2001;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2001;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2001: ;
+return 32;
+}
+unsigned long CPUFUNC(op_21bc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2002;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel2002: ;
+return 26;
+}
+unsigned long CPUFUNC(op_21c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2003;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel2003: ;
+return 16;
+}
+unsigned long CPUFUNC(op_21c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2004;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel2004: ;
+return 16;
+}
+unsigned long CPUFUNC(op_21d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2005;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2005;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2005: ;
+return 24;
+}
+unsigned long CPUFUNC(op_21d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2006;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2006;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2006: ;
+return 24;
+}
+unsigned long CPUFUNC(op_21e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2007;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2007;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2007: ;
+return 26;
+}
+unsigned long CPUFUNC(op_21e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2008;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2008;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2008: ;
+return 28;
+}
+unsigned long CPUFUNC(op_21f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2009;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2009;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2009: ;
+return 30;
+}
+unsigned long CPUFUNC(op_21f8_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2010;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2010;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2010: ;
+return 28;
+}
+unsigned long CPUFUNC(op_21f9_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2011;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2011;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2011: ;
+return 32;
+}
+unsigned long CPUFUNC(op_21fa_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2012;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2012;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2012: ;
+return 28;
+}
+unsigned long CPUFUNC(op_21fb_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2013;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2013;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2013: ;
+return 30;
+}
+unsigned long CPUFUNC(op_21fc_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2014;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel2014: ;
+return 24;
+}
+unsigned long CPUFUNC(op_23c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2015;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel2015: ;
+return 20;
+}
+unsigned long CPUFUNC(op_23c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2016;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel2016: ;
+return 20;
+}
+unsigned long CPUFUNC(op_23d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2017;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2017;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2017: ;
+return 28;
+}
+unsigned long CPUFUNC(op_23d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2018;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2018;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2018: ;
+return 28;
+}
+unsigned long CPUFUNC(op_23e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2019;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2019;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2019: ;
+return 30;
+}
+unsigned long CPUFUNC(op_23e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2020;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2020;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2020: ;
+return 32;
+}
+unsigned long CPUFUNC(op_23f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 34; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2021;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2021;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2021: ;
+return 34;
+}
+unsigned long CPUFUNC(op_23f8_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2022;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2022;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2022: ;
+return 32;
+}
+unsigned long CPUFUNC(op_23f9_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 36; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2023;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2023;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2023: ;
+return 36;
+}
+unsigned long CPUFUNC(op_23fa_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 32; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2024;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2024;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2024: ;
+return 32;
+}
+unsigned long CPUFUNC(op_23fb_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 34; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2025;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2025;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}}endlabel2025: ;
+return 34;
+}
+unsigned long CPUFUNC(op_23fc_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2026;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}endlabel2026: ;
+return 28;
+}
+unsigned long CPUFUNC(op_3000_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_3008_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_3010_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2029;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2029: ;
+return 8;
+}
+unsigned long CPUFUNC(op_3018_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2030;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2030: ;
+return 8;
+}
+unsigned long CPUFUNC(op_3020_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2031;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2031: ;
+return 10;
+}
+unsigned long CPUFUNC(op_3028_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2032;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2032: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3030_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2033;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2033: ;
+return 14;
+}
+unsigned long CPUFUNC(op_3038_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2034;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2034: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3039_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2035;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2035: ;
+return 16;
+}
+unsigned long CPUFUNC(op_303a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2036;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2036: ;
+return 12;
+}
+unsigned long CPUFUNC(op_303b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2037;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2037: ;
+return 14;
+}
+unsigned long CPUFUNC(op_303c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_3040_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_3048_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_3050_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2041;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2041: ;
+return 8;
+}
+unsigned long CPUFUNC(op_3058_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2042;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2042: ;
+return 8;
+}
+unsigned long CPUFUNC(op_3060_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2043;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2043: ;
+return 10;
+}
+unsigned long CPUFUNC(op_3068_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2044;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2044: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3070_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2045;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2045: ;
+return 14;
+}
+unsigned long CPUFUNC(op_3078_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2046;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2046: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3079_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2047;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2047: ;
+return 16;
+}
+unsigned long CPUFUNC(op_307a_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2048;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2048: ;
+return 12;
+}
+unsigned long CPUFUNC(op_307b_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2049;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2049: ;
+return 14;
+}
+unsigned long CPUFUNC(op_307c_5)(uint32_t opcode) /* MOVEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 31; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t val = (int32_t)(int16_t)src;
+       m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_3080_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2051;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2051: ;
+return 8;
+}
+unsigned long CPUFUNC(op_3088_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2052;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2052: ;
+return 8;
+}
+unsigned long CPUFUNC(op_3090_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2053;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2053;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2053: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3098_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2054;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2054;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2054: ;
+return 12;
+}
+unsigned long CPUFUNC(op_30a0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2055;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2055;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2055: ;
+return 14;
+}
+unsigned long CPUFUNC(op_30a8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2056;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2056;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2056: ;
+return 16;
+}
+unsigned long CPUFUNC(op_30b0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2057;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2057;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2057: ;
+return 18;
+}
+unsigned long CPUFUNC(op_30b8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2058;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2058;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2058: ;
+return 16;
+}
+unsigned long CPUFUNC(op_30b9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2059;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2059;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2059: ;
+return 20;
+}
+unsigned long CPUFUNC(op_30ba_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2060;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2060;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2060: ;
+return 16;
+}
+unsigned long CPUFUNC(op_30bb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2061;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2061;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2061: ;
+return 18;
+}
+unsigned long CPUFUNC(op_30bc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2062;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2062: ;
+return 12;
+}
+unsigned long CPUFUNC(op_30c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2063;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2063: ;
+return 8;
+}
+unsigned long CPUFUNC(op_30c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2064;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2064: ;
+return 8;
+}
+unsigned long CPUFUNC(op_30d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2065;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2065;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2065: ;
+return 12;
+}
+unsigned long CPUFUNC(op_30d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2066;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2066;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2066: ;
+return 12;
+}
+unsigned long CPUFUNC(op_30e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2067;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2067;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2067: ;
+return 14;
+}
+unsigned long CPUFUNC(op_30e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2068;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2068;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2068: ;
+return 16;
+}
+unsigned long CPUFUNC(op_30f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2069;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2069;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2069: ;
+return 18;
+}
+unsigned long CPUFUNC(op_30f8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2070;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2070;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2070: ;
+return 16;
+}
+unsigned long CPUFUNC(op_30f9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2071;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2071;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2071: ;
+return 20;
+}
+unsigned long CPUFUNC(op_30fa_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2072;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2072;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2072: ;
+return 16;
+}
+unsigned long CPUFUNC(op_30fb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2073;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2073;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2073: ;
+return 18;
+}
+unsigned long CPUFUNC(op_30fc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2074;
+       }
+{      m68k_areg(regs, dstreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2074: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3100_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2075;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2075: ;
+return 8;
+}
+unsigned long CPUFUNC(op_3108_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2076;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2076: ;
+return 8;
+}
+unsigned long CPUFUNC(op_3110_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2077;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2077;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2077: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3118_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2078;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2078;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2078: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3120_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2079;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2079;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2079: ;
+return 14;
+}
+unsigned long CPUFUNC(op_3128_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2080;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2080;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2080: ;
+return 16;
+}
+unsigned long CPUFUNC(op_3130_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2081;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2081;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2081: ;
+return 18;
+}
+unsigned long CPUFUNC(op_3138_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2082;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2082;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2082: ;
+return 16;
+}
+unsigned long CPUFUNC(op_3139_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2083;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2083;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2083: ;
+return 20;
+}
+unsigned long CPUFUNC(op_313a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2084;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2084;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2084: ;
+return 16;
+}
+unsigned long CPUFUNC(op_313b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2085;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2085;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2085: ;
+return 18;
+}
+unsigned long CPUFUNC(op_313c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2086;
+       }
+{      m68k_areg (regs, dstreg) = dsta;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2086: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3140_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2087;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2087: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3148_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2088;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2088: ;
+return 12;
+}
+unsigned long CPUFUNC(op_3150_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2089;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2089;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2089: ;
+return 16;
+}
+unsigned long CPUFUNC(op_3158_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2090;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2090;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2090: ;
+return 16;
+}
+unsigned long CPUFUNC(op_3160_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2091;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2091;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2091: ;
+return 18;
+}
+unsigned long CPUFUNC(op_3168_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2092;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2092;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2092: ;
+return 20;
+}
+unsigned long CPUFUNC(op_3170_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2093;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2093;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2093: ;
+return 22;
+}
+unsigned long CPUFUNC(op_3178_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2094;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2094;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2094: ;
+return 20;
+}
+unsigned long CPUFUNC(op_3179_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2095;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2095;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2095: ;
+return 24;
+}
+unsigned long CPUFUNC(op_317a_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2096;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2096;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2096: ;
+return 20;
+}
+unsigned long CPUFUNC(op_317b_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2097;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2097;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2097: ;
+return 22;
+}
+unsigned long CPUFUNC(op_317c_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2098;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2098: ;
+return 16;
+}
+unsigned long CPUFUNC(op_3180_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2099;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2099: ;
+return 14;
+}
+unsigned long CPUFUNC(op_3188_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2100;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2100: ;
+return 14;
+}
+unsigned long CPUFUNC(op_3190_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2101;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2101;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2101: ;
+return 18;
+}
+unsigned long CPUFUNC(op_3198_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2102;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2102;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2102: ;
+return 18;
+}
+unsigned long CPUFUNC(op_31a0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2103;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2103;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2103: ;
+return 20;
+}
+unsigned long CPUFUNC(op_31a8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2104;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2104;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2104: ;
+return 22;
+}
+unsigned long CPUFUNC(op_31b0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2105;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2105;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2105: ;
+return 24;
+}
+unsigned long CPUFUNC(op_31b8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2106;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2106;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2106: ;
+return 22;
+}
+unsigned long CPUFUNC(op_31b9_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2107;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2107;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2107: ;
+return 26;
+}
+unsigned long CPUFUNC(op_31ba_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2108;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2108;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2108: ;
+return 22;
+}
+unsigned long CPUFUNC(op_31bb_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2109;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2109;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2109: ;
+return 24;
+}
+unsigned long CPUFUNC(op_31bc_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2110;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2110: ;
+return 18;
+}
+unsigned long CPUFUNC(op_31c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2111;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2111: ;
+return 12;
+}
+unsigned long CPUFUNC(op_31c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2112;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2112: ;
+return 12;
+}
+unsigned long CPUFUNC(op_31d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2113;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2113;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2113: ;
+return 16;
+}
+unsigned long CPUFUNC(op_31d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2114;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2114;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2114: ;
+return 16;
+}
+unsigned long CPUFUNC(op_31e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2115;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2115;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2115: ;
+return 18;
+}
+unsigned long CPUFUNC(op_31e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2116;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2116;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2116: ;
+return 20;
+}
+unsigned long CPUFUNC(op_31f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2117;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2117;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2117: ;
+return 22;
+}
+unsigned long CPUFUNC(op_31f8_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2118;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2118;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2118: ;
+return 20;
+}
+unsigned long CPUFUNC(op_31f9_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2119;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2119;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2119: ;
+return 24;
+}
+unsigned long CPUFUNC(op_31fa_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2120;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2120;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2120: ;
+return 20;
+}
+unsigned long CPUFUNC(op_31fb_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2121;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2121;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2121: ;
+return 22;
+}
+unsigned long CPUFUNC(op_31fc_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2122;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2122: ;
+return 16;
+}
+unsigned long CPUFUNC(op_33c0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2123;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2123: ;
+return 16;
+}
+unsigned long CPUFUNC(op_33c8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2124;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2124: ;
+return 16;
+}
+unsigned long CPUFUNC(op_33d0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2125;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2125;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2125: ;
+return 20;
+}
+unsigned long CPUFUNC(op_33d8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2126;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2126;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2126: ;
+return 20;
+}
+unsigned long CPUFUNC(op_33e0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2127;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2127;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2127: ;
+return 22;
+}
+unsigned long CPUFUNC(op_33e8_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2128;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2128;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2128: ;
+return 24;
+}
+unsigned long CPUFUNC(op_33f0_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2129;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2129;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2129: ;
+return 26;
+}
+unsigned long CPUFUNC(op_33f8_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2130;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2130;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2130: ;
+return 24;
+}
+unsigned long CPUFUNC(op_33f9_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2131;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong_prefetch(6);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 10;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2131;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(10);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2131: ;
+return 28;
+}
+unsigned long CPUFUNC(op_33fa_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2132;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2132;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2132: ;
+return 24;
+}
+unsigned long CPUFUNC(op_33fb_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 26; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2133;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2133;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}}endlabel2133: ;
+return 26;
+}
+unsigned long CPUFUNC(op_33fc_5)(uint32_t opcode) /* MOVE */
+{
+       OpcodeFamily = 30; CurrentInstrCycles = 20; 
+{{     int16_t src = get_iword_prefetch(2);
+{      uint32_t dsta = get_ilong_prefetch(4);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2134;
+       }
+{      CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(8);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}endlabel2134: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4000_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4010_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,newv);
+}}}}}return 12;
+}
+unsigned long CPUFUNC(op_4018_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,newv);
+}}}}}return 12;
+}
+unsigned long CPUFUNC(op_4020_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,newv);
+}}}}}return 14;
+}
+unsigned long CPUFUNC(op_4028_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,newv);
+}}}}}return 16;
+}
+unsigned long CPUFUNC(op_4030_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,newv);
+}}}}}return 18;
+}
+unsigned long CPUFUNC(op_4038_5)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,newv);
+}}}}}return 16;
+}
+unsigned long CPUFUNC(op_4039_5)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,newv);
+}}}}}return 20;
+}
+unsigned long CPUFUNC(op_4040_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4050_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2144;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,newv);
+}}}}}}endlabel2144: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4058_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2145;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,newv);
+}}}}}}endlabel2145: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4060_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2146;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,newv);
+}}}}}}endlabel2146: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4068_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2147;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,newv);
+}}}}}}endlabel2147: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4070_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2148;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,newv);
+}}}}}}endlabel2148: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4078_5)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2149;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,newv);
+}}}}}}endlabel2149: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4079_5)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2150;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,newv);
+}}}}}}endlabel2150: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4080_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, srcreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_4090_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2152;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,newv);
+}}}}}}endlabel2152: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4098_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2153;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,newv);
+}}}}}}endlabel2153: ;
+return 20;
+}
+unsigned long CPUFUNC(op_40a0_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2154;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,newv);
+}}}}}}endlabel2154: ;
+return 22;
+}
+unsigned long CPUFUNC(op_40a8_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2155;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,newv);
+}}}}}}endlabel2155: ;
+return 24;
+}
+unsigned long CPUFUNC(op_40b0_5)(uint32_t opcode) /* NEGX */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 16; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2156;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,newv);
+}}}}}}endlabel2156: ;
+return 26;
+}
+unsigned long CPUFUNC(op_40b8_5)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2157;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,newv);
+}}}}}}endlabel2157: ;
+return 24;
+}
+unsigned long CPUFUNC(op_40b9_5)(uint32_t opcode) /* NEGX */
+{
+       OpcodeFamily = 16; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2158;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,newv);
+}}}}}}endlabel2158: ;
+return 28;
+}
+unsigned long CPUFUNC(op_40c0_5)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 6;  
+{{     MakeSR();
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_40d0_5)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2160;
+       }
+{      MakeSR();
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,regs.sr);
+}}}endlabel2160: ;
+return 12;
+}
+unsigned long CPUFUNC(op_40d8_5)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2161;
+       }
+{      m68k_areg(regs, srcreg) += 2;
+       MakeSR();
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,regs.sr);
+}}}endlabel2161: ;
+return 12;
+}
+unsigned long CPUFUNC(op_40e0_5)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2162;
+       }
+{      m68k_areg (regs, srcreg) = srca;
+       MakeSR();
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,regs.sr);
+}}}endlabel2162: ;
+return 14;
+}
+unsigned long CPUFUNC(op_40e8_5)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2163;
+       }
+{      MakeSR();
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,regs.sr);
+}}}endlabel2163: ;
+return 16;
+}
+unsigned long CPUFUNC(op_40f0_5)(uint32_t opcode) /* MVSR2 */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 32; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2164;
+       }
+{      MakeSR();
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,regs.sr);
+}}}endlabel2164: ;
+return 18;
+}
+unsigned long CPUFUNC(op_40f8_5)(uint32_t opcode) /* MVSR2 */
+{
+       OpcodeFamily = 32; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2165;
+       }
+{      MakeSR();
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,regs.sr);
+}}}endlabel2165: ;
+return 16;
+}
+unsigned long CPUFUNC(op_40f9_5)(uint32_t opcode) /* MVSR2 */
+{
+       OpcodeFamily = 32; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2166;
+       }
+{      MakeSR();
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,regs.sr);
+}}}endlabel2166: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4180_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 10; 
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2167; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2167; }
+}}}endlabel2167: ;
+return 10;
+}
+unsigned long CPUFUNC(op_4190_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2168;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2168; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2168; }
+}}}}}endlabel2168: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4198_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2169;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2169; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2169; }
+}}}}}endlabel2169: ;
+return 14;
+}
+unsigned long CPUFUNC(op_41a0_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 16; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2170;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2170; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2170; }
+}}}}}endlabel2170: ;
+return 16;
+}
+unsigned long CPUFUNC(op_41a8_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 18; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2171;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2171; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2171; }
+}}}}}endlabel2171: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41b0_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 20; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2172;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2172; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2172; }
+}}}}}endlabel2172: ;
+return 20;
+}
+unsigned long CPUFUNC(op_41b8_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 18; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2173;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2173; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2173; }
+}}}}}endlabel2173: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41b9_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 22; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2174;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2174; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2174; }
+}}}}}endlabel2174: ;
+return 22;
+}
+unsigned long CPUFUNC(op_41ba_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 18; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2175;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2175; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2175; }
+}}}}}endlabel2175: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41bb_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 20; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2176;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2176; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2176; }
+}}}}}endlabel2176: ;
+return 20;
+}
+unsigned long CPUFUNC(op_41bc_5)(uint32_t opcode) /* CHK */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 80; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2177; }
+       else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2177; }
+}}}endlabel2177: ;
+return 14;
+}
+unsigned long CPUFUNC(op_41d0_5)(uint32_t opcode) /* LEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 4;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_41e8_5)(uint32_t opcode) /* LEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_41f0_5)(uint32_t opcode) /* LEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_41f8_5)(uint32_t opcode) /* LEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 8;  
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_41f9_5)(uint32_t opcode) /* LEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 12; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_41fa_5)(uint32_t opcode) /* LEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_41fb_5)(uint32_t opcode) /* LEA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 56; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_4200_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 4;  
+{{     CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4210_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,0);
+}}return 12;
+}
+unsigned long CPUFUNC(op_4218_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,0);
+}}return 12;
+}
+unsigned long CPUFUNC(op_4220_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,0);
+}}return 14;
+}
+unsigned long CPUFUNC(op_4228_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,0);
+}}return 16;
+}
+unsigned long CPUFUNC(op_4230_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,0);
+}}return 18;
+}
+unsigned long CPUFUNC(op_4238_5)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,0);
+}}return 16;
+}
+unsigned long CPUFUNC(op_4239_5)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(0)) == 0);
+       SET_NFLG (((int8_t)(0)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,0);
+}}return 20;
+}
+unsigned long CPUFUNC(op_4240_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 4;  
+{{     CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4250_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2194;
+       }
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,0);
+}}}endlabel2194: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4258_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2195;
+       }
+{      m68k_areg(regs, srcreg) += 2;
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,0);
+}}}endlabel2195: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4260_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2196;
+       }
+{      m68k_areg (regs, srcreg) = srca;
+       int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,0);
+}}}endlabel2196: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4268_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2197;
+       }
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,0);
+}}}endlabel2197: ;
+return 16;
+}
+#endif
+
+#ifdef PART_4
+unsigned long CPUFUNC(op_4270_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2198;
+       }
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,0);
+}}}endlabel2198: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4278_5)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2199;
+       }
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,0);
+}}}endlabel2199: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4279_5)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2200;
+       }
+{      int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(0)) == 0);
+       SET_NFLG (((int16_t)(0)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,0);
+}}}endlabel2200: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4280_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 6;  
+{{     CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+       m68k_dreg(regs, srcreg) = (0);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_4290_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2202;
+       }
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,0);
+}}}endlabel2202: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4298_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2203;
+       }
+{      m68k_areg(regs, srcreg) += 4;
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,0);
+}}}endlabel2203: ;
+return 20;
+}
+unsigned long CPUFUNC(op_42a0_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2204;
+       }
+{      m68k_areg (regs, srcreg) = srca;
+       int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,0);
+}}}endlabel2204: ;
+return 22;
+}
+unsigned long CPUFUNC(op_42a8_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2205;
+       }
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,0);
+}}}endlabel2205: ;
+return 24;
+}
+unsigned long CPUFUNC(op_42b0_5)(uint32_t opcode) /* CLR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 18; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2206;
+       }
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,0);
+}}}endlabel2206: ;
+return 26;
+}
+unsigned long CPUFUNC(op_42b8_5)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2207;
+       }
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,0);
+}}}endlabel2207: ;
+return 24;
+}
+unsigned long CPUFUNC(op_42b9_5)(uint32_t opcode) /* CLR */
+{
+       OpcodeFamily = 18; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2208;
+       }
+{      int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(0)) == 0);
+       SET_NFLG (((int32_t)(0)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,0);
+}}}endlabel2208: ;
+return 28;
+}
+unsigned long CPUFUNC(op_4400_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4410_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,dst);
+}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_4418_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,dst);
+}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_4420_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,dst);
+}}}}}}return 14;
+}
+unsigned long CPUFUNC(op_4428_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,dst);
+}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_4430_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,dst);
+}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_4438_5)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,dst);
+}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_4439_5)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(0)) < 0;
+       int flgn = ((int8_t)(dst)) < 0;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,dst);
+}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_4440_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4450_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2218;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}}}endlabel2218: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4458_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2219;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}}}endlabel2219: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4460_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2220;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}}}endlabel2220: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4468_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2221;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}}}endlabel2221: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4470_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2222;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}}}endlabel2222: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4478_5)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2223;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}}}endlabel2223: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4479_5)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2224;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(0)) < 0;
+       int flgn = ((int16_t)(dst)) < 0;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}}}endlabel2224: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4480_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, srcreg) = (dst);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_4490_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2226;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}}}endlabel2226: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4498_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2227;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}}}endlabel2227: ;
+return 20;
+}
+unsigned long CPUFUNC(op_44a0_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2228;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}}}endlabel2228: ;
+return 22;
+}
+unsigned long CPUFUNC(op_44a8_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2229;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}}}endlabel2229: ;
+return 24;
+}
+unsigned long CPUFUNC(op_44b0_5)(uint32_t opcode) /* NEG */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 15; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2230;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}}}endlabel2230: ;
+return 26;
+}
+unsigned long CPUFUNC(op_44b8_5)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2231;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}}}endlabel2231: ;
+return 24;
+}
+unsigned long CPUFUNC(op_44b9_5)(uint32_t opcode) /* NEG */
+{
+       OpcodeFamily = 15; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2232;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(0)) < 0;
+       int flgn = ((int32_t)(dst)) < 0;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}}}endlabel2232: ;
+return 28;
+}
+unsigned long CPUFUNC(op_44c0_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 12;
+}
+unsigned long CPUFUNC(op_44d0_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2234;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2234: ;
+return 16;
+}
+unsigned long CPUFUNC(op_44d8_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2235;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2235: ;
+return 16;
+}
+unsigned long CPUFUNC(op_44e0_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2236;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2236: ;
+return 18;
+}
+unsigned long CPUFUNC(op_44e8_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2237;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2237: ;
+return 20;
+}
+unsigned long CPUFUNC(op_44f0_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2238;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2238: ;
+return 22;
+}
+unsigned long CPUFUNC(op_44f8_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2239;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2239: ;
+return 20;
+}
+unsigned long CPUFUNC(op_44f9_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 24; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2240;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2240: ;
+return 24;
+}
+unsigned long CPUFUNC(op_44fa_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2241;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2241: ;
+return 20;
+}
+unsigned long CPUFUNC(op_44fb_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2242;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2242: ;
+return 22;
+}
+unsigned long CPUFUNC(op_44fc_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{{     int16_t src = get_iword_prefetch(2);
+       MakeSR();
+       regs.sr &= 0xFF00;
+       regs.sr |= src & 0xFF;
+       MakeFromSR();
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_4600_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4610_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,dst);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_4618_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,dst);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_4620_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,dst);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_4628_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_4630_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,dst);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_4638_5)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,dst);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_4639_5)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(dst)) == 0);
+       SET_NFLG (((int8_t)(dst)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,dst);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_4640_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4650_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2253;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}endlabel2253: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4658_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2254;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}endlabel2254: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4660_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2255;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}endlabel2255: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4668_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2256;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}endlabel2256: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4670_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2257;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}endlabel2257: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4678_5)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2258;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}endlabel2258: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4679_5)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2259;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(srca,dst);
+}}}}}endlabel2259: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4680_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (dst);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_4690_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2261;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}endlabel2261: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4698_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2262;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}endlabel2262: ;
+return 20;
+}
+unsigned long CPUFUNC(op_46a0_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 22; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2263;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}endlabel2263: ;
+return 22;
+}
+unsigned long CPUFUNC(op_46a8_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 24; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2264;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}endlabel2264: ;
+return 24;
+}
+unsigned long CPUFUNC(op_46b0_5)(uint32_t opcode) /* NOT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 19; CurrentInstrCycles = 26; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2265;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}endlabel2265: ;
+return 26;
+}
+unsigned long CPUFUNC(op_46b8_5)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 24; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2266;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}endlabel2266: ;
+return 24;
+}
+unsigned long CPUFUNC(op_46b9_5)(uint32_t opcode) /* NOT */
+{
+       OpcodeFamily = 19; CurrentInstrCycles = 28; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2267;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      uint32_t dst = ~src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(srca,dst);
+}}}}}endlabel2267: ;
+return 28;
+}
+unsigned long CPUFUNC(op_46c0_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 12; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2268; }
+{{     int16_t src = m68k_dreg(regs, srcreg);
+       regs.sr = src;
+       MakeFromSR();
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2268: ;
+return 12;
+}
+unsigned long CPUFUNC(op_46d0_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2269; }
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2269;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2269: ;
+return 16;
+}
+unsigned long CPUFUNC(op_46d8_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2270; }
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2270;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2270: ;
+return 16;
+}
+unsigned long CPUFUNC(op_46e0_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 18; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2271; }
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2271;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2271: ;
+return 18;
+}
+unsigned long CPUFUNC(op_46e8_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2272; }
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2272;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2272: ;
+return 20;
+}
+unsigned long CPUFUNC(op_46f0_5)(uint32_t opcode) /* MV2SR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 33; CurrentInstrCycles = 22; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2273; }
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2273;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2273: ;
+return 22;
+}
+unsigned long CPUFUNC(op_46f8_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2274; }
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2274;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2274: ;
+return 20;
+}
+unsigned long CPUFUNC(op_46f9_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 24; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2275; }
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2275;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2275: ;
+return 24;
+}
+unsigned long CPUFUNC(op_46fa_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2276; }
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2276;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2276: ;
+return 20;
+}
+unsigned long CPUFUNC(op_46fb_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 22; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2277; }
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2277;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       regs.sr = src;
+       MakeFromSR();
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2277: ;
+return 22;
+}
+unsigned long CPUFUNC(op_46fc_5)(uint32_t opcode) /* MV2SR */
+{
+       OpcodeFamily = 33; CurrentInstrCycles = 16; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2278; }
+{{     int16_t src = get_iword_prefetch(2);
+       regs.sr = src;
+       MakeFromSR();
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2278: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4800_5)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 6;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_4810_5)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,newv);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_4818_5)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,newv);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_4820_5)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,newv);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_4828_5)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,newv);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_4830_5)(uint32_t opcode) /* NBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 17; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,newv);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_4838_5)(uint32_t opcode) /* NBCD */
+{
+       OpcodeFamily = 17; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,newv);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_4839_5)(uint32_t opcode) /* NBCD */
+{
+       OpcodeFamily = 17; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      uint16_t newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = - (src & 0xF0);
+       uint16_t newv;
+       int cflg;
+       if (newv_lo > 9) { newv_lo -= 6; }
+       newv = newv_hi + newv_lo;       cflg = (newv & 0x1F0) > 0x90;
+       if (cflg) newv -= 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,newv);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_4840_5)(uint32_t opcode) /* SWAP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 34; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (dst);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4850_5)(uint32_t opcode) /* PEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 57; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2288;
+       }
+{      m68k_areg (regs, 7) = dsta;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,srca);
+}}}}endlabel2288: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4868_5)(uint32_t opcode) /* PEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 57; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2289;
+       }
+{      m68k_areg (regs, 7) = dsta;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,srca);
+}}}}endlabel2289: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4870_5)(uint32_t opcode) /* PEA */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 57; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2290;
+       }
+{      m68k_areg (regs, 7) = dsta;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,srca);
+}}}}endlabel2290: ;
+return 22;
+}
+unsigned long CPUFUNC(op_4878_5)(uint32_t opcode) /* PEA */
+{
+       OpcodeFamily = 57; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2291;
+       }
+{      m68k_areg (regs, 7) = dsta;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,srca);
+}}}}endlabel2291: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4879_5)(uint32_t opcode) /* PEA */
+{
+       OpcodeFamily = 57; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2292;
+       }
+{      m68k_areg (regs, 7) = dsta;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,srca);
+}}}}endlabel2292: ;
+return 20;
+}
+unsigned long CPUFUNC(op_487a_5)(uint32_t opcode) /* PEA */
+{
+       OpcodeFamily = 57; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2293;
+       }
+{      m68k_areg (regs, 7) = dsta;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,srca);
+}}}}endlabel2293: ;
+return 16;
+}
+unsigned long CPUFUNC(op_487b_5)(uint32_t opcode) /* PEA */
+{
+       OpcodeFamily = 57; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      uint32_t dsta = m68k_areg(regs, 7) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2294;
+       }
+{      m68k_areg (regs, 7) = dsta;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,srca);
+}}}}endlabel2294: ;
+return 22;
+}
+unsigned long CPUFUNC(op_4880_5)(uint32_t opcode) /* EXT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 36; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint16_t dst = (int16_t)(int8_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(dst)) == 0);
+       SET_NFLG (((int16_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4890_5)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 8;  
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2296;
+       }
+{m68k_incpc(4);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}endlabel2296: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_48a0_5)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 8;  
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) - 0;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2297;
+       }
+{m68k_incpc(4);
+fill_prefetch_0 ();
+{      uint16_t amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
+       while (amask) { srca -= 2; m68k_write_memory_16(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; retcycles+=4; }
+       while (dmask) { srca -= 2; m68k_write_memory_16(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; retcycles+=4; }
+       m68k_areg(regs, dstreg) = srca;
+}}}}endlabel2297: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_48a8_5)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2298;
+       }
+{m68k_incpc(6);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}endlabel2298: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_48b0_5)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 14; 
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2299;
+       }
+{m68k_incpc(6);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}endlabel2299: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_48b8_5)(uint32_t opcode) /* MVMLE */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2300;
+       }
+{m68k_incpc(6);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}endlabel2300: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_48b9_5)(uint32_t opcode) /* MVMLE */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = get_ilong_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2301;
+       }
+{m68k_incpc(8);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_16(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_write_memory_16(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}endlabel2301: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_48c0_5)(uint32_t opcode) /* EXT */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 36; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dst = (int32_t)(int16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(dst)) == 0);
+       SET_NFLG (((int32_t)(dst)) < 0);
+       m68k_dreg(regs, srcreg) = (dst);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_48d0_5)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 8;  
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2303;
+       }
+{m68k_incpc(4);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}endlabel2303: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_48e0_5)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 8;  
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) - 0;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2304;
+       }
+{m68k_incpc(4);
+fill_prefetch_0 ();
+{      uint16_t amask = mask & 0xff, dmask = (mask >> 8) & 0xff;
+       while (amask) { srca -= 4; m68k_write_memory_32(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; retcycles+=8; }
+       while (dmask) { srca -= 4; m68k_write_memory_32(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; retcycles+=8; }
+       m68k_areg(regs, dstreg) = srca;
+}}}}endlabel2304: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_48e8_5)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2305;
+       }
+{m68k_incpc(6);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}endlabel2305: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_48f0_5)(uint32_t opcode) /* MVMLE */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 14; 
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2306;
+       }
+{m68k_incpc(6);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}endlabel2306: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_48f8_5)(uint32_t opcode) /* MVMLE */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2307;
+       }
+{m68k_incpc(6);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}endlabel2307: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_48f9_5)(uint32_t opcode) /* MVMLE */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 38; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword_prefetch(2);
+       retcycles = 0;
+{      uint32_t srca = get_ilong_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2308;
+       }
+{m68k_incpc(8);
+fill_prefetch_0 ();
+{      uint16_t dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       while (dmask) { m68k_write_memory_32(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_write_memory_32(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}endlabel2308: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4a00_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4a10_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_4a18_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_4a20_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_4a28_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_4a30_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_4a38_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_4a39_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_4a3a_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_4a3b_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_4a3c_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_4a40_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4a48_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4a50_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2322;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2322: ;
+return 8;
+}
+unsigned long CPUFUNC(op_4a58_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2323;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2323: ;
+return 8;
+}
+unsigned long CPUFUNC(op_4a60_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2324;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2324: ;
+return 10;
+}
+unsigned long CPUFUNC(op_4a68_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2325;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2325: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4a70_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2326;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2326: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4a78_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2327;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2327: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4a79_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2328;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2328: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4a7a_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2329;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2329: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4a7b_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2330;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2330: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4a7c_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_4a80_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4a88_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 4;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4a90_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2334;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2334: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4a98_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2335;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2335: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4aa0_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2336;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2336: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4aa8_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2337;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2337: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4ab0_5)(uint32_t opcode) /* TST */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 20; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2338;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2338: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4ab8_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2339;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2339: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4ab9_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2340;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2340: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4aba_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2341;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2341: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4abb_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2342;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2342: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4abc_5)(uint32_t opcode) /* TST */
+{
+       OpcodeFamily = 20; CurrentInstrCycles = 12; 
+{{     int32_t src = get_ilong_prefetch(2);
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_4ac0_5)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff);
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4ad0_5)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,src);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_4ad8_5)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,src);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_4ae0_5)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,src);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_4ae8_5)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,src);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_4af0_5)(uint32_t opcode) /* TAS */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 98; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,src);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_4af8_5)(uint32_t opcode) /* TAS */
+{
+       OpcodeFamily = 98; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,src);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_4af9_5)(uint32_t opcode) /* TAS */
+{
+       OpcodeFamily = 98; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       src |= 0x80;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,src);
+}}}return 22;
+}
+unsigned long CPUFUNC(op_4c90_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2352;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2352: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_4c98_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2353;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+       m68k_areg(regs, dstreg) = srca;
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2353: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_4ca8_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2354;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2354: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cb0_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 18; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2355;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2355: ;
+ return (18+retcycles);
+}
+unsigned long CPUFUNC(op_4cb8_5)(uint32_t opcode) /* MVMEL */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2356;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2356: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cb9_5)(uint32_t opcode) /* MVMEL */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 20; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = get_ilong_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2357;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+endlabel2357: ;
+ return (20+retcycles);
+}
+unsigned long CPUFUNC(op_4cba_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = 2;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_getpc () + 4;
+       srca += (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2358;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2358: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cbb_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = 3;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 18; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2359;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = (int32_t)(int16_t)m68k_read_memory_16(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2359: ;
+ return (18+retcycles);
+}
+unsigned long CPUFUNC(op_4cd0_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2360;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2360: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_4cd8_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 12; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2361;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+       m68k_areg(regs, dstreg) = srca;
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2361: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_4ce8_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2362;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2362: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cf0_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 18; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2363;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2363: ;
+ return (18+retcycles);
+}
+unsigned long CPUFUNC(op_4cf8_5)(uint32_t opcode) /* MVMEL */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2364;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2364: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cf9_5)(uint32_t opcode) /* MVMEL */
+{
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 20; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = get_ilong_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 8;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2365;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}m68k_incpc(8);
+fill_prefetch_0 ();
+endlabel2365: ;
+ return (20+retcycles);
+}
+unsigned long CPUFUNC(op_4cfa_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = 2;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 16; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t srca = m68k_getpc () + 4;
+       srca += (int32_t)(int16_t)get_iword_prefetch(4);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2366;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2366: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_4cfb_5)(uint32_t opcode) /* MVMEL */
+{
+       uint32_t dstreg = 3;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 37; CurrentInstrCycles = 18; 
+{      uint16_t mask = get_iword_prefetch(2);
+       unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;
+       retcycles = 0;
+{      uint32_t tmppc = m68k_getpc() + 4;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(4));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2367;
+       }
+{{     while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = m68k_read_memory_32(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; }
+       while (amask) { m68k_areg(regs, movem_index1[amask]) = m68k_read_memory_32(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; }
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2367: ;
+ return (18+retcycles);
+}
+unsigned long CPUFUNC(op_4e40_5)(uint32_t opcode) /* TRAP */
+{
+       uint32_t srcreg = (opcode & 15);
+       OpcodeFamily = 39; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       Exception(src+32,0,M68000_EXC_SRC_CPU);
+}}return 4;
+}
+unsigned long CPUFUNC(op_4e50_5)(uint32_t opcode) /* LINK */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 47; CurrentInstrCycles = 18; 
+{{     uint32_t olda = m68k_areg(regs, 7) - 4;
+       if ((olda & 1) != 0) {
+               last_fault_for_exception_3 = olda;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2369;
+       }
+{      m68k_areg (regs, 7) = olda;
+{      int32_t src = m68k_areg(regs, srcreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(olda,src);
+       m68k_areg(regs, srcreg) = (m68k_areg(regs, 7));
+{      int16_t offs = get_iword_prefetch(0);
+       m68k_areg(regs, 7) += offs;
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2369: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4e58_5)(uint32_t opcode) /* UNLK */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 48; CurrentInstrCycles = 12; 
+{{     int32_t src = m68k_areg(regs, srcreg);
+       m68k_areg(regs, 7) = src;
+{      uint32_t olda = m68k_areg(regs, 7);
+       if ((olda & 1) != 0) {
+               last_fault_for_exception_3 = olda;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2370;
+       }
+{{     int32_t old = m68k_read_memory_32(olda);
+       m68k_areg(regs, 7) += 4;
+       m68k_areg(regs, srcreg) = (old);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2370: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4e60_5)(uint32_t opcode) /* MVR2USP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 40; CurrentInstrCycles = 4;  
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2371; }
+{{     int32_t src = m68k_areg(regs, srcreg);
+       regs.usp = src;
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2371: ;
+return 4;
+}
+unsigned long CPUFUNC(op_4e68_5)(uint32_t opcode) /* MVUSP2R */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 41; CurrentInstrCycles = 4;  
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2372; }
+{{     m68k_areg(regs, srcreg) = (regs.usp);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2372: ;
+return 4;
+}
+unsigned long CPUFUNC(op_4e70_5)(uint32_t opcode) /* RESET */
+{
+       OpcodeFamily = 42; CurrentInstrCycles = 132;
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2373; }
+{}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2373: ;
+return 132;
+}
+unsigned long CPUFUNC(op_4e71_5)(uint32_t opcode) /* NOP */
+{
+       OpcodeFamily = 43; CurrentInstrCycles = 4;  
+{}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_4e72_5)(uint32_t opcode) /* STOP */
+{
+       OpcodeFamily = 44; CurrentInstrCycles = 4;  
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2375; }
+{{     int16_t src = get_iword_prefetch(2);
+       regs.sr = src;
+       MakeFromSR();
+       m68k_setstopped(1);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2375: ;
+return 4;
+}
+unsigned long CPUFUNC(op_4e73_5)(uint32_t opcode) /* RTE */
+{
+       OpcodeFamily = 45; CurrentInstrCycles = 20; 
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2376; }
+{{     uint32_t sra = m68k_areg(regs, 7);
+       if ((sra & 1) != 0) {
+               last_fault_for_exception_3 = sra;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2376;
+       }
+{{     int16_t sr = m68k_read_memory_16(sra);
+       m68k_areg(regs, 7) += 2;
+{      uint32_t pca = m68k_areg(regs, 7);
+       if ((pca & 1) != 0) {
+               last_fault_for_exception_3 = pca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2376;
+       }
+{{     int32_t pc = m68k_read_memory_32(pca);
+       m68k_areg(regs, 7) += 4;
+       regs.sr = sr; m68k_setpc_rte(pc);
+fill_prefetch_0 ();
+       MakeFromSR();
+}}}}}}}}endlabel2376: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4e74_5)(uint32_t opcode) /* RTD */
+{
+       OpcodeFamily = 46; CurrentInstrCycles = 16; 
+{{     uint32_t pca = m68k_areg(regs, 7);
+       if ((pca & 1) != 0) {
+               last_fault_for_exception_3 = pca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2377;
+       }
+{{     int32_t pc = m68k_read_memory_32(pca);
+       m68k_areg(regs, 7) += 4;
+{      int16_t offs = get_iword_prefetch(2);
+       m68k_areg(regs, 7) += offs;
+       m68k_setpc_rte(pc);
+fill_prefetch_0 ();
+}}}}}endlabel2377: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4e75_5)(uint32_t opcode) /* RTS */
+{
+       OpcodeFamily = 49; CurrentInstrCycles = 16; 
+{      m68k_do_rts();
+fill_prefetch_0 ();
+}return 16;
+}
+unsigned long CPUFUNC(op_4e76_5)(uint32_t opcode) /* TRAPV */
+{
+       OpcodeFamily = 50; CurrentInstrCycles = 4;  
+{m68k_incpc(2);
+fill_prefetch_2 ();
+       if (GET_VFLG) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel2379; }
+}endlabel2379: ;
+return 4;
+}
+unsigned long CPUFUNC(op_4e77_5)(uint32_t opcode) /* RTR */
+{
+       OpcodeFamily = 51; CurrentInstrCycles = 20; 
+{      MakeSR();
+{      uint32_t sra = m68k_areg(regs, 7);
+       if ((sra & 1) != 0) {
+               last_fault_for_exception_3 = sra;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2380;
+       }
+{{     int16_t sr = m68k_read_memory_16(sra);
+       m68k_areg(regs, 7) += 2;
+{      uint32_t pca = m68k_areg(regs, 7);
+       if ((pca & 1) != 0) {
+               last_fault_for_exception_3 = pca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2380;
+       }
+{{     int32_t pc = m68k_read_memory_32(pca);
+       m68k_areg(regs, 7) += 4;
+       regs.sr &= 0xFF00; sr &= 0xFF;
+       regs.sr |= sr; m68k_setpc(pc);
+fill_prefetch_0 ();
+       MakeFromSR();
+}}}}}}}endlabel2380: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4e90_5)(uint32_t opcode) /* JSR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 52; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       uint32_t oldpc = m68k_getpc () + 2;
+       if (srca & 1) {
+               last_addr_for_exception_3 = oldpc;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2381;
+       }
+       m68k_do_jsr(m68k_getpc() + 2, srca);
+fill_prefetch_0 ();
+}}endlabel2381: ;
+return 16;
+}
+unsigned long CPUFUNC(op_4ea8_5)(uint32_t opcode) /* JSR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 52; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       uint32_t oldpc = m68k_getpc () + 4;
+       if (srca & 1) {
+               last_addr_for_exception_3 = oldpc;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2382;
+       }
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+fill_prefetch_0 ();
+}}endlabel2382: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4eb0_5)(uint32_t opcode) /* JSR */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 52; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       uint32_t oldpc = m68k_getpc () + 4;
+       if (srca & 1) {
+               last_addr_for_exception_3 = oldpc;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2383;
+       }
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+fill_prefetch_0 ();
+}}endlabel2383: ;
+return 22;
+}
+unsigned long CPUFUNC(op_4eb8_5)(uint32_t opcode) /* JSR */
+{
+       OpcodeFamily = 52; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       uint32_t oldpc = m68k_getpc () + 4;
+       if (srca & 1) {
+               last_addr_for_exception_3 = oldpc;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2384;
+       }
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+fill_prefetch_0 ();
+}}endlabel2384: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4eb9_5)(uint32_t opcode) /* JSR */
+{
+       OpcodeFamily = 52; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       uint32_t oldpc = m68k_getpc () + 6;
+       if (srca & 1) {
+               last_addr_for_exception_3 = oldpc;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2385;
+       }
+       m68k_do_jsr(m68k_getpc() + 6, srca);
+fill_prefetch_0 ();
+}}endlabel2385: ;
+return 20;
+}
+unsigned long CPUFUNC(op_4eba_5)(uint32_t opcode) /* JSR */
+{
+       OpcodeFamily = 52; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       uint32_t oldpc = m68k_getpc () + 4;
+       if (srca & 1) {
+               last_addr_for_exception_3 = oldpc;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2386;
+       }
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+fill_prefetch_0 ();
+}}endlabel2386: ;
+return 18;
+}
+unsigned long CPUFUNC(op_4ebb_5)(uint32_t opcode) /* JSR */
+{
+       OpcodeFamily = 52; CurrentInstrCycles = 22; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       uint32_t oldpc = m68k_getpc () + 4;
+       if (srca & 1) {
+               last_addr_for_exception_3 = oldpc;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2387;
+       }
+       m68k_do_jsr(m68k_getpc() + 4, srca);
+fill_prefetch_0 ();
+}}endlabel2387: ;
+return 22;
+}
+unsigned long CPUFUNC(op_4ed0_5)(uint32_t opcode) /* JMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 53; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if (srca & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2388;
+       }
+       m68k_setpc(srca);
+fill_prefetch_0 ();
+}}endlabel2388: ;
+return 8;
+}
+unsigned long CPUFUNC(op_4ee8_5)(uint32_t opcode) /* JMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 53; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if (srca & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2389;
+       }
+       m68k_setpc(srca);
+fill_prefetch_0 ();
+}}endlabel2389: ;
+return 10;
+}
+unsigned long CPUFUNC(op_4ef0_5)(uint32_t opcode) /* JMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 53; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if (srca & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2390;
+       }
+       m68k_setpc(srca);
+fill_prefetch_0 ();
+}}endlabel2390: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4ef8_5)(uint32_t opcode) /* JMP */
+{
+       OpcodeFamily = 53; CurrentInstrCycles = 10; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if (srca & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2391;
+       }
+       m68k_setpc(srca);
+fill_prefetch_0 ();
+}}endlabel2391: ;
+return 10;
+}
+unsigned long CPUFUNC(op_4ef9_5)(uint32_t opcode) /* JMP */
+{
+       OpcodeFamily = 53; CurrentInstrCycles = 12; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if (srca & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2392;
+       }
+       m68k_setpc(srca);
+fill_prefetch_0 ();
+}}endlabel2392: ;
+return 12;
+}
+unsigned long CPUFUNC(op_4efa_5)(uint32_t opcode) /* JMP */
+{
+       OpcodeFamily = 53; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if (srca & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2393;
+       }
+       m68k_setpc(srca);
+fill_prefetch_0 ();
+}}endlabel2393: ;
+return 10;
+}
+unsigned long CPUFUNC(op_4efb_5)(uint32_t opcode) /* JMP */
+{
+       OpcodeFamily = 53; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if (srca & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2394;
+       }
+       m68k_setpc(srca);
+fill_prefetch_0 ();
+}}endlabel2394: ;
+return 14;
+}
+unsigned long CPUFUNC(op_5000_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5010_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_5018_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 12;
+}
+#endif
+
+#ifdef PART_5
+unsigned long CPUFUNC(op_5020_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 14;
+}
+unsigned long CPUFUNC(op_5028_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_5030_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_5038_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_5039_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_5040_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5048_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_5050_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2405;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2405: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5058_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2406;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2406: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5060_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2407;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2407: ;
+return 14;
+}
+unsigned long CPUFUNC(op_5068_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2408;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2408: ;
+return 16;
+}
+unsigned long CPUFUNC(op_5070_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2409;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2409: ;
+return 18;
+}
+unsigned long CPUFUNC(op_5078_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2410;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2410: ;
+return 16;
+}
+unsigned long CPUFUNC(op_5079_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2411;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2411: ;
+return 20;
+}
+unsigned long CPUFUNC(op_5080_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_5088_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_5090_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2414;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2414: ;
+return 20;
+}
+unsigned long CPUFUNC(op_5098_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2415;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2415: ;
+return 20;
+}
+unsigned long CPUFUNC(op_50a0_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2416;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2416: ;
+return 22;
+}
+unsigned long CPUFUNC(op_50a8_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2417;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2417: ;
+return 24;
+}
+unsigned long CPUFUNC(op_50b0_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 26; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2418;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2418: ;
+return 26;
+}
+unsigned long CPUFUNC(op_50b8_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2419;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2419: ;
+return 24;
+}
+unsigned long CPUFUNC(op_50b9_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 11; CurrentInstrCycles = 28; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2420;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2420: ;
+return 28;
+}
+unsigned long CPUFUNC(op_50c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(0) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_50c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(0)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2422;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2422: ;
+return 12;
+}
+unsigned long CPUFUNC(op_50d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(0) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_50d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(0) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_50e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(0) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_50e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(0) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_50f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(0) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_50f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(0) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_50f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(0) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_5100_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5110_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_5118_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_5120_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 14;
+}
+unsigned long CPUFUNC(op_5128_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_5130_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_5138_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_5139_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_5140_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5148_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_5150_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2440;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2440: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5158_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2441;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2441: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5160_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2442;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2442: ;
+return 14;
+}
+unsigned long CPUFUNC(op_5168_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2443;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2443: ;
+return 16;
+}
+unsigned long CPUFUNC(op_5170_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2444;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2444: ;
+return 18;
+}
+unsigned long CPUFUNC(op_5178_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2445;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2445: ;
+return 16;
+}
+unsigned long CPUFUNC(op_5179_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2446;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2446: ;
+return 20;
+}
+unsigned long CPUFUNC(op_5180_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_5188_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_5190_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2449;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2449: ;
+return 20;
+}
+unsigned long CPUFUNC(op_5198_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2450;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2450: ;
+return 20;
+}
+unsigned long CPUFUNC(op_51a0_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2451;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2451: ;
+return 22;
+}
+unsigned long CPUFUNC(op_51a8_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2452;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2452: ;
+return 24;
+}
+unsigned long CPUFUNC(op_51b0_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 26; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2453;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2453: ;
+return 26;
+}
+unsigned long CPUFUNC(op_51b8_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2454;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2454: ;
+return 24;
+}
+unsigned long CPUFUNC(op_51b9_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       OpcodeFamily = 7; CurrentInstrCycles = 28; 
+{{     uint32_t src = srcreg;
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2455;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2455: ;
+return 28;
+}
+unsigned long CPUFUNC(op_51c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(1) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_51c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(1)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2457;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2457: ;
+return 12;
+}
+unsigned long CPUFUNC(op_51d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(1) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_51d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(1) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_51e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(1) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_51e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(1) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_51f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(1) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_51f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(1) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_51f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(1) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_52c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(2) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_52c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(2)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2466;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2466: ;
+return 12;
+}
+unsigned long CPUFUNC(op_52d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(2) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_52d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(2) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_52e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(2) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_52e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(2) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_52f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(2) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_52f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(2) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_52f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(2) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_53c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(3) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_53c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(3)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2475;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2475: ;
+return 12;
+}
+unsigned long CPUFUNC(op_53d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(3) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_53d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(3) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_53e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(3) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_53e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(3) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_53f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(3) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_53f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(3) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_53f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(3) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_54c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(4) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_54c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(4)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2484;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2484: ;
+return 12;
+}
+unsigned long CPUFUNC(op_54d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(4) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_54d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(4) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_54e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(4) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_54e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(4) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_54f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(4) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_54f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(4) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_54f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(4) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_55c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(5) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_55c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(5)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2493;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2493: ;
+return 12;
+}
+unsigned long CPUFUNC(op_55d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(5) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_55d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(5) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_55e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(5) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_55e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(5) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_55f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(5) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_55f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(5) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_55f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(5) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_56c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(6) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_56c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(6)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2502;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2502: ;
+return 12;
+}
+unsigned long CPUFUNC(op_56d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(6) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_56d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(6) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_56e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(6) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_56e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(6) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_56f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(6) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_56f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(6) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_56f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(6) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_57c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(7) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_57c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(7)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2511;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2511: ;
+return 12;
+}
+unsigned long CPUFUNC(op_57d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(7) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_57d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(7) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_57e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(7) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_57e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(7) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_57f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(7) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_57f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(7) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_57f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(7) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_58c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(8) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_58c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(8)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2520;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2520: ;
+return 12;
+}
+unsigned long CPUFUNC(op_58d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(8) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_58d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(8) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_58e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(8) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_58e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(8) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_58f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(8) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_58f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(8) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_58f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(8) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_59c0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(9) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_59c8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(9)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2529;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2529: ;
+return 12;
+}
+unsigned long CPUFUNC(op_59d0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(9) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_59d8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(9) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_59e0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(9) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_59e8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(9) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_59f0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(9) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_59f8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(9) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_59f9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(9) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_5ac0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(10) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5ac8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(10)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2538;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2538: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5ad0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(10) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5ad8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(10) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5ae0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(10) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_5ae8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(10) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5af0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(10) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_5af8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(10) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5af9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(10) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_5bc0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(11) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5bc8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(11)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2547;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2547: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5bd0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(11) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5bd8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(11) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5be0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(11) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_5be8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(11) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5bf0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(11) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_5bf8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(11) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5bf9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(11) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_5cc0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(12) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5cc8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(12)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2556;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2556: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5cd0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(12) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5cd8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(12) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5ce0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(12) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_5ce8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(12) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5cf0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(12) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_5cf8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(12) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5cf9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(12) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_5dc0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(13) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5dc8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(13)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2565;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2565: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5dd0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(13) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5dd8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(13) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5de0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(13) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_5de8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(13) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5df0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(13) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_5df8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(13) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5df9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(13) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_5ec0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(14) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5ec8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(14)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2574;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2574: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5ed0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(14) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5ed8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(14) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5ee0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(14) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+unsigned long CPUFUNC(op_5ee8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(14) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5ef0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(14) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_5ef8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(14) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5ef9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(14) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_5fc0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 4;  
+{{{    int val = cctrue(15) ? 0xff : 0;
+       m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff);
+       if (val) { m68k_incpc(2) ; return 4+2; }
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_5fc8_5)(uint32_t opcode) /* DBcc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 58; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t offs = get_iword_prefetch(2);
+       if (!cctrue(15)) {
+               m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff);
+               if (src) {
+                       if (offs & 1) {
+                       last_addr_for_exception_3 = m68k_getpc() + 2 + 2;
+                       last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)offs + 2;
+                       last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2583;
+               }
+                       m68k_incpc((int32_t)offs + 2);
+fill_prefetch_0 ();
+                       return 10;
+               } else {
+                       m68k_incpc(4);
+fill_prefetch_0 ();
+                       return 14;
+               }
+       }
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2583: ;
+return 12;
+}
+unsigned long CPUFUNC(op_5fd0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int val = cctrue(15) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5fd8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int val = cctrue(15) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 12;
+}
+unsigned long CPUFUNC(op_5fe0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+       m68k_areg (regs, srcreg) = srca;
+{      int val = cctrue(15) ? 0xff : 0;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(srca,val);
+}}}return 14;
+}
+#endif
+
+#ifdef PART_6
+unsigned long CPUFUNC(op_5fe8_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(15) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5ff0_5)(uint32_t opcode) /* Scc */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 59; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int val = cctrue(15) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 18;
+}
+unsigned long CPUFUNC(op_5ff8_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int val = cctrue(15) ? 0xff : 0;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 16;
+}
+unsigned long CPUFUNC(op_5ff9_5)(uint32_t opcode) /* Scc */
+{
+       OpcodeFamily = 59; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int val = cctrue(15) ? 0xff : 0;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(srca,val);
+}}}return 20;
+}
+unsigned long CPUFUNC(op_6000_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(0)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2591;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2591: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6001_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(0)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2592;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2592: ;
+return 8;
+}
+unsigned long CPUFUNC(op_60ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(0)) goto endlabel2593;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2593;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(0)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2593;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2593: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6100_5)(uint32_t opcode) /* BSR */
+{
+       OpcodeFamily = 54; CurrentInstrCycles = 18; 
+{{     int16_t src = get_iword_prefetch(2);
+       int32_t s = (int32_t)src + 2;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + s;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2594;
+       }
+       m68k_do_bsr(m68k_getpc() + 4, s);
+fill_prefetch_0 ();
+}}endlabel2594: ;
+return 18;
+}
+unsigned long CPUFUNC(op_6101_5)(uint32_t opcode) /* BSR */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 54; CurrentInstrCycles = 18; 
+{{     uint32_t src = srcreg;
+       int32_t s = (int32_t)src + 2;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + s;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2595;
+       }
+       m68k_do_bsr(m68k_getpc() + 2, s);
+fill_prefetch_0 ();
+}}endlabel2595: ;
+return 18;
+}
+unsigned long CPUFUNC(op_61ff_5)(uint32_t opcode) /* BSR */
+{
+       OpcodeFamily = 54; CurrentInstrCycles = 18; 
+{{     int32_t src = get_ilong_prefetch(2);
+       int32_t s = (int32_t)src + 2;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + s;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2596;
+       }
+       m68k_do_bsr(m68k_getpc() + 6, s);
+fill_prefetch_0 ();
+}}endlabel2596: ;
+return 18;
+}
+unsigned long CPUFUNC(op_6200_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(2)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2597;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2597: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6201_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(2)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2598;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2598: ;
+return 8;
+}
+unsigned long CPUFUNC(op_62ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(2)) goto endlabel2599;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2599;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(2)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2599;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2599: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6300_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(3)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2600;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2600: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6301_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(3)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2601;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2601: ;
+return 8;
+}
+unsigned long CPUFUNC(op_63ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(3)) goto endlabel2602;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2602;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(3)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2602;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2602: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6400_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(4)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2603;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2603: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6401_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(4)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2604;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2604: ;
+return 8;
+}
+unsigned long CPUFUNC(op_64ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(4)) goto endlabel2605;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2605;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(4)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2605;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2605: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6500_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(5)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2606;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2606: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6501_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(5)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2607;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2607: ;
+return 8;
+}
+unsigned long CPUFUNC(op_65ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(5)) goto endlabel2608;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2608;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(5)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2608;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2608: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6600_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(6)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2609;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2609: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6601_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(6)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2610;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2610: ;
+return 8;
+}
+unsigned long CPUFUNC(op_66ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(6)) goto endlabel2611;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2611;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(6)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2611;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2611: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6700_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(7)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2612;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2612: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6701_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(7)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2613;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2613: ;
+return 8;
+}
+unsigned long CPUFUNC(op_67ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(7)) goto endlabel2614;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2614;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(7)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2614;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2614: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6800_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(8)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2615;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2615: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6801_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(8)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2616;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2616: ;
+return 8;
+}
+unsigned long CPUFUNC(op_68ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(8)) goto endlabel2617;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2617;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(8)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2617;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2617: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6900_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(9)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2618;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2618: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6901_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(9)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2619;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2619: ;
+return 8;
+}
+unsigned long CPUFUNC(op_69ff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(9)) goto endlabel2620;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2620;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(9)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2620;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2620: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6a00_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(10)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2621;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2621: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6a01_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(10)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2622;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2622: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6aff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(10)) goto endlabel2623;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2623;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(10)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2623;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2623: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6b00_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(11)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2624;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2624: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6b01_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(11)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2625;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2625: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6bff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(11)) goto endlabel2626;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2626;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(11)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2626;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2626: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6c00_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(12)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2627;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2627: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6c01_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(12)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2628;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2628: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6cff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(12)) goto endlabel2629;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2629;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(12)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2629;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2629: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6d00_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(13)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2630;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2630: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6d01_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(13)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2631;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2631: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6dff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(13)) goto endlabel2632;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2632;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(13)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2632;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2632: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6e00_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(14)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2633;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2633: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6e01_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(14)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2634;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2634: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6eff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(14)) goto endlabel2635;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2635;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(14)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2635;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2635: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6f00_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+       if (!cctrue(15)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2636;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2636: ;
+return 12;
+}
+unsigned long CPUFUNC(op_6f01_5)(uint32_t opcode) /* Bcc */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       OpcodeFamily = 55; CurrentInstrCycles = 8;  
+{{     uint32_t src = srcreg;
+       if (!cctrue(15)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2637;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2637: ;
+return 8;
+}
+unsigned long CPUFUNC(op_6fff_5)(uint32_t opcode) /* Bcc */
+{
+       OpcodeFamily = 55; CurrentInstrCycles = 12; 
+{      m68k_incpc(2);
+       if (!cctrue(15)) goto endlabel2638;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 1;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2638;
+{      int32_t src = get_ilong_prefetch(2);
+       if (!cctrue(15)) goto didnt_jump;
+       if (src & 1) {
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               last_fault_for_exception_3 = m68k_getpc() + 2 + (int32_t)src;
+               last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2638;
+       }
+       m68k_incpc ((int32_t)src + 2);
+fill_prefetch_0 ();
+       return 10;
+didnt_jump:;
+}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2638: ;
+return 12;
+}
+unsigned long CPUFUNC(op_7000_5)(uint32_t opcode) /* MOVE */
+{
+       uint32_t srcreg = (int32_t)(int8_t)(opcode & 255);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 30; CurrentInstrCycles = 4;  
+{{     uint32_t src = srcreg;
+{      CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_8000_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_8010_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_8018_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_8020_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_8028_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_8030_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_8038_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_8039_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_803a_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_803b_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_803c_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_8040_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_8050_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2652;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2652: ;
+return 8;
+}
+unsigned long CPUFUNC(op_8058_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2653;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2653: ;
+return 8;
+}
+unsigned long CPUFUNC(op_8060_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2654;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2654: ;
+return 10;
+}
+unsigned long CPUFUNC(op_8068_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2655;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2655: ;
+return 12;
+}
+unsigned long CPUFUNC(op_8070_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2656;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2656: ;
+return 14;
+}
+unsigned long CPUFUNC(op_8078_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2657;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2657: ;
+return 12;
+}
+unsigned long CPUFUNC(op_8079_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2658;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2658: ;
+return 16;
+}
+unsigned long CPUFUNC(op_807a_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2659;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2659: ;
+return 12;
+}
+unsigned long CPUFUNC(op_807b_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2660;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2660: ;
+return 14;
+}
+unsigned long CPUFUNC(op_807c_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_8080_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_8090_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2663;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2663: ;
+return 14;
+}
+unsigned long CPUFUNC(op_8098_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2664;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2664: ;
+return 14;
+}
+unsigned long CPUFUNC(op_80a0_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2665;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2665: ;
+return 16;
+}
+unsigned long CPUFUNC(op_80a8_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2666;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2666: ;
+return 18;
+}
+unsigned long CPUFUNC(op_80b0_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2667;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2667: ;
+return 20;
+}
+unsigned long CPUFUNC(op_80b8_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2668;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2668: ;
+return 18;
+}
+unsigned long CPUFUNC(op_80b9_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2669;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2669: ;
+return 22;
+}
+unsigned long CPUFUNC(op_80ba_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2670;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2670: ;
+return 18;
+}
+unsigned long CPUFUNC(op_80bb_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2671;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2671: ;
+return 20;
+}
+unsigned long CPUFUNC(op_80bc_5)(uint32_t opcode) /* OR */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_80c0_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 4;  
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2673; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}endlabel2673: ;
+ return (4+retcycles);
+}
+unsigned long CPUFUNC(op_80d0_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2674;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2674; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2674: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_80d8_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2675;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2675; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2675: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_80e0_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 10; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2676;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2676; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2676: ;
+ return (10+retcycles);
+}
+unsigned long CPUFUNC(op_80e8_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2677;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2677; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2677: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_80f0_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2678;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2678; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2678: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_80f8_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2679;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2679; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2679: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_80f9_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 16; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2680;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2680; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2680: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_80fa_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2681;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2681; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2681: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_80fb_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2682;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2682; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}}}endlabel2682: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_80fc_5)(uint32_t opcode) /* DIVU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 60; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2683; } else {
+       uint32_t newv = (uint32_t)dst / (uint32_t)(uint16_t)src;
+       uint32_t rem = (uint32_t)dst % (uint32_t)(uint16_t)src;
+       if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivu68kCycles((uint32_t)dst, (uint16_t)src);
+}}}endlabel2683: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_8100_5)(uint32_t opcode) /* SBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 10; CurrentInstrCycles = 6;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      uint16_t newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = (dst & 0xF0) - (src & 0xF0);
+       uint16_t newv, tmp_newv;
+       int bcd = 0;
+       newv = tmp_newv = newv_hi + newv_lo;
+       if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
+       if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
+       SET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       SET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_8108_5)(uint32_t opcode) /* SBCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 10; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint16_t newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = (dst & 0xF0) - (src & 0xF0);
+       uint16_t newv, tmp_newv;
+       int bcd = 0;
+       newv = tmp_newv = newv_hi + newv_lo;
+       if (newv_lo & 0xF0) { newv -= 6; bcd = 6; };
+       if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }
+       SET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       SET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_8110_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_8118_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_8120_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_8128_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_8130_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_8138_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_8139_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_8150_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2693;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2693: ;
+return 12;
+}
+unsigned long CPUFUNC(op_8158_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2694;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2694: ;
+return 12;
+}
+unsigned long CPUFUNC(op_8160_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2695;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2695: ;
+return 14;
+}
+unsigned long CPUFUNC(op_8168_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2696;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2696: ;
+return 16;
+}
+unsigned long CPUFUNC(op_8170_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2697;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2697: ;
+return 18;
+}
+unsigned long CPUFUNC(op_8178_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2698;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2698: ;
+return 16;
+}
+unsigned long CPUFUNC(op_8179_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2699;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2699: ;
+return 20;
+}
+unsigned long CPUFUNC(op_8190_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2700;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2700: ;
+return 20;
+}
+unsigned long CPUFUNC(op_8198_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2701;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2701: ;
+return 20;
+}
+unsigned long CPUFUNC(op_81a0_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2702;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2702: ;
+return 22;
+}
+unsigned long CPUFUNC(op_81a8_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2703;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2703: ;
+return 24;
+}
+unsigned long CPUFUNC(op_81b0_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 1; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2704;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2704: ;
+return 26;
+}
+unsigned long CPUFUNC(op_81b8_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2705;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2705: ;
+return 24;
+}
+unsigned long CPUFUNC(op_81b9_5)(uint32_t opcode) /* OR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 1; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2706;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src |= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2706: ;
+return 28;
+}
+unsigned long CPUFUNC(op_81c0_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 4;  
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2707; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}endlabel2707: ;
+ return (4+retcycles);
+}
+unsigned long CPUFUNC(op_81d0_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2708;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2708; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2708: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_81d8_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2709;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2709; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2709: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_81e0_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 10; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2710;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2710; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2710: ;
+ return (10+retcycles);
+}
+unsigned long CPUFUNC(op_81e8_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2711;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2711; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2711: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_81f0_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2712;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2712; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2712: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_81f8_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2713;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2713; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2713: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_81f9_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 16; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2714;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2714; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2714: ;
+ return (16+retcycles);
+}
+unsigned long CPUFUNC(op_81fa_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 12; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2715;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2715; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2715: ;
+ return (12+retcycles);
+}
+unsigned long CPUFUNC(op_81fb_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 14; 
+{      uint32_t oldpc = m68k_getpc();
+{      uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2716;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2716; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}}}endlabel2716: ;
+ return (14+retcycles);
+}
+unsigned long CPUFUNC(op_81fc_5)(uint32_t opcode) /* DIVS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 61; CurrentInstrCycles = 8;  
+{      uint32_t oldpc = m68k_getpc();
+{      int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2717; } else {
+       int32_t newv = (int32_t)dst / (int32_t)(int16_t)src;
+       uint16_t rem = (int32_t)dst % (int32_t)(int16_t)src;
+       if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else
+       {
+       if (((int16_t)rem < 0) != ((int32_t)dst < 0)) rem = -rem;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_NFLG (((int16_t)(newv)) < 0);
+       newv = (newv & 0xffff) | ((uint32_t)rem << 16);
+       m68k_dreg(regs, dstreg) = (newv);
+       }
+       }
+       retcycles = getDivs68kCycles((int32_t)dst, (int16_t)src);
+}}}endlabel2717: ;
+ return (8+retcycles);
+}
+unsigned long CPUFUNC(op_9000_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_9010_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_9018_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_9020_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_9028_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_9030_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_9038_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_9039_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_903a_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_903b_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_903c_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_9040_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_9048_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_9050_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2731;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2731: ;
+return 8;
+}
+unsigned long CPUFUNC(op_9058_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2732;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2732: ;
+return 8;
+}
+unsigned long CPUFUNC(op_9060_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2733;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2733: ;
+return 10;
+}
+unsigned long CPUFUNC(op_9068_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2734;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2734: ;
+return 12;
+}
+unsigned long CPUFUNC(op_9070_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2735;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2735: ;
+return 14;
+}
+unsigned long CPUFUNC(op_9078_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2736;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2736: ;
+return 12;
+}
+unsigned long CPUFUNC(op_9079_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2737;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2737: ;
+return 16;
+}
+unsigned long CPUFUNC(op_907a_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2738;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2738: ;
+return 12;
+}
+unsigned long CPUFUNC(op_907b_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2739;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2739: ;
+return 14;
+}
+unsigned long CPUFUNC(op_907c_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_9080_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_9088_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_9090_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2743;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2743: ;
+return 14;
+}
+unsigned long CPUFUNC(op_9098_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2744;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2744: ;
+return 14;
+}
+unsigned long CPUFUNC(op_90a0_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2745;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2745: ;
+return 16;
+}
+unsigned long CPUFUNC(op_90a8_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2746;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2746: ;
+return 18;
+}
+unsigned long CPUFUNC(op_90b0_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2747;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2747: ;
+return 20;
+}
+unsigned long CPUFUNC(op_90b8_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2748;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2748: ;
+return 18;
+}
+unsigned long CPUFUNC(op_90b9_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2749;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2749: ;
+return 22;
+}
+unsigned long CPUFUNC(op_90ba_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2750;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2750: ;
+return 18;
+}
+unsigned long CPUFUNC(op_90bb_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2751;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2751: ;
+return 20;
+}
+unsigned long CPUFUNC(op_90bc_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_90c0_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_90c8_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_90d0_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2755;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2755: ;
+return 12;
+}
+unsigned long CPUFUNC(op_90d8_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2756;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2756: ;
+return 12;
+}
+unsigned long CPUFUNC(op_90e0_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2757;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2757: ;
+return 14;
+}
+unsigned long CPUFUNC(op_90e8_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2758;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2758: ;
+return 16;
+}
+unsigned long CPUFUNC(op_90f0_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2759;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2759: ;
+return 18;
+}
+unsigned long CPUFUNC(op_90f8_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2760;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2760: ;
+return 16;
+}
+unsigned long CPUFUNC(op_90f9_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2761;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2761: ;
+return 20;
+}
+unsigned long CPUFUNC(op_90fa_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2762;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2762: ;
+return 16;
+}
+unsigned long CPUFUNC(op_90fb_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2763;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2763: ;
+return 18;
+}
+unsigned long CPUFUNC(op_90fc_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_9100_5)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_9108_5)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_9110_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_9118_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_9120_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 14;
+}
+unsigned long CPUFUNC(op_9128_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_9130_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_9138_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_9139_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_9140_5)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_9148_5)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2775;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2775;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}}endlabel2775: ;
+return 18;
+}
+unsigned long CPUFUNC(op_9150_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2776;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2776: ;
+return 12;
+}
+unsigned long CPUFUNC(op_9158_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2777;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2777: ;
+return 12;
+}
+unsigned long CPUFUNC(op_9160_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2778;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2778: ;
+return 14;
+}
+unsigned long CPUFUNC(op_9168_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2779;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2779: ;
+return 16;
+}
+unsigned long CPUFUNC(op_9170_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2780;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2780: ;
+return 18;
+}
+unsigned long CPUFUNC(op_9178_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2781;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2781: ;
+return 16;
+}
+unsigned long CPUFUNC(op_9179_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2782;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel2782: ;
+return 20;
+}
+unsigned long CPUFUNC(op_9180_5)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_9188_5)(uint32_t opcode) /* SUBX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 9; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2784;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2784;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst - src - (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}}endlabel2784: ;
+return 30;
+}
+unsigned long CPUFUNC(op_9190_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2785;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2785: ;
+return 20;
+}
+unsigned long CPUFUNC(op_9198_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2786;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2786: ;
+return 20;
+}
+unsigned long CPUFUNC(op_91a0_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2787;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2787: ;
+return 22;
+}
+unsigned long CPUFUNC(op_91a8_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2788;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2788: ;
+return 24;
+}
+unsigned long CPUFUNC(op_91b0_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 7; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2789;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2789: ;
+return 26;
+}
+unsigned long CPUFUNC(op_91b8_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2790;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2790: ;
+return 24;
+}
+unsigned long CPUFUNC(op_91b9_5)(uint32_t opcode) /* SUB */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 7; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2791;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel2791: ;
+return 28;
+}
+unsigned long CPUFUNC(op_91c0_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_91c8_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_91d0_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2794;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2794: ;
+return 14;
+}
+unsigned long CPUFUNC(op_91d8_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2795;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2795: ;
+return 14;
+}
+unsigned long CPUFUNC(op_91e0_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2796;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2796: ;
+return 16;
+}
+unsigned long CPUFUNC(op_91e8_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2797;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2797: ;
+return 18;
+}
+unsigned long CPUFUNC(op_91f0_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2798;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2798: ;
+return 20;
+}
+unsigned long CPUFUNC(op_91f8_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2799;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2799: ;
+return 18;
+}
+unsigned long CPUFUNC(op_91f9_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2800;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2800: ;
+return 22;
+}
+unsigned long CPUFUNC(op_91fa_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2801;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2801: ;
+return 18;
+}
+unsigned long CPUFUNC(op_91fb_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2802;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2802: ;
+return 20;
+}
+unsigned long CPUFUNC(op_91fc_5)(uint32_t opcode) /* SUBA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 8; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst - src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_b000_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_b010_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_b018_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_b020_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_b028_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_b030_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_b038_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_b039_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_b03a_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_b03b_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+#endif
+
+#ifdef PART_7
+unsigned long CPUFUNC(op_b03c_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_b040_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_b048_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_b050_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2817;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2817: ;
+return 8;
+}
+unsigned long CPUFUNC(op_b058_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2818;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2818: ;
+return 8;
+}
+unsigned long CPUFUNC(op_b060_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2819;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2819: ;
+return 10;
+}
+unsigned long CPUFUNC(op_b068_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2820;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2820: ;
+return 12;
+}
+unsigned long CPUFUNC(op_b070_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2821;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2821: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b078_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2822;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2822: ;
+return 12;
+}
+unsigned long CPUFUNC(op_b079_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2823;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2823: ;
+return 16;
+}
+unsigned long CPUFUNC(op_b07a_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2824;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2824: ;
+return 12;
+}
+unsigned long CPUFUNC(op_b07b_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2825;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2825: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b07c_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_b080_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_b088_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_b090_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2829;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2829: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b098_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2830;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2830: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b0a0_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2831;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2831: ;
+return 16;
+}
+unsigned long CPUFUNC(op_b0a8_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2832;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2832: ;
+return 18;
+}
+unsigned long CPUFUNC(op_b0b0_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2833;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2833: ;
+return 20;
+}
+unsigned long CPUFUNC(op_b0b8_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2834;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2834: ;
+return 18;
+}
+unsigned long CPUFUNC(op_b0b9_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2835;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2835: ;
+return 22;
+}
+unsigned long CPUFUNC(op_b0ba_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2836;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2836: ;
+return 18;
+}
+unsigned long CPUFUNC(op_b0bb_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2837;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2837: ;
+return 20;
+}
+unsigned long CPUFUNC(op_b0bc_5)(uint32_t opcode) /* CMP */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 25; CurrentInstrCycles = 14; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_b0c0_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 6;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_b0c8_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 6;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_b0d0_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2841;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2841: ;
+return 10;
+}
+unsigned long CPUFUNC(op_b0d8_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2842;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2842: ;
+return 10;
+}
+unsigned long CPUFUNC(op_b0e0_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2843;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2843: ;
+return 12;
+}
+unsigned long CPUFUNC(op_b0e8_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2844;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2844: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b0f0_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2845;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2845: ;
+return 16;
+}
+unsigned long CPUFUNC(op_b0f8_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2846;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2846: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b0f9_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2847;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2847: ;
+return 18;
+}
+unsigned long CPUFUNC(op_b0fa_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2848;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2848: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b0fb_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 16; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2849;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2849: ;
+return 16;
+}
+unsigned long CPUFUNC(op_b0fc_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 10; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 10;
+}
+unsigned long CPUFUNC(op_b100_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_b108_5)(uint32_t opcode) /* CMPM */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 26; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 12;
+}
+unsigned long CPUFUNC(op_b110_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_b118_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_b120_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_b128_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_b130_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_b138_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_b139_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_b140_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_b148_5)(uint32_t opcode) /* CMPM */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 26; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2861;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2861;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2861: ;
+return 12;
+}
+unsigned long CPUFUNC(op_b150_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2862;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2862: ;
+return 12;
+}
+unsigned long CPUFUNC(op_b158_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2863;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2863: ;
+return 12;
+}
+unsigned long CPUFUNC(op_b160_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2864;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2864: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b168_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2865;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2865: ;
+return 16;
+}
+unsigned long CPUFUNC(op_b170_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2866;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2866: ;
+return 18;
+}
+unsigned long CPUFUNC(op_b178_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2867;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2867: ;
+return 16;
+}
+unsigned long CPUFUNC(op_b179_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2868;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2868: ;
+return 20;
+}
+unsigned long CPUFUNC(op_b180_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_b188_5)(uint32_t opcode) /* CMPM */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 26; CurrentInstrCycles = 20; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2870;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2870;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2870: ;
+return 20;
+}
+unsigned long CPUFUNC(op_b190_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2871;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2871: ;
+return 20;
+}
+unsigned long CPUFUNC(op_b198_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2872;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2872: ;
+return 20;
+}
+unsigned long CPUFUNC(op_b1a0_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2873;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2873: ;
+return 22;
+}
+unsigned long CPUFUNC(op_b1a8_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2874;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2874: ;
+return 24;
+}
+unsigned long CPUFUNC(op_b1b0_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 3; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2875;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2875: ;
+return 26;
+}
+unsigned long CPUFUNC(op_b1b8_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2876;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2876: ;
+return 24;
+}
+unsigned long CPUFUNC(op_b1b9_5)(uint32_t opcode) /* EOR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 3; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2877;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src ^= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2877: ;
+return 28;
+}
+unsigned long CPUFUNC(op_b1c0_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_b1c8_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_b1d0_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2880;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2880: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b1d8_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2881;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2881: ;
+return 14;
+}
+unsigned long CPUFUNC(op_b1e0_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2882;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2882: ;
+return 16;
+}
+unsigned long CPUFUNC(op_b1e8_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2883;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2883: ;
+return 18;
+}
+unsigned long CPUFUNC(op_b1f0_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2884;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2884: ;
+return 20;
+}
+unsigned long CPUFUNC(op_b1f8_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2885;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2885: ;
+return 18;
+}
+unsigned long CPUFUNC(op_b1f9_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2886;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2886: ;
+return 22;
+}
+unsigned long CPUFUNC(op_b1fa_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2887;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2887: ;
+return 18;
+}
+unsigned long CPUFUNC(op_b1fb_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2888;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2888: ;
+return 20;
+}
+unsigned long CPUFUNC(op_b1fc_5)(uint32_t opcode) /* CMPA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 27; CurrentInstrCycles = 14; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs != flgo) && (flgn != flgo));
+       SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+       SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_c000_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_c010_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_c018_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_c020_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_c028_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_c030_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_c038_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_c039_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_c03a_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_c03b_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_c03c_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_c040_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_c050_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2902;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2902: ;
+return 8;
+}
+unsigned long CPUFUNC(op_c058_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2903;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2903: ;
+return 8;
+}
+unsigned long CPUFUNC(op_c060_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2904;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2904: ;
+return 10;
+}
+unsigned long CPUFUNC(op_c068_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2905;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2905: ;
+return 12;
+}
+unsigned long CPUFUNC(op_c070_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2906;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2906: ;
+return 14;
+}
+unsigned long CPUFUNC(op_c078_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2907;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2907: ;
+return 12;
+}
+unsigned long CPUFUNC(op_c079_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2908;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2908: ;
+return 16;
+}
+unsigned long CPUFUNC(op_c07a_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2909;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2909: ;
+return 12;
+}
+unsigned long CPUFUNC(op_c07b_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2910;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2910: ;
+return 14;
+}
+unsigned long CPUFUNC(op_c07c_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_c080_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_c090_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2913;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2913: ;
+return 14;
+}
+unsigned long CPUFUNC(op_c098_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2914;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2914: ;
+return 14;
+}
+unsigned long CPUFUNC(op_c0a0_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2915;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2915: ;
+return 16;
+}
+unsigned long CPUFUNC(op_c0a8_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2916;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2916: ;
+return 18;
+}
+unsigned long CPUFUNC(op_c0b0_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2917;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2917: ;
+return 20;
+}
+unsigned long CPUFUNC(op_c0b8_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2918;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2918: ;
+return 18;
+}
+unsigned long CPUFUNC(op_c0b9_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2919;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2919: ;
+return 22;
+}
+unsigned long CPUFUNC(op_c0ba_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2920;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2920: ;
+return 18;
+}
+unsigned long CPUFUNC(op_c0bb_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2921;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2921: ;
+return 20;
+}
+unsigned long CPUFUNC(op_c0bc_5)(uint32_t opcode) /* AND */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_c0c0_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 38; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (38+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0d0_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 42; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2924;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2924: ;
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0d8_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 42; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2925;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2925: ;
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0e0_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 44; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2926;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2926: ;
+ return (44+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0e8_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 46; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2927;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2927: ;
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0f0_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 48; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2928;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2928: ;
+ return (48+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0f8_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 46; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2929;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2929: ;
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0f9_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 50; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2930;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2930: ;
+ return (50+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0fa_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 46; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2931;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2931: ;
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0fb_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 48; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2932;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2932: ;
+ return (48+retcycles*2);
+}
+unsigned long CPUFUNC(op_c0fc_5)(uint32_t opcode) /* MULU */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 62; CurrentInstrCycles = 42; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (uint32_t)(uint16_t)dst * (uint32_t)(uint16_t)src;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       while (src) { if (src & 1) retcycles++; src = (uint16_t)src >> 1; }
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c100_5)(uint32_t opcode) /* ABCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 14; CurrentInstrCycles = 6;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      uint16_t newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = (src & 0xF0) + (dst & 0xF0);
+       uint16_t newv, tmp_newv;
+       int cflg;
+       newv = tmp_newv = newv_hi + newv_lo;    if (newv_lo > 9) { newv += 6; }
+       cflg = (newv & 0x3F0) > 0x90;
+       if (cflg) newv += 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       SET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_c108_5)(uint32_t opcode) /* ABCD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 14; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint16_t newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);
+       uint16_t newv_hi = (src & 0xF0) + (dst & 0xF0);
+       uint16_t newv, tmp_newv;
+       int cflg;
+       newv = tmp_newv = newv_hi + newv_lo;    if (newv_lo > 9) { newv += 6; }
+       cflg = (newv & 0x3F0) > 0x90;
+       if (cflg) newv += 0x60;
+       SET_CFLG (cflg);
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       SET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_c110_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_c118_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 12;
+}
+unsigned long CPUFUNC(op_c120_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 14;
+}
+unsigned long CPUFUNC(op_c128_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_c130_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 18;
+}
+unsigned long CPUFUNC(op_c138_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 16;
+}
+unsigned long CPUFUNC(op_c139_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int8_t)(src)) == 0);
+       SET_NFLG (((int8_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,src);
+}}}}return 20;
+}
+unsigned long CPUFUNC(op_c140_5)(uint32_t opcode) /* EXG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 35; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+       m68k_dreg(regs, srcreg) = (dst);
+       m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_c148_5)(uint32_t opcode) /* EXG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 35; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+       m68k_areg(regs, srcreg) = (dst);
+       m68k_areg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_c150_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2945;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2945: ;
+return 12;
+}
+unsigned long CPUFUNC(op_c158_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2946;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2946: ;
+return 12;
+}
+unsigned long CPUFUNC(op_c160_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2947;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2947: ;
+return 14;
+}
+unsigned long CPUFUNC(op_c168_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2948;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2948: ;
+return 16;
+}
+unsigned long CPUFUNC(op_c170_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2949;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2949: ;
+return 18;
+}
+unsigned long CPUFUNC(op_c178_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2950;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2950: ;
+return 16;
+}
+unsigned long CPUFUNC(op_c179_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2951;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(src)) == 0);
+       SET_NFLG (((int16_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,src);
+}}}}}endlabel2951: ;
+return 20;
+}
+unsigned long CPUFUNC(op_c188_5)(uint32_t opcode) /* EXG */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 35; CurrentInstrCycles = 6;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+       m68k_dreg(regs, srcreg) = (dst);
+       m68k_areg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 6;
+}
+unsigned long CPUFUNC(op_c190_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2953;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2953: ;
+return 20;
+}
+unsigned long CPUFUNC(op_c198_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2954;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2954: ;
+return 20;
+}
+unsigned long CPUFUNC(op_c1a0_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2955;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2955: ;
+return 22;
+}
+unsigned long CPUFUNC(op_c1a8_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2956;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2956: ;
+return 24;
+}
+unsigned long CPUFUNC(op_c1b0_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 2; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2957;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2957: ;
+return 26;
+}
+unsigned long CPUFUNC(op_c1b8_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2958;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2958: ;
+return 24;
+}
+unsigned long CPUFUNC(op_c1b9_5)(uint32_t opcode) /* AND */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 2; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2959;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       src &= dst;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(src)) == 0);
+       SET_NFLG (((int32_t)(src)) < 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,src);
+}}}}}endlabel2959: ;
+return 28;
+}
+unsigned long CPUFUNC(op_c1c0_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 38; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (38+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1d0_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 42; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2961;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2961: ;
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1d8_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 42; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2962;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2962: ;
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1e0_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 44; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2963;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2963: ;
+ return (44+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1e8_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 46; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2964;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2964: ;
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1f0_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 48; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2965;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2965: ;
+ return (48+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1f8_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 46; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2966;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2966: ;
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1f9_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 50; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2967;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2967: ;
+ return (50+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1fa_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 46; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2968;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2968: ;
+ return (46+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1fb_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 48; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2969;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2969: ;
+ return (48+retcycles*2);
+}
+unsigned long CPUFUNC(op_c1fc_5)(uint32_t opcode) /* MULS */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 63; CurrentInstrCycles = 42; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = (int32_t)(int16_t)dst * (int32_t)(int16_t)src;
+       uint32_t src2;
+       CLEAR_CZNV;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+       src2 = ((uint32_t)src) << 1;
+       while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; }
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+ return (42+retcycles*2);
+}
+unsigned long CPUFUNC(op_d000_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_d010_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d018_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d020_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 10;
+}
+unsigned long CPUFUNC(op_d028_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_d030_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_d038_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_d039_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_d03a_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_d03b_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t src = m68k_read_memory_8(srca);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 14;
+}
+unsigned long CPUFUNC(op_d03c_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int8_t src = get_ibyte_prefetch(2);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d040_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_d048_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_d050_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2984;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2984: ;
+return 8;
+}
+unsigned long CPUFUNC(op_d058_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2985;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2985: ;
+return 8;
+}
+unsigned long CPUFUNC(op_d060_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 10; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2986;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2986: ;
+return 10;
+}
+unsigned long CPUFUNC(op_d068_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2987;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2987: ;
+return 12;
+}
+unsigned long CPUFUNC(op_d070_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2988;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2988: ;
+return 14;
+}
+unsigned long CPUFUNC(op_d078_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2989;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2989: ;
+return 12;
+}
+unsigned long CPUFUNC(op_d079_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2990;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel2990: ;
+return 16;
+}
+unsigned long CPUFUNC(op_d07a_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2991;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2991: ;
+return 12;
+}
+unsigned long CPUFUNC(op_d07b_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2992;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2992: ;
+return 14;
+}
+unsigned long CPUFUNC(op_d07c_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int16_t src = get_iword_prefetch(2);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d080_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d088_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d090_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2996;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2996: ;
+return 14;
+}
+unsigned long CPUFUNC(op_d098_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2997;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2997: ;
+return 14;
+}
+unsigned long CPUFUNC(op_d0a0_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2998;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel2998: ;
+return 16;
+}
+unsigned long CPUFUNC(op_d0a8_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel2999;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel2999: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d0b0_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3000;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3000: ;
+return 20;
+}
+unsigned long CPUFUNC(op_d0b8_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3001;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3001: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d0b9_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3002;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel3002: ;
+return 22;
+}
+unsigned long CPUFUNC(op_d0ba_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3003;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3003: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d0bb_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3004;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3004: ;
+return 20;
+}
+unsigned long CPUFUNC(op_d0bc_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_d0c0_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d0c8_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     int16_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d0d0_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3008;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel3008: ;
+return 12;
+}
+unsigned long CPUFUNC(op_d0d8_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 12; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3009;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg(regs, srcreg) += 2;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel3009: ;
+return 12;
+}
+unsigned long CPUFUNC(op_d0e0_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3010;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel3010: ;
+return 14;
+}
+unsigned long CPUFUNC(op_d0e8_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3011;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3011: ;
+return 16;
+}
+unsigned long CPUFUNC(op_d0f0_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3012;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3012: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d0f8_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3013;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3013: ;
+return 16;
+}
+unsigned long CPUFUNC(op_d0f9_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3014;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel3014: ;
+return 20;
+}
+unsigned long CPUFUNC(op_d0fa_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3015;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3015: ;
+return 16;
+}
+unsigned long CPUFUNC(op_d0fb_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3016;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3016: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d0fc_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 12; 
+{{     int16_t src = get_iword_prefetch(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+return 12;
+}
+unsigned long CPUFUNC(op_d100_5)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 4;  
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      int8_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_d108_5)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{      int8_t src = m68k_read_memory_8(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+       SET_NFLG (((int8_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_d110_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_d118_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 12;
+}
+unsigned long CPUFUNC(op_d120_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{      int8_t dst = m68k_read_memory_8(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 14;
+}
+unsigned long CPUFUNC(op_d128_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_d130_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 18;
+}
+unsigned long CPUFUNC(op_d138_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 16;
+}
+unsigned long CPUFUNC(op_d139_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int8_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+{      int8_t dst = m68k_read_memory_8(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{      int flgs = ((int8_t)(src)) < 0;
+       int flgo = ((int8_t)(dst)) < 0;
+       int flgn = ((int8_t)(newv)) < 0;
+       SET_ZFLG (((int8_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_8(dsta,newv);
+}}}}}}}return 20;
+}
+unsigned long CPUFUNC(op_d140_5)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 4;  
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      int16_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 4;
+}
+unsigned long CPUFUNC(op_d148_5)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3028;
+       }
+{{     int16_t src = m68k_read_memory_16(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3028;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+       SET_NFLG (((int16_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}}endlabel3028: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d150_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3029;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel3029: ;
+return 12;
+}
+unsigned long CPUFUNC(op_d158_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 12; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3030;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg(regs, dstreg) += 2;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel3030: ;
+return 12;
+}
+unsigned long CPUFUNC(op_d160_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 14; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3031;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel3031: ;
+return 14;
+}
+unsigned long CPUFUNC(op_d168_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3032;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel3032: ;
+return 16;
+}
+unsigned long CPUFUNC(op_d170_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 18; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3033;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel3033: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d178_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 16; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3034;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel3034: ;
+return 16;
+}
+unsigned long CPUFUNC(op_d179_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int16_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3035;
+       }
+{{     int16_t dst = m68k_read_memory_16(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{      int flgs = ((int16_t)(src)) < 0;
+       int flgo = ((int16_t)(dst)) < 0;
+       int flgn = ((int16_t)(newv)) < 0;
+       SET_ZFLG (((int16_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dsta,newv);
+}}}}}}}}endlabel3035: ;
+return 20;
+}
+unsigned long CPUFUNC(op_d180_5)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_dreg(regs, dstreg);
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+       m68k_dreg(regs, dstreg) = (newv);
+}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d188_5)(uint32_t opcode) /* ADDX */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 13; CurrentInstrCycles = 30; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3037;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3037;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      uint32_t newv = dst + src + (GET_XFLG ? 1 : 0);
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));
+       COPY_CARRY;
+       SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+       SET_NFLG (((int32_t)(newv)) < 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}}endlabel3037: ;
+return 30;
+}
+unsigned long CPUFUNC(op_d190_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3038;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel3038: ;
+return 20;
+}
+unsigned long CPUFUNC(op_d198_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 20; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3039;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg(regs, dstreg) += 4;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel3039: ;
+return 20;
+}
+unsigned long CPUFUNC(op_d1a0_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 22; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3040;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+       m68k_areg (regs, dstreg) = dsta;
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel3040: ;
+return 22;
+}
+unsigned long CPUFUNC(op_d1a8_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3041;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel3041: ;
+return 24;
+}
+unsigned long CPUFUNC(op_d1b0_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       OpcodeFamily = 11; CurrentInstrCycles = 26; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3042;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel3042: ;
+return 26;
+}
+unsigned long CPUFUNC(op_d1b8_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 24; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3043;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel3043: ;
+return 24;
+}
+unsigned long CPUFUNC(op_d1b9_5)(uint32_t opcode) /* ADD */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       OpcodeFamily = 11; CurrentInstrCycles = 28; 
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      uint32_t dsta = get_ilong_prefetch(2);
+       if ((dsta & 1) != 0) {
+               last_fault_for_exception_3 = dsta;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3044;
+       }
+{{     int32_t dst = m68k_read_memory_32(dsta);
+{      refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{      int flgs = ((int32_t)(src)) < 0;
+       int flgo = ((int32_t)(dst)) < 0;
+       int flgn = ((int32_t)(newv)) < 0;
+       SET_ZFLG (((int32_t)(newv)) == 0);
+       SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+       SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+       COPY_CARRY;
+       SET_NFLG (flgn != 0);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_32(dsta,newv);
+}}}}}}}}endlabel3044: ;
+return 28;
+}
+unsigned long CPUFUNC(op_d1c0_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_dreg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d1c8_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 8;  
+{{     int32_t src = m68k_areg(regs, srcreg);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+return 8;
+}
+unsigned long CPUFUNC(op_d1d0_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3047;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel3047: ;
+return 14;
+}
+#endif
+
+#ifdef PART_8
+unsigned long CPUFUNC(op_d1d8_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 14; 
+{{     uint32_t srca = m68k_areg(regs, srcreg);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3048;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg(regs, srcreg) += 4;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel3048: ;
+return 14;
+}
+unsigned long CPUFUNC(op_d1e0_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) - 4;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3049;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+       m68k_areg (regs, srcreg) = srca;
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+endlabel3049: ;
+return 16;
+}
+unsigned long CPUFUNC(op_d1e8_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3050;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3050: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d1f0_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t srcreg = (opcode & 7);
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 20; 
+{{     uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3051;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3051: ;
+return 20;
+}
+unsigned long CPUFUNC(op_d1f8_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t srca = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3052;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3052: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d1f9_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 22; 
+{{     uint32_t srca = get_ilong_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3053;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+endlabel3053: ;
+return 22;
+}
+unsigned long CPUFUNC(op_d1fa_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 18; 
+{{     uint32_t srca = m68k_getpc () + 2;
+       srca += (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3054;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3054: ;
+return 18;
+}
+unsigned long CPUFUNC(op_d1fb_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 20; 
+{{     uint32_t tmppc = m68k_getpc() + 2;
+       uint32_t srca = get_disp_ea_000(tmppc, get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((srca & 1) != 0) {
+               last_fault_for_exception_3 = srca;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3055;
+       }
+{{     int32_t src = m68k_read_memory_32(srca);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(4);
+fill_prefetch_0 ();
+endlabel3055: ;
+return 20;
+}
+unsigned long CPUFUNC(op_d1fc_5)(uint32_t opcode) /* ADDA */
+{
+       uint32_t dstreg = (opcode >> 9) & 7;
+       OpcodeFamily = 12; CurrentInstrCycles = 16; 
+{{     int32_t src = get_ilong_prefetch(2);
+{      int32_t dst = m68k_areg(regs, dstreg);
+{      uint32_t newv = dst + src;
+       m68k_areg(regs, dstreg) = (newv);
+}}}}m68k_incpc(6);
+fill_prefetch_0 ();
+return 16;
+}
+unsigned long CPUFUNC(op_e000_5)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       uint32_t sign = (0x80 & val) >> 7;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               val = 0xff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xff << (8 - cnt)) & (uint32_t)-sign;
+               val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e008_5)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_CFLG ((cnt == 8) & (val >> 7));
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e010_5)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (7 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e018_5)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t hival;
+       cnt &= 7;
+       hival = val << (8 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xff;
+       SET_CFLG ((val & 0x80) >> 7);
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e020_5)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       uint32_t sign = (0x80 & val) >> 7;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               val = 0xff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xff << (8 - cnt)) & (uint32_t)-sign;
+               val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e028_5)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_CFLG ((cnt == 8) & (val >> 7));
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e030_5)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 36) cnt -= 36;
+       if (cnt >= 18) cnt -= 18;
+       if (cnt >= 9) cnt -= 9;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (7 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e038_5)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {  uint32_t hival;
+       cnt &= 7;
+       hival = val << (8 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xff;
+       SET_CFLG ((val & 0x80) >> 7);
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e040_5)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = (0x8000 & val) >> 15;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               val = 0xffff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xffff << (16 - cnt)) & (uint32_t)-sign;
+               val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e048_5)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_CFLG ((cnt == 16) & (val >> 15));
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e050_5)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (15 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e058_5)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t hival;
+       cnt &= 15;
+       hival = val << (16 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xffff;
+       SET_CFLG ((val & 0x8000) >> 15);
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e060_5)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = (0x8000 & val) >> 15;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               val = 0xffff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xffff << (16 - cnt)) & (uint32_t)-sign;
+               val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e068_5)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_CFLG ((cnt == 16) & (val >> 15));
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e070_5)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 34) cnt -= 34;
+       if (cnt >= 17) cnt -= 17;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (15 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e078_5)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {  uint32_t hival;
+       cnt &= 15;
+       hival = val << (16 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xffff;
+       SET_CFLG ((val & 0x8000) >> 15);
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e080_5)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       uint32_t sign = (0x80000000 & val) >> 31;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               val = 0xffffffff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xffffffff << (32 - cnt)) & (uint32_t)-sign;
+               val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e088_5)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_CFLG ((cnt == 32) & (val >> 31));
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e090_5)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (31 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xffffffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e098_5)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t hival;
+       cnt &= 31;
+       hival = val << (32 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xffffffff;
+       SET_CFLG ((val & 0x80000000) >> 31);
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0a0_5)(uint32_t opcode) /* ASR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 64; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       uint32_t sign = (0x80000000 & val) >> 31;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               val = 0xffffffff & (uint32_t)-sign;
+               SET_CFLG (sign);
+       COPY_CARRY;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+               val |= (0xffffffff << (32 - cnt)) & (uint32_t)-sign;
+               val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0a8_5)(uint32_t opcode) /* LSR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 66; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_CFLG ((cnt == 32) & (val >> 31));
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val >>= cnt - 1;
+               SET_CFLG (val & 1);
+       COPY_CARRY;
+               val >>= 1;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0b0_5)(uint32_t opcode) /* ROXR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 71; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 33) cnt -= 33;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t hival = (val << 1) | GET_XFLG;
+       hival <<= (31 - cnt);
+       val >>= cnt;
+       carry = val & 1;
+       val >>= 1;
+       val |= hival;
+       SET_XFLG (carry);
+       val &= 0xffffffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0b8_5)(uint32_t opcode) /* ROR */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 69; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {  uint32_t hival;
+       cnt &= 31;
+       hival = val << (32 - cnt);
+       val >>= cnt;
+       val |= hival;
+       val &= 0xffffffff;
+       SET_CFLG ((val & 0x80000000) >> 31);
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e0d0_5)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3081;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3081: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e0d8_5)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3082;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3082: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e0e0_5)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3083;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3083: ;
+return 14;
+}
+unsigned long CPUFUNC(op_e0e8_5)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3084;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3084: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e0f0_5)(uint32_t opcode) /* ASRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 72; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3085;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3085: ;
+return 18;
+}
+unsigned long CPUFUNC(op_e0f8_5)(uint32_t opcode) /* ASRW */
+{
+       OpcodeFamily = 72; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3086;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3086: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e0f9_5)(uint32_t opcode) /* ASRW */
+{
+       OpcodeFamily = 72; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3087;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t cflg = val & 1;
+       val = (val >> 1) | sign;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       SET_CFLG (cflg);
+       COPY_CARRY;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3087: ;
+return 20;
+}
+unsigned long CPUFUNC(op_e100_5)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 8 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               uint32_t mask = (0xff << (7 - cnt)) & 0xff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x80) >> 7);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e108_5)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_CFLG (cnt == 8 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x80) >> 7);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e110_5)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (7 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e118_5)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t loval;
+       cnt &= 7;
+       loval = val >> (8 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e120_5)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 8 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               uint32_t mask = (0xff << (7 - cnt)) & 0xff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x80) >> 7);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e128_5)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 8) {
+               SET_CFLG (cnt == 8 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x80) >> 7);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xff;
+       }
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e130_5)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 36) cnt -= 36;
+       if (cnt >= 18) cnt -= 18;
+       if (cnt >= 9) cnt -= 9;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (7 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e138_5)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     int8_t cnt = m68k_dreg(regs, srcreg);
+{      int8_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint8_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {
+       uint32_t loval;
+       cnt &= 7;
+       loval = val >> (8 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int8_t)(val)) == 0);
+       SET_NFLG (((int8_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e140_5)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 16 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               uint32_t mask = (0xffff << (15 - cnt)) & 0xffff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x8000) >> 15);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e148_5)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_CFLG (cnt == 16 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x8000) >> 15);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e150_5)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (15 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e158_5)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t loval;
+       cnt &= 15;
+       loval = val >> (16 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xffff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e160_5)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 16 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               uint32_t mask = (0xffff << (15 - cnt)) & 0xffff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x8000) >> 15);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e168_5)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 16) {
+               SET_CFLG (cnt == 16 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x8000) >> 15);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xffff;
+       }
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e170_5)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 34) cnt -= 34;
+       if (cnt >= 17) cnt -= 17;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (15 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e178_5)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     int16_t cnt = m68k_dreg(regs, srcreg);
+{      int16_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = (uint16_t)data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {
+       uint32_t loval;
+       cnt &= 15;
+       loval = val >> (16 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xffff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (6+retcycles*2);
+}
+unsigned long CPUFUNC(op_e180_5)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 32 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               uint32_t mask = (0xffffffff << (31 - cnt)) & 0xffffffff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x80000000) >> 31);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e188_5)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_CFLG (cnt == 32 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x80000000) >> 31);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e190_5)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (31 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xffffffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e198_5)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = imm8_table[((opcode >> 9) & 7)];
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     uint32_t cnt = srcreg;
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+{      uint32_t loval;
+       cnt &= 31;
+       loval = val >> (32 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xffffffff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1a0_5)(uint32_t opcode) /* ASL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 65; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_VFLG (val != 0);
+               SET_CFLG (cnt == 32 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               uint32_t mask = (0xffffffff << (31 - cnt)) & 0xffffffff;
+               SET_VFLG ((val & mask) != mask && (val & mask) != 0);
+               val <<= cnt - 1;
+               SET_CFLG ((val & 0x80000000) >> 31);
+       COPY_CARRY;
+               val <<= 1;
+               val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1a8_5)(uint32_t opcode) /* LSL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 67; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 32) {
+               SET_CFLG (cnt == 32 ? val & 1 : 0);
+       COPY_CARRY;
+               val = 0;
+       } else if (cnt > 0) {
+               val <<= (cnt - 1);
+               SET_CFLG ((val & 0x80000000) >> 31);
+       COPY_CARRY;
+               val <<= 1;
+       val &= 0xffffffff;
+       }
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1b0_5)(uint32_t opcode) /* ROXL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 70; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt >= 33) cnt -= 33;
+       if (cnt > 0) {
+       cnt--;
+       {
+       uint32_t carry;
+       uint32_t loval = val >> (31 - cnt);
+       carry = loval & 1;
+       val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);
+       SET_XFLG (carry);
+       val &= 0xffffffff;
+       } }
+       SET_CFLG (GET_XFLG);
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1b8_5)(uint32_t opcode) /* ROL */
+{
+       uint32_t srcreg = ((opcode >> 9) & 7);
+       uint32_t dstreg = opcode & 7;
+       unsigned int retcycles = 0;
+       OpcodeFamily = 68; CurrentInstrCycles = 4;  
+{{     int32_t cnt = m68k_dreg(regs, srcreg);
+{      int32_t data = m68k_dreg(regs, dstreg);
+{      uint32_t val = data;
+       cnt &= 63;
+       retcycles = cnt;
+       CLEAR_CZNV;
+       if (cnt > 0) {
+       uint32_t loval;
+       cnt &= 31;
+       loval = val >> (32 - cnt);
+       val <<= cnt;
+       val |= loval;
+       val &= 0xffffffff;
+       SET_CFLG (val & 1);
+}
+       SET_ZFLG (((int32_t)(val)) == 0);
+       SET_NFLG (((int32_t)(val)) < 0);
+       m68k_dreg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+fill_prefetch_2 ();
+ return (8+retcycles*2);
+}
+unsigned long CPUFUNC(op_e1d0_5)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3112;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3112: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e1d8_5)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3113;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3113: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e1e0_5)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3114;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3114: ;
+return 14;
+}
+unsigned long CPUFUNC(op_e1e8_5)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3115;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3115: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e1f0_5)(uint32_t opcode) /* ASLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 73; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3116;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3116: ;
+return 18;
+}
+unsigned long CPUFUNC(op_e1f8_5)(uint32_t opcode) /* ASLW */
+{
+       OpcodeFamily = 73; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3117;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3117: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e1f9_5)(uint32_t opcode) /* ASLW */
+{
+       OpcodeFamily = 73; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3118;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t sign = 0x8000 & val;
+       uint32_t sign2;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+       sign2 = 0x8000 & val;
+       SET_CFLG (sign != 0);
+       COPY_CARRY;
+       SET_VFLG (GET_VFLG | (sign2 != sign));
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3118: ;
+return 20;
+}
+unsigned long CPUFUNC(op_e2d0_5)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3119;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3119: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e2d8_5)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3120;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3120: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e2e0_5)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3121;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3121: ;
+return 14;
+}
+unsigned long CPUFUNC(op_e2e8_5)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3122;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3122: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e2f0_5)(uint32_t opcode) /* LSRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 74; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3123;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3123: ;
+return 18;
+}
+unsigned long CPUFUNC(op_e2f8_5)(uint32_t opcode) /* LSRW */
+{
+       OpcodeFamily = 74; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3124;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3124: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e2f9_5)(uint32_t opcode) /* LSRW */
+{
+       OpcodeFamily = 74; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3125;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint32_t val = (uint16_t)data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3125: ;
+return 20;
+}
+unsigned long CPUFUNC(op_e3d0_5)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3126;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3126: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e3d8_5)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3127;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3127: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e3e0_5)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3128;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3128: ;
+return 14;
+}
+unsigned long CPUFUNC(op_e3e8_5)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3129;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3129: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e3f0_5)(uint32_t opcode) /* LSLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 75; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3130;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3130: ;
+return 18;
+}
+unsigned long CPUFUNC(op_e3f8_5)(uint32_t opcode) /* LSLW */
+{
+       OpcodeFamily = 75; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3131;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3131: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e3f9_5)(uint32_t opcode) /* LSLW */
+{
+       OpcodeFamily = 75; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3132;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3132: ;
+return 20;
+}
+unsigned long CPUFUNC(op_e4d0_5)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3133;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3133: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e4d8_5)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3134;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3134: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e4e0_5)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3135;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3135: ;
+return 14;
+}
+unsigned long CPUFUNC(op_e4e8_5)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3136;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3136: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e4f0_5)(uint32_t opcode) /* ROXRW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 79; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3137;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3137: ;
+return 18;
+}
+unsigned long CPUFUNC(op_e4f8_5)(uint32_t opcode) /* ROXRW */
+{
+       OpcodeFamily = 79; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3138;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3138: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e4f9_5)(uint32_t opcode) /* ROXRW */
+{
+       OpcodeFamily = 79; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3139;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (GET_XFLG) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+       COPY_CARRY;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3139: ;
+return 20;
+}
+unsigned long CPUFUNC(op_e5d0_5)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3140;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3140: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e5d8_5)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3141;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3141: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e5e0_5)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3142;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3142: ;
+return 14;
+}
+unsigned long CPUFUNC(op_e5e8_5)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3143;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3143: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e5f0_5)(uint32_t opcode) /* ROXLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 78; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3144;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3144: ;
+return 18;
+}
+unsigned long CPUFUNC(op_e5f8_5)(uint32_t opcode) /* ROXLW */
+{
+       OpcodeFamily = 78; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3145;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3145: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e5f9_5)(uint32_t opcode) /* ROXLW */
+{
+       OpcodeFamily = 78; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3146;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (GET_XFLG) val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+       COPY_CARRY;
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3146: ;
+return 20;
+}
+unsigned long CPUFUNC(op_e6d0_5)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3147;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3147: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e6d8_5)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3148;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3148: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e6e0_5)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3149;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3149: ;
+return 14;
+}
+unsigned long CPUFUNC(op_e6e8_5)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3150;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3150: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e6f0_5)(uint32_t opcode) /* RORW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 77; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3151;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3151: ;
+return 18;
+}
+unsigned long CPUFUNC(op_e6f8_5)(uint32_t opcode) /* RORW */
+{
+       OpcodeFamily = 77; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3152;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3152: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e6f9_5)(uint32_t opcode) /* RORW */
+{
+       OpcodeFamily = 77; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3153;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 1;
+       val >>= 1;
+       if (carry) val |= 0x8000;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3153: ;
+return 20;
+}
+unsigned long CPUFUNC(op_e7d0_5)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3154;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3154: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e7d8_5)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 12; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3155;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg(regs, srcreg) += 2;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3155: ;
+return 12;
+}
+unsigned long CPUFUNC(op_e7e0_5)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 14; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) - 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 2;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3156;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+       m68k_areg (regs, srcreg) = dataa;
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+m68k_incpc(2);
+fill_prefetch_2 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3156: ;
+return 14;
+}
+unsigned long CPUFUNC(op_e7e8_5)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3157;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3157: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e7f0_5)(uint32_t opcode) /* ROLW */
+{
+       uint32_t srcreg = (opcode & 7);
+       OpcodeFamily = 76; CurrentInstrCycles = 18; 
+{{     uint32_t dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2));
+       BusCyclePenalty += 2;
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3158;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3158: ;
+return 18;
+}
+unsigned long CPUFUNC(op_e7f8_5)(uint32_t opcode) /* ROLW */
+{
+       OpcodeFamily = 76; CurrentInstrCycles = 16; 
+{{     uint32_t dataa = (int32_t)(int16_t)get_iword_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 4;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3159;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+m68k_incpc(4);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3159: ;
+return 16;
+}
+unsigned long CPUFUNC(op_e7f9_5)(uint32_t opcode) /* ROLW */
+{
+       OpcodeFamily = 76; CurrentInstrCycles = 20; 
+{{     uint32_t dataa = get_ilong_prefetch(2);
+       if ((dataa & 1) != 0) {
+               last_fault_for_exception_3 = dataa;
+               last_op_for_exception_3 = opcode;
+               last_addr_for_exception_3 = m68k_getpc() + 6;
+               Exception(3, 0, M68000_EXC_SRC_CPU);
+               goto endlabel3160;
+       }
+{{     int16_t data = m68k_read_memory_16(dataa);
+{      uint16_t val = data;
+       uint32_t carry = val & 0x8000;
+       val <<= 1;
+       if (carry)  val |= 1;
+       CLEAR_CZNV;
+       SET_ZFLG (((int16_t)(val)) == 0);
+       SET_NFLG (((int16_t)(val)) < 0);
+SET_CFLG (carry >> 15);
+m68k_incpc(6);
+fill_prefetch_0 ();
+       m68k_write_memory_16(dataa,val);
+}}}}}endlabel3160: ;
+return 20;
+}
+#endif
+

diff --git a/src/m68000/obj/cpustbl.c b/src/m68000/obj/cpustbl.c
new file mode 100644 (file)
index 0000000..91f6326
--- /dev/null
+++ b/src/m68000/obj/cpustbl.c
@@ -0,0 +1,3172 @@
+#include "cpudefs.h"
+#include "cpuextra.h"
+#include "inlines.h"
+#include "cputbl.h"
+#define CPUFUNC(x) x##_ff
+#ifdef NOFLAGS
+#include "noflags.h"
+#endif
+const struct cputbl CPUFUNC(op_smalltbl_4)[] = {
+{ CPUFUNC(op_0_4), 0, 0 }, /* OR */
+{ CPUFUNC(op_10_4), 0, 16 }, /* OR */
+{ CPUFUNC(op_18_4), 0, 24 }, /* OR */
+{ CPUFUNC(op_20_4), 0, 32 }, /* OR */
+{ CPUFUNC(op_28_4), 0, 40 }, /* OR */
+{ CPUFUNC(op_30_4), 0, 48 }, /* OR */
+{ CPUFUNC(op_38_4), 0, 56 }, /* OR */
+{ CPUFUNC(op_39_4), 0, 57 }, /* OR */
+{ CPUFUNC(op_3c_4), 0, 60 }, /* ORSR */
+{ CPUFUNC(op_40_4), 0, 64 }, /* OR */
+{ CPUFUNC(op_50_4), 0, 80 }, /* OR */
+{ CPUFUNC(op_58_4), 0, 88 }, /* OR */
+{ CPUFUNC(op_60_4), 0, 96 }, /* OR */
+{ CPUFUNC(op_68_4), 0, 104 }, /* OR */
+{ CPUFUNC(op_70_4), 0, 112 }, /* OR */
+{ CPUFUNC(op_78_4), 0, 120 }, /* OR */
+{ CPUFUNC(op_79_4), 0, 121 }, /* OR */
+{ CPUFUNC(op_7c_4), 0, 124 }, /* ORSR */
+{ CPUFUNC(op_80_4), 0, 128 }, /* OR */
+{ CPUFUNC(op_90_4), 0, 144 }, /* OR */
+{ CPUFUNC(op_98_4), 0, 152 }, /* OR */
+{ CPUFUNC(op_a0_4), 0, 160 }, /* OR */
+{ CPUFUNC(op_a8_4), 0, 168 }, /* OR */
+{ CPUFUNC(op_b0_4), 0, 176 }, /* OR */
+{ CPUFUNC(op_b8_4), 0, 184 }, /* OR */
+{ CPUFUNC(op_b9_4), 0, 185 }, /* OR */
+{ CPUFUNC(op_100_4), 0, 256 }, /* BTST */
+{ CPUFUNC(op_108_4), 0, 264 }, /* MVPMR */
+{ CPUFUNC(op_110_4), 0, 272 }, /* BTST */
+{ CPUFUNC(op_118_4), 0, 280 }, /* BTST */
+{ CPUFUNC(op_120_4), 0, 288 }, /* BTST */
+{ CPUFUNC(op_128_4), 0, 296 }, /* BTST */
+{ CPUFUNC(op_130_4), 0, 304 }, /* BTST */
+{ CPUFUNC(op_138_4), 0, 312 }, /* BTST */
+{ CPUFUNC(op_139_4), 0, 313 }, /* BTST */
+{ CPUFUNC(op_13a_4), 0, 314 }, /* BTST */
+{ CPUFUNC(op_13b_4), 0, 315 }, /* BTST */
+{ CPUFUNC(op_13c_4), 0, 316 }, /* BTST */
+{ CPUFUNC(op_140_4), 0, 320 }, /* BCHG */
+{ CPUFUNC(op_148_4), 0, 328 }, /* MVPMR */
+{ CPUFUNC(op_150_4), 0, 336 }, /* BCHG */
+{ CPUFUNC(op_158_4), 0, 344 }, /* BCHG */
+{ CPUFUNC(op_160_4), 0, 352 }, /* BCHG */
+{ CPUFUNC(op_168_4), 0, 360 }, /* BCHG */
+{ CPUFUNC(op_170_4), 0, 368 }, /* BCHG */
+{ CPUFUNC(op_178_4), 0, 376 }, /* BCHG */
+{ CPUFUNC(op_179_4), 0, 377 }, /* BCHG */
+{ CPUFUNC(op_17a_4), 0, 378 }, /* BCHG */
+{ CPUFUNC(op_17b_4), 0, 379 }, /* BCHG */
+{ CPUFUNC(op_180_4), 0, 384 }, /* BCLR */
+{ CPUFUNC(op_188_4), 0, 392 }, /* MVPRM */
+{ CPUFUNC(op_190_4), 0, 400 }, /* BCLR */
+{ CPUFUNC(op_198_4), 0, 408 }, /* BCLR */
+{ CPUFUNC(op_1a0_4), 0, 416 }, /* BCLR */
+{ CPUFUNC(op_1a8_4), 0, 424 }, /* BCLR */
+{ CPUFUNC(op_1b0_4), 0, 432 }, /* BCLR */
+{ CPUFUNC(op_1b8_4), 0, 440 }, /* BCLR */
+{ CPUFUNC(op_1b9_4), 0, 441 }, /* BCLR */
+{ CPUFUNC(op_1ba_4), 0, 442 }, /* BCLR */
+{ CPUFUNC(op_1bb_4), 0, 443 }, /* BCLR */
+{ CPUFUNC(op_1c0_4), 0, 448 }, /* BSET */
+{ CPUFUNC(op_1c8_4), 0, 456 }, /* MVPRM */
+{ CPUFUNC(op_1d0_4), 0, 464 }, /* BSET */
+{ CPUFUNC(op_1d8_4), 0, 472 }, /* BSET */
+{ CPUFUNC(op_1e0_4), 0, 480 }, /* BSET */
+{ CPUFUNC(op_1e8_4), 0, 488 }, /* BSET */
+{ CPUFUNC(op_1f0_4), 0, 496 }, /* BSET */
+{ CPUFUNC(op_1f8_4), 0, 504 }, /* BSET */
+{ CPUFUNC(op_1f9_4), 0, 505 }, /* BSET */
+{ CPUFUNC(op_1fa_4), 0, 506 }, /* BSET */
+{ CPUFUNC(op_1fb_4), 0, 507 }, /* BSET */
+{ CPUFUNC(op_200_4), 0, 512 }, /* AND */
+{ CPUFUNC(op_210_4), 0, 528 }, /* AND */
+{ CPUFUNC(op_218_4), 0, 536 }, /* AND */
+{ CPUFUNC(op_220_4), 0, 544 }, /* AND */
+{ CPUFUNC(op_228_4), 0, 552 }, /* AND */
+{ CPUFUNC(op_230_4), 0, 560 }, /* AND */
+{ CPUFUNC(op_238_4), 0, 568 }, /* AND */
+{ CPUFUNC(op_239_4), 0, 569 }, /* AND */
+{ CPUFUNC(op_23c_4), 0, 572 }, /* ANDSR */
+{ CPUFUNC(op_240_4), 0, 576 }, /* AND */
+{ CPUFUNC(op_250_4), 0, 592 }, /* AND */
+{ CPUFUNC(op_258_4), 0, 600 }, /* AND */
+{ CPUFUNC(op_260_4), 0, 608 }, /* AND */
+{ CPUFUNC(op_268_4), 0, 616 }, /* AND */
+{ CPUFUNC(op_270_4), 0, 624 }, /* AND */
+{ CPUFUNC(op_278_4), 0, 632 }, /* AND */
+{ CPUFUNC(op_279_4), 0, 633 }, /* AND */
+{ CPUFUNC(op_27c_4), 0, 636 }, /* ANDSR */
+{ CPUFUNC(op_280_4), 0, 640 }, /* AND */
+{ CPUFUNC(op_290_4), 0, 656 }, /* AND */
+{ CPUFUNC(op_298_4), 0, 664 }, /* AND */
+{ CPUFUNC(op_2a0_4), 0, 672 }, /* AND */
+{ CPUFUNC(op_2a8_4), 0, 680 }, /* AND */
+{ CPUFUNC(op_2b0_4), 0, 688 }, /* AND */
+{ CPUFUNC(op_2b8_4), 0, 696 }, /* AND */
+{ CPUFUNC(op_2b9_4), 0, 697 }, /* AND */
+{ CPUFUNC(op_400_4), 0, 1024 }, /* SUB */
+{ CPUFUNC(op_410_4), 0, 1040 }, /* SUB */
+{ CPUFUNC(op_418_4), 0, 1048 }, /* SUB */
+{ CPUFUNC(op_420_4), 0, 1056 }, /* SUB */
+{ CPUFUNC(op_428_4), 0, 1064 }, /* SUB */
+{ CPUFUNC(op_430_4), 0, 1072 }, /* SUB */
+{ CPUFUNC(op_438_4), 0, 1080 }, /* SUB */
+{ CPUFUNC(op_439_4), 0, 1081 }, /* SUB */
+{ CPUFUNC(op_440_4), 0, 1088 }, /* SUB */
+{ CPUFUNC(op_450_4), 0, 1104 }, /* SUB */
+{ CPUFUNC(op_458_4), 0, 1112 }, /* SUB */
+{ CPUFUNC(op_460_4), 0, 1120 }, /* SUB */
+{ CPUFUNC(op_468_4), 0, 1128 }, /* SUB */
+{ CPUFUNC(op_470_4), 0, 1136 }, /* SUB */
+{ CPUFUNC(op_478_4), 0, 1144 }, /* SUB */
+{ CPUFUNC(op_479_4), 0, 1145 }, /* SUB */
+{ CPUFUNC(op_480_4), 0, 1152 }, /* SUB */
+{ CPUFUNC(op_490_4), 0, 1168 }, /* SUB */
+{ CPUFUNC(op_498_4), 0, 1176 }, /* SUB */
+{ CPUFUNC(op_4a0_4), 0, 1184 }, /* SUB */
+{ CPUFUNC(op_4a8_4), 0, 1192 }, /* SUB */
+{ CPUFUNC(op_4b0_4), 0, 1200 }, /* SUB */
+{ CPUFUNC(op_4b8_4), 0, 1208 }, /* SUB */
+{ CPUFUNC(op_4b9_4), 0, 1209 }, /* SUB */
+{ CPUFUNC(op_600_4), 0, 1536 }, /* ADD */
+{ CPUFUNC(op_610_4), 0, 1552 }, /* ADD */
+{ CPUFUNC(op_618_4), 0, 1560 }, /* ADD */
+{ CPUFUNC(op_620_4), 0, 1568 }, /* ADD */
+{ CPUFUNC(op_628_4), 0, 1576 }, /* ADD */
+{ CPUFUNC(op_630_4), 0, 1584 }, /* ADD */
+{ CPUFUNC(op_638_4), 0, 1592 }, /* ADD */
+{ CPUFUNC(op_639_4), 0, 1593 }, /* ADD */
+{ CPUFUNC(op_640_4), 0, 1600 }, /* ADD */
+{ CPUFUNC(op_650_4), 0, 1616 }, /* ADD */
+{ CPUFUNC(op_658_4), 0, 1624 }, /* ADD */
+{ CPUFUNC(op_660_4), 0, 1632 }, /* ADD */
+{ CPUFUNC(op_668_4), 0, 1640 }, /* ADD */
+{ CPUFUNC(op_670_4), 0, 1648 }, /* ADD */
+{ CPUFUNC(op_678_4), 0, 1656 }, /* ADD */
+{ CPUFUNC(op_679_4), 0, 1657 }, /* ADD */
+{ CPUFUNC(op_680_4), 0, 1664 }, /* ADD */
+{ CPUFUNC(op_690_4), 0, 1680 }, /* ADD */
+{ CPUFUNC(op_698_4), 0, 1688 }, /* ADD */
+{ CPUFUNC(op_6a0_4), 0, 1696 }, /* ADD */
+{ CPUFUNC(op_6a8_4), 0, 1704 }, /* ADD */
+{ CPUFUNC(op_6b0_4), 0, 1712 }, /* ADD */
+{ CPUFUNC(op_6b8_4), 0, 1720 }, /* ADD */
+{ CPUFUNC(op_6b9_4), 0, 1721 }, /* ADD */
+{ CPUFUNC(op_800_4), 0, 2048 }, /* BTST */
+{ CPUFUNC(op_810_4), 0, 2064 }, /* BTST */
+{ CPUFUNC(op_818_4), 0, 2072 }, /* BTST */
+{ CPUFUNC(op_820_4), 0, 2080 }, /* BTST */
+{ CPUFUNC(op_828_4), 0, 2088 }, /* BTST */
+{ CPUFUNC(op_830_4), 0, 2096 }, /* BTST */
+{ CPUFUNC(op_838_4), 0, 2104 }, /* BTST */
+{ CPUFUNC(op_839_4), 0, 2105 }, /* BTST */
+{ CPUFUNC(op_83a_4), 0, 2106 }, /* BTST */
+{ CPUFUNC(op_83b_4), 0, 2107 }, /* BTST */
+{ CPUFUNC(op_83c_4), 0, 2108 }, /* BTST */
+{ CPUFUNC(op_840_4), 0, 2112 }, /* BCHG */
+{ CPUFUNC(op_850_4), 0, 2128 }, /* BCHG */
+{ CPUFUNC(op_858_4), 0, 2136 }, /* BCHG */
+{ CPUFUNC(op_860_4), 0, 2144 }, /* BCHG */
+{ CPUFUNC(op_868_4), 0, 2152 }, /* BCHG */
+{ CPUFUNC(op_870_4), 0, 2160 }, /* BCHG */
+{ CPUFUNC(op_878_4), 0, 2168 }, /* BCHG */
+{ CPUFUNC(op_879_4), 0, 2169 }, /* BCHG */
+{ CPUFUNC(op_87a_4), 0, 2170 }, /* BCHG */
+{ CPUFUNC(op_87b_4), 0, 2171 }, /* BCHG */
+{ CPUFUNC(op_880_4), 0, 2176 }, /* BCLR */
+{ CPUFUNC(op_890_4), 0, 2192 }, /* BCLR */
+{ CPUFUNC(op_898_4), 0, 2200 }, /* BCLR */
+{ CPUFUNC(op_8a0_4), 0, 2208 }, /* BCLR */
+{ CPUFUNC(op_8a8_4), 0, 2216 }, /* BCLR */
+{ CPUFUNC(op_8b0_4), 0, 2224 }, /* BCLR */
+{ CPUFUNC(op_8b8_4), 0, 2232 }, /* BCLR */
+{ CPUFUNC(op_8b9_4), 0, 2233 }, /* BCLR */
+{ CPUFUNC(op_8ba_4), 0, 2234 }, /* BCLR */
+{ CPUFUNC(op_8bb_4), 0, 2235 }, /* BCLR */
+{ CPUFUNC(op_8c0_4), 0, 2240 }, /* BSET */
+{ CPUFUNC(op_8d0_4), 0, 2256 }, /* BSET */
+{ CPUFUNC(op_8d8_4), 0, 2264 }, /* BSET */
+{ CPUFUNC(op_8e0_4), 0, 2272 }, /* BSET */
+{ CPUFUNC(op_8e8_4), 0, 2280 }, /* BSET */
+{ CPUFUNC(op_8f0_4), 0, 2288 }, /* BSET */
+{ CPUFUNC(op_8f8_4), 0, 2296 }, /* BSET */
+{ CPUFUNC(op_8f9_4), 0, 2297 }, /* BSET */
+{ CPUFUNC(op_8fa_4), 0, 2298 }, /* BSET */
+{ CPUFUNC(op_8fb_4), 0, 2299 }, /* BSET */
+{ CPUFUNC(op_a00_4), 0, 2560 }, /* EOR */
+{ CPUFUNC(op_a10_4), 0, 2576 }, /* EOR */
+{ CPUFUNC(op_a18_4), 0, 2584 }, /* EOR */
+{ CPUFUNC(op_a20_4), 0, 2592 }, /* EOR */
+{ CPUFUNC(op_a28_4), 0, 2600 }, /* EOR */
+{ CPUFUNC(op_a30_4), 0, 2608 }, /* EOR */
+{ CPUFUNC(op_a38_4), 0, 2616 }, /* EOR */
+{ CPUFUNC(op_a39_4), 0, 2617 }, /* EOR */
+{ CPUFUNC(op_a3c_4), 0, 2620 }, /* EORSR */
+{ CPUFUNC(op_a40_4), 0, 2624 }, /* EOR */
+{ CPUFUNC(op_a50_4), 0, 2640 }, /* EOR */
+{ CPUFUNC(op_a58_4), 0, 2648 }, /* EOR */
+{ CPUFUNC(op_a60_4), 0, 2656 }, /* EOR */
+{ CPUFUNC(op_a68_4), 0, 2664 }, /* EOR */
+{ CPUFUNC(op_a70_4), 0, 2672 }, /* EOR */
+{ CPUFUNC(op_a78_4), 0, 2680 }, /* EOR */
+{ CPUFUNC(op_a79_4), 0, 2681 }, /* EOR */
+{ CPUFUNC(op_a7c_4), 0, 2684 }, /* EORSR */
+{ CPUFUNC(op_a80_4), 0, 2688 }, /* EOR */
+{ CPUFUNC(op_a90_4), 0, 2704 }, /* EOR */
+{ CPUFUNC(op_a98_4), 0, 2712 }, /* EOR */
+{ CPUFUNC(op_aa0_4), 0, 2720 }, /* EOR */
+{ CPUFUNC(op_aa8_4), 0, 2728 }, /* EOR */
+{ CPUFUNC(op_ab0_4), 0, 2736 }, /* EOR */
+{ CPUFUNC(op_ab8_4), 0, 2744 }, /* EOR */
+{ CPUFUNC(op_ab9_4), 0, 2745 }, /* EOR */
+{ CPUFUNC(op_c00_4), 0, 3072 }, /* CMP */
+{ CPUFUNC(op_c10_4), 0, 3088 }, /* CMP */
+{ CPUFUNC(op_c18_4), 0, 3096 }, /* CMP */
+{ CPUFUNC(op_c20_4), 0, 3104 }, /* CMP */
+{ CPUFUNC(op_c28_4), 0, 3112 }, /* CMP */
+{ CPUFUNC(op_c30_4), 0, 3120 }, /* CMP */
+{ CPUFUNC(op_c38_4), 0, 3128 }, /* CMP */
+{ CPUFUNC(op_c39_4), 0, 3129 }, /* CMP */
+{ CPUFUNC(op_c3a_4), 0, 3130 }, /* CMP */
+{ CPUFUNC(op_c3b_4), 0, 3131 }, /* CMP */
+{ CPUFUNC(op_c40_4), 0, 3136 }, /* CMP */
+{ CPUFUNC(op_c50_4), 0, 3152 }, /* CMP */
+{ CPUFUNC(op_c58_4), 0, 3160 }, /* CMP */
+{ CPUFUNC(op_c60_4), 0, 3168 }, /* CMP */
+{ CPUFUNC(op_c68_4), 0, 3176 }, /* CMP */
+{ CPUFUNC(op_c70_4), 0, 3184 }, /* CMP */
+{ CPUFUNC(op_c78_4), 0, 3192 }, /* CMP */
+{ CPUFUNC(op_c79_4), 0, 3193 }, /* CMP */
+{ CPUFUNC(op_c7a_4), 0, 3194 }, /* CMP */
+{ CPUFUNC(op_c7b_4), 0, 3195 }, /* CMP */
+{ CPUFUNC(op_c80_4), 0, 3200 }, /* CMP */
+{ CPUFUNC(op_c90_4), 0, 3216 }, /* CMP */
+{ CPUFUNC(op_c98_4), 0, 3224 }, /* CMP */
+{ CPUFUNC(op_ca0_4), 0, 3232 }, /* CMP */
+{ CPUFUNC(op_ca8_4), 0, 3240 }, /* CMP */
+{ CPUFUNC(op_cb0_4), 0, 3248 }, /* CMP */
+{ CPUFUNC(op_cb8_4), 0, 3256 }, /* CMP */
+{ CPUFUNC(op_cb9_4), 0, 3257 }, /* CMP */
+{ CPUFUNC(op_cba_4), 0, 3258 }, /* CMP */
+{ CPUFUNC(op_cbb_4), 0, 3259 }, /* CMP */
+{ CPUFUNC(op_1000_4), 0, 4096 }, /* MOVE */
+{ CPUFUNC(op_1008_4), 0, 4104 }, /* MOVE */
+{ CPUFUNC(op_1010_4), 0, 4112 }, /* MOVE */
+{ CPUFUNC(op_1018_4), 0, 4120 }, /* MOVE */
+{ CPUFUNC(op_1020_4), 0, 4128 }, /* MOVE */
+{ CPUFUNC(op_1028_4), 0, 4136 }, /* MOVE */
+{ CPUFUNC(op_1030_4), 0, 4144 }, /* MOVE */
+{ CPUFUNC(op_1038_4), 0, 4152 }, /* MOVE */
+{ CPUFUNC(op_1039_4), 0, 4153 }, /* MOVE */
+{ CPUFUNC(op_103a_4), 0, 4154 }, /* MOVE */
+{ CPUFUNC(op_103b_4), 0, 4155 }, /* MOVE */
+{ CPUFUNC(op_103c_4), 0, 4156 }, /* MOVE */
+{ CPUFUNC(op_1080_4), 0, 4224 }, /* MOVE */
+{ CPUFUNC(op_1088_4), 0, 4232 }, /* MOVE */
+{ CPUFUNC(op_1090_4), 0, 4240 }, /* MOVE */
+{ CPUFUNC(op_1098_4), 0, 4248 }, /* MOVE */
+{ CPUFUNC(op_10a0_4), 0, 4256 }, /* MOVE */
+{ CPUFUNC(op_10a8_4), 0, 4264 }, /* MOVE */
+{ CPUFUNC(op_10b0_4), 0, 4272 }, /* MOVE */
+{ CPUFUNC(op_10b8_4), 0, 4280 }, /* MOVE */
+{ CPUFUNC(op_10b9_4), 0, 4281 }, /* MOVE */
+{ CPUFUNC(op_10ba_4), 0, 4282 }, /* MOVE */
+{ CPUFUNC(op_10bb_4), 0, 4283 }, /* MOVE */
+{ CPUFUNC(op_10bc_4), 0, 4284 }, /* MOVE */
+{ CPUFUNC(op_10c0_4), 0, 4288 }, /* MOVE */
+{ CPUFUNC(op_10c8_4), 0, 4296 }, /* MOVE */
+{ CPUFUNC(op_10d0_4), 0, 4304 }, /* MOVE */
+{ CPUFUNC(op_10d8_4), 0, 4312 }, /* MOVE */
+{ CPUFUNC(op_10e0_4), 0, 4320 }, /* MOVE */
+{ CPUFUNC(op_10e8_4), 0, 4328 }, /* MOVE */
+{ CPUFUNC(op_10f0_4), 0, 4336 }, /* MOVE */
+{ CPUFUNC(op_10f8_4), 0, 4344 }, /* MOVE */
+{ CPUFUNC(op_10f9_4), 0, 4345 }, /* MOVE */
+{ CPUFUNC(op_10fa_4), 0, 4346 }, /* MOVE */
+{ CPUFUNC(op_10fb_4), 0, 4347 }, /* MOVE */
+{ CPUFUNC(op_10fc_4), 0, 4348 }, /* MOVE */
+{ CPUFUNC(op_1100_4), 0, 4352 }, /* MOVE */
+{ CPUFUNC(op_1108_4), 0, 4360 }, /* MOVE */
+{ CPUFUNC(op_1110_4), 0, 4368 }, /* MOVE */
+{ CPUFUNC(op_1118_4), 0, 4376 }, /* MOVE */
+{ CPUFUNC(op_1120_4), 0, 4384 }, /* MOVE */
+{ CPUFUNC(op_1128_4), 0, 4392 }, /* MOVE */
+{ CPUFUNC(op_1130_4), 0, 4400 }, /* MOVE */
+{ CPUFUNC(op_1138_4), 0, 4408 }, /* MOVE */
+{ CPUFUNC(op_1139_4), 0, 4409 }, /* MOVE */
+{ CPUFUNC(op_113a_4), 0, 4410 }, /* MOVE */
+{ CPUFUNC(op_113b_4), 0, 4411 }, /* MOVE */
+{ CPUFUNC(op_113c_4), 0, 4412 }, /* MOVE */
+{ CPUFUNC(op_1140_4), 0, 4416 }, /* MOVE */
+{ CPUFUNC(op_1148_4), 0, 4424 }, /* MOVE */
+{ CPUFUNC(op_1150_4), 0, 4432 }, /* MOVE */
+{ CPUFUNC(op_1158_4), 0, 4440 }, /* MOVE */
+{ CPUFUNC(op_1160_4), 0, 4448 }, /* MOVE */
+{ CPUFUNC(op_1168_4), 0, 4456 }, /* MOVE */
+{ CPUFUNC(op_1170_4), 0, 4464 }, /* MOVE */
+{ CPUFUNC(op_1178_4), 0, 4472 }, /* MOVE */
+{ CPUFUNC(op_1179_4), 0, 4473 }, /* MOVE */
+{ CPUFUNC(op_117a_4), 0, 4474 }, /* MOVE */
+{ CPUFUNC(op_117b_4), 0, 4475 }, /* MOVE */
+{ CPUFUNC(op_117c_4), 0, 4476 }, /* MOVE */
+{ CPUFUNC(op_1180_4), 0, 4480 }, /* MOVE */
+{ CPUFUNC(op_1188_4), 0, 4488 }, /* MOVE */
+{ CPUFUNC(op_1190_4), 0, 4496 }, /* MOVE */
+{ CPUFUNC(op_1198_4), 0, 4504 }, /* MOVE */
+{ CPUFUNC(op_11a0_4), 0, 4512 }, /* MOVE */
+{ CPUFUNC(op_11a8_4), 0, 4520 }, /* MOVE */
+{ CPUFUNC(op_11b0_4), 0, 4528 }, /* MOVE */
+{ CPUFUNC(op_11b8_4), 0, 4536 }, /* MOVE */
+{ CPUFUNC(op_11b9_4), 0, 4537 }, /* MOVE */
+{ CPUFUNC(op_11ba_4), 0, 4538 }, /* MOVE */
+{ CPUFUNC(op_11bb_4), 0, 4539 }, /* MOVE */
+{ CPUFUNC(op_11bc_4), 0, 4540 }, /* MOVE */
+{ CPUFUNC(op_11c0_4), 0, 4544 }, /* MOVE */
+{ CPUFUNC(op_11c8_4), 0, 4552 }, /* MOVE */
+{ CPUFUNC(op_11d0_4), 0, 4560 }, /* MOVE */
+{ CPUFUNC(op_11d8_4), 0, 4568 }, /* MOVE */
+{ CPUFUNC(op_11e0_4), 0, 4576 }, /* MOVE */
+{ CPUFUNC(op_11e8_4), 0, 4584 }, /* MOVE */
+{ CPUFUNC(op_11f0_4), 0, 4592 }, /* MOVE */
+{ CPUFUNC(op_11f8_4), 0, 4600 }, /* MOVE */
+{ CPUFUNC(op_11f9_4), 0, 4601 }, /* MOVE */
+{ CPUFUNC(op_11fa_4), 0, 4602 }, /* MOVE */
+{ CPUFUNC(op_11fb_4), 0, 4603 }, /* MOVE */
+{ CPUFUNC(op_11fc_4), 0, 4604 }, /* MOVE */
+{ CPUFUNC(op_13c0_4), 0, 5056 }, /* MOVE */
+{ CPUFUNC(op_13c8_4), 0, 5064 }, /* MOVE */
+{ CPUFUNC(op_13d0_4), 0, 5072 }, /* MOVE */
+{ CPUFUNC(op_13d8_4), 0, 5080 }, /* MOVE */
+{ CPUFUNC(op_13e0_4), 0, 5088 }, /* MOVE */
+{ CPUFUNC(op_13e8_4), 0, 5096 }, /* MOVE */
+{ CPUFUNC(op_13f0_4), 0, 5104 }, /* MOVE */
+{ CPUFUNC(op_13f8_4), 0, 5112 }, /* MOVE */
+{ CPUFUNC(op_13f9_4), 0, 5113 }, /* MOVE */
+{ CPUFUNC(op_13fa_4), 0, 5114 }, /* MOVE */
+{ CPUFUNC(op_13fb_4), 0, 5115 }, /* MOVE */
+{ CPUFUNC(op_13fc_4), 0, 5116 }, /* MOVE */
+{ CPUFUNC(op_2000_4), 0, 8192 }, /* MOVE */
+{ CPUFUNC(op_2008_4), 0, 8200 }, /* MOVE */
+{ CPUFUNC(op_2010_4), 0, 8208 }, /* MOVE */
+{ CPUFUNC(op_2018_4), 0, 8216 }, /* MOVE */
+{ CPUFUNC(op_2020_4), 0, 8224 }, /* MOVE */
+{ CPUFUNC(op_2028_4), 0, 8232 }, /* MOVE */
+{ CPUFUNC(op_2030_4), 0, 8240 }, /* MOVE */
+{ CPUFUNC(op_2038_4), 0, 8248 }, /* MOVE */
+{ CPUFUNC(op_2039_4), 0, 8249 }, /* MOVE */
+{ CPUFUNC(op_203a_4), 0, 8250 }, /* MOVE */
+{ CPUFUNC(op_203b_4), 0, 8251 }, /* MOVE */
+{ CPUFUNC(op_203c_4), 0, 8252 }, /* MOVE */
+{ CPUFUNC(op_2040_4), 0, 8256 }, /* MOVEA */
+{ CPUFUNC(op_2048_4), 0, 8264 }, /* MOVEA */
+{ CPUFUNC(op_2050_4), 0, 8272 }, /* MOVEA */
+{ CPUFUNC(op_2058_4), 0, 8280 }, /* MOVEA */
+{ CPUFUNC(op_2060_4), 0, 8288 }, /* MOVEA */
+{ CPUFUNC(op_2068_4), 0, 8296 }, /* MOVEA */
+{ CPUFUNC(op_2070_4), 0, 8304 }, /* MOVEA */
+{ CPUFUNC(op_2078_4), 0, 8312 }, /* MOVEA */
+{ CPUFUNC(op_2079_4), 0, 8313 }, /* MOVEA */
+{ CPUFUNC(op_207a_4), 0, 8314 }, /* MOVEA */
+{ CPUFUNC(op_207b_4), 0, 8315 }, /* MOVEA */
+{ CPUFUNC(op_207c_4), 0, 8316 }, /* MOVEA */
+{ CPUFUNC(op_2080_4), 0, 8320 }, /* MOVE */
+{ CPUFUNC(op_2088_4), 0, 8328 }, /* MOVE */
+{ CPUFUNC(op_2090_4), 0, 8336 }, /* MOVE */
+{ CPUFUNC(op_2098_4), 0, 8344 }, /* MOVE */
+{ CPUFUNC(op_20a0_4), 0, 8352 }, /* MOVE */
+{ CPUFUNC(op_20a8_4), 0, 8360 }, /* MOVE */
+{ CPUFUNC(op_20b0_4), 0, 8368 }, /* MOVE */
+{ CPUFUNC(op_20b8_4), 0, 8376 }, /* MOVE */
+{ CPUFUNC(op_20b9_4), 0, 8377 }, /* MOVE */
+{ CPUFUNC(op_20ba_4), 0, 8378 }, /* MOVE */
+{ CPUFUNC(op_20bb_4), 0, 8379 }, /* MOVE */
+{ CPUFUNC(op_20bc_4), 0, 8380 }, /* MOVE */
+{ CPUFUNC(op_20c0_4), 0, 8384 }, /* MOVE */
+{ CPUFUNC(op_20c8_4), 0, 8392 }, /* MOVE */
+{ CPUFUNC(op_20d0_4), 0, 8400 }, /* MOVE */
+{ CPUFUNC(op_20d8_4), 0, 8408 }, /* MOVE */
+{ CPUFUNC(op_20e0_4), 0, 8416 }, /* MOVE */
+{ CPUFUNC(op_20e8_4), 0, 8424 }, /* MOVE */
+{ CPUFUNC(op_20f0_4), 0, 8432 }, /* MOVE */
+{ CPUFUNC(op_20f8_4), 0, 8440 }, /* MOVE */
+{ CPUFUNC(op_20f9_4), 0, 8441 }, /* MOVE */
+{ CPUFUNC(op_20fa_4), 0, 8442 }, /* MOVE */
+{ CPUFUNC(op_20fb_4), 0, 8443 }, /* MOVE */
+{ CPUFUNC(op_20fc_4), 0, 8444 }, /* MOVE */
+{ CPUFUNC(op_2100_4), 0, 8448 }, /* MOVE */
+{ CPUFUNC(op_2108_4), 0, 8456 }, /* MOVE */
+{ CPUFUNC(op_2110_4), 0, 8464 }, /* MOVE */
+{ CPUFUNC(op_2118_4), 0, 8472 }, /* MOVE */
+{ CPUFUNC(op_2120_4), 0, 8480 }, /* MOVE */
+{ CPUFUNC(op_2128_4), 0, 8488 }, /* MOVE */
+{ CPUFUNC(op_2130_4), 0, 8496 }, /* MOVE */
+{ CPUFUNC(op_2138_4), 0, 8504 }, /* MOVE */
+{ CPUFUNC(op_2139_4), 0, 8505 }, /* MOVE */
+{ CPUFUNC(op_213a_4), 0, 8506 }, /* MOVE */
+{ CPUFUNC(op_213b_4), 0, 8507 }, /* MOVE */
+{ CPUFUNC(op_213c_4), 0, 8508 }, /* MOVE */
+{ CPUFUNC(op_2140_4), 0, 8512 }, /* MOVE */
+{ CPUFUNC(op_2148_4), 0, 8520 }, /* MOVE */
+{ CPUFUNC(op_2150_4), 0, 8528 }, /* MOVE */
+{ CPUFUNC(op_2158_4), 0, 8536 }, /* MOVE */
+{ CPUFUNC(op_2160_4), 0, 8544 }, /* MOVE */
+{ CPUFUNC(op_2168_4), 0, 8552 }, /* MOVE */
+{ CPUFUNC(op_2170_4), 0, 8560 }, /* MOVE */
+{ CPUFUNC(op_2178_4), 0, 8568 }, /* MOVE */
+{ CPUFUNC(op_2179_4), 0, 8569 }, /* MOVE */
+{ CPUFUNC(op_217a_4), 0, 8570 }, /* MOVE */
+{ CPUFUNC(op_217b_4), 0, 8571 }, /* MOVE */
+{ CPUFUNC(op_217c_4), 0, 8572 }, /* MOVE */
+{ CPUFUNC(op_2180_4), 0, 8576 }, /* MOVE */
+{ CPUFUNC(op_2188_4), 0, 8584 }, /* MOVE */
+{ CPUFUNC(op_2190_4), 0, 8592 }, /* MOVE */
+{ CPUFUNC(op_2198_4), 0, 8600 }, /* MOVE */
+{ CPUFUNC(op_21a0_4), 0, 8608 }, /* MOVE */
+{ CPUFUNC(op_21a8_4), 0, 8616 }, /* MOVE */
+{ CPUFUNC(op_21b0_4), 0, 8624 }, /* MOVE */
+{ CPUFUNC(op_21b8_4), 0, 8632 }, /* MOVE */
+{ CPUFUNC(op_21b9_4), 0, 8633 }, /* MOVE */
+{ CPUFUNC(op_21ba_4), 0, 8634 }, /* MOVE */
+{ CPUFUNC(op_21bb_4), 0, 8635 }, /* MOVE */
+{ CPUFUNC(op_21bc_4), 0, 8636 }, /* MOVE */
+{ CPUFUNC(op_21c0_4), 0, 8640 }, /* MOVE */
+{ CPUFUNC(op_21c8_4), 0, 8648 }, /* MOVE */
+{ CPUFUNC(op_21d0_4), 0, 8656 }, /* MOVE */
+{ CPUFUNC(op_21d8_4), 0, 8664 }, /* MOVE */
+{ CPUFUNC(op_21e0_4), 0, 8672 }, /* MOVE */
+{ CPUFUNC(op_21e8_4), 0, 8680 }, /* MOVE */
+{ CPUFUNC(op_21f0_4), 0, 8688 }, /* MOVE */
+{ CPUFUNC(op_21f8_4), 0, 8696 }, /* MOVE */
+{ CPUFUNC(op_21f9_4), 0, 8697 }, /* MOVE */
+{ CPUFUNC(op_21fa_4), 0, 8698 }, /* MOVE */
+{ CPUFUNC(op_21fb_4), 0, 8699 }, /* MOVE */
+{ CPUFUNC(op_21fc_4), 0, 8700 }, /* MOVE */
+{ CPUFUNC(op_23c0_4), 0, 9152 }, /* MOVE */
+{ CPUFUNC(op_23c8_4), 0, 9160 }, /* MOVE */
+{ CPUFUNC(op_23d0_4), 0, 9168 }, /* MOVE */
+{ CPUFUNC(op_23d8_4), 0, 9176 }, /* MOVE */
+{ CPUFUNC(op_23e0_4), 0, 9184 }, /* MOVE */
+{ CPUFUNC(op_23e8_4), 0, 9192 }, /* MOVE */
+{ CPUFUNC(op_23f0_4), 0, 9200 }, /* MOVE */
+{ CPUFUNC(op_23f8_4), 0, 9208 }, /* MOVE */
+{ CPUFUNC(op_23f9_4), 0, 9209 }, /* MOVE */
+{ CPUFUNC(op_23fa_4), 0, 9210 }, /* MOVE */
+{ CPUFUNC(op_23fb_4), 0, 9211 }, /* MOVE */
+{ CPUFUNC(op_23fc_4), 0, 9212 }, /* MOVE */
+{ CPUFUNC(op_3000_4), 0, 12288 }, /* MOVE */
+{ CPUFUNC(op_3008_4), 0, 12296 }, /* MOVE */
+{ CPUFUNC(op_3010_4), 0, 12304 }, /* MOVE */
+{ CPUFUNC(op_3018_4), 0, 12312 }, /* MOVE */
+{ CPUFUNC(op_3020_4), 0, 12320 }, /* MOVE */
+{ CPUFUNC(op_3028_4), 0, 12328 }, /* MOVE */
+{ CPUFUNC(op_3030_4), 0, 12336 }, /* MOVE */
+{ CPUFUNC(op_3038_4), 0, 12344 }, /* MOVE */
+{ CPUFUNC(op_3039_4), 0, 12345 }, /* MOVE */
+{ CPUFUNC(op_303a_4), 0, 12346 }, /* MOVE */
+{ CPUFUNC(op_303b_4), 0, 12347 }, /* MOVE */
+{ CPUFUNC(op_303c_4), 0, 12348 }, /* MOVE */
+{ CPUFUNC(op_3040_4), 0, 12352 }, /* MOVEA */
+{ CPUFUNC(op_3048_4), 0, 12360 }, /* MOVEA */
+{ CPUFUNC(op_3050_4), 0, 12368 }, /* MOVEA */
+{ CPUFUNC(op_3058_4), 0, 12376 }, /* MOVEA */
+{ CPUFUNC(op_3060_4), 0, 12384 }, /* MOVEA */
+{ CPUFUNC(op_3068_4), 0, 12392 }, /* MOVEA */
+{ CPUFUNC(op_3070_4), 0, 12400 }, /* MOVEA */
+{ CPUFUNC(op_3078_4), 0, 12408 }, /* MOVEA */
+{ CPUFUNC(op_3079_4), 0, 12409 }, /* MOVEA */
+{ CPUFUNC(op_307a_4), 0, 12410 }, /* MOVEA */
+{ CPUFUNC(op_307b_4), 0, 12411 }, /* MOVEA */
+{ CPUFUNC(op_307c_4), 0, 12412 }, /* MOVEA */
+{ CPUFUNC(op_3080_4), 0, 12416 }, /* MOVE */
+{ CPUFUNC(op_3088_4), 0, 12424 }, /* MOVE */
+{ CPUFUNC(op_3090_4), 0, 12432 }, /* MOVE */
+{ CPUFUNC(op_3098_4), 0, 12440 }, /* MOVE */
+{ CPUFUNC(op_30a0_4), 0, 12448 }, /* MOVE */
+{ CPUFUNC(op_30a8_4), 0, 12456 }, /* MOVE */
+{ CPUFUNC(op_30b0_4), 0, 12464 }, /* MOVE */
+{ CPUFUNC(op_30b8_4), 0, 12472 }, /* MOVE */
+{ CPUFUNC(op_30b9_4), 0, 12473 }, /* MOVE */
+{ CPUFUNC(op_30ba_4), 0, 12474 }, /* MOVE */
+{ CPUFUNC(op_30bb_4), 0, 12475 }, /* MOVE */
+{ CPUFUNC(op_30bc_4), 0, 12476 }, /* MOVE */
+{ CPUFUNC(op_30c0_4), 0, 12480 }, /* MOVE */
+{ CPUFUNC(op_30c8_4), 0, 12488 }, /* MOVE */
+{ CPUFUNC(op_30d0_4), 0, 12496 }, /* MOVE */
+{ CPUFUNC(op_30d8_4), 0, 12504 }, /* MOVE */
+{ CPUFUNC(op_30e0_4), 0, 12512 }, /* MOVE */
+{ CPUFUNC(op_30e8_4), 0, 12520 }, /* MOVE */
+{ CPUFUNC(op_30f0_4), 0, 12528 }, /* MOVE */
+{ CPUFUNC(op_30f8_4), 0, 12536 }, /* MOVE */
+{ CPUFUNC(op_30f9_4), 0, 12537 }, /* MOVE */
+{ CPUFUNC(op_30fa_4), 0, 12538 }, /* MOVE */
+{ CPUFUNC(op_30fb_4), 0, 12539 }, /* MOVE */
+{ CPUFUNC(op_30fc_4), 0, 12540 }, /* MOVE */
+{ CPUFUNC(op_3100_4), 0, 12544 }, /* MOVE */
+{ CPUFUNC(op_3108_4), 0, 12552 }, /* MOVE */
+{ CPUFUNC(op_3110_4), 0, 12560 }, /* MOVE */
+{ CPUFUNC(op_3118_4), 0, 12568 }, /* MOVE */
+{ CPUFUNC(op_3120_4), 0, 12576 }, /* MOVE */
+{ CPUFUNC(op_3128_4), 0, 12584 }, /* MOVE */
+{ CPUFUNC(op_3130_4), 0, 12592 }, /* MOVE */
+{ CPUFUNC(op_3138_4), 0, 12600 }, /* MOVE */
+{ CPUFUNC(op_3139_4), 0, 12601 }, /* MOVE */
+{ CPUFUNC(op_313a_4), 0, 12602 }, /* MOVE */
+{ CPUFUNC(op_313b_4), 0, 12603 }, /* MOVE */
+{ CPUFUNC(op_313c_4), 0, 12604 }, /* MOVE */
+{ CPUFUNC(op_3140_4), 0, 12608 }, /* MOVE */
+{ CPUFUNC(op_3148_4), 0, 12616 }, /* MOVE */
+{ CPUFUNC(op_3150_4), 0, 12624 }, /* MOVE */
+{ CPUFUNC(op_3158_4), 0, 12632 }, /* MOVE */
+{ CPUFUNC(op_3160_4), 0, 12640 }, /* MOVE */
+{ CPUFUNC(op_3168_4), 0, 12648 }, /* MOVE */
+{ CPUFUNC(op_3170_4), 0, 12656 }, /* MOVE */
+{ CPUFUNC(op_3178_4), 0, 12664 }, /* MOVE */
+{ CPUFUNC(op_3179_4), 0, 12665 }, /* MOVE */
+{ CPUFUNC(op_317a_4), 0, 12666 }, /* MOVE */
+{ CPUFUNC(op_317b_4), 0, 12667 }, /* MOVE */
+{ CPUFUNC(op_317c_4), 0, 12668 }, /* MOVE */
+{ CPUFUNC(op_3180_4), 0, 12672 }, /* MOVE */
+{ CPUFUNC(op_3188_4), 0, 12680 }, /* MOVE */
+{ CPUFUNC(op_3190_4), 0, 12688 }, /* MOVE */
+{ CPUFUNC(op_3198_4), 0, 12696 }, /* MOVE */
+{ CPUFUNC(op_31a0_4), 0, 12704 }, /* MOVE */
+{ CPUFUNC(op_31a8_4), 0, 12712 }, /* MOVE */
+{ CPUFUNC(op_31b0_4), 0, 12720 }, /* MOVE */
+{ CPUFUNC(op_31b8_4), 0, 12728 }, /* MOVE */
+{ CPUFUNC(op_31b9_4), 0, 12729 }, /* MOVE */
+{ CPUFUNC(op_31ba_4), 0, 12730 }, /* MOVE */
+{ CPUFUNC(op_31bb_4), 0, 12731 }, /* MOVE */
+{ CPUFUNC(op_31bc_4), 0, 12732 }, /* MOVE */
+{ CPUFUNC(op_31c0_4), 0, 12736 }, /* MOVE */
+{ CPUFUNC(op_31c8_4), 0, 12744 }, /* MOVE */
+{ CPUFUNC(op_31d0_4), 0, 12752 }, /* MOVE */
+{ CPUFUNC(op_31d8_4), 0, 12760 }, /* MOVE */
+{ CPUFUNC(op_31e0_4), 0, 12768 }, /* MOVE */
+{ CPUFUNC(op_31e8_4), 0, 12776 }, /* MOVE */
+{ CPUFUNC(op_31f0_4), 0, 12784 }, /* MOVE */
+{ CPUFUNC(op_31f8_4), 0, 12792 }, /* MOVE */
+{ CPUFUNC(op_31f9_4), 0, 12793 }, /* MOVE */
+{ CPUFUNC(op_31fa_4), 0, 12794 }, /* MOVE */
+{ CPUFUNC(op_31fb_4), 0, 12795 }, /* MOVE */
+{ CPUFUNC(op_31fc_4), 0, 12796 }, /* MOVE */
+{ CPUFUNC(op_33c0_4), 0, 13248 }, /* MOVE */
+{ CPUFUNC(op_33c8_4), 0, 13256 }, /* MOVE */
+{ CPUFUNC(op_33d0_4), 0, 13264 }, /* MOVE */
+{ CPUFUNC(op_33d8_4), 0, 13272 }, /* MOVE */
+{ CPUFUNC(op_33e0_4), 0, 13280 }, /* MOVE */
+{ CPUFUNC(op_33e8_4), 0, 13288 }, /* MOVE */
+{ CPUFUNC(op_33f0_4), 0, 13296 }, /* MOVE */
+{ CPUFUNC(op_33f8_4), 0, 13304 }, /* MOVE */
+{ CPUFUNC(op_33f9_4), 0, 13305 }, /* MOVE */
+{ CPUFUNC(op_33fa_4), 0, 13306 }, /* MOVE */
+{ CPUFUNC(op_33fb_4), 0, 13307 }, /* MOVE */
+{ CPUFUNC(op_33fc_4), 0, 13308 }, /* MOVE */
+{ CPUFUNC(op_4000_4), 0, 16384 }, /* NEGX */
+{ CPUFUNC(op_4010_4), 0, 16400 }, /* NEGX */
+{ CPUFUNC(op_4018_4), 0, 16408 }, /* NEGX */
+{ CPUFUNC(op_4020_4), 0, 16416 }, /* NEGX */
+{ CPUFUNC(op_4028_4), 0, 16424 }, /* NEGX */
+{ CPUFUNC(op_4030_4), 0, 16432 }, /* NEGX */
+{ CPUFUNC(op_4038_4), 0, 16440 }, /* NEGX */
+{ CPUFUNC(op_4039_4), 0, 16441 }, /* NEGX */
+{ CPUFUNC(op_4040_4), 0, 16448 }, /* NEGX */
+{ CPUFUNC(op_4050_4), 0, 16464 }, /* NEGX */
+{ CPUFUNC(op_4058_4), 0, 16472 }, /* NEGX */
+{ CPUFUNC(op_4060_4), 0, 16480 }, /* NEGX */
+{ CPUFUNC(op_4068_4), 0, 16488 }, /* NEGX */
+{ CPUFUNC(op_4070_4), 0, 16496 }, /* NEGX */
+{ CPUFUNC(op_4078_4), 0, 16504 }, /* NEGX */
+{ CPUFUNC(op_4079_4), 0, 16505 }, /* NEGX */
+{ CPUFUNC(op_4080_4), 0, 16512 }, /* NEGX */
+{ CPUFUNC(op_4090_4), 0, 16528 }, /* NEGX */
+{ CPUFUNC(op_4098_4), 0, 16536 }, /* NEGX */
+{ CPUFUNC(op_40a0_4), 0, 16544 }, /* NEGX */
+{ CPUFUNC(op_40a8_4), 0, 16552 }, /* NEGX */
+{ CPUFUNC(op_40b0_4), 0, 16560 }, /* NEGX */
+{ CPUFUNC(op_40b8_4), 0, 16568 }, /* NEGX */
+{ CPUFUNC(op_40b9_4), 0, 16569 }, /* NEGX */
+{ CPUFUNC(op_40c0_4), 0, 16576 }, /* MVSR2 */
+{ CPUFUNC(op_40d0_4), 0, 16592 }, /* MVSR2 */
+{ CPUFUNC(op_40d8_4), 0, 16600 }, /* MVSR2 */
+{ CPUFUNC(op_40e0_4), 0, 16608 }, /* MVSR2 */
+{ CPUFUNC(op_40e8_4), 0, 16616 }, /* MVSR2 */
+{ CPUFUNC(op_40f0_4), 0, 16624 }, /* MVSR2 */
+{ CPUFUNC(op_40f8_4), 0, 16632 }, /* MVSR2 */
+{ CPUFUNC(op_40f9_4), 0, 16633 }, /* MVSR2 */
+{ CPUFUNC(op_4180_4), 0, 16768 }, /* CHK */
+{ CPUFUNC(op_4190_4), 0, 16784 }, /* CHK */
+{ CPUFUNC(op_4198_4), 0, 16792 }, /* CHK */
+{ CPUFUNC(op_41a0_4), 0, 16800 }, /* CHK */
+{ CPUFUNC(op_41a8_4), 0, 16808 }, /* CHK */
+{ CPUFUNC(op_41b0_4), 0, 16816 }, /* CHK */
+{ CPUFUNC(op_41b8_4), 0, 16824 }, /* CHK */
+{ CPUFUNC(op_41b9_4), 0, 16825 }, /* CHK */
+{ CPUFUNC(op_41ba_4), 0, 16826 }, /* CHK */
+{ CPUFUNC(op_41bb_4), 0, 16827 }, /* CHK */
+{ CPUFUNC(op_41bc_4), 0, 16828 }, /* CHK */
+{ CPUFUNC(op_41d0_4), 0, 16848 }, /* LEA */
+{ CPUFUNC(op_41e8_4), 0, 16872 }, /* LEA */
+{ CPUFUNC(op_41f0_4), 0, 16880 }, /* LEA */
+{ CPUFUNC(op_41f8_4), 0, 16888 }, /* LEA */
+{ CPUFUNC(op_41f9_4), 0, 16889 }, /* LEA */
+{ CPUFUNC(op_41fa_4), 0, 16890 }, /* LEA */
+{ CPUFUNC(op_41fb_4), 0, 16891 }, /* LEA */
+{ CPUFUNC(op_4200_4), 0, 16896 }, /* CLR */
+{ CPUFUNC(op_4210_4), 0, 16912 }, /* CLR */
+{ CPUFUNC(op_4218_4), 0, 16920 }, /* CLR */
+{ CPUFUNC(op_4220_4), 0, 16928 }, /* CLR */
+{ CPUFUNC(op_4228_4), 0, 16936 }, /* CLR */
+{ CPUFUNC(op_4230_4), 0, 16944 }, /* CLR */
+{ CPUFUNC(op_4238_4), 0, 16952 }, /* CLR */
+{ CPUFUNC(op_4239_4), 0, 16953 }, /* CLR */
+{ CPUFUNC(op_4240_4), 0, 16960 }, /* CLR */
+{ CPUFUNC(op_4250_4), 0, 16976 }, /* CLR */
+{ CPUFUNC(op_4258_4), 0, 16984 }, /* CLR */
+{ CPUFUNC(op_4260_4), 0, 16992 }, /* CLR */
+{ CPUFUNC(op_4268_4), 0, 17000 }, /* CLR */
+{ CPUFUNC(op_4270_4), 0, 17008 }, /* CLR */
+{ CPUFUNC(op_4278_4), 0, 17016 }, /* CLR */
+{ CPUFUNC(op_4279_4), 0, 17017 }, /* CLR */
+{ CPUFUNC(op_4280_4), 0, 17024 }, /* CLR */
+{ CPUFUNC(op_4290_4), 0, 17040 }, /* CLR */
+{ CPUFUNC(op_4298_4), 0, 17048 }, /* CLR */
+{ CPUFUNC(op_42a0_4), 0, 17056 }, /* CLR */
+{ CPUFUNC(op_42a8_4), 0, 17064 }, /* CLR */
+{ CPUFUNC(op_42b0_4), 0, 17072 }, /* CLR */
+{ CPUFUNC(op_42b8_4), 0, 17080 }, /* CLR */
+{ CPUFUNC(op_42b9_4), 0, 17081 }, /* CLR */
+{ CPUFUNC(op_4400_4), 0, 17408 }, /* NEG */
+{ CPUFUNC(op_4410_4), 0, 17424 }, /* NEG */
+{ CPUFUNC(op_4418_4), 0, 17432 }, /* NEG */
+{ CPUFUNC(op_4420_4), 0, 17440 }, /* NEG */
+{ CPUFUNC(op_4428_4), 0, 17448 }, /* NEG */
+{ CPUFUNC(op_4430_4), 0, 17456 }, /* NEG */
+{ CPUFUNC(op_4438_4), 0, 17464 }, /* NEG */
+{ CPUFUNC(op_4439_4), 0, 17465 }, /* NEG */
+{ CPUFUNC(op_4440_4), 0, 17472 }, /* NEG */
+{ CPUFUNC(op_4450_4), 0, 17488 }, /* NEG */
+{ CPUFUNC(op_4458_4), 0, 17496 }, /* NEG */
+{ CPUFUNC(op_4460_4), 0, 17504 }, /* NEG */
+{ CPUFUNC(op_4468_4), 0, 17512 }, /* NEG */
+{ CPUFUNC(op_4470_4), 0, 17520 }, /* NEG */
+{ CPUFUNC(op_4478_4), 0, 17528 }, /* NEG */
+{ CPUFUNC(op_4479_4), 0, 17529 }, /* NEG */
+{ CPUFUNC(op_4480_4), 0, 17536 }, /* NEG */
+{ CPUFUNC(op_4490_4), 0, 17552 }, /* NEG */
+{ CPUFUNC(op_4498_4), 0, 17560 }, /* NEG */
+{ CPUFUNC(op_44a0_4), 0, 17568 }, /* NEG */
+{ CPUFUNC(op_44a8_4), 0, 17576 }, /* NEG */
+{ CPUFUNC(op_44b0_4), 0, 17584 }, /* NEG */
+{ CPUFUNC(op_44b8_4), 0, 17592 }, /* NEG */
+{ CPUFUNC(op_44b9_4), 0, 17593 }, /* NEG */
+{ CPUFUNC(op_44c0_4), 0, 17600 }, /* MV2SR */
+{ CPUFUNC(op_44d0_4), 0, 17616 }, /* MV2SR */
+{ CPUFUNC(op_44d8_4), 0, 17624 }, /* MV2SR */
+{ CPUFUNC(op_44e0_4), 0, 17632 }, /* MV2SR */
+{ CPUFUNC(op_44e8_4), 0, 17640 }, /* MV2SR */
+{ CPUFUNC(op_44f0_4), 0, 17648 }, /* MV2SR */
+{ CPUFUNC(op_44f8_4), 0, 17656 }, /* MV2SR */
+{ CPUFUNC(op_44f9_4), 0, 17657 }, /* MV2SR */
+{ CPUFUNC(op_44fa_4), 0, 17658 }, /* MV2SR */
+{ CPUFUNC(op_44fb_4), 0, 17659 }, /* MV2SR */
+{ CPUFUNC(op_44fc_4), 0, 17660 }, /* MV2SR */
+{ CPUFUNC(op_4600_4), 0, 17920 }, /* NOT */
+{ CPUFUNC(op_4610_4), 0, 17936 }, /* NOT */
+{ CPUFUNC(op_4618_4), 0, 17944 }, /* NOT */
+{ CPUFUNC(op_4620_4), 0, 17952 }, /* NOT */
+{ CPUFUNC(op_4628_4), 0, 17960 }, /* NOT */
+{ CPUFUNC(op_4630_4), 0, 17968 }, /* NOT */
+{ CPUFUNC(op_4638_4), 0, 17976 }, /* NOT */
+{ CPUFUNC(op_4639_4), 0, 17977 }, /* NOT */
+{ CPUFUNC(op_4640_4), 0, 17984 }, /* NOT */
+{ CPUFUNC(op_4650_4), 0, 18000 }, /* NOT */
+{ CPUFUNC(op_4658_4), 0, 18008 }, /* NOT */
+{ CPUFUNC(op_4660_4), 0, 18016 }, /* NOT */
+{ CPUFUNC(op_4668_4), 0, 18024 }, /* NOT */
+{ CPUFUNC(op_4670_4), 0, 18032 }, /* NOT */
+{ CPUFUNC(op_4678_4), 0, 18040 }, /* NOT */
+{ CPUFUNC(op_4679_4), 0, 18041 }, /* NOT */
+{ CPUFUNC(op_4680_4), 0, 18048 }, /* NOT */
+{ CPUFUNC(op_4690_4), 0, 18064 }, /* NOT */
+{ CPUFUNC(op_4698_4), 0, 18072 }, /* NOT */
+{ CPUFUNC(op_46a0_4), 0, 18080 }, /* NOT */
+{ CPUFUNC(op_46a8_4), 0, 18088 }, /* NOT */
+{ CPUFUNC(op_46b0_4), 0, 18096 }, /* NOT */
+{ CPUFUNC(op_46b8_4), 0, 18104 }, /* NOT */
+{ CPUFUNC(op_46b9_4), 0, 18105 }, /* NOT */
+{ CPUFUNC(op_46c0_4), 0, 18112 }, /* MV2SR */
+{ CPUFUNC(op_46d0_4), 0, 18128 }, /* MV2SR */
+{ CPUFUNC(op_46d8_4), 0, 18136 }, /* MV2SR */
+{ CPUFUNC(op_46e0_4), 0, 18144 }, /* MV2SR */
+{ CPUFUNC(op_46e8_4), 0, 18152 }, /* MV2SR */
+{ CPUFUNC(op_46f0_4), 0, 18160 }, /* MV2SR */
+{ CPUFUNC(op_46f8_4), 0, 18168 }, /* MV2SR */
+{ CPUFUNC(op_46f9_4), 0, 18169 }, /* MV2SR */
+{ CPUFUNC(op_46fa_4), 0, 18170 }, /* MV2SR */
+{ CPUFUNC(op_46fb_4), 0, 18171 }, /* MV2SR */
+{ CPUFUNC(op_46fc_4), 0, 18172 }, /* MV2SR */
+{ CPUFUNC(op_4800_4), 0, 18432 }, /* NBCD */
+{ CPUFUNC(op_4810_4), 0, 18448 }, /* NBCD */
+{ CPUFUNC(op_4818_4), 0, 18456 }, /* NBCD */
+{ CPUFUNC(op_4820_4), 0, 18464 }, /* NBCD */
+{ CPUFUNC(op_4828_4), 0, 18472 }, /* NBCD */
+{ CPUFUNC(op_4830_4), 0, 18480 }, /* NBCD */
+{ CPUFUNC(op_4838_4), 0, 18488 }, /* NBCD */
+{ CPUFUNC(op_4839_4), 0, 18489 }, /* NBCD */
+{ CPUFUNC(op_4840_4), 0, 18496 }, /* SWAP */
+{ CPUFUNC(op_4850_4), 0, 18512 }, /* PEA */
+{ CPUFUNC(op_4868_4), 0, 18536 }, /* PEA */
+{ CPUFUNC(op_4870_4), 0, 18544 }, /* PEA */
+{ CPUFUNC(op_4878_4), 0, 18552 }, /* PEA */
+{ CPUFUNC(op_4879_4), 0, 18553 }, /* PEA */
+{ CPUFUNC(op_487a_4), 0, 18554 }, /* PEA */
+{ CPUFUNC(op_487b_4), 0, 18555 }, /* PEA */
+{ CPUFUNC(op_4880_4), 0, 18560 }, /* EXT */
+{ CPUFUNC(op_4890_4), 0, 18576 }, /* MVMLE */
+{ CPUFUNC(op_48a0_4), 0, 18592 }, /* MVMLE */
+{ CPUFUNC(op_48a8_4), 0, 18600 }, /* MVMLE */
+{ CPUFUNC(op_48b0_4), 0, 18608 }, /* MVMLE */
+{ CPUFUNC(op_48b8_4), 0, 18616 }, /* MVMLE */
+{ CPUFUNC(op_48b9_4), 0, 18617 }, /* MVMLE */
+{ CPUFUNC(op_48c0_4), 0, 18624 }, /* EXT */
+{ CPUFUNC(op_48d0_4), 0, 18640 }, /* MVMLE */
+{ CPUFUNC(op_48e0_4), 0, 18656 }, /* MVMLE */
+{ CPUFUNC(op_48e8_4), 0, 18664 }, /* MVMLE */
+{ CPUFUNC(op_48f0_4), 0, 18672 }, /* MVMLE */
+{ CPUFUNC(op_48f8_4), 0, 18680 }, /* MVMLE */
+{ CPUFUNC(op_48f9_4), 0, 18681 }, /* MVMLE */
+{ CPUFUNC(op_4a00_4), 0, 18944 }, /* TST */
+{ CPUFUNC(op_4a10_4), 0, 18960 }, /* TST */
+{ CPUFUNC(op_4a18_4), 0, 18968 }, /* TST */
+{ CPUFUNC(op_4a20_4), 0, 18976 }, /* TST */
+{ CPUFUNC(op_4a28_4), 0, 18984 }, /* TST */
+{ CPUFUNC(op_4a30_4), 0, 18992 }, /* TST */
+{ CPUFUNC(op_4a38_4), 0, 19000 }, /* TST */
+{ CPUFUNC(op_4a39_4), 0, 19001 }, /* TST */
+{ CPUFUNC(op_4a3a_4), 0, 19002 }, /* TST */
+{ CPUFUNC(op_4a3b_4), 0, 19003 }, /* TST */
+{ CPUFUNC(op_4a3c_4), 0, 19004 }, /* TST */
+{ CPUFUNC(op_4a40_4), 0, 19008 }, /* TST */
+{ CPUFUNC(op_4a48_4), 0, 19016 }, /* TST */
+{ CPUFUNC(op_4a50_4), 0, 19024 }, /* TST */
+{ CPUFUNC(op_4a58_4), 0, 19032 }, /* TST */
+{ CPUFUNC(op_4a60_4), 0, 19040 }, /* TST */
+{ CPUFUNC(op_4a68_4), 0, 19048 }, /* TST */
+{ CPUFUNC(op_4a70_4), 0, 19056 }, /* TST */
+{ CPUFUNC(op_4a78_4), 0, 19064 }, /* TST */
+{ CPUFUNC(op_4a79_4), 0, 19065 }, /* TST */
+{ CPUFUNC(op_4a7a_4), 0, 19066 }, /* TST */
+{ CPUFUNC(op_4a7b_4), 0, 19067 }, /* TST */
+{ CPUFUNC(op_4a7c_4), 0, 19068 }, /* TST */
+{ CPUFUNC(op_4a80_4), 0, 19072 }, /* TST */
+{ CPUFUNC(op_4a88_4), 0, 19080 }, /* TST */
+{ CPUFUNC(op_4a90_4), 0, 19088 }, /* TST */
+{ CPUFUNC(op_4a98_4), 0, 19096 }, /* TST */
+{ CPUFUNC(op_4aa0_4), 0, 19104 }, /* TST */
+{ CPUFUNC(op_4aa8_4), 0, 19112 }, /* TST */
+{ CPUFUNC(op_4ab0_4), 0, 19120 }, /* TST */
+{ CPUFUNC(op_4ab8_4), 0, 19128 }, /* TST */
+{ CPUFUNC(op_4ab9_4), 0, 19129 }, /* TST */
+{ CPUFUNC(op_4aba_4), 0, 19130 }, /* TST */
+{ CPUFUNC(op_4abb_4), 0, 19131 }, /* TST */
+{ CPUFUNC(op_4abc_4), 0, 19132 }, /* TST */
+{ CPUFUNC(op_4ac0_4), 0, 19136 }, /* TAS */
+{ CPUFUNC(op_4ad0_4), 0, 19152 }, /* TAS */
+{ CPUFUNC(op_4ad8_4), 0, 19160 }, /* TAS */
+{ CPUFUNC(op_4ae0_4), 0, 19168 }, /* TAS */
+{ CPUFUNC(op_4ae8_4), 0, 19176 }, /* TAS */
+{ CPUFUNC(op_4af0_4), 0, 19184 }, /* TAS */
+{ CPUFUNC(op_4af8_4), 0, 19192 }, /* TAS */
+{ CPUFUNC(op_4af9_4), 0, 19193 }, /* TAS */
+{ CPUFUNC(op_4c90_4), 0, 19600 }, /* MVMEL */
+{ CPUFUNC(op_4c98_4), 0, 19608 }, /* MVMEL */
+{ CPUFUNC(op_4ca8_4), 0, 19624 }, /* MVMEL */
+{ CPUFUNC(op_4cb0_4), 0, 19632 }, /* MVMEL */
+{ CPUFUNC(op_4cb8_4), 0, 19640 }, /* MVMEL */
+{ CPUFUNC(op_4cb9_4), 0, 19641 }, /* MVMEL */
+{ CPUFUNC(op_4cba_4), 0, 19642 }, /* MVMEL */
+{ CPUFUNC(op_4cbb_4), 0, 19643 }, /* MVMEL */
+{ CPUFUNC(op_4cd0_4), 0, 19664 }, /* MVMEL */
+{ CPUFUNC(op_4cd8_4), 0, 19672 }, /* MVMEL */
+{ CPUFUNC(op_4ce8_4), 0, 19688 }, /* MVMEL */
+{ CPUFUNC(op_4cf0_4), 0, 19696 }, /* MVMEL */
+{ CPUFUNC(op_4cf8_4), 0, 19704 }, /* MVMEL */
+{ CPUFUNC(op_4cf9_4), 0, 19705 }, /* MVMEL */
+{ CPUFUNC(op_4cfa_4), 0, 19706 }, /* MVMEL */
+{ CPUFUNC(op_4cfb_4), 0, 19707 }, /* MVMEL */
+{ CPUFUNC(op_4e40_4), 0, 20032 }, /* TRAP */
+{ CPUFUNC(op_4e50_4), 0, 20048 }, /* LINK */
+{ CPUFUNC(op_4e58_4), 0, 20056 }, /* UNLK */
+{ CPUFUNC(op_4e60_4), 0, 20064 }, /* MVR2USP */
+{ CPUFUNC(op_4e68_4), 0, 20072 }, /* MVUSP2R */
+{ CPUFUNC(op_4e70_4), 0, 20080 }, /* RESET */
+{ CPUFUNC(op_4e71_4), 0, 20081 }, /* NOP */
+{ CPUFUNC(op_4e72_4), 0, 20082 }, /* STOP */
+{ CPUFUNC(op_4e73_4), 0, 20083 }, /* RTE */
+{ CPUFUNC(op_4e74_4), 0, 20084 }, /* RTD */
+{ CPUFUNC(op_4e75_4), 0, 20085 }, /* RTS */
+{ CPUFUNC(op_4e76_4), 0, 20086 }, /* TRAPV */
+{ CPUFUNC(op_4e77_4), 0, 20087 }, /* RTR */
+{ CPUFUNC(op_4e90_4), 0, 20112 }, /* JSR */
+{ CPUFUNC(op_4ea8_4), 0, 20136 }, /* JSR */
+{ CPUFUNC(op_4eb0_4), 0, 20144 }, /* JSR */
+{ CPUFUNC(op_4eb8_4), 0, 20152 }, /* JSR */
+{ CPUFUNC(op_4eb9_4), 0, 20153 }, /* JSR */
+{ CPUFUNC(op_4eba_4), 0, 20154 }, /* JSR */
+{ CPUFUNC(op_4ebb_4), 0, 20155 }, /* JSR */
+{ CPUFUNC(op_4ed0_4), 0, 20176 }, /* JMP */
+{ CPUFUNC(op_4ee8_4), 0, 20200 }, /* JMP */
+{ CPUFUNC(op_4ef0_4), 0, 20208 }, /* JMP */
+{ CPUFUNC(op_4ef8_4), 0, 20216 }, /* JMP */
+{ CPUFUNC(op_4ef9_4), 0, 20217 }, /* JMP */
+{ CPUFUNC(op_4efa_4), 0, 20218 }, /* JMP */
+{ CPUFUNC(op_4efb_4), 0, 20219 }, /* JMP */
+{ CPUFUNC(op_5000_4), 0, 20480 }, /* ADD */
+{ CPUFUNC(op_5010_4), 0, 20496 }, /* ADD */
+{ CPUFUNC(op_5018_4), 0, 20504 }, /* ADD */
+{ CPUFUNC(op_5020_4), 0, 20512 }, /* ADD */
+{ CPUFUNC(op_5028_4), 0, 20520 }, /* ADD */
+{ CPUFUNC(op_5030_4), 0, 20528 }, /* ADD */
+{ CPUFUNC(op_5038_4), 0, 20536 }, /* ADD */
+{ CPUFUNC(op_5039_4), 0, 20537 }, /* ADD */
+{ CPUFUNC(op_5040_4), 0, 20544 }, /* ADD */
+{ CPUFUNC(op_5048_4), 0, 20552 }, /* ADDA */
+{ CPUFUNC(op_5050_4), 0, 20560 }, /* ADD */
+{ CPUFUNC(op_5058_4), 0, 20568 }, /* ADD */
+{ CPUFUNC(op_5060_4), 0, 20576 }, /* ADD */
+{ CPUFUNC(op_5068_4), 0, 20584 }, /* ADD */
+{ CPUFUNC(op_5070_4), 0, 20592 }, /* ADD */
+{ CPUFUNC(op_5078_4), 0, 20600 }, /* ADD */
+{ CPUFUNC(op_5079_4), 0, 20601 }, /* ADD */
+{ CPUFUNC(op_5080_4), 0, 20608 }, /* ADD */
+{ CPUFUNC(op_5088_4), 0, 20616 }, /* ADDA */
+{ CPUFUNC(op_5090_4), 0, 20624 }, /* ADD */
+{ CPUFUNC(op_5098_4), 0, 20632 }, /* ADD */
+{ CPUFUNC(op_50a0_4), 0, 20640 }, /* ADD */
+{ CPUFUNC(op_50a8_4), 0, 20648 }, /* ADD */
+{ CPUFUNC(op_50b0_4), 0, 20656 }, /* ADD */
+{ CPUFUNC(op_50b8_4), 0, 20664 }, /* ADD */
+{ CPUFUNC(op_50b9_4), 0, 20665 }, /* ADD */
+{ CPUFUNC(op_50c0_4), 0, 20672 }, /* Scc */
+{ CPUFUNC(op_50c8_4), 0, 20680 }, /* DBcc */
+{ CPUFUNC(op_50d0_4), 0, 20688 }, /* Scc */
+{ CPUFUNC(op_50d8_4), 0, 20696 }, /* Scc */
+{ CPUFUNC(op_50e0_4), 0, 20704 }, /* Scc */
+{ CPUFUNC(op_50e8_4), 0, 20712 }, /* Scc */
+{ CPUFUNC(op_50f0_4), 0, 20720 }, /* Scc */
+{ CPUFUNC(op_50f8_4), 0, 20728 }, /* Scc */
+{ CPUFUNC(op_50f9_4), 0, 20729 }, /* Scc */
+{ CPUFUNC(op_5100_4), 0, 20736 }, /* SUB */
+{ CPUFUNC(op_5110_4), 0, 20752 }, /* SUB */
+{ CPUFUNC(op_5118_4), 0, 20760 }, /* SUB */
+{ CPUFUNC(op_5120_4), 0, 20768 }, /* SUB */
+{ CPUFUNC(op_5128_4), 0, 20776 }, /* SUB */
+{ CPUFUNC(op_5130_4), 0, 20784 }, /* SUB */
+{ CPUFUNC(op_5138_4), 0, 20792 }, /* SUB */
+{ CPUFUNC(op_5139_4), 0, 20793 }, /* SUB */
+{ CPUFUNC(op_5140_4), 0, 20800 }, /* SUB */
+{ CPUFUNC(op_5148_4), 0, 20808 }, /* SUBA */
+{ CPUFUNC(op_5150_4), 0, 20816 }, /* SUB */
+{ CPUFUNC(op_5158_4), 0, 20824 }, /* SUB */
+{ CPUFUNC(op_5160_4), 0, 20832 }, /* SUB */
+{ CPUFUNC(op_5168_4), 0, 20840 }, /* SUB */
+{ CPUFUNC(op_5170_4), 0, 20848 }, /* SUB */
+{ CPUFUNC(op_5178_4), 0, 20856 }, /* SUB */
+{ CPUFUNC(op_5179_4), 0, 20857 }, /* SUB */
+{ CPUFUNC(op_5180_4), 0, 20864 }, /* SUB */
+{ CPUFUNC(op_5188_4), 0, 20872 }, /* SUBA */
+{ CPUFUNC(op_5190_4), 0, 20880 }, /* SUB */
+{ CPUFUNC(op_5198_4), 0, 20888 }, /* SUB */
+{ CPUFUNC(op_51a0_4), 0, 20896 }, /* SUB */
+{ CPUFUNC(op_51a8_4), 0, 20904 }, /* SUB */
+{ CPUFUNC(op_51b0_4), 0, 20912 }, /* SUB */
+{ CPUFUNC(op_51b8_4), 0, 20920 }, /* SUB */
+{ CPUFUNC(op_51b9_4), 0, 20921 }, /* SUB */
+{ CPUFUNC(op_51c0_4), 0, 20928 }, /* Scc */
+{ CPUFUNC(op_51c8_4), 0, 20936 }, /* DBcc */
+{ CPUFUNC(op_51d0_4), 0, 20944 }, /* Scc */
+{ CPUFUNC(op_51d8_4), 0, 20952 }, /* Scc */
+{ CPUFUNC(op_51e0_4), 0, 20960 }, /* Scc */
+{ CPUFUNC(op_51e8_4), 0, 20968 }, /* Scc */
+{ CPUFUNC(op_51f0_4), 0, 20976 }, /* Scc */
+{ CPUFUNC(op_51f8_4), 0, 20984 }, /* Scc */
+{ CPUFUNC(op_51f9_4), 0, 20985 }, /* Scc */
+{ CPUFUNC(op_52c0_4), 0, 21184 }, /* Scc */
+{ CPUFUNC(op_52c8_4), 0, 21192 }, /* DBcc */
+{ CPUFUNC(op_52d0_4), 0, 21200 }, /* Scc */
+{ CPUFUNC(op_52d8_4), 0, 21208 }, /* Scc */
+{ CPUFUNC(op_52e0_4), 0, 21216 }, /* Scc */
+{ CPUFUNC(op_52e8_4), 0, 21224 }, /* Scc */
+{ CPUFUNC(op_52f0_4), 0, 21232 }, /* Scc */
+{ CPUFUNC(op_52f8_4), 0, 21240 }, /* Scc */
+{ CPUFUNC(op_52f9_4), 0, 21241 }, /* Scc */
+{ CPUFUNC(op_53c0_4), 0, 21440 }, /* Scc */
+{ CPUFUNC(op_53c8_4), 0, 21448 }, /* DBcc */
+{ CPUFUNC(op_53d0_4), 0, 21456 }, /* Scc */
+{ CPUFUNC(op_53d8_4), 0, 21464 }, /* Scc */
+{ CPUFUNC(op_53e0_4), 0, 21472 }, /* Scc */
+{ CPUFUNC(op_53e8_4), 0, 21480 }, /* Scc */
+{ CPUFUNC(op_53f0_4), 0, 21488 }, /* Scc */
+{ CPUFUNC(op_53f8_4), 0, 21496 }, /* Scc */
+{ CPUFUNC(op_53f9_4), 0, 21497 }, /* Scc */
+{ CPUFUNC(op_54c0_4), 0, 21696 }, /* Scc */
+{ CPUFUNC(op_54c8_4), 0, 21704 }, /* DBcc */
+{ CPUFUNC(op_54d0_4), 0, 21712 }, /* Scc */
+{ CPUFUNC(op_54d8_4), 0, 21720 }, /* Scc */
+{ CPUFUNC(op_54e0_4), 0, 21728 }, /* Scc */
+{ CPUFUNC(op_54e8_4), 0, 21736 }, /* Scc */
+{ CPUFUNC(op_54f0_4), 0, 21744 }, /* Scc */
+{ CPUFUNC(op_54f8_4), 0, 21752 }, /* Scc */
+{ CPUFUNC(op_54f9_4), 0, 21753 }, /* Scc */
+{ CPUFUNC(op_55c0_4), 0, 21952 }, /* Scc */
+{ CPUFUNC(op_55c8_4), 0, 21960 }, /* DBcc */
+{ CPUFUNC(op_55d0_4), 0, 21968 }, /* Scc */
+{ CPUFUNC(op_55d8_4), 0, 21976 }, /* Scc */
+{ CPUFUNC(op_55e0_4), 0, 21984 }, /* Scc */
+{ CPUFUNC(op_55e8_4), 0, 21992 }, /* Scc */
+{ CPUFUNC(op_55f0_4), 0, 22000 }, /* Scc */
+{ CPUFUNC(op_55f8_4), 0, 22008 }, /* Scc */
+{ CPUFUNC(op_55f9_4), 0, 22009 }, /* Scc */
+{ CPUFUNC(op_56c0_4), 0, 22208 }, /* Scc */
+{ CPUFUNC(op_56c8_4), 0, 22216 }, /* DBcc */
+{ CPUFUNC(op_56d0_4), 0, 22224 }, /* Scc */
+{ CPUFUNC(op_56d8_4), 0, 22232 }, /* Scc */
+{ CPUFUNC(op_56e0_4), 0, 22240 }, /* Scc */
+{ CPUFUNC(op_56e8_4), 0, 22248 }, /* Scc */
+{ CPUFUNC(op_56f0_4), 0, 22256 }, /* Scc */
+{ CPUFUNC(op_56f8_4), 0, 22264 }, /* Scc */
+{ CPUFUNC(op_56f9_4), 0, 22265 }, /* Scc */
+{ CPUFUNC(op_57c0_4), 0, 22464 }, /* Scc */
+{ CPUFUNC(op_57c8_4), 0, 22472 }, /* DBcc */
+{ CPUFUNC(op_57d0_4), 0, 22480 }, /* Scc */
+{ CPUFUNC(op_57d8_4), 0, 22488 }, /* Scc */
+{ CPUFUNC(op_57e0_4), 0, 22496 }, /* Scc */
+{ CPUFUNC(op_57e8_4), 0, 22504 }, /* Scc */
+{ CPUFUNC(op_57f0_4), 0, 22512 }, /* Scc */
+{ CPUFUNC(op_57f8_4), 0, 22520 }, /* Scc */
+{ CPUFUNC(op_57f9_4), 0, 22521 }, /* Scc */
+{ CPUFUNC(op_58c0_4), 0, 22720 }, /* Scc */
+{ CPUFUNC(op_58c8_4), 0, 22728 }, /* DBcc */
+{ CPUFUNC(op_58d0_4), 0, 22736 }, /* Scc */
+{ CPUFUNC(op_58d8_4), 0, 22744 }, /* Scc */
+{ CPUFUNC(op_58e0_4), 0, 22752 }, /* Scc */
+{ CPUFUNC(op_58e8_4), 0, 22760 }, /* Scc */
+{ CPUFUNC(op_58f0_4), 0, 22768 }, /* Scc */
+{ CPUFUNC(op_58f8_4), 0, 22776 }, /* Scc */
+{ CPUFUNC(op_58f9_4), 0, 22777 }, /* Scc */
+{ CPUFUNC(op_59c0_4), 0, 22976 }, /* Scc */
+{ CPUFUNC(op_59c8_4), 0, 22984 }, /* DBcc */
+{ CPUFUNC(op_59d0_4), 0, 22992 }, /* Scc */
+{ CPUFUNC(op_59d8_4), 0, 23000 }, /* Scc */
+{ CPUFUNC(op_59e0_4), 0, 23008 }, /* Scc */
+{ CPUFUNC(op_59e8_4), 0, 23016 }, /* Scc */
+{ CPUFUNC(op_59f0_4), 0, 23024 }, /* Scc */
+{ CPUFUNC(op_59f8_4), 0, 23032 }, /* Scc */
+{ CPUFUNC(op_59f9_4), 0, 23033 }, /* Scc */
+{ CPUFUNC(op_5ac0_4), 0, 23232 }, /* Scc */
+{ CPUFUNC(op_5ac8_4), 0, 23240 }, /* DBcc */
+{ CPUFUNC(op_5ad0_4), 0, 23248 }, /* Scc */
+{ CPUFUNC(op_5ad8_4), 0, 23256 }, /* Scc */
+{ CPUFUNC(op_5ae0_4), 0, 23264 }, /* Scc */
+{ CPUFUNC(op_5ae8_4), 0, 23272 }, /* Scc */
+{ CPUFUNC(op_5af0_4), 0, 23280 }, /* Scc */
+{ CPUFUNC(op_5af8_4), 0, 23288 }, /* Scc */
+{ CPUFUNC(op_5af9_4), 0, 23289 }, /* Scc */
+{ CPUFUNC(op_5bc0_4), 0, 23488 }, /* Scc */
+{ CPUFUNC(op_5bc8_4), 0, 23496 }, /* DBcc */
+{ CPUFUNC(op_5bd0_4), 0, 23504 }, /* Scc */
+{ CPUFUNC(op_5bd8_4), 0, 23512 }, /* Scc */
+{ CPUFUNC(op_5be0_4), 0, 23520 }, /* Scc */
+{ CPUFUNC(op_5be8_4), 0, 23528 }, /* Scc */
+{ CPUFUNC(op_5bf0_4), 0, 23536 }, /* Scc */
+{ CPUFUNC(op_5bf8_4), 0, 23544 }, /* Scc */
+{ CPUFUNC(op_5bf9_4), 0, 23545 }, /* Scc */
+{ CPUFUNC(op_5cc0_4), 0, 23744 }, /* Scc */
+{ CPUFUNC(op_5cc8_4), 0, 23752 }, /* DBcc */
+{ CPUFUNC(op_5cd0_4), 0, 23760 }, /* Scc */
+{ CPUFUNC(op_5cd8_4), 0, 23768 }, /* Scc */
+{ CPUFUNC(op_5ce0_4), 0, 23776 }, /* Scc */
+{ CPUFUNC(op_5ce8_4), 0, 23784 }, /* Scc */
+{ CPUFUNC(op_5cf0_4), 0, 23792 }, /* Scc */
+{ CPUFUNC(op_5cf8_4), 0, 23800 }, /* Scc */
+{ CPUFUNC(op_5cf9_4), 0, 23801 }, /* Scc */
+{ CPUFUNC(op_5dc0_4), 0, 24000 }, /* Scc */
+{ CPUFUNC(op_5dc8_4), 0, 24008 }, /* DBcc */
+{ CPUFUNC(op_5dd0_4), 0, 24016 }, /* Scc */
+{ CPUFUNC(op_5dd8_4), 0, 24024 }, /* Scc */
+{ CPUFUNC(op_5de0_4), 0, 24032 }, /* Scc */
+{ CPUFUNC(op_5de8_4), 0, 24040 }, /* Scc */
+{ CPUFUNC(op_5df0_4), 0, 24048 }, /* Scc */
+{ CPUFUNC(op_5df8_4), 0, 24056 }, /* Scc */
+{ CPUFUNC(op_5df9_4), 0, 24057 }, /* Scc */
+{ CPUFUNC(op_5ec0_4), 0, 24256 }, /* Scc */
+{ CPUFUNC(op_5ec8_4), 0, 24264 }, /* DBcc */
+{ CPUFUNC(op_5ed0_4), 0, 24272 }, /* Scc */
+{ CPUFUNC(op_5ed8_4), 0, 24280 }, /* Scc */
+{ CPUFUNC(op_5ee0_4), 0, 24288 }, /* Scc */
+{ CPUFUNC(op_5ee8_4), 0, 24296 }, /* Scc */
+{ CPUFUNC(op_5ef0_4), 0, 24304 }, /* Scc */
+{ CPUFUNC(op_5ef8_4), 0, 24312 }, /* Scc */
+{ CPUFUNC(op_5ef9_4), 0, 24313 }, /* Scc */
+{ CPUFUNC(op_5fc0_4), 0, 24512 }, /* Scc */
+{ CPUFUNC(op_5fc8_4), 0, 24520 }, /* DBcc */
+{ CPUFUNC(op_5fd0_4), 0, 24528 }, /* Scc */
+{ CPUFUNC(op_5fd8_4), 0, 24536 }, /* Scc */
+{ CPUFUNC(op_5fe0_4), 0, 24544 }, /* Scc */
+{ CPUFUNC(op_5fe8_4), 0, 24552 }, /* Scc */
+{ CPUFUNC(op_5ff0_4), 0, 24560 }, /* Scc */
+{ CPUFUNC(op_5ff8_4), 0, 24568 }, /* Scc */
+{ CPUFUNC(op_5ff9_4), 0, 24569 }, /* Scc */
+{ CPUFUNC(op_6000_4), 0, 24576 }, /* Bcc */
+{ CPUFUNC(op_6001_4), 0, 24577 }, /* Bcc */
+{ CPUFUNC(op_60ff_4), 0, 24831 }, /* Bcc */
+{ CPUFUNC(op_6100_4), 0, 24832 }, /* BSR */
+{ CPUFUNC(op_6101_4), 0, 24833 }, /* BSR */
+{ CPUFUNC(op_61ff_4), 0, 25087 }, /* BSR */
+{ CPUFUNC(op_6200_4), 0, 25088 }, /* Bcc */
+{ CPUFUNC(op_6201_4), 0, 25089 }, /* Bcc */
+{ CPUFUNC(op_62ff_4), 0, 25343 }, /* Bcc */
+{ CPUFUNC(op_6300_4), 0, 25344 }, /* Bcc */
+{ CPUFUNC(op_6301_4), 0, 25345 }, /* Bcc */
+{ CPUFUNC(op_63ff_4), 0, 25599 }, /* Bcc */
+{ CPUFUNC(op_6400_4), 0, 25600 }, /* Bcc */
+{ CPUFUNC(op_6401_4), 0, 25601 }, /* Bcc */
+{ CPUFUNC(op_64ff_4), 0, 25855 }, /* Bcc */
+{ CPUFUNC(op_6500_4), 0, 25856 }, /* Bcc */
+{ CPUFUNC(op_6501_4), 0, 25857 }, /* Bcc */
+{ CPUFUNC(op_65ff_4), 0, 26111 }, /* Bcc */
+{ CPUFUNC(op_6600_4), 0, 26112 }, /* Bcc */
+{ CPUFUNC(op_6601_4), 0, 26113 }, /* Bcc */
+{ CPUFUNC(op_66ff_4), 0, 26367 }, /* Bcc */
+{ CPUFUNC(op_6700_4), 0, 26368 }, /* Bcc */
+{ CPUFUNC(op_6701_4), 0, 26369 }, /* Bcc */
+{ CPUFUNC(op_67ff_4), 0, 26623 }, /* Bcc */
+{ CPUFUNC(op_6800_4), 0, 26624 }, /* Bcc */
+{ CPUFUNC(op_6801_4), 0, 26625 }, /* Bcc */
+{ CPUFUNC(op_68ff_4), 0, 26879 }, /* Bcc */
+{ CPUFUNC(op_6900_4), 0, 26880 }, /* Bcc */
+{ CPUFUNC(op_6901_4), 0, 26881 }, /* Bcc */
+{ CPUFUNC(op_69ff_4), 0, 27135 }, /* Bcc */
+{ CPUFUNC(op_6a00_4), 0, 27136 }, /* Bcc */
+{ CPUFUNC(op_6a01_4), 0, 27137 }, /* Bcc */
+{ CPUFUNC(op_6aff_4), 0, 27391 }, /* Bcc */
+{ CPUFUNC(op_6b00_4), 0, 27392 }, /* Bcc */
+{ CPUFUNC(op_6b01_4), 0, 27393 }, /* Bcc */
+{ CPUFUNC(op_6bff_4), 0, 27647 }, /* Bcc */
+{ CPUFUNC(op_6c00_4), 0, 27648 }, /* Bcc */
+{ CPUFUNC(op_6c01_4), 0, 27649 }, /* Bcc */
+{ CPUFUNC(op_6cff_4), 0, 27903 }, /* Bcc */
+{ CPUFUNC(op_6d00_4), 0, 27904 }, /* Bcc */
+{ CPUFUNC(op_6d01_4), 0, 27905 }, /* Bcc */
+{ CPUFUNC(op_6dff_4), 0, 28159 }, /* Bcc */
+{ CPUFUNC(op_6e00_4), 0, 28160 }, /* Bcc */
+{ CPUFUNC(op_6e01_4), 0, 28161 }, /* Bcc */
+{ CPUFUNC(op_6eff_4), 0, 28415 }, /* Bcc */
+{ CPUFUNC(op_6f00_4), 0, 28416 }, /* Bcc */
+{ CPUFUNC(op_6f01_4), 0, 28417 }, /* Bcc */
+{ CPUFUNC(op_6fff_4), 0, 28671 }, /* Bcc */
+{ CPUFUNC(op_7000_4), 0, 28672 }, /* MOVE */
+{ CPUFUNC(op_8000_4), 0, 32768 }, /* OR */
+{ CPUFUNC(op_8010_4), 0, 32784 }, /* OR */
+{ CPUFUNC(op_8018_4), 0, 32792 }, /* OR */
+{ CPUFUNC(op_8020_4), 0, 32800 }, /* OR */
+{ CPUFUNC(op_8028_4), 0, 32808 }, /* OR */
+{ CPUFUNC(op_8030_4), 0, 32816 }, /* OR */
+{ CPUFUNC(op_8038_4), 0, 32824 }, /* OR */
+{ CPUFUNC(op_8039_4), 0, 32825 }, /* OR */
+{ CPUFUNC(op_803a_4), 0, 32826 }, /* OR */
+{ CPUFUNC(op_803b_4), 0, 32827 }, /* OR */
+{ CPUFUNC(op_803c_4), 0, 32828 }, /* OR */
+{ CPUFUNC(op_8040_4), 0, 32832 }, /* OR */
+{ CPUFUNC(op_8050_4), 0, 32848 }, /* OR */
+{ CPUFUNC(op_8058_4), 0, 32856 }, /* OR */
+{ CPUFUNC(op_8060_4), 0, 32864 }, /* OR */
+{ CPUFUNC(op_8068_4), 0, 32872 }, /* OR */
+{ CPUFUNC(op_8070_4), 0, 32880 }, /* OR */
+{ CPUFUNC(op_8078_4), 0, 32888 }, /* OR */
+{ CPUFUNC(op_8079_4), 0, 32889 }, /* OR */
+{ CPUFUNC(op_807a_4), 0, 32890 }, /* OR */
+{ CPUFUNC(op_807b_4), 0, 32891 }, /* OR */
+{ CPUFUNC(op_807c_4), 0, 32892 }, /* OR */
+{ CPUFUNC(op_8080_4), 0, 32896 }, /* OR */
+{ CPUFUNC(op_8090_4), 0, 32912 }, /* OR */
+{ CPUFUNC(op_8098_4), 0, 32920 }, /* OR */
+{ CPUFUNC(op_80a0_4), 0, 32928 }, /* OR */
+{ CPUFUNC(op_80a8_4), 0, 32936 }, /* OR */
+{ CPUFUNC(op_80b0_4), 0, 32944 }, /* OR */
+{ CPUFUNC(op_80b8_4), 0, 32952 }, /* OR */
+{ CPUFUNC(op_80b9_4), 0, 32953 }, /* OR */
+{ CPUFUNC(op_80ba_4), 0, 32954 }, /* OR */
+{ CPUFUNC(op_80bb_4), 0, 32955 }, /* OR */
+{ CPUFUNC(op_80bc_4), 0, 32956 }, /* OR */
+{ CPUFUNC(op_80c0_4), 0, 32960 }, /* DIVU */
+{ CPUFUNC(op_80d0_4), 0, 32976 }, /* DIVU */
+{ CPUFUNC(op_80d8_4), 0, 32984 }, /* DIVU */
+{ CPUFUNC(op_80e0_4), 0, 32992 }, /* DIVU */
+{ CPUFUNC(op_80e8_4), 0, 33000 }, /* DIVU */
+{ CPUFUNC(op_80f0_4), 0, 33008 }, /* DIVU */
+{ CPUFUNC(op_80f8_4), 0, 33016 }, /* DIVU */
+{ CPUFUNC(op_80f9_4), 0, 33017 }, /* DIVU */
+{ CPUFUNC(op_80fa_4), 0, 33018 }, /* DIVU */
+{ CPUFUNC(op_80fb_4), 0, 33019 }, /* DIVU */
+{ CPUFUNC(op_80fc_4), 0, 33020 }, /* DIVU */
+{ CPUFUNC(op_8100_4), 0, 33024 }, /* SBCD */
+{ CPUFUNC(op_8108_4), 0, 33032 }, /* SBCD */
+{ CPUFUNC(op_8110_4), 0, 33040 }, /* OR */
+{ CPUFUNC(op_8118_4), 0, 33048 }, /* OR */
+{ CPUFUNC(op_8120_4), 0, 33056 }, /* OR */
+{ CPUFUNC(op_8128_4), 0, 33064 }, /* OR */
+{ CPUFUNC(op_8130_4), 0, 33072 }, /* OR */
+{ CPUFUNC(op_8138_4), 0, 33080 }, /* OR */
+{ CPUFUNC(op_8139_4), 0, 33081 }, /* OR */
+{ CPUFUNC(op_8150_4), 0, 33104 }, /* OR */
+{ CPUFUNC(op_8158_4), 0, 33112 }, /* OR */
+{ CPUFUNC(op_8160_4), 0, 33120 }, /* OR */
+{ CPUFUNC(op_8168_4), 0, 33128 }, /* OR */
+{ CPUFUNC(op_8170_4), 0, 33136 }, /* OR */
+{ CPUFUNC(op_8178_4), 0, 33144 }, /* OR */
+{ CPUFUNC(op_8179_4), 0, 33145 }, /* OR */
+{ CPUFUNC(op_8190_4), 0, 33168 }, /* OR */
+{ CPUFUNC(op_8198_4), 0, 33176 }, /* OR */
+{ CPUFUNC(op_81a0_4), 0, 33184 }, /* OR */
+{ CPUFUNC(op_81a8_4), 0, 33192 }, /* OR */
+{ CPUFUNC(op_81b0_4), 0, 33200 }, /* OR */
+{ CPUFUNC(op_81b8_4), 0, 33208 }, /* OR */
+{ CPUFUNC(op_81b9_4), 0, 33209 }, /* OR */
+{ CPUFUNC(op_81c0_4), 0, 33216 }, /* DIVS */
+{ CPUFUNC(op_81d0_4), 0, 33232 }, /* DIVS */
+{ CPUFUNC(op_81d8_4), 0, 33240 }, /* DIVS */
+{ CPUFUNC(op_81e0_4), 0, 33248 }, /* DIVS */
+{ CPUFUNC(op_81e8_4), 0, 33256 }, /* DIVS */
+{ CPUFUNC(op_81f0_4), 0, 33264 }, /* DIVS */
+{ CPUFUNC(op_81f8_4), 0, 33272 }, /* DIVS */
+{ CPUFUNC(op_81f9_4), 0, 33273 }, /* DIVS */
+{ CPUFUNC(op_81fa_4), 0, 33274 }, /* DIVS */
+{ CPUFUNC(op_81fb_4), 0, 33275 }, /* DIVS */
+{ CPUFUNC(op_81fc_4), 0, 33276 }, /* DIVS */
+{ CPUFUNC(op_9000_4), 0, 36864 }, /* SUB */
+{ CPUFUNC(op_9010_4), 0, 36880 }, /* SUB */
+{ CPUFUNC(op_9018_4), 0, 36888 }, /* SUB */
+{ CPUFUNC(op_9020_4), 0, 36896 }, /* SUB */
+{ CPUFUNC(op_9028_4), 0, 36904 }, /* SUB */
+{ CPUFUNC(op_9030_4), 0, 36912 }, /* SUB */
+{ CPUFUNC(op_9038_4), 0, 36920 }, /* SUB */
+{ CPUFUNC(op_9039_4), 0, 36921 }, /* SUB */
+{ CPUFUNC(op_903a_4), 0, 36922 }, /* SUB */
+{ CPUFUNC(op_903b_4), 0, 36923 }, /* SUB */
+{ CPUFUNC(op_903c_4), 0, 36924 }, /* SUB */
+{ CPUFUNC(op_9040_4), 0, 36928 }, /* SUB */
+{ CPUFUNC(op_9048_4), 0, 36936 }, /* SUB */
+{ CPUFUNC(op_9050_4), 0, 36944 }, /* SUB */
+{ CPUFUNC(op_9058_4), 0, 36952 }, /* SUB */
+{ CPUFUNC(op_9060_4), 0, 36960 }, /* SUB */
+{ CPUFUNC(op_9068_4), 0, 36968 }, /* SUB */
+{ CPUFUNC(op_9070_4), 0, 36976 }, /* SUB */
+{ CPUFUNC(op_9078_4), 0, 36984 }, /* SUB */
+{ CPUFUNC(op_9079_4), 0, 36985 }, /* SUB */
+{ CPUFUNC(op_907a_4), 0, 36986 }, /* SUB */
+{ CPUFUNC(op_907b_4), 0, 36987 }, /* SUB */
+{ CPUFUNC(op_907c_4), 0, 36988 }, /* SUB */
+{ CPUFUNC(op_9080_4), 0, 36992 }, /* SUB */
+{ CPUFUNC(op_9088_4), 0, 37000 }, /* SUB */
+{ CPUFUNC(op_9090_4), 0, 37008 }, /* SUB */
+{ CPUFUNC(op_9098_4), 0, 37016 }, /* SUB */
+{ CPUFUNC(op_90a0_4), 0, 37024 }, /* SUB */
+{ CPUFUNC(op_90a8_4), 0, 37032 }, /* SUB */
+{ CPUFUNC(op_90b0_4), 0, 37040 }, /* SUB */
+{ CPUFUNC(op_90b8_4), 0, 37048 }, /* SUB */
+{ CPUFUNC(op_90b9_4), 0, 37049 }, /* SUB */
+{ CPUFUNC(op_90ba_4), 0, 37050 }, /* SUB */
+{ CPUFUNC(op_90bb_4), 0, 37051 }, /* SUB */
+{ CPUFUNC(op_90bc_4), 0, 37052 }, /* SUB */
+{ CPUFUNC(op_90c0_4), 0, 37056 }, /* SUBA */
+{ CPUFUNC(op_90c8_4), 0, 37064 }, /* SUBA */
+{ CPUFUNC(op_90d0_4), 0, 37072 }, /* SUBA */
+{ CPUFUNC(op_90d8_4), 0, 37080 }, /* SUBA */
+{ CPUFUNC(op_90e0_4), 0, 37088 }, /* SUBA */
+{ CPUFUNC(op_90e8_4), 0, 37096 }, /* SUBA */
+{ CPUFUNC(op_90f0_4), 0, 37104 }, /* SUBA */
+{ CPUFUNC(op_90f8_4), 0, 37112 }, /* SUBA */
+{ CPUFUNC(op_90f9_4), 0, 37113 }, /* SUBA */
+{ CPUFUNC(op_90fa_4), 0, 37114 }, /* SUBA */
+{ CPUFUNC(op_90fb_4), 0, 37115 }, /* SUBA */
+{ CPUFUNC(op_90fc_4), 0, 37116 }, /* SUBA */
+{ CPUFUNC(op_9100_4), 0, 37120 }, /* SUBX */
+{ CPUFUNC(op_9108_4), 0, 37128 }, /* SUBX */
+{ CPUFUNC(op_9110_4), 0, 37136 }, /* SUB */
+{ CPUFUNC(op_9118_4), 0, 37144 }, /* SUB */
+{ CPUFUNC(op_9120_4), 0, 37152 }, /* SUB */
+{ CPUFUNC(op_9128_4), 0, 37160 }, /* SUB */
+{ CPUFUNC(op_9130_4), 0, 37168 }, /* SUB */
+{ CPUFUNC(op_9138_4), 0, 37176 }, /* SUB */
+{ CPUFUNC(op_9139_4), 0, 37177 }, /* SUB */
+{ CPUFUNC(op_9140_4), 0, 37184 }, /* SUBX */
+{ CPUFUNC(op_9148_4), 0, 37192 }, /* SUBX */
+{ CPUFUNC(op_9150_4), 0, 37200 }, /* SUB */
+{ CPUFUNC(op_9158_4), 0, 37208 }, /* SUB */
+{ CPUFUNC(op_9160_4), 0, 37216 }, /* SUB */
+{ CPUFUNC(op_9168_4), 0, 37224 }, /* SUB */
+{ CPUFUNC(op_9170_4), 0, 37232 }, /* SUB */
+{ CPUFUNC(op_9178_4), 0, 37240 }, /* SUB */
+{ CPUFUNC(op_9179_4), 0, 37241 }, /* SUB */
+{ CPUFUNC(op_9180_4), 0, 37248 }, /* SUBX */
+{ CPUFUNC(op_9188_4), 0, 37256 }, /* SUBX */
+{ CPUFUNC(op_9190_4), 0, 37264 }, /* SUB */
+{ CPUFUNC(op_9198_4), 0, 37272 }, /* SUB */
+{ CPUFUNC(op_91a0_4), 0, 37280 }, /* SUB */
+{ CPUFUNC(op_91a8_4), 0, 37288 }, /* SUB */
+{ CPUFUNC(op_91b0_4), 0, 37296 }, /* SUB */
+{ CPUFUNC(op_91b8_4), 0, 37304 }, /* SUB */
+{ CPUFUNC(op_91b9_4), 0, 37305 }, /* SUB */
+{ CPUFUNC(op_91c0_4), 0, 37312 }, /* SUBA */
+{ CPUFUNC(op_91c8_4), 0, 37320 }, /* SUBA */
+{ CPUFUNC(op_91d0_4), 0, 37328 }, /* SUBA */
+{ CPUFUNC(op_91d8_4), 0, 37336 }, /* SUBA */
+{ CPUFUNC(op_91e0_4), 0, 37344 }, /* SUBA */
+{ CPUFUNC(op_91e8_4), 0, 37352 }, /* SUBA */
+{ CPUFUNC(op_91f0_4), 0, 37360 }, /* SUBA */
+{ CPUFUNC(op_91f8_4), 0, 37368 }, /* SUBA */
+{ CPUFUNC(op_91f9_4), 0, 37369 }, /* SUBA */
+{ CPUFUNC(op_91fa_4), 0, 37370 }, /* SUBA */
+{ CPUFUNC(op_91fb_4), 0, 37371 }, /* SUBA */
+{ CPUFUNC(op_91fc_4), 0, 37372 }, /* SUBA */
+{ CPUFUNC(op_b000_4), 0, 45056 }, /* CMP */
+{ CPUFUNC(op_b010_4), 0, 45072 }, /* CMP */
+{ CPUFUNC(op_b018_4), 0, 45080 }, /* CMP */
+{ CPUFUNC(op_b020_4), 0, 45088 }, /* CMP */
+{ CPUFUNC(op_b028_4), 0, 45096 }, /* CMP */
+{ CPUFUNC(op_b030_4), 0, 45104 }, /* CMP */
+{ CPUFUNC(op_b038_4), 0, 45112 }, /* CMP */
+{ CPUFUNC(op_b039_4), 0, 45113 }, /* CMP */
+{ CPUFUNC(op_b03a_4), 0, 45114 }, /* CMP */
+{ CPUFUNC(op_b03b_4), 0, 45115 }, /* CMP */
+{ CPUFUNC(op_b03c_4), 0, 45116 }, /* CMP */
+{ CPUFUNC(op_b040_4), 0, 45120 }, /* CMP */
+{ CPUFUNC(op_b048_4), 0, 45128 }, /* CMP */
+{ CPUFUNC(op_b050_4), 0, 45136 }, /* CMP */
+{ CPUFUNC(op_b058_4), 0, 45144 }, /* CMP */
+{ CPUFUNC(op_b060_4), 0, 45152 }, /* CMP */
+{ CPUFUNC(op_b068_4), 0, 45160 }, /* CMP */
+{ CPUFUNC(op_b070_4), 0, 45168 }, /* CMP */
+{ CPUFUNC(op_b078_4), 0, 45176 }, /* CMP */
+{ CPUFUNC(op_b079_4), 0, 45177 }, /* CMP */
+{ CPUFUNC(op_b07a_4), 0, 45178 }, /* CMP */
+{ CPUFUNC(op_b07b_4), 0, 45179 }, /* CMP */
+{ CPUFUNC(op_b07c_4), 0, 45180 }, /* CMP */
+{ CPUFUNC(op_b080_4), 0, 45184 }, /* CMP */
+{ CPUFUNC(op_b088_4), 0, 45192 }, /* CMP */
+{ CPUFUNC(op_b090_4), 0, 45200 }, /* CMP */
+{ CPUFUNC(op_b098_4), 0, 45208 }, /* CMP */
+{ CPUFUNC(op_b0a0_4), 0, 45216 }, /* CMP */
+{ CPUFUNC(op_b0a8_4), 0, 45224 }, /* CMP */
+{ CPUFUNC(op_b0b0_4), 0, 45232 }, /* CMP */
+{ CPUFUNC(op_b0b8_4), 0, 45240 }, /* CMP */
+{ CPUFUNC(op_b0b9_4), 0, 45241 }, /* CMP */
+{ CPUFUNC(op_b0ba_4), 0, 45242 }, /* CMP */
+{ CPUFUNC(op_b0bb_4), 0, 45243 }, /* CMP */
+{ CPUFUNC(op_b0bc_4), 0, 45244 }, /* CMP */
+{ CPUFUNC(op_b0c0_4), 0, 45248 }, /* CMPA */
+{ CPUFUNC(op_b0c8_4), 0, 45256 }, /* CMPA */
+{ CPUFUNC(op_b0d0_4), 0, 45264 }, /* CMPA */
+{ CPUFUNC(op_b0d8_4), 0, 45272 }, /* CMPA */
+{ CPUFUNC(op_b0e0_4), 0, 45280 }, /* CMPA */
+{ CPUFUNC(op_b0e8_4), 0, 45288 }, /* CMPA */
+{ CPUFUNC(op_b0f0_4), 0, 45296 }, /* CMPA */
+{ CPUFUNC(op_b0f8_4), 0, 45304 }, /* CMPA */
+{ CPUFUNC(op_b0f9_4), 0, 45305 }, /* CMPA */
+{ CPUFUNC(op_b0fa_4), 0, 45306 }, /* CMPA */
+{ CPUFUNC(op_b0fb_4), 0, 45307 }, /* CMPA */
+{ CPUFUNC(op_b0fc_4), 0, 45308 }, /* CMPA */
+{ CPUFUNC(op_b100_4), 0, 45312 }, /* EOR */
+{ CPUFUNC(op_b108_4), 0, 45320 }, /* CMPM */
+{ CPUFUNC(op_b110_4), 0, 45328 }, /* EOR */
+{ CPUFUNC(op_b118_4), 0, 45336 }, /* EOR */
+{ CPUFUNC(op_b120_4), 0, 45344 }, /* EOR */
+{ CPUFUNC(op_b128_4), 0, 45352 }, /* EOR */
+{ CPUFUNC(op_b130_4), 0, 45360 }, /* EOR */
+{ CPUFUNC(op_b138_4), 0, 45368 }, /* EOR */
+{ CPUFUNC(op_b139_4), 0, 45369 }, /* EOR */
+{ CPUFUNC(op_b140_4), 0, 45376 }, /* EOR */
+{ CPUFUNC(op_b148_4), 0, 45384 }, /* CMPM */
+{ CPUFUNC(op_b150_4), 0, 45392 }, /* EOR */
+{ CPUFUNC(op_b158_4), 0, 45400 }, /* EOR */
+{ CPUFUNC(op_b160_4), 0, 45408 }, /* EOR */
+{ CPUFUNC(op_b168_4), 0, 45416 }, /* EOR */
+{ CPUFUNC(op_b170_4), 0, 45424 }, /* EOR */
+{ CPUFUNC(op_b178_4), 0, 45432 }, /* EOR */
+{ CPUFUNC(op_b179_4), 0, 45433 }, /* EOR */
+{ CPUFUNC(op_b180_4), 0, 45440 }, /* EOR */
+{ CPUFUNC(op_b188_4), 0, 45448 }, /* CMPM */
+{ CPUFUNC(op_b190_4), 0, 45456 }, /* EOR */
+{ CPUFUNC(op_b198_4), 0, 45464 }, /* EOR */
+{ CPUFUNC(op_b1a0_4), 0, 45472 }, /* EOR */
+{ CPUFUNC(op_b1a8_4), 0, 45480 }, /* EOR */
+{ CPUFUNC(op_b1b0_4), 0, 45488 }, /* EOR */
+{ CPUFUNC(op_b1b8_4), 0, 45496 }, /* EOR */
+{ CPUFUNC(op_b1b9_4), 0, 45497 }, /* EOR */
+{ CPUFUNC(op_b1c0_4), 0, 45504 }, /* CMPA */
+{ CPUFUNC(op_b1c8_4), 0, 45512 }, /* CMPA */
+{ CPUFUNC(op_b1d0_4), 0, 45520 }, /* CMPA */
+{ CPUFUNC(op_b1d8_4), 0, 45528 }, /* CMPA */
+{ CPUFUNC(op_b1e0_4), 0, 45536 }, /* CMPA */
+{ CPUFUNC(op_b1e8_4), 0, 45544 }, /* CMPA */
+{ CPUFUNC(op_b1f0_4), 0, 45552 }, /* CMPA */
+{ CPUFUNC(op_b1f8_4), 0, 45560 }, /* CMPA */
+{ CPUFUNC(op_b1f9_4), 0, 45561 }, /* CMPA */
+{ CPUFUNC(op_b1fa_4), 0, 45562 }, /* CMPA */
+{ CPUFUNC(op_b1fb_4), 0, 45563 }, /* CMPA */
+{ CPUFUNC(op_b1fc_4), 0, 45564 }, /* CMPA */
+{ CPUFUNC(op_c000_4), 0, 49152 }, /* AND */
+{ CPUFUNC(op_c010_4), 0, 49168 }, /* AND */
+{ CPUFUNC(op_c018_4), 0, 49176 }, /* AND */
+{ CPUFUNC(op_c020_4), 0, 49184 }, /* AND */
+{ CPUFUNC(op_c028_4), 0, 49192 }, /* AND */
+{ CPUFUNC(op_c030_4), 0, 49200 }, /* AND */
+{ CPUFUNC(op_c038_4), 0, 49208 }, /* AND */
+{ CPUFUNC(op_c039_4), 0, 49209 }, /* AND */
+{ CPUFUNC(op_c03a_4), 0, 49210 }, /* AND */
+{ CPUFUNC(op_c03b_4), 0, 49211 }, /* AND */
+{ CPUFUNC(op_c03c_4), 0, 49212 }, /* AND */
+{ CPUFUNC(op_c040_4), 0, 49216 }, /* AND */
+{ CPUFUNC(op_c050_4), 0, 49232 }, /* AND */
+{ CPUFUNC(op_c058_4), 0, 49240 }, /* AND */
+{ CPUFUNC(op_c060_4), 0, 49248 }, /* AND */
+{ CPUFUNC(op_c068_4), 0, 49256 }, /* AND */
+{ CPUFUNC(op_c070_4), 0, 49264 }, /* AND */
+{ CPUFUNC(op_c078_4), 0, 49272 }, /* AND */
+{ CPUFUNC(op_c079_4), 0, 49273 }, /* AND */
+{ CPUFUNC(op_c07a_4), 0, 49274 }, /* AND */
+{ CPUFUNC(op_c07b_4), 0, 49275 }, /* AND */
+{ CPUFUNC(op_c07c_4), 0, 49276 }, /* AND */
+{ CPUFUNC(op_c080_4), 0, 49280 }, /* AND */
+{ CPUFUNC(op_c090_4), 0, 49296 }, /* AND */
+{ CPUFUNC(op_c098_4), 0, 49304 }, /* AND */
+{ CPUFUNC(op_c0a0_4), 0, 49312 }, /* AND */
+{ CPUFUNC(op_c0a8_4), 0, 49320 }, /* AND */
+{ CPUFUNC(op_c0b0_4), 0, 49328 }, /* AND */
+{ CPUFUNC(op_c0b8_4), 0, 49336 }, /* AND */
+{ CPUFUNC(op_c0b9_4), 0, 49337 }, /* AND */
+{ CPUFUNC(op_c0ba_4), 0, 49338 }, /* AND */
+{ CPUFUNC(op_c0bb_4), 0, 49339 }, /* AND */
+{ CPUFUNC(op_c0bc_4), 0, 49340 }, /* AND */
+{ CPUFUNC(op_c0c0_4), 0, 49344 }, /* MULU */
+{ CPUFUNC(op_c0d0_4), 0, 49360 }, /* MULU */
+{ CPUFUNC(op_c0d8_4), 0, 49368 }, /* MULU */
+{ CPUFUNC(op_c0e0_4), 0, 49376 }, /* MULU */
+{ CPUFUNC(op_c0e8_4), 0, 49384 }, /* MULU */
+{ CPUFUNC(op_c0f0_4), 0, 49392 }, /* MULU */
+{ CPUFUNC(op_c0f8_4), 0, 49400 }, /* MULU */
+{ CPUFUNC(op_c0f9_4), 0, 49401 }, /* MULU */
+{ CPUFUNC(op_c0fa_4), 0, 49402 }, /* MULU */
+{ CPUFUNC(op_c0fb_4), 0, 49403 }, /* MULU */
+{ CPUFUNC(op_c0fc_4), 0, 49404 }, /* MULU */
+{ CPUFUNC(op_c100_4), 0, 49408 }, /* ABCD */
+{ CPUFUNC(op_c108_4), 0, 49416 }, /* ABCD */
+{ CPUFUNC(op_c110_4), 0, 49424 }, /* AND */
+{ CPUFUNC(op_c118_4), 0, 49432 }, /* AND */
+{ CPUFUNC(op_c120_4), 0, 49440 }, /* AND */
+{ CPUFUNC(op_c128_4), 0, 49448 }, /* AND */
+{ CPUFUNC(op_c130_4), 0, 49456 }, /* AND */
+{ CPUFUNC(op_c138_4), 0, 49464 }, /* AND */
+{ CPUFUNC(op_c139_4), 0, 49465 }, /* AND */
+{ CPUFUNC(op_c140_4), 0, 49472 }, /* EXG */
+{ CPUFUNC(op_c148_4), 0, 49480 }, /* EXG */
+{ CPUFUNC(op_c150_4), 0, 49488 }, /* AND */
+{ CPUFUNC(op_c158_4), 0, 49496 }, /* AND */
+{ CPUFUNC(op_c160_4), 0, 49504 }, /* AND */
+{ CPUFUNC(op_c168_4), 0, 49512 }, /* AND */
+{ CPUFUNC(op_c170_4), 0, 49520 }, /* AND */
+{ CPUFUNC(op_c178_4), 0, 49528 }, /* AND */
+{ CPUFUNC(op_c179_4), 0, 49529 }, /* AND */
+{ CPUFUNC(op_c188_4), 0, 49544 }, /* EXG */
+{ CPUFUNC(op_c190_4), 0, 49552 }, /* AND */
+{ CPUFUNC(op_c198_4), 0, 49560 }, /* AND */
+{ CPUFUNC(op_c1a0_4), 0, 49568 }, /* AND */
+{ CPUFUNC(op_c1a8_4), 0, 49576 }, /* AND */
+{ CPUFUNC(op_c1b0_4), 0, 49584 }, /* AND */
+{ CPUFUNC(op_c1b8_4), 0, 49592 }, /* AND */
+{ CPUFUNC(op_c1b9_4), 0, 49593 }, /* AND */
+{ CPUFUNC(op_c1c0_4), 0, 49600 }, /* MULS */
+{ CPUFUNC(op_c1d0_4), 0, 49616 }, /* MULS */
+{ CPUFUNC(op_c1d8_4), 0, 49624 }, /* MULS */
+{ CPUFUNC(op_c1e0_4), 0, 49632 }, /* MULS */
+{ CPUFUNC(op_c1e8_4), 0, 49640 }, /* MULS */
+{ CPUFUNC(op_c1f0_4), 0, 49648 }, /* MULS */
+{ CPUFUNC(op_c1f8_4), 0, 49656 }, /* MULS */
+{ CPUFUNC(op_c1f9_4), 0, 49657 }, /* MULS */
+{ CPUFUNC(op_c1fa_4), 0, 49658 }, /* MULS */
+{ CPUFUNC(op_c1fb_4), 0, 49659 }, /* MULS */
+{ CPUFUNC(op_c1fc_4), 0, 49660 }, /* MULS */
+{ CPUFUNC(op_d000_4), 0, 53248 }, /* ADD */
+{ CPUFUNC(op_d010_4), 0, 53264 }, /* ADD */
+{ CPUFUNC(op_d018_4), 0, 53272 }, /* ADD */
+{ CPUFUNC(op_d020_4), 0, 53280 }, /* ADD */
+{ CPUFUNC(op_d028_4), 0, 53288 }, /* ADD */
+{ CPUFUNC(op_d030_4), 0, 53296 }, /* ADD */
+{ CPUFUNC(op_d038_4), 0, 53304 }, /* ADD */
+{ CPUFUNC(op_d039_4), 0, 53305 }, /* ADD */
+{ CPUFUNC(op_d03a_4), 0, 53306 }, /* ADD */
+{ CPUFUNC(op_d03b_4), 0, 53307 }, /* ADD */
+{ CPUFUNC(op_d03c_4), 0, 53308 }, /* ADD */
+{ CPUFUNC(op_d040_4), 0, 53312 }, /* ADD */
+{ CPUFUNC(op_d048_4), 0, 53320 }, /* ADD */
+{ CPUFUNC(op_d050_4), 0, 53328 }, /* ADD */
+{ CPUFUNC(op_d058_4), 0, 53336 }, /* ADD */
+{ CPUFUNC(op_d060_4), 0, 53344 }, /* ADD */
+{ CPUFUNC(op_d068_4), 0, 53352 }, /* ADD */
+{ CPUFUNC(op_d070_4), 0, 53360 }, /* ADD */
+{ CPUFUNC(op_d078_4), 0, 53368 }, /* ADD */
+{ CPUFUNC(op_d079_4), 0, 53369 }, /* ADD */
+{ CPUFUNC(op_d07a_4), 0, 53370 }, /* ADD */
+{ CPUFUNC(op_d07b_4), 0, 53371 }, /* ADD */
+{ CPUFUNC(op_d07c_4), 0, 53372 }, /* ADD */
+{ CPUFUNC(op_d080_4), 0, 53376 }, /* ADD */
+{ CPUFUNC(op_d088_4), 0, 53384 }, /* ADD */
+{ CPUFUNC(op_d090_4), 0, 53392 }, /* ADD */
+{ CPUFUNC(op_d098_4), 0, 53400 }, /* ADD */
+{ CPUFUNC(op_d0a0_4), 0, 53408 }, /* ADD */
+{ CPUFUNC(op_d0a8_4), 0, 53416 }, /* ADD */
+{ CPUFUNC(op_d0b0_4), 0, 53424 }, /* ADD */
+{ CPUFUNC(op_d0b8_4), 0, 53432 }, /* ADD */
+{ CPUFUNC(op_d0b9_4), 0, 53433 }, /* ADD */
+{ CPUFUNC(op_d0ba_4), 0, 53434 }, /* ADD */
+{ CPUFUNC(op_d0bb_4), 0, 53435 }, /* ADD */
+{ CPUFUNC(op_d0bc_4), 0, 53436 }, /* ADD */
+{ CPUFUNC(op_d0c0_4), 0, 53440 }, /* ADDA */
+{ CPUFUNC(op_d0c8_4), 0, 53448 }, /* ADDA */
+{ CPUFUNC(op_d0d0_4), 0, 53456 }, /* ADDA */
+{ CPUFUNC(op_d0d8_4), 0, 53464 }, /* ADDA */
+{ CPUFUNC(op_d0e0_4), 0, 53472 }, /* ADDA */
+{ CPUFUNC(op_d0e8_4), 0, 53480 }, /* ADDA */
+{ CPUFUNC(op_d0f0_4), 0, 53488 }, /* ADDA */
+{ CPUFUNC(op_d0f8_4), 0, 53496 }, /* ADDA */
+{ CPUFUNC(op_d0f9_4), 0, 53497 }, /* ADDA */
+{ CPUFUNC(op_d0fa_4), 0, 53498 }, /* ADDA */
+{ CPUFUNC(op_d0fb_4), 0, 53499 }, /* ADDA */
+{ CPUFUNC(op_d0fc_4), 0, 53500 }, /* ADDA */
+{ CPUFUNC(op_d100_4), 0, 53504 }, /* ADDX */
+{ CPUFUNC(op_d108_4), 0, 53512 }, /* ADDX */
+{ CPUFUNC(op_d110_4), 0, 53520 }, /* ADD */
+{ CPUFUNC(op_d118_4), 0, 53528 }, /* ADD */
+{ CPUFUNC(op_d120_4), 0, 53536 }, /* ADD */
+{ CPUFUNC(op_d128_4), 0, 53544 }, /* ADD */
+{ CPUFUNC(op_d130_4), 0, 53552 }, /* ADD */
+{ CPUFUNC(op_d138_4), 0, 53560 }, /* ADD */
+{ CPUFUNC(op_d139_4), 0, 53561 }, /* ADD */
+{ CPUFUNC(op_d140_4), 0, 53568 }, /* ADDX */
+{ CPUFUNC(op_d148_4), 0, 53576 }, /* ADDX */
+{ CPUFUNC(op_d150_4), 0, 53584 }, /* ADD */
+{ CPUFUNC(op_d158_4), 0, 53592 }, /* ADD */
+{ CPUFUNC(op_d160_4), 0, 53600 }, /* ADD */
+{ CPUFUNC(op_d168_4), 0, 53608 }, /* ADD */
+{ CPUFUNC(op_d170_4), 0, 53616 }, /* ADD */
+{ CPUFUNC(op_d178_4), 0, 53624 }, /* ADD */
+{ CPUFUNC(op_d179_4), 0, 53625 }, /* ADD */
+{ CPUFUNC(op_d180_4), 0, 53632 }, /* ADDX */
+{ CPUFUNC(op_d188_4), 0, 53640 }, /* ADDX */
+{ CPUFUNC(op_d190_4), 0, 53648 }, /* ADD */
+{ CPUFUNC(op_d198_4), 0, 53656 }, /* ADD */
+{ CPUFUNC(op_d1a0_4), 0, 53664 }, /* ADD */
+{ CPUFUNC(op_d1a8_4), 0, 53672 }, /* ADD */
+{ CPUFUNC(op_d1b0_4), 0, 53680 }, /* ADD */
+{ CPUFUNC(op_d1b8_4), 0, 53688 }, /* ADD */
+{ CPUFUNC(op_d1b9_4), 0, 53689 }, /* ADD */
+{ CPUFUNC(op_d1c0_4), 0, 53696 }, /* ADDA */
+{ CPUFUNC(op_d1c8_4), 0, 53704 }, /* ADDA */
+{ CPUFUNC(op_d1d0_4), 0, 53712 }, /* ADDA */
+{ CPUFUNC(op_d1d8_4), 0, 53720 }, /* ADDA */
+{ CPUFUNC(op_d1e0_4), 0, 53728 }, /* ADDA */
+{ CPUFUNC(op_d1e8_4), 0, 53736 }, /* ADDA */
+{ CPUFUNC(op_d1f0_4), 0, 53744 }, /* ADDA */
+{ CPUFUNC(op_d1f8_4), 0, 53752 }, /* ADDA */
+{ CPUFUNC(op_d1f9_4), 0, 53753 }, /* ADDA */
+{ CPUFUNC(op_d1fa_4), 0, 53754 }, /* ADDA */
+{ CPUFUNC(op_d1fb_4), 0, 53755 }, /* ADDA */
+{ CPUFUNC(op_d1fc_4), 0, 53756 }, /* ADDA */
+{ CPUFUNC(op_e000_4), 0, 57344 }, /* ASR */
+{ CPUFUNC(op_e008_4), 0, 57352 }, /* LSR */
+{ CPUFUNC(op_e010_4), 0, 57360 }, /* ROXR */
+{ CPUFUNC(op_e018_4), 0, 57368 }, /* ROR */
+{ CPUFUNC(op_e020_4), 0, 57376 }, /* ASR */
+{ CPUFUNC(op_e028_4), 0, 57384 }, /* LSR */
+{ CPUFUNC(op_e030_4), 0, 57392 }, /* ROXR */
+{ CPUFUNC(op_e038_4), 0, 57400 }, /* ROR */
+{ CPUFUNC(op_e040_4), 0, 57408 }, /* ASR */
+{ CPUFUNC(op_e048_4), 0, 57416 }, /* LSR */
+{ CPUFUNC(op_e050_4), 0, 57424 }, /* ROXR */
+{ CPUFUNC(op_e058_4), 0, 57432 }, /* ROR */
+{ CPUFUNC(op_e060_4), 0, 57440 }, /* ASR */
+{ CPUFUNC(op_e068_4), 0, 57448 }, /* LSR */
+{ CPUFUNC(op_e070_4), 0, 57456 }, /* ROXR */
+{ CPUFUNC(op_e078_4), 0, 57464 }, /* ROR */
+{ CPUFUNC(op_e080_4), 0, 57472 }, /* ASR */
+{ CPUFUNC(op_e088_4), 0, 57480 }, /* LSR */
+{ CPUFUNC(op_e090_4), 0, 57488 }, /* ROXR */
+{ CPUFUNC(op_e098_4), 0, 57496 }, /* ROR */
+{ CPUFUNC(op_e0a0_4), 0, 57504 }, /* ASR */
+{ CPUFUNC(op_e0a8_4), 0, 57512 }, /* LSR */
+{ CPUFUNC(op_e0b0_4), 0, 57520 }, /* ROXR */
+{ CPUFUNC(op_e0b8_4), 0, 57528 }, /* ROR */
+{ CPUFUNC(op_e0d0_4), 0, 57552 }, /* ASRW */
+{ CPUFUNC(op_e0d8_4), 0, 57560 }, /* ASRW */
+{ CPUFUNC(op_e0e0_4), 0, 57568 }, /* ASRW */
+{ CPUFUNC(op_e0e8_4), 0, 57576 }, /* ASRW */
+{ CPUFUNC(op_e0f0_4), 0, 57584 }, /* ASRW */
+{ CPUFUNC(op_e0f8_4), 0, 57592 }, /* ASRW */
+{ CPUFUNC(op_e0f9_4), 0, 57593 }, /* ASRW */
+{ CPUFUNC(op_e100_4), 0, 57600 }, /* ASL */
+{ CPUFUNC(op_e108_4), 0, 57608 }, /* LSL */
+{ CPUFUNC(op_e110_4), 0, 57616 }, /* ROXL */
+{ CPUFUNC(op_e118_4), 0, 57624 }, /* ROL */
+{ CPUFUNC(op_e120_4), 0, 57632 }, /* ASL */
+{ CPUFUNC(op_e128_4), 0, 57640 }, /* LSL */
+{ CPUFUNC(op_e130_4), 0, 57648 }, /* ROXL */
+{ CPUFUNC(op_e138_4), 0, 57656 }, /* ROL */
+{ CPUFUNC(op_e140_4), 0, 57664 }, /* ASL */
+{ CPUFUNC(op_e148_4), 0, 57672 }, /* LSL */
+{ CPUFUNC(op_e150_4), 0, 57680 }, /* ROXL */
+{ CPUFUNC(op_e158_4), 0, 57688 }, /* ROL */
+{ CPUFUNC(op_e160_4), 0, 57696 }, /* ASL */
+{ CPUFUNC(op_e168_4), 0, 57704 }, /* LSL */
+{ CPUFUNC(op_e170_4), 0, 57712 }, /* ROXL */
+{ CPUFUNC(op_e178_4), 0, 57720 }, /* ROL */
+{ CPUFUNC(op_e180_4), 0, 57728 }, /* ASL */
+{ CPUFUNC(op_e188_4), 0, 57736 }, /* LSL */
+{ CPUFUNC(op_e190_4), 0, 57744 }, /* ROXL */
+{ CPUFUNC(op_e198_4), 0, 57752 }, /* ROL */
+{ CPUFUNC(op_e1a0_4), 0, 57760 }, /* ASL */
+{ CPUFUNC(op_e1a8_4), 0, 57768 }, /* LSL */
+{ CPUFUNC(op_e1b0_4), 0, 57776 }, /* ROXL */
+{ CPUFUNC(op_e1b8_4), 0, 57784 }, /* ROL */
+{ CPUFUNC(op_e1d0_4), 0, 57808 }, /* ASLW */
+{ CPUFUNC(op_e1d8_4), 0, 57816 }, /* ASLW */
+{ CPUFUNC(op_e1e0_4), 0, 57824 }, /* ASLW */
+{ CPUFUNC(op_e1e8_4), 0, 57832 }, /* ASLW */
+{ CPUFUNC(op_e1f0_4), 0, 57840 }, /* ASLW */
+{ CPUFUNC(op_e1f8_4), 0, 57848 }, /* ASLW */
+{ CPUFUNC(op_e1f9_4), 0, 57849 }, /* ASLW */
+{ CPUFUNC(op_e2d0_4), 0, 58064 }, /* LSRW */
+{ CPUFUNC(op_e2d8_4), 0, 58072 }, /* LSRW */
+{ CPUFUNC(op_e2e0_4), 0, 58080 }, /* LSRW */
+{ CPUFUNC(op_e2e8_4), 0, 58088 }, /* LSRW */
+{ CPUFUNC(op_e2f0_4), 0, 58096 }, /* LSRW */
+{ CPUFUNC(op_e2f8_4), 0, 58104 }, /* LSRW */
+{ CPUFUNC(op_e2f9_4), 0, 58105 }, /* LSRW */
+{ CPUFUNC(op_e3d0_4), 0, 58320 }, /* LSLW */
+{ CPUFUNC(op_e3d8_4), 0, 58328 }, /* LSLW */
+{ CPUFUNC(op_e3e0_4), 0, 58336 }, /* LSLW */
+{ CPUFUNC(op_e3e8_4), 0, 58344 }, /* LSLW */
+{ CPUFUNC(op_e3f0_4), 0, 58352 }, /* LSLW */
+{ CPUFUNC(op_e3f8_4), 0, 58360 }, /* LSLW */
+{ CPUFUNC(op_e3f9_4), 0, 58361 }, /* LSLW */
+{ CPUFUNC(op_e4d0_4), 0, 58576 }, /* ROXRW */
+{ CPUFUNC(op_e4d8_4), 0, 58584 }, /* ROXRW */
+{ CPUFUNC(op_e4e0_4), 0, 58592 }, /* ROXRW */
+{ CPUFUNC(op_e4e8_4), 0, 58600 }, /* ROXRW */
+{ CPUFUNC(op_e4f0_4), 0, 58608 }, /* ROXRW */
+{ CPUFUNC(op_e4f8_4), 0, 58616 }, /* ROXRW */
+{ CPUFUNC(op_e4f9_4), 0, 58617 }, /* ROXRW */
+{ CPUFUNC(op_e5d0_4), 0, 58832 }, /* ROXLW */
+{ CPUFUNC(op_e5d8_4), 0, 58840 }, /* ROXLW */
+{ CPUFUNC(op_e5e0_4), 0, 58848 }, /* ROXLW */
+{ CPUFUNC(op_e5e8_4), 0, 58856 }, /* ROXLW */
+{ CPUFUNC(op_e5f0_4), 0, 58864 }, /* ROXLW */
+{ CPUFUNC(op_e5f8_4), 0, 58872 }, /* ROXLW */
+{ CPUFUNC(op_e5f9_4), 0, 58873 }, /* ROXLW */
+{ CPUFUNC(op_e6d0_4), 0, 59088 }, /* RORW */
+{ CPUFUNC(op_e6d8_4), 0, 59096 }, /* RORW */
+{ CPUFUNC(op_e6e0_4), 0, 59104 }, /* RORW */
+{ CPUFUNC(op_e6e8_4), 0, 59112 }, /* RORW */
+{ CPUFUNC(op_e6f0_4), 0, 59120 }, /* RORW */
+{ CPUFUNC(op_e6f8_4), 0, 59128 }, /* RORW */
+{ CPUFUNC(op_e6f9_4), 0, 59129 }, /* RORW */
+{ CPUFUNC(op_e7d0_4), 0, 59344 }, /* ROLW */
+{ CPUFUNC(op_e7d8_4), 0, 59352 }, /* ROLW */
+{ CPUFUNC(op_e7e0_4), 0, 59360 }, /* ROLW */
+{ CPUFUNC(op_e7e8_4), 0, 59368 }, /* ROLW */
+{ CPUFUNC(op_e7f0_4), 0, 59376 }, /* ROLW */
+{ CPUFUNC(op_e7f8_4), 0, 59384 }, /* ROLW */
+{ CPUFUNC(op_e7f9_4), 0, 59385 }, /* ROLW */
+{ 0, 0, 0 }};
+const struct cputbl CPUFUNC(op_smalltbl_5)[] = {
+{ CPUFUNC(op_0_5), 0, 0 }, /* OR */
+{ CPUFUNC(op_10_5), 0, 16 }, /* OR */
+{ CPUFUNC(op_18_5), 0, 24 }, /* OR */
+{ CPUFUNC(op_20_5), 0, 32 }, /* OR */
+{ CPUFUNC(op_28_5), 0, 40 }, /* OR */
+{ CPUFUNC(op_30_5), 0, 48 }, /* OR */
+{ CPUFUNC(op_38_5), 0, 56 }, /* OR */
+{ CPUFUNC(op_39_5), 0, 57 }, /* OR */
+{ CPUFUNC(op_3c_5), 0, 60 }, /* ORSR */
+{ CPUFUNC(op_40_5), 0, 64 }, /* OR */
+{ CPUFUNC(op_50_5), 0, 80 }, /* OR */
+{ CPUFUNC(op_58_5), 0, 88 }, /* OR */
+{ CPUFUNC(op_60_5), 0, 96 }, /* OR */
+{ CPUFUNC(op_68_5), 0, 104 }, /* OR */
+{ CPUFUNC(op_70_5), 0, 112 }, /* OR */
+{ CPUFUNC(op_78_5), 0, 120 }, /* OR */
+{ CPUFUNC(op_79_5), 0, 121 }, /* OR */
+{ CPUFUNC(op_7c_5), 0, 124 }, /* ORSR */
+{ CPUFUNC(op_80_5), 0, 128 }, /* OR */
+{ CPUFUNC(op_90_5), 0, 144 }, /* OR */
+{ CPUFUNC(op_98_5), 0, 152 }, /* OR */
+{ CPUFUNC(op_a0_5), 0, 160 }, /* OR */
+{ CPUFUNC(op_a8_5), 0, 168 }, /* OR */
+{ CPUFUNC(op_b0_5), 0, 176 }, /* OR */
+{ CPUFUNC(op_b8_5), 0, 184 }, /* OR */
+{ CPUFUNC(op_b9_5), 0, 185 }, /* OR */
+{ CPUFUNC(op_100_5), 0, 256 }, /* BTST */
+{ CPUFUNC(op_108_5), 0, 264 }, /* MVPMR */
+{ CPUFUNC(op_110_5), 0, 272 }, /* BTST */
+{ CPUFUNC(op_118_5), 0, 280 }, /* BTST */
+{ CPUFUNC(op_120_5), 0, 288 }, /* BTST */
+{ CPUFUNC(op_128_5), 0, 296 }, /* BTST */
+{ CPUFUNC(op_130_5), 0, 304 }, /* BTST */
+{ CPUFUNC(op_138_5), 0, 312 }, /* BTST */
+{ CPUFUNC(op_139_5), 0, 313 }, /* BTST */
+{ CPUFUNC(op_13a_5), 0, 314 }, /* BTST */
+{ CPUFUNC(op_13b_5), 0, 315 }, /* BTST */
+{ CPUFUNC(op_13c_5), 0, 316 }, /* BTST */
+{ CPUFUNC(op_140_5), 0, 320 }, /* BCHG */
+{ CPUFUNC(op_148_5), 0, 328 }, /* MVPMR */
+{ CPUFUNC(op_150_5), 0, 336 }, /* BCHG */
+{ CPUFUNC(op_158_5), 0, 344 }, /* BCHG */
+{ CPUFUNC(op_160_5), 0, 352 }, /* BCHG */
+{ CPUFUNC(op_168_5), 0, 360 }, /* BCHG */
+{ CPUFUNC(op_170_5), 0, 368 }, /* BCHG */
+{ CPUFUNC(op_178_5), 0, 376 }, /* BCHG */
+{ CPUFUNC(op_179_5), 0, 377 }, /* BCHG */
+{ CPUFUNC(op_17a_5), 0, 378 }, /* BCHG */
+{ CPUFUNC(op_17b_5), 0, 379 }, /* BCHG */
+{ CPUFUNC(op_180_5), 0, 384 }, /* BCLR */
+{ CPUFUNC(op_188_5), 0, 392 }, /* MVPRM */
+{ CPUFUNC(op_190_5), 0, 400 }, /* BCLR */
+{ CPUFUNC(op_198_5), 0, 408 }, /* BCLR */
+{ CPUFUNC(op_1a0_5), 0, 416 }, /* BCLR */
+{ CPUFUNC(op_1a8_5), 0, 424 }, /* BCLR */
+{ CPUFUNC(op_1b0_5), 0, 432 }, /* BCLR */
+{ CPUFUNC(op_1b8_5), 0, 440 }, /* BCLR */
+{ CPUFUNC(op_1b9_5), 0, 441 }, /* BCLR */
+{ CPUFUNC(op_1ba_5), 0, 442 }, /* BCLR */
+{ CPUFUNC(op_1bb_5), 0, 443 }, /* BCLR */
+{ CPUFUNC(op_1c0_5), 0, 448 }, /* BSET */
+{ CPUFUNC(op_1c8_5), 0, 456 }, /* MVPRM */
+{ CPUFUNC(op_1d0_5), 0, 464 }, /* BSET */
+{ CPUFUNC(op_1d8_5), 0, 472 }, /* BSET */
+{ CPUFUNC(op_1e0_5), 0, 480 }, /* BSET */
+{ CPUFUNC(op_1e8_5), 0, 488 }, /* BSET */
+{ CPUFUNC(op_1f0_5), 0, 496 }, /* BSET */
+{ CPUFUNC(op_1f8_5), 0, 504 }, /* BSET */
+{ CPUFUNC(op_1f9_5), 0, 505 }, /* BSET */
+{ CPUFUNC(op_1fa_5), 0, 506 }, /* BSET */
+{ CPUFUNC(op_1fb_5), 0, 507 }, /* BSET */
+{ CPUFUNC(op_200_5), 0, 512 }, /* AND */
+{ CPUFUNC(op_210_5), 0, 528 }, /* AND */
+{ CPUFUNC(op_218_5), 0, 536 }, /* AND */
+{ CPUFUNC(op_220_5), 0, 544 }, /* AND */
+{ CPUFUNC(op_228_5), 0, 552 }, /* AND */
+{ CPUFUNC(op_230_5), 0, 560 }, /* AND */
+{ CPUFUNC(op_238_5), 0, 568 }, /* AND */
+{ CPUFUNC(op_239_5), 0, 569 }, /* AND */
+{ CPUFUNC(op_23c_5), 0, 572 }, /* ANDSR */
+{ CPUFUNC(op_240_5), 0, 576 }, /* AND */
+{ CPUFUNC(op_250_5), 0, 592 }, /* AND */
+{ CPUFUNC(op_258_5), 0, 600 }, /* AND */
+{ CPUFUNC(op_260_5), 0, 608 }, /* AND */
+{ CPUFUNC(op_268_5), 0, 616 }, /* AND */
+{ CPUFUNC(op_270_5), 0, 624 }, /* AND */
+{ CPUFUNC(op_278_5), 0, 632 }, /* AND */
+{ CPUFUNC(op_279_5), 0, 633 }, /* AND */
+{ CPUFUNC(op_27c_5), 0, 636 }, /* ANDSR */
+{ CPUFUNC(op_280_5), 0, 640 }, /* AND */
+{ CPUFUNC(op_290_5), 0, 656 }, /* AND */
+{ CPUFUNC(op_298_5), 0, 664 }, /* AND */
+{ CPUFUNC(op_2a0_5), 0, 672 }, /* AND */
+{ CPUFUNC(op_2a8_5), 0, 680 }, /* AND */
+{ CPUFUNC(op_2b0_5), 0, 688 }, /* AND */
+{ CPUFUNC(op_2b8_5), 0, 696 }, /* AND */
+{ CPUFUNC(op_2b9_5), 0, 697 }, /* AND */
+{ CPUFUNC(op_400_5), 0, 1024 }, /* SUB */
+{ CPUFUNC(op_410_5), 0, 1040 }, /* SUB */
+{ CPUFUNC(op_418_5), 0, 1048 }, /* SUB */
+{ CPUFUNC(op_420_5), 0, 1056 }, /* SUB */
+{ CPUFUNC(op_428_5), 0, 1064 }, /* SUB */
+{ CPUFUNC(op_430_5), 0, 1072 }, /* SUB */
+{ CPUFUNC(op_438_5), 0, 1080 }, /* SUB */
+{ CPUFUNC(op_439_5), 0, 1081 }, /* SUB */
+{ CPUFUNC(op_440_5), 0, 1088 }, /* SUB */
+{ CPUFUNC(op_450_5), 0, 1104 }, /* SUB */
+{ CPUFUNC(op_458_5), 0, 1112 }, /* SUB */
+{ CPUFUNC(op_460_5), 0, 1120 }, /* SUB */
+{ CPUFUNC(op_468_5), 0, 1128 }, /* SUB */
+{ CPUFUNC(op_470_5), 0, 1136 }, /* SUB */
+{ CPUFUNC(op_478_5), 0, 1144 }, /* SUB */
+{ CPUFUNC(op_479_5), 0, 1145 }, /* SUB */
+{ CPUFUNC(op_480_5), 0, 1152 }, /* SUB */
+{ CPUFUNC(op_490_5), 0, 1168 }, /* SUB */
+{ CPUFUNC(op_498_5), 0, 1176 }, /* SUB */
+{ CPUFUNC(op_4a0_5), 0, 1184 }, /* SUB */
+{ CPUFUNC(op_4a8_5), 0, 1192 }, /* SUB */
+{ CPUFUNC(op_4b0_5), 0, 1200 }, /* SUB */
+{ CPUFUNC(op_4b8_5), 0, 1208 }, /* SUB */
+{ CPUFUNC(op_4b9_5), 0, 1209 }, /* SUB */
+{ CPUFUNC(op_600_5), 0, 1536 }, /* ADD */
+{ CPUFUNC(op_610_5), 0, 1552 }, /* ADD */
+{ CPUFUNC(op_618_5), 0, 1560 }, /* ADD */
+{ CPUFUNC(op_620_5), 0, 1568 }, /* ADD */
+{ CPUFUNC(op_628_5), 0, 1576 }, /* ADD */
+{ CPUFUNC(op_630_5), 0, 1584 }, /* ADD */
+{ CPUFUNC(op_638_5), 0, 1592 }, /* ADD */
+{ CPUFUNC(op_639_5), 0, 1593 }, /* ADD */
+{ CPUFUNC(op_640_5), 0, 1600 }, /* ADD */
+{ CPUFUNC(op_650_5), 0, 1616 }, /* ADD */
+{ CPUFUNC(op_658_5), 0, 1624 }, /* ADD */
+{ CPUFUNC(op_660_5), 0, 1632 }, /* ADD */
+{ CPUFUNC(op_668_5), 0, 1640 }, /* ADD */
+{ CPUFUNC(op_670_5), 0, 1648 }, /* ADD */
+{ CPUFUNC(op_678_5), 0, 1656 }, /* ADD */
+{ CPUFUNC(op_679_5), 0, 1657 }, /* ADD */
+{ CPUFUNC(op_680_5), 0, 1664 }, /* ADD */
+{ CPUFUNC(op_690_5), 0, 1680 }, /* ADD */
+{ CPUFUNC(op_698_5), 0, 1688 }, /* ADD */
+{ CPUFUNC(op_6a0_5), 0, 1696 }, /* ADD */
+{ CPUFUNC(op_6a8_5), 0, 1704 }, /* ADD */
+{ CPUFUNC(op_6b0_5), 0, 1712 }, /* ADD */
+{ CPUFUNC(op_6b8_5), 0, 1720 }, /* ADD */
+{ CPUFUNC(op_6b9_5), 0, 1721 }, /* ADD */
+{ CPUFUNC(op_800_5), 0, 2048 }, /* BTST */
+{ CPUFUNC(op_810_5), 0, 2064 }, /* BTST */
+{ CPUFUNC(op_818_5), 0, 2072 }, /* BTST */
+{ CPUFUNC(op_820_5), 0, 2080 }, /* BTST */
+{ CPUFUNC(op_828_5), 0, 2088 }, /* BTST */
+{ CPUFUNC(op_830_5), 0, 2096 }, /* BTST */
+{ CPUFUNC(op_838_5), 0, 2104 }, /* BTST */
+{ CPUFUNC(op_839_5), 0, 2105 }, /* BTST */
+{ CPUFUNC(op_83a_5), 0, 2106 }, /* BTST */
+{ CPUFUNC(op_83b_5), 0, 2107 }, /* BTST */
+{ CPUFUNC(op_83c_5), 0, 2108 }, /* BTST */
+{ CPUFUNC(op_840_5), 0, 2112 }, /* BCHG */
+{ CPUFUNC(op_850_5), 0, 2128 }, /* BCHG */
+{ CPUFUNC(op_858_5), 0, 2136 }, /* BCHG */
+{ CPUFUNC(op_860_5), 0, 2144 }, /* BCHG */
+{ CPUFUNC(op_868_5), 0, 2152 }, /* BCHG */
+{ CPUFUNC(op_870_5), 0, 2160 }, /* BCHG */
+{ CPUFUNC(op_878_5), 0, 2168 }, /* BCHG */
+{ CPUFUNC(op_879_5), 0, 2169 }, /* BCHG */
+{ CPUFUNC(op_87a_5), 0, 2170 }, /* BCHG */
+{ CPUFUNC(op_87b_5), 0, 2171 }, /* BCHG */
+{ CPUFUNC(op_880_5), 0, 2176 }, /* BCLR */
+{ CPUFUNC(op_890_5), 0, 2192 }, /* BCLR */
+{ CPUFUNC(op_898_5), 0, 2200 }, /* BCLR */
+{ CPUFUNC(op_8a0_5), 0, 2208 }, /* BCLR */
+{ CPUFUNC(op_8a8_5), 0, 2216 }, /* BCLR */
+{ CPUFUNC(op_8b0_5), 0, 2224 }, /* BCLR */
+{ CPUFUNC(op_8b8_5), 0, 2232 }, /* BCLR */
+{ CPUFUNC(op_8b9_5), 0, 2233 }, /* BCLR */
+{ CPUFUNC(op_8ba_5), 0, 2234 }, /* BCLR */
+{ CPUFUNC(op_8bb_5), 0, 2235 }, /* BCLR */
+{ CPUFUNC(op_8c0_5), 0, 2240 }, /* BSET */
+{ CPUFUNC(op_8d0_5), 0, 2256 }, /* BSET */
+{ CPUFUNC(op_8d8_5), 0, 2264 }, /* BSET */
+{ CPUFUNC(op_8e0_5), 0, 2272 }, /* BSET */
+{ CPUFUNC(op_8e8_5), 0, 2280 }, /* BSET */
+{ CPUFUNC(op_8f0_5), 0, 2288 }, /* BSET */
+{ CPUFUNC(op_8f8_5), 0, 2296 }, /* BSET */
+{ CPUFUNC(op_8f9_5), 0, 2297 }, /* BSET */
+{ CPUFUNC(op_8fa_5), 0, 2298 }, /* BSET */
+{ CPUFUNC(op_8fb_5), 0, 2299 }, /* BSET */
+{ CPUFUNC(op_a00_5), 0, 2560 }, /* EOR */
+{ CPUFUNC(op_a10_5), 0, 2576 }, /* EOR */
+{ CPUFUNC(op_a18_5), 0, 2584 }, /* EOR */
+{ CPUFUNC(op_a20_5), 0, 2592 }, /* EOR */
+{ CPUFUNC(op_a28_5), 0, 2600 }, /* EOR */
+{ CPUFUNC(op_a30_5), 0, 2608 }, /* EOR */
+{ CPUFUNC(op_a38_5), 0, 2616 }, /* EOR */
+{ CPUFUNC(op_a39_5), 0, 2617 }, /* EOR */
+{ CPUFUNC(op_a3c_5), 0, 2620 }, /* EORSR */
+{ CPUFUNC(op_a40_5), 0, 2624 }, /* EOR */
+{ CPUFUNC(op_a50_5), 0, 2640 }, /* EOR */
+{ CPUFUNC(op_a58_5), 0, 2648 }, /* EOR */
+{ CPUFUNC(op_a60_5), 0, 2656 }, /* EOR */
+{ CPUFUNC(op_a68_5), 0, 2664 }, /* EOR */
+{ CPUFUNC(op_a70_5), 0, 2672 }, /* EOR */
+{ CPUFUNC(op_a78_5), 0, 2680 }, /* EOR */
+{ CPUFUNC(op_a79_5), 0, 2681 }, /* EOR */
+{ CPUFUNC(op_a7c_5), 0, 2684 }, /* EORSR */
+{ CPUFUNC(op_a80_5), 0, 2688 }, /* EOR */
+{ CPUFUNC(op_a90_5), 0, 2704 }, /* EOR */
+{ CPUFUNC(op_a98_5), 0, 2712 }, /* EOR */
+{ CPUFUNC(op_aa0_5), 0, 2720 }, /* EOR */
+{ CPUFUNC(op_aa8_5), 0, 2728 }, /* EOR */
+{ CPUFUNC(op_ab0_5), 0, 2736 }, /* EOR */
+{ CPUFUNC(op_ab8_5), 0, 2744 }, /* EOR */
+{ CPUFUNC(op_ab9_5), 0, 2745 }, /* EOR */
+{ CPUFUNC(op_c00_5), 0, 3072 }, /* CMP */
+{ CPUFUNC(op_c10_5), 0, 3088 }, /* CMP */
+{ CPUFUNC(op_c18_5), 0, 3096 }, /* CMP */
+{ CPUFUNC(op_c20_5), 0, 3104 }, /* CMP */
+{ CPUFUNC(op_c28_5), 0, 3112 }, /* CMP */
+{ CPUFUNC(op_c30_5), 0, 3120 }, /* CMP */
+{ CPUFUNC(op_c38_5), 0, 3128 }, /* CMP */
+{ CPUFUNC(op_c39_5), 0, 3129 }, /* CMP */
+{ CPUFUNC(op_c3a_5), 0, 3130 }, /* CMP */
+{ CPUFUNC(op_c3b_5), 0, 3131 }, /* CMP */
+{ CPUFUNC(op_c40_5), 0, 3136 }, /* CMP */
+{ CPUFUNC(op_c50_5), 0, 3152 }, /* CMP */
+{ CPUFUNC(op_c58_5), 0, 3160 }, /* CMP */
+{ CPUFUNC(op_c60_5), 0, 3168 }, /* CMP */
+{ CPUFUNC(op_c68_5), 0, 3176 }, /* CMP */
+{ CPUFUNC(op_c70_5), 0, 3184 }, /* CMP */
+{ CPUFUNC(op_c78_5), 0, 3192 }, /* CMP */
+{ CPUFUNC(op_c79_5), 0, 3193 }, /* CMP */
+{ CPUFUNC(op_c7a_5), 0, 3194 }, /* CMP */
+{ CPUFUNC(op_c7b_5), 0, 3195 }, /* CMP */
+{ CPUFUNC(op_c80_5), 0, 3200 }, /* CMP */
+{ CPUFUNC(op_c90_5), 0, 3216 }, /* CMP */
+{ CPUFUNC(op_c98_5), 0, 3224 }, /* CMP */
+{ CPUFUNC(op_ca0_5), 0, 3232 }, /* CMP */
+{ CPUFUNC(op_ca8_5), 0, 3240 }, /* CMP */
+{ CPUFUNC(op_cb0_5), 0, 3248 }, /* CMP */
+{ CPUFUNC(op_cb8_5), 0, 3256 }, /* CMP */
+{ CPUFUNC(op_cb9_5), 0, 3257 }, /* CMP */
+{ CPUFUNC(op_cba_5), 0, 3258 }, /* CMP */
+{ CPUFUNC(op_cbb_5), 0, 3259 }, /* CMP */
+{ CPUFUNC(op_1000_5), 0, 4096 }, /* MOVE */
+{ CPUFUNC(op_1008_5), 0, 4104 }, /* MOVE */
+{ CPUFUNC(op_1010_5), 0, 4112 }, /* MOVE */
+{ CPUFUNC(op_1018_5), 0, 4120 }, /* MOVE */
+{ CPUFUNC(op_1020_5), 0, 4128 }, /* MOVE */
+{ CPUFUNC(op_1028_5), 0, 4136 }, /* MOVE */
+{ CPUFUNC(op_1030_5), 0, 4144 }, /* MOVE */
+{ CPUFUNC(op_1038_5), 0, 4152 }, /* MOVE */
+{ CPUFUNC(op_1039_5), 0, 4153 }, /* MOVE */
+{ CPUFUNC(op_103a_5), 0, 4154 }, /* MOVE */
+{ CPUFUNC(op_103b_5), 0, 4155 }, /* MOVE */
+{ CPUFUNC(op_103c_5), 0, 4156 }, /* MOVE */
+{ CPUFUNC(op_1080_5), 0, 4224 }, /* MOVE */
+{ CPUFUNC(op_1088_5), 0, 4232 }, /* MOVE */
+{ CPUFUNC(op_1090_5), 0, 4240 }, /* MOVE */
+{ CPUFUNC(op_1098_5), 0, 4248 }, /* MOVE */
+{ CPUFUNC(op_10a0_5), 0, 4256 }, /* MOVE */
+{ CPUFUNC(op_10a8_5), 0, 4264 }, /* MOVE */
+{ CPUFUNC(op_10b0_5), 0, 4272 }, /* MOVE */
+{ CPUFUNC(op_10b8_5), 0, 4280 }, /* MOVE */
+{ CPUFUNC(op_10b9_5), 0, 4281 }, /* MOVE */
+{ CPUFUNC(op_10ba_5), 0, 4282 }, /* MOVE */
+{ CPUFUNC(op_10bb_5), 0, 4283 }, /* MOVE */
+{ CPUFUNC(op_10bc_5), 0, 4284 }, /* MOVE */
+{ CPUFUNC(op_10c0_5), 0, 4288 }, /* MOVE */
+{ CPUFUNC(op_10c8_5), 0, 4296 }, /* MOVE */
+{ CPUFUNC(op_10d0_5), 0, 4304 }, /* MOVE */
+{ CPUFUNC(op_10d8_5), 0, 4312 }, /* MOVE */
+{ CPUFUNC(op_10e0_5), 0, 4320 }, /* MOVE */
+{ CPUFUNC(op_10e8_5), 0, 4328 }, /* MOVE */
+{ CPUFUNC(op_10f0_5), 0, 4336 }, /* MOVE */
+{ CPUFUNC(op_10f8_5), 0, 4344 }, /* MOVE */
+{ CPUFUNC(op_10f9_5), 0, 4345 }, /* MOVE */
+{ CPUFUNC(op_10fa_5), 0, 4346 }, /* MOVE */
+{ CPUFUNC(op_10fb_5), 0, 4347 }, /* MOVE */
+{ CPUFUNC(op_10fc_5), 0, 4348 }, /* MOVE */
+{ CPUFUNC(op_1100_5), 0, 4352 }, /* MOVE */
+{ CPUFUNC(op_1108_5), 0, 4360 }, /* MOVE */
+{ CPUFUNC(op_1110_5), 0, 4368 }, /* MOVE */
+{ CPUFUNC(op_1118_5), 0, 4376 }, /* MOVE */
+{ CPUFUNC(op_1120_5), 0, 4384 }, /* MOVE */
+{ CPUFUNC(op_1128_5), 0, 4392 }, /* MOVE */
+{ CPUFUNC(op_1130_5), 0, 4400 }, /* MOVE */
+{ CPUFUNC(op_1138_5), 0, 4408 }, /* MOVE */
+{ CPUFUNC(op_1139_5), 0, 4409 }, /* MOVE */
+{ CPUFUNC(op_113a_5), 0, 4410 }, /* MOVE */
+{ CPUFUNC(op_113b_5), 0, 4411 }, /* MOVE */
+{ CPUFUNC(op_113c_5), 0, 4412 }, /* MOVE */
+{ CPUFUNC(op_1140_5), 0, 4416 }, /* MOVE */
+{ CPUFUNC(op_1148_5), 0, 4424 }, /* MOVE */
+{ CPUFUNC(op_1150_5), 0, 4432 }, /* MOVE */
+{ CPUFUNC(op_1158_5), 0, 4440 }, /* MOVE */
+{ CPUFUNC(op_1160_5), 0, 4448 }, /* MOVE */
+{ CPUFUNC(op_1168_5), 0, 4456 }, /* MOVE */
+{ CPUFUNC(op_1170_5), 0, 4464 }, /* MOVE */
+{ CPUFUNC(op_1178_5), 0, 4472 }, /* MOVE */
+{ CPUFUNC(op_1179_5), 0, 4473 }, /* MOVE */
+{ CPUFUNC(op_117a_5), 0, 4474 }, /* MOVE */
+{ CPUFUNC(op_117b_5), 0, 4475 }, /* MOVE */
+{ CPUFUNC(op_117c_5), 0, 4476 }, /* MOVE */
+{ CPUFUNC(op_1180_5), 0, 4480 }, /* MOVE */
+{ CPUFUNC(op_1188_5), 0, 4488 }, /* MOVE */
+{ CPUFUNC(op_1190_5), 0, 4496 }, /* MOVE */
+{ CPUFUNC(op_1198_5), 0, 4504 }, /* MOVE */
+{ CPUFUNC(op_11a0_5), 0, 4512 }, /* MOVE */
+{ CPUFUNC(op_11a8_5), 0, 4520 }, /* MOVE */
+{ CPUFUNC(op_11b0_5), 0, 4528 }, /* MOVE */
+{ CPUFUNC(op_11b8_5), 0, 4536 }, /* MOVE */
+{ CPUFUNC(op_11b9_5), 0, 4537 }, /* MOVE */
+{ CPUFUNC(op_11ba_5), 0, 4538 }, /* MOVE */
+{ CPUFUNC(op_11bb_5), 0, 4539 }, /* MOVE */
+{ CPUFUNC(op_11bc_5), 0, 4540 }, /* MOVE */
+{ CPUFUNC(op_11c0_5), 0, 4544 }, /* MOVE */
+{ CPUFUNC(op_11c8_5), 0, 4552 }, /* MOVE */
+{ CPUFUNC(op_11d0_5), 0, 4560 }, /* MOVE */
+{ CPUFUNC(op_11d8_5), 0, 4568 }, /* MOVE */
+{ CPUFUNC(op_11e0_5), 0, 4576 }, /* MOVE */
+{ CPUFUNC(op_11e8_5), 0, 4584 }, /* MOVE */
+{ CPUFUNC(op_11f0_5), 0, 4592 }, /* MOVE */
+{ CPUFUNC(op_11f8_5), 0, 4600 }, /* MOVE */
+{ CPUFUNC(op_11f9_5), 0, 4601 }, /* MOVE */
+{ CPUFUNC(op_11fa_5), 0, 4602 }, /* MOVE */
+{ CPUFUNC(op_11fb_5), 0, 4603 }, /* MOVE */
+{ CPUFUNC(op_11fc_5), 0, 4604 }, /* MOVE */
+{ CPUFUNC(op_13c0_5), 0, 5056 }, /* MOVE */
+{ CPUFUNC(op_13c8_5), 0, 5064 }, /* MOVE */
+{ CPUFUNC(op_13d0_5), 0, 5072 }, /* MOVE */
+{ CPUFUNC(op_13d8_5), 0, 5080 }, /* MOVE */
+{ CPUFUNC(op_13e0_5), 0, 5088 }, /* MOVE */
+{ CPUFUNC(op_13e8_5), 0, 5096 }, /* MOVE */
+{ CPUFUNC(op_13f0_5), 0, 5104 }, /* MOVE */
+{ CPUFUNC(op_13f8_5), 0, 5112 }, /* MOVE */
+{ CPUFUNC(op_13f9_5), 0, 5113 }, /* MOVE */
+{ CPUFUNC(op_13fa_5), 0, 5114 }, /* MOVE */
+{ CPUFUNC(op_13fb_5), 0, 5115 }, /* MOVE */
+{ CPUFUNC(op_13fc_5), 0, 5116 }, /* MOVE */
+{ CPUFUNC(op_2000_5), 0, 8192 }, /* MOVE */
+{ CPUFUNC(op_2008_5), 0, 8200 }, /* MOVE */
+{ CPUFUNC(op_2010_5), 0, 8208 }, /* MOVE */
+{ CPUFUNC(op_2018_5), 0, 8216 }, /* MOVE */
+{ CPUFUNC(op_2020_5), 0, 8224 }, /* MOVE */
+{ CPUFUNC(op_2028_5), 0, 8232 }, /* MOVE */
+{ CPUFUNC(op_2030_5), 0, 8240 }, /* MOVE */
+{ CPUFUNC(op_2038_5), 0, 8248 }, /* MOVE */
+{ CPUFUNC(op_2039_5), 0, 8249 }, /* MOVE */
+{ CPUFUNC(op_203a_5), 0, 8250 }, /* MOVE */
+{ CPUFUNC(op_203b_5), 0, 8251 }, /* MOVE */
+{ CPUFUNC(op_203c_5), 0, 8252 }, /* MOVE */
+{ CPUFUNC(op_2040_5), 0, 8256 }, /* MOVEA */
+{ CPUFUNC(op_2048_5), 0, 8264 }, /* MOVEA */
+{ CPUFUNC(op_2050_5), 0, 8272 }, /* MOVEA */
+{ CPUFUNC(op_2058_5), 0, 8280 }, /* MOVEA */
+{ CPUFUNC(op_2060_5), 0, 8288 }, /* MOVEA */
+{ CPUFUNC(op_2068_5), 0, 8296 }, /* MOVEA */
+{ CPUFUNC(op_2070_5), 0, 8304 }, /* MOVEA */
+{ CPUFUNC(op_2078_5), 0, 8312 }, /* MOVEA */
+{ CPUFUNC(op_2079_5), 0, 8313 }, /* MOVEA */
+{ CPUFUNC(op_207a_5), 0, 8314 }, /* MOVEA */
+{ CPUFUNC(op_207b_5), 0, 8315 }, /* MOVEA */
+{ CPUFUNC(op_207c_5), 0, 8316 }, /* MOVEA */
+{ CPUFUNC(op_2080_5), 0, 8320 }, /* MOVE */
+{ CPUFUNC(op_2088_5), 0, 8328 }, /* MOVE */
+{ CPUFUNC(op_2090_5), 0, 8336 }, /* MOVE */
+{ CPUFUNC(op_2098_5), 0, 8344 }, /* MOVE */
+{ CPUFUNC(op_20a0_5), 0, 8352 }, /* MOVE */
+{ CPUFUNC(op_20a8_5), 0, 8360 }, /* MOVE */
+{ CPUFUNC(op_20b0_5), 0, 8368 }, /* MOVE */
+{ CPUFUNC(op_20b8_5), 0, 8376 }, /* MOVE */
+{ CPUFUNC(op_20b9_5), 0, 8377 }, /* MOVE */
+{ CPUFUNC(op_20ba_5), 0, 8378 }, /* MOVE */
+{ CPUFUNC(op_20bb_5), 0, 8379 }, /* MOVE */
+{ CPUFUNC(op_20bc_5), 0, 8380 }, /* MOVE */
+{ CPUFUNC(op_20c0_5), 0, 8384 }, /* MOVE */
+{ CPUFUNC(op_20c8_5), 0, 8392 }, /* MOVE */
+{ CPUFUNC(op_20d0_5), 0, 8400 }, /* MOVE */
+{ CPUFUNC(op_20d8_5), 0, 8408 }, /* MOVE */
+{ CPUFUNC(op_20e0_5), 0, 8416 }, /* MOVE */
+{ CPUFUNC(op_20e8_5), 0, 8424 }, /* MOVE */
+{ CPUFUNC(op_20f0_5), 0, 8432 }, /* MOVE */
+{ CPUFUNC(op_20f8_5), 0, 8440 }, /* MOVE */
+{ CPUFUNC(op_20f9_5), 0, 8441 }, /* MOVE */
+{ CPUFUNC(op_20fa_5), 0, 8442 }, /* MOVE */
+{ CPUFUNC(op_20fb_5), 0, 8443 }, /* MOVE */
+{ CPUFUNC(op_20fc_5), 0, 8444 }, /* MOVE */
+{ CPUFUNC(op_2100_5), 0, 8448 }, /* MOVE */
+{ CPUFUNC(op_2108_5), 0, 8456 }, /* MOVE */
+{ CPUFUNC(op_2110_5), 0, 8464 }, /* MOVE */
+{ CPUFUNC(op_2118_5), 0, 8472 }, /* MOVE */
+{ CPUFUNC(op_2120_5), 0, 8480 }, /* MOVE */
+{ CPUFUNC(op_2128_5), 0, 8488 }, /* MOVE */
+{ CPUFUNC(op_2130_5), 0, 8496 }, /* MOVE */
+{ CPUFUNC(op_2138_5), 0, 8504 }, /* MOVE */
+{ CPUFUNC(op_2139_5), 0, 8505 }, /* MOVE */
+{ CPUFUNC(op_213a_5), 0, 8506 }, /* MOVE */
+{ CPUFUNC(op_213b_5), 0, 8507 }, /* MOVE */
+{ CPUFUNC(op_213c_5), 0, 8508 }, /* MOVE */
+{ CPUFUNC(op_2140_5), 0, 8512 }, /* MOVE */
+{ CPUFUNC(op_2148_5), 0, 8520 }, /* MOVE */
+{ CPUFUNC(op_2150_5), 0, 8528 }, /* MOVE */
+{ CPUFUNC(op_2158_5), 0, 8536 }, /* MOVE */
+{ CPUFUNC(op_2160_5), 0, 8544 }, /* MOVE */
+{ CPUFUNC(op_2168_5), 0, 8552 }, /* MOVE */
+{ CPUFUNC(op_2170_5), 0, 8560 }, /* MOVE */
+{ CPUFUNC(op_2178_5), 0, 8568 }, /* MOVE */
+{ CPUFUNC(op_2179_5), 0, 8569 }, /* MOVE */
+{ CPUFUNC(op_217a_5), 0, 8570 }, /* MOVE */
+{ CPUFUNC(op_217b_5), 0, 8571 }, /* MOVE */
+{ CPUFUNC(op_217c_5), 0, 8572 }, /* MOVE */
+{ CPUFUNC(op_2180_5), 0, 8576 }, /* MOVE */
+{ CPUFUNC(op_2188_5), 0, 8584 }, /* MOVE */
+{ CPUFUNC(op_2190_5), 0, 8592 }, /* MOVE */
+{ CPUFUNC(op_2198_5), 0, 8600 }, /* MOVE */
+{ CPUFUNC(op_21a0_5), 0, 8608 }, /* MOVE */
+{ CPUFUNC(op_21a8_5), 0, 8616 }, /* MOVE */
+{ CPUFUNC(op_21b0_5), 0, 8624 }, /* MOVE */
+{ CPUFUNC(op_21b8_5), 0, 8632 }, /* MOVE */
+{ CPUFUNC(op_21b9_5), 0, 8633 }, /* MOVE */
+{ CPUFUNC(op_21ba_5), 0, 8634 }, /* MOVE */
+{ CPUFUNC(op_21bb_5), 0, 8635 }, /* MOVE */
+{ CPUFUNC(op_21bc_5), 0, 8636 }, /* MOVE */
+{ CPUFUNC(op_21c0_5), 0, 8640 }, /* MOVE */
+{ CPUFUNC(op_21c8_5), 0, 8648 }, /* MOVE */
+{ CPUFUNC(op_21d0_5), 0, 8656 }, /* MOVE */
+{ CPUFUNC(op_21d8_5), 0, 8664 }, /* MOVE */
+{ CPUFUNC(op_21e0_5), 0, 8672 }, /* MOVE */
+{ CPUFUNC(op_21e8_5), 0, 8680 }, /* MOVE */
+{ CPUFUNC(op_21f0_5), 0, 8688 }, /* MOVE */
+{ CPUFUNC(op_21f8_5), 0, 8696 }, /* MOVE */
+{ CPUFUNC(op_21f9_5), 0, 8697 }, /* MOVE */
+{ CPUFUNC(op_21fa_5), 0, 8698 }, /* MOVE */
+{ CPUFUNC(op_21fb_5), 0, 8699 }, /* MOVE */
+{ CPUFUNC(op_21fc_5), 0, 8700 }, /* MOVE */
+{ CPUFUNC(op_23c0_5), 0, 9152 }, /* MOVE */
+{ CPUFUNC(op_23c8_5), 0, 9160 }, /* MOVE */
+{ CPUFUNC(op_23d0_5), 0, 9168 }, /* MOVE */
+{ CPUFUNC(op_23d8_5), 0, 9176 }, /* MOVE */
+{ CPUFUNC(op_23e0_5), 0, 9184 }, /* MOVE */
+{ CPUFUNC(op_23e8_5), 0, 9192 }, /* MOVE */
+{ CPUFUNC(op_23f0_5), 0, 9200 }, /* MOVE */
+{ CPUFUNC(op_23f8_5), 0, 9208 }, /* MOVE */
+{ CPUFUNC(op_23f9_5), 0, 9209 }, /* MOVE */
+{ CPUFUNC(op_23fa_5), 0, 9210 }, /* MOVE */
+{ CPUFUNC(op_23fb_5), 0, 9211 }, /* MOVE */
+{ CPUFUNC(op_23fc_5), 0, 9212 }, /* MOVE */
+{ CPUFUNC(op_3000_5), 0, 12288 }, /* MOVE */
+{ CPUFUNC(op_3008_5), 0, 12296 }, /* MOVE */
+{ CPUFUNC(op_3010_5), 0, 12304 }, /* MOVE */
+{ CPUFUNC(op_3018_5), 0, 12312 }, /* MOVE */
+{ CPUFUNC(op_3020_5), 0, 12320 }, /* MOVE */
+{ CPUFUNC(op_3028_5), 0, 12328 }, /* MOVE */
+{ CPUFUNC(op_3030_5), 0, 12336 }, /* MOVE */
+{ CPUFUNC(op_3038_5), 0, 12344 }, /* MOVE */
+{ CPUFUNC(op_3039_5), 0, 12345 }, /* MOVE */
+{ CPUFUNC(op_303a_5), 0, 12346 }, /* MOVE */
+{ CPUFUNC(op_303b_5), 0, 12347 }, /* MOVE */
+{ CPUFUNC(op_303c_5), 0, 12348 }, /* MOVE */
+{ CPUFUNC(op_3040_5), 0, 12352 }, /* MOVEA */
+{ CPUFUNC(op_3048_5), 0, 12360 }, /* MOVEA */
+{ CPUFUNC(op_3050_5), 0, 12368 }, /* MOVEA */
+{ CPUFUNC(op_3058_5), 0, 12376 }, /* MOVEA */
+{ CPUFUNC(op_3060_5), 0, 12384 }, /* MOVEA */
+{ CPUFUNC(op_3068_5), 0, 12392 }, /* MOVEA */
+{ CPUFUNC(op_3070_5), 0, 12400 }, /* MOVEA */
+{ CPUFUNC(op_3078_5), 0, 12408 }, /* MOVEA */
+{ CPUFUNC(op_3079_5), 0, 12409 }, /* MOVEA */
+{ CPUFUNC(op_307a_5), 0, 12410 }, /* MOVEA */
+{ CPUFUNC(op_307b_5), 0, 12411 }, /* MOVEA */
+{ CPUFUNC(op_307c_5), 0, 12412 }, /* MOVEA */
+{ CPUFUNC(op_3080_5), 0, 12416 }, /* MOVE */
+{ CPUFUNC(op_3088_5), 0, 12424 }, /* MOVE */
+{ CPUFUNC(op_3090_5), 0, 12432 }, /* MOVE */
+{ CPUFUNC(op_3098_5), 0, 12440 }, /* MOVE */
+{ CPUFUNC(op_30a0_5), 0, 12448 }, /* MOVE */
+{ CPUFUNC(op_30a8_5), 0, 12456 }, /* MOVE */
+{ CPUFUNC(op_30b0_5), 0, 12464 }, /* MOVE */
+{ CPUFUNC(op_30b8_5), 0, 12472 }, /* MOVE */
+{ CPUFUNC(op_30b9_5), 0, 12473 }, /* MOVE */
+{ CPUFUNC(op_30ba_5), 0, 12474 }, /* MOVE */
+{ CPUFUNC(op_30bb_5), 0, 12475 }, /* MOVE */
+{ CPUFUNC(op_30bc_5), 0, 12476 }, /* MOVE */
+{ CPUFUNC(op_30c0_5), 0, 12480 }, /* MOVE */
+{ CPUFUNC(op_30c8_5), 0, 12488 }, /* MOVE */
+{ CPUFUNC(op_30d0_5), 0, 12496 }, /* MOVE */
+{ CPUFUNC(op_30d8_5), 0, 12504 }, /* MOVE */
+{ CPUFUNC(op_30e0_5), 0, 12512 }, /* MOVE */
+{ CPUFUNC(op_30e8_5), 0, 12520 }, /* MOVE */
+{ CPUFUNC(op_30f0_5), 0, 12528 }, /* MOVE */
+{ CPUFUNC(op_30f8_5), 0, 12536 }, /* MOVE */
+{ CPUFUNC(op_30f9_5), 0, 12537 }, /* MOVE */
+{ CPUFUNC(op_30fa_5), 0, 12538 }, /* MOVE */
+{ CPUFUNC(op_30fb_5), 0, 12539 }, /* MOVE */
+{ CPUFUNC(op_30fc_5), 0, 12540 }, /* MOVE */
+{ CPUFUNC(op_3100_5), 0, 12544 }, /* MOVE */
+{ CPUFUNC(op_3108_5), 0, 12552 }, /* MOVE */
+{ CPUFUNC(op_3110_5), 0, 12560 }, /* MOVE */
+{ CPUFUNC(op_3118_5), 0, 12568 }, /* MOVE */
+{ CPUFUNC(op_3120_5), 0, 12576 }, /* MOVE */
+{ CPUFUNC(op_3128_5), 0, 12584 }, /* MOVE */
+{ CPUFUNC(op_3130_5), 0, 12592 }, /* MOVE */
+{ CPUFUNC(op_3138_5), 0, 12600 }, /* MOVE */
+{ CPUFUNC(op_3139_5), 0, 12601 }, /* MOVE */
+{ CPUFUNC(op_313a_5), 0, 12602 }, /* MOVE */
+{ CPUFUNC(op_313b_5), 0, 12603 }, /* MOVE */
+{ CPUFUNC(op_313c_5), 0, 12604 }, /* MOVE */
+{ CPUFUNC(op_3140_5), 0, 12608 }, /* MOVE */
+{ CPUFUNC(op_3148_5), 0, 12616 }, /* MOVE */
+{ CPUFUNC(op_3150_5), 0, 12624 }, /* MOVE */
+{ CPUFUNC(op_3158_5), 0, 12632 }, /* MOVE */
+{ CPUFUNC(op_3160_5), 0, 12640 }, /* MOVE */
+{ CPUFUNC(op_3168_5), 0, 12648 }, /* MOVE */
+{ CPUFUNC(op_3170_5), 0, 12656 }, /* MOVE */
+{ CPUFUNC(op_3178_5), 0, 12664 }, /* MOVE */
+{ CPUFUNC(op_3179_5), 0, 12665 }, /* MOVE */
+{ CPUFUNC(op_317a_5), 0, 12666 }, /* MOVE */
+{ CPUFUNC(op_317b_5), 0, 12667 }, /* MOVE */
+{ CPUFUNC(op_317c_5), 0, 12668 }, /* MOVE */
+{ CPUFUNC(op_3180_5), 0, 12672 }, /* MOVE */
+{ CPUFUNC(op_3188_5), 0, 12680 }, /* MOVE */
+{ CPUFUNC(op_3190_5), 0, 12688 }, /* MOVE */
+{ CPUFUNC(op_3198_5), 0, 12696 }, /* MOVE */
+{ CPUFUNC(op_31a0_5), 0, 12704 }, /* MOVE */
+{ CPUFUNC(op_31a8_5), 0, 12712 }, /* MOVE */
+{ CPUFUNC(op_31b0_5), 0, 12720 }, /* MOVE */
+{ CPUFUNC(op_31b8_5), 0, 12728 }, /* MOVE */
+{ CPUFUNC(op_31b9_5), 0, 12729 }, /* MOVE */
+{ CPUFUNC(op_31ba_5), 0, 12730 }, /* MOVE */
+{ CPUFUNC(op_31bb_5), 0, 12731 }, /* MOVE */
+{ CPUFUNC(op_31bc_5), 0, 12732 }, /* MOVE */
+{ CPUFUNC(op_31c0_5), 0, 12736 }, /* MOVE */
+{ CPUFUNC(op_31c8_5), 0, 12744 }, /* MOVE */
+{ CPUFUNC(op_31d0_5), 0, 12752 }, /* MOVE */
+{ CPUFUNC(op_31d8_5), 0, 12760 }, /* MOVE */
+{ CPUFUNC(op_31e0_5), 0, 12768 }, /* MOVE */
+{ CPUFUNC(op_31e8_5), 0, 12776 }, /* MOVE */
+{ CPUFUNC(op_31f0_5), 0, 12784 }, /* MOVE */
+{ CPUFUNC(op_31f8_5), 0, 12792 }, /* MOVE */
+{ CPUFUNC(op_31f9_5), 0, 12793 }, /* MOVE */
+{ CPUFUNC(op_31fa_5), 0, 12794 }, /* MOVE */
+{ CPUFUNC(op_31fb_5), 0, 12795 }, /* MOVE */
+{ CPUFUNC(op_31fc_5), 0, 12796 }, /* MOVE */
+{ CPUFUNC(op_33c0_5), 0, 13248 }, /* MOVE */
+{ CPUFUNC(op_33c8_5), 0, 13256 }, /* MOVE */
+{ CPUFUNC(op_33d0_5), 0, 13264 }, /* MOVE */
+{ CPUFUNC(op_33d8_5), 0, 13272 }, /* MOVE */
+{ CPUFUNC(op_33e0_5), 0, 13280 }, /* MOVE */
+{ CPUFUNC(op_33e8_5), 0, 13288 }, /* MOVE */
+{ CPUFUNC(op_33f0_5), 0, 13296 }, /* MOVE */
+{ CPUFUNC(op_33f8_5), 0, 13304 }, /* MOVE */
+{ CPUFUNC(op_33f9_5), 0, 13305 }, /* MOVE */
+{ CPUFUNC(op_33fa_5), 0, 13306 }, /* MOVE */
+{ CPUFUNC(op_33fb_5), 0, 13307 }, /* MOVE */
+{ CPUFUNC(op_33fc_5), 0, 13308 }, /* MOVE */
+{ CPUFUNC(op_4000_5), 0, 16384 }, /* NEGX */
+{ CPUFUNC(op_4010_5), 0, 16400 }, /* NEGX */
+{ CPUFUNC(op_4018_5), 0, 16408 }, /* NEGX */
+{ CPUFUNC(op_4020_5), 0, 16416 }, /* NEGX */
+{ CPUFUNC(op_4028_5), 0, 16424 }, /* NEGX */
+{ CPUFUNC(op_4030_5), 0, 16432 }, /* NEGX */
+{ CPUFUNC(op_4038_5), 0, 16440 }, /* NEGX */
+{ CPUFUNC(op_4039_5), 0, 16441 }, /* NEGX */
+{ CPUFUNC(op_4040_5), 0, 16448 }, /* NEGX */
+{ CPUFUNC(op_4050_5), 0, 16464 }, /* NEGX */
+{ CPUFUNC(op_4058_5), 0, 16472 }, /* NEGX */
+{ CPUFUNC(op_4060_5), 0, 16480 }, /* NEGX */
+{ CPUFUNC(op_4068_5), 0, 16488 }, /* NEGX */
+{ CPUFUNC(op_4070_5), 0, 16496 }, /* NEGX */
+{ CPUFUNC(op_4078_5), 0, 16504 }, /* NEGX */
+{ CPUFUNC(op_4079_5), 0, 16505 }, /* NEGX */
+{ CPUFUNC(op_4080_5), 0, 16512 }, /* NEGX */
+{ CPUFUNC(op_4090_5), 0, 16528 }, /* NEGX */
+{ CPUFUNC(op_4098_5), 0, 16536 }, /* NEGX */
+{ CPUFUNC(op_40a0_5), 0, 16544 }, /* NEGX */
+{ CPUFUNC(op_40a8_5), 0, 16552 }, /* NEGX */
+{ CPUFUNC(op_40b0_5), 0, 16560 }, /* NEGX */
+{ CPUFUNC(op_40b8_5), 0, 16568 }, /* NEGX */
+{ CPUFUNC(op_40b9_5), 0, 16569 }, /* NEGX */
+{ CPUFUNC(op_40c0_5), 0, 16576 }, /* MVSR2 */
+{ CPUFUNC(op_40d0_5), 0, 16592 }, /* MVSR2 */
+{ CPUFUNC(op_40d8_5), 0, 16600 }, /* MVSR2 */
+{ CPUFUNC(op_40e0_5), 0, 16608 }, /* MVSR2 */
+{ CPUFUNC(op_40e8_5), 0, 16616 }, /* MVSR2 */
+{ CPUFUNC(op_40f0_5), 0, 16624 }, /* MVSR2 */
+{ CPUFUNC(op_40f8_5), 0, 16632 }, /* MVSR2 */
+{ CPUFUNC(op_40f9_5), 0, 16633 }, /* MVSR2 */
+{ CPUFUNC(op_4180_5), 0, 16768 }, /* CHK */
+{ CPUFUNC(op_4190_5), 0, 16784 }, /* CHK */
+{ CPUFUNC(op_4198_5), 0, 16792 }, /* CHK */
+{ CPUFUNC(op_41a0_5), 0, 16800 }, /* CHK */
+{ CPUFUNC(op_41a8_5), 0, 16808 }, /* CHK */
+{ CPUFUNC(op_41b0_5), 0, 16816 }, /* CHK */
+{ CPUFUNC(op_41b8_5), 0, 16824 }, /* CHK */
+{ CPUFUNC(op_41b9_5), 0, 16825 }, /* CHK */
+{ CPUFUNC(op_41ba_5), 0, 16826 }, /* CHK */
+{ CPUFUNC(op_41bb_5), 0, 16827 }, /* CHK */
+{ CPUFUNC(op_41bc_5), 0, 16828 }, /* CHK */
+{ CPUFUNC(op_41d0_5), 0, 16848 }, /* LEA */
+{ CPUFUNC(op_41e8_5), 0, 16872 }, /* LEA */
+{ CPUFUNC(op_41f0_5), 0, 16880 }, /* LEA */
+{ CPUFUNC(op_41f8_5), 0, 16888 }, /* LEA */
+{ CPUFUNC(op_41f9_5), 0, 16889 }, /* LEA */
+{ CPUFUNC(op_41fa_5), 0, 16890 }, /* LEA */
+{ CPUFUNC(op_41fb_5), 0, 16891 }, /* LEA */
+{ CPUFUNC(op_4200_5), 0, 16896 }, /* CLR */
+{ CPUFUNC(op_4210_5), 0, 16912 }, /* CLR */
+{ CPUFUNC(op_4218_5), 0, 16920 }, /* CLR */
+{ CPUFUNC(op_4220_5), 0, 16928 }, /* CLR */
+{ CPUFUNC(op_4228_5), 0, 16936 }, /* CLR */
+{ CPUFUNC(op_4230_5), 0, 16944 }, /* CLR */
+{ CPUFUNC(op_4238_5), 0, 16952 }, /* CLR */
+{ CPUFUNC(op_4239_5), 0, 16953 }, /* CLR */
+{ CPUFUNC(op_4240_5), 0, 16960 }, /* CLR */
+{ CPUFUNC(op_4250_5), 0, 16976 }, /* CLR */
+{ CPUFUNC(op_4258_5), 0, 16984 }, /* CLR */
+{ CPUFUNC(op_4260_5), 0, 16992 }, /* CLR */
+{ CPUFUNC(op_4268_5), 0, 17000 }, /* CLR */
+{ CPUFUNC(op_4270_5), 0, 17008 }, /* CLR */
+{ CPUFUNC(op_4278_5), 0, 17016 }, /* CLR */
+{ CPUFUNC(op_4279_5), 0, 17017 }, /* CLR */
+{ CPUFUNC(op_4280_5), 0, 17024 }, /* CLR */
+{ CPUFUNC(op_4290_5), 0, 17040 }, /* CLR */
+{ CPUFUNC(op_4298_5), 0, 17048 }, /* CLR */
+{ CPUFUNC(op_42a0_5), 0, 17056 }, /* CLR */
+{ CPUFUNC(op_42a8_5), 0, 17064 }, /* CLR */
+{ CPUFUNC(op_42b0_5), 0, 17072 }, /* CLR */
+{ CPUFUNC(op_42b8_5), 0, 17080 }, /* CLR */
+{ CPUFUNC(op_42b9_5), 0, 17081 }, /* CLR */
+{ CPUFUNC(op_4400_5), 0, 17408 }, /* NEG */
+{ CPUFUNC(op_4410_5), 0, 17424 }, /* NEG */
+{ CPUFUNC(op_4418_5), 0, 17432 }, /* NEG */
+{ CPUFUNC(op_4420_5), 0, 17440 }, /* NEG */
+{ CPUFUNC(op_4428_5), 0, 17448 }, /* NEG */
+{ CPUFUNC(op_4430_5), 0, 17456 }, /* NEG */
+{ CPUFUNC(op_4438_5), 0, 17464 }, /* NEG */
+{ CPUFUNC(op_4439_5), 0, 17465 }, /* NEG */
+{ CPUFUNC(op_4440_5), 0, 17472 }, /* NEG */
+{ CPUFUNC(op_4450_5), 0, 17488 }, /* NEG */
+{ CPUFUNC(op_4458_5), 0, 17496 }, /* NEG */
+{ CPUFUNC(op_4460_5), 0, 17504 }, /* NEG */
+{ CPUFUNC(op_4468_5), 0, 17512 }, /* NEG */
+{ CPUFUNC(op_4470_5), 0, 17520 }, /* NEG */
+{ CPUFUNC(op_4478_5), 0, 17528 }, /* NEG */
+{ CPUFUNC(op_4479_5), 0, 17529 }, /* NEG */
+{ CPUFUNC(op_4480_5), 0, 17536 }, /* NEG */
+{ CPUFUNC(op_4490_5), 0, 17552 }, /* NEG */
+{ CPUFUNC(op_4498_5), 0, 17560 }, /* NEG */
+{ CPUFUNC(op_44a0_5), 0, 17568 }, /* NEG */
+{ CPUFUNC(op_44a8_5), 0, 17576 }, /* NEG */
+{ CPUFUNC(op_44b0_5), 0, 17584 }, /* NEG */
+{ CPUFUNC(op_44b8_5), 0, 17592 }, /* NEG */
+{ CPUFUNC(op_44b9_5), 0, 17593 }, /* NEG */
+{ CPUFUNC(op_44c0_5), 0, 17600 }, /* MV2SR */
+{ CPUFUNC(op_44d0_5), 0, 17616 }, /* MV2SR */
+{ CPUFUNC(op_44d8_5), 0, 17624 }, /* MV2SR */
+{ CPUFUNC(op_44e0_5), 0, 17632 }, /* MV2SR */
+{ CPUFUNC(op_44e8_5), 0, 17640 }, /* MV2SR */
+{ CPUFUNC(op_44f0_5), 0, 17648 }, /* MV2SR */
+{ CPUFUNC(op_44f8_5), 0, 17656 }, /* MV2SR */
+{ CPUFUNC(op_44f9_5), 0, 17657 }, /* MV2SR */
+{ CPUFUNC(op_44fa_5), 0, 17658 }, /* MV2SR */
+{ CPUFUNC(op_44fb_5), 0, 17659 }, /* MV2SR */
+{ CPUFUNC(op_44fc_5), 0, 17660 }, /* MV2SR */
+{ CPUFUNC(op_4600_5), 0, 17920 }, /* NOT */
+{ CPUFUNC(op_4610_5), 0, 17936 }, /* NOT */
+{ CPUFUNC(op_4618_5), 0, 17944 }, /* NOT */
+{ CPUFUNC(op_4620_5), 0, 17952 }, /* NOT */
+{ CPUFUNC(op_4628_5), 0, 17960 }, /* NOT */
+{ CPUFUNC(op_4630_5), 0, 17968 }, /* NOT */
+{ CPUFUNC(op_4638_5), 0, 17976 }, /* NOT */
+{ CPUFUNC(op_4639_5), 0, 17977 }, /* NOT */
+{ CPUFUNC(op_4640_5), 0, 17984 }, /* NOT */
+{ CPUFUNC(op_4650_5), 0, 18000 }, /* NOT */
+{ CPUFUNC(op_4658_5), 0, 18008 }, /* NOT */
+{ CPUFUNC(op_4660_5), 0, 18016 }, /* NOT */
+{ CPUFUNC(op_4668_5), 0, 18024 }, /* NOT */
+{ CPUFUNC(op_4670_5), 0, 18032 }, /* NOT */
+{ CPUFUNC(op_4678_5), 0, 18040 }, /* NOT */
+{ CPUFUNC(op_4679_5), 0, 18041 }, /* NOT */
+{ CPUFUNC(op_4680_5), 0, 18048 }, /* NOT */
+{ CPUFUNC(op_4690_5), 0, 18064 }, /* NOT */
+{ CPUFUNC(op_4698_5), 0, 18072 }, /* NOT */
+{ CPUFUNC(op_46a0_5), 0, 18080 }, /* NOT */
+{ CPUFUNC(op_46a8_5), 0, 18088 }, /* NOT */
+{ CPUFUNC(op_46b0_5), 0, 18096 }, /* NOT */
+{ CPUFUNC(op_46b8_5), 0, 18104 }, /* NOT */
+{ CPUFUNC(op_46b9_5), 0, 18105 }, /* NOT */
+{ CPUFUNC(op_46c0_5), 0, 18112 }, /* MV2SR */
+{ CPUFUNC(op_46d0_5), 0, 18128 }, /* MV2SR */
+{ CPUFUNC(op_46d8_5), 0, 18136 }, /* MV2SR */
+{ CPUFUNC(op_46e0_5), 0, 18144 }, /* MV2SR */
+{ CPUFUNC(op_46e8_5), 0, 18152 }, /* MV2SR */
+{ CPUFUNC(op_46f0_5), 0, 18160 }, /* MV2SR */
+{ CPUFUNC(op_46f8_5), 0, 18168 }, /* MV2SR */
+{ CPUFUNC(op_46f9_5), 0, 18169 }, /* MV2SR */
+{ CPUFUNC(op_46fa_5), 0, 18170 }, /* MV2SR */
+{ CPUFUNC(op_46fb_5), 0, 18171 }, /* MV2SR */
+{ CPUFUNC(op_46fc_5), 0, 18172 }, /* MV2SR */
+{ CPUFUNC(op_4800_5), 0, 18432 }, /* NBCD */
+{ CPUFUNC(op_4810_5), 0, 18448 }, /* NBCD */
+{ CPUFUNC(op_4818_5), 0, 18456 }, /* NBCD */
+{ CPUFUNC(op_4820_5), 0, 18464 }, /* NBCD */
+{ CPUFUNC(op_4828_5), 0, 18472 }, /* NBCD */
+{ CPUFUNC(op_4830_5), 0, 18480 }, /* NBCD */
+{ CPUFUNC(op_4838_5), 0, 18488 }, /* NBCD */
+{ CPUFUNC(op_4839_5), 0, 18489 }, /* NBCD */
+{ CPUFUNC(op_4840_5), 0, 18496 }, /* SWAP */
+{ CPUFUNC(op_4850_5), 0, 18512 }, /* PEA */
+{ CPUFUNC(op_4868_5), 0, 18536 }, /* PEA */
+{ CPUFUNC(op_4870_5), 0, 18544 }, /* PEA */
+{ CPUFUNC(op_4878_5), 0, 18552 }, /* PEA */
+{ CPUFUNC(op_4879_5), 0, 18553 }, /* PEA */
+{ CPUFUNC(op_487a_5), 0, 18554 }, /* PEA */
+{ CPUFUNC(op_487b_5), 0, 18555 }, /* PEA */
+{ CPUFUNC(op_4880_5), 0, 18560 }, /* EXT */
+{ CPUFUNC(op_4890_5), 0, 18576 }, /* MVMLE */
+{ CPUFUNC(op_48a0_5), 0, 18592 }, /* MVMLE */
+{ CPUFUNC(op_48a8_5), 0, 18600 }, /* MVMLE */
+{ CPUFUNC(op_48b0_5), 0, 18608 }, /* MVMLE */
+{ CPUFUNC(op_48b8_5), 0, 18616 }, /* MVMLE */
+{ CPUFUNC(op_48b9_5), 0, 18617 }, /* MVMLE */
+{ CPUFUNC(op_48c0_5), 0, 18624 }, /* EXT */
+{ CPUFUNC(op_48d0_5), 0, 18640 }, /* MVMLE */
+{ CPUFUNC(op_48e0_5), 0, 18656 }, /* MVMLE */
+{ CPUFUNC(op_48e8_5), 0, 18664 }, /* MVMLE */
+{ CPUFUNC(op_48f0_5), 0, 18672 }, /* MVMLE */
+{ CPUFUNC(op_48f8_5), 0, 18680 }, /* MVMLE */
+{ CPUFUNC(op_48f9_5), 0, 18681 }, /* MVMLE */
+{ CPUFUNC(op_4a00_5), 0, 18944 }, /* TST */
+{ CPUFUNC(op_4a10_5), 0, 18960 }, /* TST */
+{ CPUFUNC(op_4a18_5), 0, 18968 }, /* TST */
+{ CPUFUNC(op_4a20_5), 0, 18976 }, /* TST */
+{ CPUFUNC(op_4a28_5), 0, 18984 }, /* TST */
+{ CPUFUNC(op_4a30_5), 0, 18992 }, /* TST */
+{ CPUFUNC(op_4a38_5), 0, 19000 }, /* TST */
+{ CPUFUNC(op_4a39_5), 0, 19001 }, /* TST */
+{ CPUFUNC(op_4a3a_5), 0, 19002 }, /* TST */
+{ CPUFUNC(op_4a3b_5), 0, 19003 }, /* TST */
+{ CPUFUNC(op_4a3c_5), 0, 19004 }, /* TST */
+{ CPUFUNC(op_4a40_5), 0, 19008 }, /* TST */
+{ CPUFUNC(op_4a48_5), 0, 19016 }, /* TST */
+{ CPUFUNC(op_4a50_5), 0, 19024 }, /* TST */
+{ CPUFUNC(op_4a58_5), 0, 19032 }, /* TST */
+{ CPUFUNC(op_4a60_5), 0, 19040 }, /* TST */
+{ CPUFUNC(op_4a68_5), 0, 19048 }, /* TST */
+{ CPUFUNC(op_4a70_5), 0, 19056 }, /* TST */
+{ CPUFUNC(op_4a78_5), 0, 19064 }, /* TST */
+{ CPUFUNC(op_4a79_5), 0, 19065 }, /* TST */
+{ CPUFUNC(op_4a7a_5), 0, 19066 }, /* TST */
+{ CPUFUNC(op_4a7b_5), 0, 19067 }, /* TST */
+{ CPUFUNC(op_4a7c_5), 0, 19068 }, /* TST */
+{ CPUFUNC(op_4a80_5), 0, 19072 }, /* TST */
+{ CPUFUNC(op_4a88_5), 0, 19080 }, /* TST */
+{ CPUFUNC(op_4a90_5), 0, 19088 }, /* TST */
+{ CPUFUNC(op_4a98_5), 0, 19096 }, /* TST */
+{ CPUFUNC(op_4aa0_5), 0, 19104 }, /* TST */
+{ CPUFUNC(op_4aa8_5), 0, 19112 }, /* TST */
+{ CPUFUNC(op_4ab0_5), 0, 19120 }, /* TST */
+{ CPUFUNC(op_4ab8_5), 0, 19128 }, /* TST */
+{ CPUFUNC(op_4ab9_5), 0, 19129 }, /* TST */
+{ CPUFUNC(op_4aba_5), 0, 19130 }, /* TST */
+{ CPUFUNC(op_4abb_5), 0, 19131 }, /* TST */
+{ CPUFUNC(op_4abc_5), 0, 19132 }, /* TST */
+{ CPUFUNC(op_4ac0_5), 0, 19136 }, /* TAS */
+{ CPUFUNC(op_4ad0_5), 0, 19152 }, /* TAS */
+{ CPUFUNC(op_4ad8_5), 0, 19160 }, /* TAS */
+{ CPUFUNC(op_4ae0_5), 0, 19168 }, /* TAS */
+{ CPUFUNC(op_4ae8_5), 0, 19176 }, /* TAS */
+{ CPUFUNC(op_4af0_5), 0, 19184 }, /* TAS */
+{ CPUFUNC(op_4af8_5), 0, 19192 }, /* TAS */
+{ CPUFUNC(op_4af9_5), 0, 19193 }, /* TAS */
+{ CPUFUNC(op_4c90_5), 0, 19600 }, /* MVMEL */
+{ CPUFUNC(op_4c98_5), 0, 19608 }, /* MVMEL */
+{ CPUFUNC(op_4ca8_5), 0, 19624 }, /* MVMEL */
+{ CPUFUNC(op_4cb0_5), 0, 19632 }, /* MVMEL */
+{ CPUFUNC(op_4cb8_5), 0, 19640 }, /* MVMEL */
+{ CPUFUNC(op_4cb9_5), 0, 19641 }, /* MVMEL */
+{ CPUFUNC(op_4cba_5), 0, 19642 }, /* MVMEL */
+{ CPUFUNC(op_4cbb_5), 0, 19643 }, /* MVMEL */
+{ CPUFUNC(op_4cd0_5), 0, 19664 }, /* MVMEL */
+{ CPUFUNC(op_4cd8_5), 0, 19672 }, /* MVMEL */
+{ CPUFUNC(op_4ce8_5), 0, 19688 }, /* MVMEL */
+{ CPUFUNC(op_4cf0_5), 0, 19696 }, /* MVMEL */
+{ CPUFUNC(op_4cf8_5), 0, 19704 }, /* MVMEL */
+{ CPUFUNC(op_4cf9_5), 0, 19705 }, /* MVMEL */
+{ CPUFUNC(op_4cfa_5), 0, 19706 }, /* MVMEL */
+{ CPUFUNC(op_4cfb_5), 0, 19707 }, /* MVMEL */
+{ CPUFUNC(op_4e40_5), 0, 20032 }, /* TRAP */
+{ CPUFUNC(op_4e50_5), 0, 20048 }, /* LINK */
+{ CPUFUNC(op_4e58_5), 0, 20056 }, /* UNLK */
+{ CPUFUNC(op_4e60_5), 0, 20064 }, /* MVR2USP */
+{ CPUFUNC(op_4e68_5), 0, 20072 }, /* MVUSP2R */
+{ CPUFUNC(op_4e70_5), 0, 20080 }, /* RESET */
+{ CPUFUNC(op_4e71_5), 0, 20081 }, /* NOP */
+{ CPUFUNC(op_4e72_5), 0, 20082 }, /* STOP */
+{ CPUFUNC(op_4e73_5), 0, 20083 }, /* RTE */
+{ CPUFUNC(op_4e74_5), 0, 20084 }, /* RTD */
+{ CPUFUNC(op_4e75_5), 0, 20085 }, /* RTS */
+{ CPUFUNC(op_4e76_5), 0, 20086 }, /* TRAPV */
+{ CPUFUNC(op_4e77_5), 0, 20087 }, /* RTR */
+{ CPUFUNC(op_4e90_5), 0, 20112 }, /* JSR */
+{ CPUFUNC(op_4ea8_5), 0, 20136 }, /* JSR */
+{ CPUFUNC(op_4eb0_5), 0, 20144 }, /* JSR */
+{ CPUFUNC(op_4eb8_5), 0, 20152 }, /* JSR */
+{ CPUFUNC(op_4eb9_5), 0, 20153 }, /* JSR */
+{ CPUFUNC(op_4eba_5), 0, 20154 }, /* JSR */
+{ CPUFUNC(op_4ebb_5), 0, 20155 }, /* JSR */
+{ CPUFUNC(op_4ed0_5), 0, 20176 }, /* JMP */
+{ CPUFUNC(op_4ee8_5), 0, 20200 }, /* JMP */
+{ CPUFUNC(op_4ef0_5), 0, 20208 }, /* JMP */
+{ CPUFUNC(op_4ef8_5), 0, 20216 }, /* JMP */
+{ CPUFUNC(op_4ef9_5), 0, 20217 }, /* JMP */
+{ CPUFUNC(op_4efa_5), 0, 20218 }, /* JMP */
+{ CPUFUNC(op_4efb_5), 0, 20219 }, /* JMP */
+{ CPUFUNC(op_5000_5), 0, 20480 }, /* ADD */
+{ CPUFUNC(op_5010_5), 0, 20496 }, /* ADD */
+{ CPUFUNC(op_5018_5), 0, 20504 }, /* ADD */
+{ CPUFUNC(op_5020_5), 0, 20512 }, /* ADD */
+{ CPUFUNC(op_5028_5), 0, 20520 }, /* ADD */
+{ CPUFUNC(op_5030_5), 0, 20528 }, /* ADD */
+{ CPUFUNC(op_5038_5), 0, 20536 }, /* ADD */
+{ CPUFUNC(op_5039_5), 0, 20537 }, /* ADD */
+{ CPUFUNC(op_5040_5), 0, 20544 }, /* ADD */
+{ CPUFUNC(op_5048_5), 0, 20552 }, /* ADDA */
+{ CPUFUNC(op_5050_5), 0, 20560 }, /* ADD */
+{ CPUFUNC(op_5058_5), 0, 20568 }, /* ADD */
+{ CPUFUNC(op_5060_5), 0, 20576 }, /* ADD */
+{ CPUFUNC(op_5068_5), 0, 20584 }, /* ADD */
+{ CPUFUNC(op_5070_5), 0, 20592 }, /* ADD */
+{ CPUFUNC(op_5078_5), 0, 20600 }, /* ADD */
+{ CPUFUNC(op_5079_5), 0, 20601 }, /* ADD */
+{ CPUFUNC(op_5080_5), 0, 20608 }, /* ADD */
+{ CPUFUNC(op_5088_5), 0, 20616 }, /* ADDA */
+{ CPUFUNC(op_5090_5), 0, 20624 }, /* ADD */
+{ CPUFUNC(op_5098_5), 0, 20632 }, /* ADD */
+{ CPUFUNC(op_50a0_5), 0, 20640 }, /* ADD */
+{ CPUFUNC(op_50a8_5), 0, 20648 }, /* ADD */
+{ CPUFUNC(op_50b0_5), 0, 20656 }, /* ADD */
+{ CPUFUNC(op_50b8_5), 0, 20664 }, /* ADD */
+{ CPUFUNC(op_50b9_5), 0, 20665 }, /* ADD */
+{ CPUFUNC(op_50c0_5), 0, 20672 }, /* Scc */
+{ CPUFUNC(op_50c8_5), 0, 20680 }, /* DBcc */
+{ CPUFUNC(op_50d0_5), 0, 20688 }, /* Scc */
+{ CPUFUNC(op_50d8_5), 0, 20696 }, /* Scc */
+{ CPUFUNC(op_50e0_5), 0, 20704 }, /* Scc */
+{ CPUFUNC(op_50e8_5), 0, 20712 }, /* Scc */
+{ CPUFUNC(op_50f0_5), 0, 20720 }, /* Scc */
+{ CPUFUNC(op_50f8_5), 0, 20728 }, /* Scc */
+{ CPUFUNC(op_50f9_5), 0, 20729 }, /* Scc */
+{ CPUFUNC(op_5100_5), 0, 20736 }, /* SUB */
+{ CPUFUNC(op_5110_5), 0, 20752 }, /* SUB */
+{ CPUFUNC(op_5118_5), 0, 20760 }, /* SUB */
+{ CPUFUNC(op_5120_5), 0, 20768 }, /* SUB */
+{ CPUFUNC(op_5128_5), 0, 20776 }, /* SUB */
+{ CPUFUNC(op_5130_5), 0, 20784 }, /* SUB */
+{ CPUFUNC(op_5138_5), 0, 20792 }, /* SUB */
+{ CPUFUNC(op_5139_5), 0, 20793 }, /* SUB */
+{ CPUFUNC(op_5140_5), 0, 20800 }, /* SUB */
+{ CPUFUNC(op_5148_5), 0, 20808 }, /* SUBA */
+{ CPUFUNC(op_5150_5), 0, 20816 }, /* SUB */
+{ CPUFUNC(op_5158_5), 0, 20824 }, /* SUB */
+{ CPUFUNC(op_5160_5), 0, 20832 }, /* SUB */
+{ CPUFUNC(op_5168_5), 0, 20840 }, /* SUB */
+{ CPUFUNC(op_5170_5), 0, 20848 }, /* SUB */
+{ CPUFUNC(op_5178_5), 0, 20856 }, /* SUB */
+{ CPUFUNC(op_5179_5), 0, 20857 }, /* SUB */
+{ CPUFUNC(op_5180_5), 0, 20864 }, /* SUB */
+{ CPUFUNC(op_5188_5), 0, 20872 }, /* SUBA */
+{ CPUFUNC(op_5190_5), 0, 20880 }, /* SUB */
+{ CPUFUNC(op_5198_5), 0, 20888 }, /* SUB */
+{ CPUFUNC(op_51a0_5), 0, 20896 }, /* SUB */
+{ CPUFUNC(op_51a8_5), 0, 20904 }, /* SUB */
+{ CPUFUNC(op_51b0_5), 0, 20912 }, /* SUB */
+{ CPUFUNC(op_51b8_5), 0, 20920 }, /* SUB */
+{ CPUFUNC(op_51b9_5), 0, 20921 }, /* SUB */
+{ CPUFUNC(op_51c0_5), 0, 20928 }, /* Scc */
+{ CPUFUNC(op_51c8_5), 0, 20936 }, /* DBcc */
+{ CPUFUNC(op_51d0_5), 0, 20944 }, /* Scc */
+{ CPUFUNC(op_51d8_5), 0, 20952 }, /* Scc */
+{ CPUFUNC(op_51e0_5), 0, 20960 }, /* Scc */
+{ CPUFUNC(op_51e8_5), 0, 20968 }, /* Scc */
+{ CPUFUNC(op_51f0_5), 0, 20976 }, /* Scc */
+{ CPUFUNC(op_51f8_5), 0, 20984 }, /* Scc */
+{ CPUFUNC(op_51f9_5), 0, 20985 }, /* Scc */
+{ CPUFUNC(op_52c0_5), 0, 21184 }, /* Scc */
+{ CPUFUNC(op_52c8_5), 0, 21192 }, /* DBcc */
+{ CPUFUNC(op_52d0_5), 0, 21200 }, /* Scc */
+{ CPUFUNC(op_52d8_5), 0, 21208 }, /* Scc */
+{ CPUFUNC(op_52e0_5), 0, 21216 }, /* Scc */
+{ CPUFUNC(op_52e8_5), 0, 21224 }, /* Scc */
+{ CPUFUNC(op_52f0_5), 0, 21232 }, /* Scc */
+{ CPUFUNC(op_52f8_5), 0, 21240 }, /* Scc */
+{ CPUFUNC(op_52f9_5), 0, 21241 }, /* Scc */
+{ CPUFUNC(op_53c0_5), 0, 21440 }, /* Scc */
+{ CPUFUNC(op_53c8_5), 0, 21448 }, /* DBcc */
+{ CPUFUNC(op_53d0_5), 0, 21456 }, /* Scc */
+{ CPUFUNC(op_53d8_5), 0, 21464 }, /* Scc */
+{ CPUFUNC(op_53e0_5), 0, 21472 }, /* Scc */
+{ CPUFUNC(op_53e8_5), 0, 21480 }, /* Scc */
+{ CPUFUNC(op_53f0_5), 0, 21488 }, /* Scc */
+{ CPUFUNC(op_53f8_5), 0, 21496 }, /* Scc */
+{ CPUFUNC(op_53f9_5), 0, 21497 }, /* Scc */
+{ CPUFUNC(op_54c0_5), 0, 21696 }, /* Scc */
+{ CPUFUNC(op_54c8_5), 0, 21704 }, /* DBcc */
+{ CPUFUNC(op_54d0_5), 0, 21712 }, /* Scc */
+{ CPUFUNC(op_54d8_5), 0, 21720 }, /* Scc */
+{ CPUFUNC(op_54e0_5), 0, 21728 }, /* Scc */
+{ CPUFUNC(op_54e8_5), 0, 21736 }, /* Scc */
+{ CPUFUNC(op_54f0_5), 0, 21744 }, /* Scc */
+{ CPUFUNC(op_54f8_5), 0, 21752 }, /* Scc */
+{ CPUFUNC(op_54f9_5), 0, 21753 }, /* Scc */
+{ CPUFUNC(op_55c0_5), 0, 21952 }, /* Scc */
+{ CPUFUNC(op_55c8_5), 0, 21960 }, /* DBcc */
+{ CPUFUNC(op_55d0_5), 0, 21968 }, /* Scc */
+{ CPUFUNC(op_55d8_5), 0, 21976 }, /* Scc */
+{ CPUFUNC(op_55e0_5), 0, 21984 }, /* Scc */
+{ CPUFUNC(op_55e8_5), 0, 21992 }, /* Scc */
+{ CPUFUNC(op_55f0_5), 0, 22000 }, /* Scc */
+{ CPUFUNC(op_55f8_5), 0, 22008 }, /* Scc */
+{ CPUFUNC(op_55f9_5), 0, 22009 }, /* Scc */
+{ CPUFUNC(op_56c0_5), 0, 22208 }, /* Scc */
+{ CPUFUNC(op_56c8_5), 0, 22216 }, /* DBcc */
+{ CPUFUNC(op_56d0_5), 0, 22224 }, /* Scc */
+{ CPUFUNC(op_56d8_5), 0, 22232 }, /* Scc */
+{ CPUFUNC(op_56e0_5), 0, 22240 }, /* Scc */
+{ CPUFUNC(op_56e8_5), 0, 22248 }, /* Scc */
+{ CPUFUNC(op_56f0_5), 0, 22256 }, /* Scc */
+{ CPUFUNC(op_56f8_5), 0, 22264 }, /* Scc */
+{ CPUFUNC(op_56f9_5), 0, 22265 }, /* Scc */
+{ CPUFUNC(op_57c0_5), 0, 22464 }, /* Scc */
+{ CPUFUNC(op_57c8_5), 0, 22472 }, /* DBcc */
+{ CPUFUNC(op_57d0_5), 0, 22480 }, /* Scc */
+{ CPUFUNC(op_57d8_5), 0, 22488 }, /* Scc */
+{ CPUFUNC(op_57e0_5), 0, 22496 }, /* Scc */
+{ CPUFUNC(op_57e8_5), 0, 22504 }, /* Scc */
+{ CPUFUNC(op_57f0_5), 0, 22512 }, /* Scc */
+{ CPUFUNC(op_57f8_5), 0, 22520 }, /* Scc */
+{ CPUFUNC(op_57f9_5), 0, 22521 }, /* Scc */
+{ CPUFUNC(op_58c0_5), 0, 22720 }, /* Scc */
+{ CPUFUNC(op_58c8_5), 0, 22728 }, /* DBcc */
+{ CPUFUNC(op_58d0_5), 0, 22736 }, /* Scc */
+{ CPUFUNC(op_58d8_5), 0, 22744 }, /* Scc */
+{ CPUFUNC(op_58e0_5), 0, 22752 }, /* Scc */
+{ CPUFUNC(op_58e8_5), 0, 22760 }, /* Scc */
+{ CPUFUNC(op_58f0_5), 0, 22768 }, /* Scc */
+{ CPUFUNC(op_58f8_5), 0, 22776 }, /* Scc */
+{ CPUFUNC(op_58f9_5), 0, 22777 }, /* Scc */
+{ CPUFUNC(op_59c0_5), 0, 22976 }, /* Scc */
+{ CPUFUNC(op_59c8_5), 0, 22984 }, /* DBcc */
+{ CPUFUNC(op_59d0_5), 0, 22992 }, /* Scc */
+{ CPUFUNC(op_59d8_5), 0, 23000 }, /* Scc */
+{ CPUFUNC(op_59e0_5), 0, 23008 }, /* Scc */
+{ CPUFUNC(op_59e8_5), 0, 23016 }, /* Scc */
+{ CPUFUNC(op_59f0_5), 0, 23024 }, /* Scc */
+{ CPUFUNC(op_59f8_5), 0, 23032 }, /* Scc */
+{ CPUFUNC(op_59f9_5), 0, 23033 }, /* Scc */
+{ CPUFUNC(op_5ac0_5), 0, 23232 }, /* Scc */
+{ CPUFUNC(op_5ac8_5), 0, 23240 }, /* DBcc */
+{ CPUFUNC(op_5ad0_5), 0, 23248 }, /* Scc */
+{ CPUFUNC(op_5ad8_5), 0, 23256 }, /* Scc */
+{ CPUFUNC(op_5ae0_5), 0, 23264 }, /* Scc */
+{ CPUFUNC(op_5ae8_5), 0, 23272 }, /* Scc */
+{ CPUFUNC(op_5af0_5), 0, 23280 }, /* Scc */
+{ CPUFUNC(op_5af8_5), 0, 23288 }, /* Scc */
+{ CPUFUNC(op_5af9_5), 0, 23289 }, /* Scc */
+{ CPUFUNC(op_5bc0_5), 0, 23488 }, /* Scc */
+{ CPUFUNC(op_5bc8_5), 0, 23496 }, /* DBcc */
+{ CPUFUNC(op_5bd0_5), 0, 23504 }, /* Scc */
+{ CPUFUNC(op_5bd8_5), 0, 23512 }, /* Scc */
+{ CPUFUNC(op_5be0_5), 0, 23520 }, /* Scc */
+{ CPUFUNC(op_5be8_5), 0, 23528 }, /* Scc */
+{ CPUFUNC(op_5bf0_5), 0, 23536 }, /* Scc */
+{ CPUFUNC(op_5bf8_5), 0, 23544 }, /* Scc */
+{ CPUFUNC(op_5bf9_5), 0, 23545 }, /* Scc */
+{ CPUFUNC(op_5cc0_5), 0, 23744 }, /* Scc */
+{ CPUFUNC(op_5cc8_5), 0, 23752 }, /* DBcc */
+{ CPUFUNC(op_5cd0_5), 0, 23760 }, /* Scc */
+{ CPUFUNC(op_5cd8_5), 0, 23768 }, /* Scc */
+{ CPUFUNC(op_5ce0_5), 0, 23776 }, /* Scc */
+{ CPUFUNC(op_5ce8_5), 0, 23784 }, /* Scc */
+{ CPUFUNC(op_5cf0_5), 0, 23792 }, /* Scc */
+{ CPUFUNC(op_5cf8_5), 0, 23800 }, /* Scc */
+{ CPUFUNC(op_5cf9_5), 0, 23801 }, /* Scc */
+{ CPUFUNC(op_5dc0_5), 0, 24000 }, /* Scc */
+{ CPUFUNC(op_5dc8_5), 0, 24008 }, /* DBcc */
+{ CPUFUNC(op_5dd0_5), 0, 24016 }, /* Scc */
+{ CPUFUNC(op_5dd8_5), 0, 24024 }, /* Scc */
+{ CPUFUNC(op_5de0_5), 0, 24032 }, /* Scc */
+{ CPUFUNC(op_5de8_5), 0, 24040 }, /* Scc */
+{ CPUFUNC(op_5df0_5), 0, 24048 }, /* Scc */
+{ CPUFUNC(op_5df8_5), 0, 24056 }, /* Scc */
+{ CPUFUNC(op_5df9_5), 0, 24057 }, /* Scc */
+{ CPUFUNC(op_5ec0_5), 0, 24256 }, /* Scc */
+{ CPUFUNC(op_5ec8_5), 0, 24264 }, /* DBcc */
+{ CPUFUNC(op_5ed0_5), 0, 24272 }, /* Scc */
+{ CPUFUNC(op_5ed8_5), 0, 24280 }, /* Scc */
+{ CPUFUNC(op_5ee0_5), 0, 24288 }, /* Scc */
+{ CPUFUNC(op_5ee8_5), 0, 24296 }, /* Scc */
+{ CPUFUNC(op_5ef0_5), 0, 24304 }, /* Scc */
+{ CPUFUNC(op_5ef8_5), 0, 24312 }, /* Scc */
+{ CPUFUNC(op_5ef9_5), 0, 24313 }, /* Scc */
+{ CPUFUNC(op_5fc0_5), 0, 24512 }, /* Scc */
+{ CPUFUNC(op_5fc8_5), 0, 24520 }, /* DBcc */
+{ CPUFUNC(op_5fd0_5), 0, 24528 }, /* Scc */
+{ CPUFUNC(op_5fd8_5), 0, 24536 }, /* Scc */
+{ CPUFUNC(op_5fe0_5), 0, 24544 }, /* Scc */
+{ CPUFUNC(op_5fe8_5), 0, 24552 }, /* Scc */
+{ CPUFUNC(op_5ff0_5), 0, 24560 }, /* Scc */
+{ CPUFUNC(op_5ff8_5), 0, 24568 }, /* Scc */
+{ CPUFUNC(op_5ff9_5), 0, 24569 }, /* Scc */
+{ CPUFUNC(op_6000_5), 0, 24576 }, /* Bcc */
+{ CPUFUNC(op_6001_5), 0, 24577 }, /* Bcc */
+{ CPUFUNC(op_60ff_5), 0, 24831 }, /* Bcc */
+{ CPUFUNC(op_6100_5), 0, 24832 }, /* BSR */
+{ CPUFUNC(op_6101_5), 0, 24833 }, /* BSR */
+{ CPUFUNC(op_61ff_5), 0, 25087 }, /* BSR */
+{ CPUFUNC(op_6200_5), 0, 25088 }, /* Bcc */
+{ CPUFUNC(op_6201_5), 0, 25089 }, /* Bcc */
+{ CPUFUNC(op_62ff_5), 0, 25343 }, /* Bcc */
+{ CPUFUNC(op_6300_5), 0, 25344 }, /* Bcc */
+{ CPUFUNC(op_6301_5), 0, 25345 }, /* Bcc */
+{ CPUFUNC(op_63ff_5), 0, 25599 }, /* Bcc */
+{ CPUFUNC(op_6400_5), 0, 25600 }, /* Bcc */
+{ CPUFUNC(op_6401_5), 0, 25601 }, /* Bcc */
+{ CPUFUNC(op_64ff_5), 0, 25855 }, /* Bcc */
+{ CPUFUNC(op_6500_5), 0, 25856 }, /* Bcc */
+{ CPUFUNC(op_6501_5), 0, 25857 }, /* Bcc */
+{ CPUFUNC(op_65ff_5), 0, 26111 }, /* Bcc */
+{ CPUFUNC(op_6600_5), 0, 26112 }, /* Bcc */
+{ CPUFUNC(op_6601_5), 0, 26113 }, /* Bcc */
+{ CPUFUNC(op_66ff_5), 0, 26367 }, /* Bcc */
+{ CPUFUNC(op_6700_5), 0, 26368 }, /* Bcc */
+{ CPUFUNC(op_6701_5), 0, 26369 }, /* Bcc */
+{ CPUFUNC(op_67ff_5), 0, 26623 }, /* Bcc */
+{ CPUFUNC(op_6800_5), 0, 26624 }, /* Bcc */
+{ CPUFUNC(op_6801_5), 0, 26625 }, /* Bcc */
+{ CPUFUNC(op_68ff_5), 0, 26879 }, /* Bcc */
+{ CPUFUNC(op_6900_5), 0, 26880 }, /* Bcc */
+{ CPUFUNC(op_6901_5), 0, 26881 }, /* Bcc */
+{ CPUFUNC(op_69ff_5), 0, 27135 }, /* Bcc */
+{ CPUFUNC(op_6a00_5), 0, 27136 }, /* Bcc */
+{ CPUFUNC(op_6a01_5), 0, 27137 }, /* Bcc */
+{ CPUFUNC(op_6aff_5), 0, 27391 }, /* Bcc */
+{ CPUFUNC(op_6b00_5), 0, 27392 }, /* Bcc */
+{ CPUFUNC(op_6b01_5), 0, 27393 }, /* Bcc */
+{ CPUFUNC(op_6bff_5), 0, 27647 }, /* Bcc */
+{ CPUFUNC(op_6c00_5), 0, 27648 }, /* Bcc */
+{ CPUFUNC(op_6c01_5), 0, 27649 }, /* Bcc */
+{ CPUFUNC(op_6cff_5), 0, 27903 }, /* Bcc */
+{ CPUFUNC(op_6d00_5), 0, 27904 }, /* Bcc */
+{ CPUFUNC(op_6d01_5), 0, 27905 }, /* Bcc */
+{ CPUFUNC(op_6dff_5), 0, 28159 }, /* Bcc */
+{ CPUFUNC(op_6e00_5), 0, 28160 }, /* Bcc */
+{ CPUFUNC(op_6e01_5), 0, 28161 }, /* Bcc */
+{ CPUFUNC(op_6eff_5), 0, 28415 }, /* Bcc */
+{ CPUFUNC(op_6f00_5), 0, 28416 }, /* Bcc */
+{ CPUFUNC(op_6f01_5), 0, 28417 }, /* Bcc */
+{ CPUFUNC(op_6fff_5), 0, 28671 }, /* Bcc */
+{ CPUFUNC(op_7000_5), 0, 28672 }, /* MOVE */
+{ CPUFUNC(op_8000_5), 0, 32768 }, /* OR */
+{ CPUFUNC(op_8010_5), 0, 32784 }, /* OR */
+{ CPUFUNC(op_8018_5), 0, 32792 }, /* OR */
+{ CPUFUNC(op_8020_5), 0, 32800 }, /* OR */
+{ CPUFUNC(op_8028_5), 0, 32808 }, /* OR */
+{ CPUFUNC(op_8030_5), 0, 32816 }, /* OR */
+{ CPUFUNC(op_8038_5), 0, 32824 }, /* OR */
+{ CPUFUNC(op_8039_5), 0, 32825 }, /* OR */
+{ CPUFUNC(op_803a_5), 0, 32826 }, /* OR */
+{ CPUFUNC(op_803b_5), 0, 32827 }, /* OR */
+{ CPUFUNC(op_803c_5), 0, 32828 }, /* OR */
+{ CPUFUNC(op_8040_5), 0, 32832 }, /* OR */
+{ CPUFUNC(op_8050_5), 0, 32848 }, /* OR */
+{ CPUFUNC(op_8058_5), 0, 32856 }, /* OR */
+{ CPUFUNC(op_8060_5), 0, 32864 }, /* OR */
+{ CPUFUNC(op_8068_5), 0, 32872 }, /* OR */
+{ CPUFUNC(op_8070_5), 0, 32880 }, /* OR */
+{ CPUFUNC(op_8078_5), 0, 32888 }, /* OR */
+{ CPUFUNC(op_8079_5), 0, 32889 }, /* OR */
+{ CPUFUNC(op_807a_5), 0, 32890 }, /* OR */
+{ CPUFUNC(op_807b_5), 0, 32891 }, /* OR */
+{ CPUFUNC(op_807c_5), 0, 32892 }, /* OR */
+{ CPUFUNC(op_8080_5), 0, 32896 }, /* OR */
+{ CPUFUNC(op_8090_5), 0, 32912 }, /* OR */
+{ CPUFUNC(op_8098_5), 0, 32920 }, /* OR */
+{ CPUFUNC(op_80a0_5), 0, 32928 }, /* OR */
+{ CPUFUNC(op_80a8_5), 0, 32936 }, /* OR */
+{ CPUFUNC(op_80b0_5), 0, 32944 }, /* OR */
+{ CPUFUNC(op_80b8_5), 0, 32952 }, /* OR */
+{ CPUFUNC(op_80b9_5), 0, 32953 }, /* OR */
+{ CPUFUNC(op_80ba_5), 0, 32954 }, /* OR */
+{ CPUFUNC(op_80bb_5), 0, 32955 }, /* OR */
+{ CPUFUNC(op_80bc_5), 0, 32956 }, /* OR */
+{ CPUFUNC(op_80c0_5), 0, 32960 }, /* DIVU */
+{ CPUFUNC(op_80d0_5), 0, 32976 }, /* DIVU */
+{ CPUFUNC(op_80d8_5), 0, 32984 }, /* DIVU */
+{ CPUFUNC(op_80e0_5), 0, 32992 }, /* DIVU */
+{ CPUFUNC(op_80e8_5), 0, 33000 }, /* DIVU */
+{ CPUFUNC(op_80f0_5), 0, 33008 }, /* DIVU */
+{ CPUFUNC(op_80f8_5), 0, 33016 }, /* DIVU */
+{ CPUFUNC(op_80f9_5), 0, 33017 }, /* DIVU */
+{ CPUFUNC(op_80fa_5), 0, 33018 }, /* DIVU */
+{ CPUFUNC(op_80fb_5), 0, 33019 }, /* DIVU */
+{ CPUFUNC(op_80fc_5), 0, 33020 }, /* DIVU */
+{ CPUFUNC(op_8100_5), 0, 33024 }, /* SBCD */
+{ CPUFUNC(op_8108_5), 0, 33032 }, /* SBCD */
+{ CPUFUNC(op_8110_5), 0, 33040 }, /* OR */
+{ CPUFUNC(op_8118_5), 0, 33048 }, /* OR */
+{ CPUFUNC(op_8120_5), 0, 33056 }, /* OR */
+{ CPUFUNC(op_8128_5), 0, 33064 }, /* OR */
+{ CPUFUNC(op_8130_5), 0, 33072 }, /* OR */
+{ CPUFUNC(op_8138_5), 0, 33080 }, /* OR */
+{ CPUFUNC(op_8139_5), 0, 33081 }, /* OR */
+{ CPUFUNC(op_8150_5), 0, 33104 }, /* OR */
+{ CPUFUNC(op_8158_5), 0, 33112 }, /* OR */
+{ CPUFUNC(op_8160_5), 0, 33120 }, /* OR */
+{ CPUFUNC(op_8168_5), 0, 33128 }, /* OR */
+{ CPUFUNC(op_8170_5), 0, 33136 }, /* OR */
+{ CPUFUNC(op_8178_5), 0, 33144 }, /* OR */
+{ CPUFUNC(op_8179_5), 0, 33145 }, /* OR */
+{ CPUFUNC(op_8190_5), 0, 33168 }, /* OR */
+{ CPUFUNC(op_8198_5), 0, 33176 }, /* OR */
+{ CPUFUNC(op_81a0_5), 0, 33184 }, /* OR */
+{ CPUFUNC(op_81a8_5), 0, 33192 }, /* OR */
+{ CPUFUNC(op_81b0_5), 0, 33200 }, /* OR */
+{ CPUFUNC(op_81b8_5), 0, 33208 }, /* OR */
+{ CPUFUNC(op_81b9_5), 0, 33209 }, /* OR */
+{ CPUFUNC(op_81c0_5), 0, 33216 }, /* DIVS */
+{ CPUFUNC(op_81d0_5), 0, 33232 }, /* DIVS */
+{ CPUFUNC(op_81d8_5), 0, 33240 }, /* DIVS */
+{ CPUFUNC(op_81e0_5), 0, 33248 }, /* DIVS */
+{ CPUFUNC(op_81e8_5), 0, 33256 }, /* DIVS */
+{ CPUFUNC(op_81f0_5), 0, 33264 }, /* DIVS */
+{ CPUFUNC(op_81f8_5), 0, 33272 }, /* DIVS */
+{ CPUFUNC(op_81f9_5), 0, 33273 }, /* DIVS */
+{ CPUFUNC(op_81fa_5), 0, 33274 }, /* DIVS */
+{ CPUFUNC(op_81fb_5), 0, 33275 }, /* DIVS */
+{ CPUFUNC(op_81fc_5), 0, 33276 }, /* DIVS */
+{ CPUFUNC(op_9000_5), 0, 36864 }, /* SUB */
+{ CPUFUNC(op_9010_5), 0, 36880 }, /* SUB */
+{ CPUFUNC(op_9018_5), 0, 36888 }, /* SUB */
+{ CPUFUNC(op_9020_5), 0, 36896 }, /* SUB */
+{ CPUFUNC(op_9028_5), 0, 36904 }, /* SUB */
+{ CPUFUNC(op_9030_5), 0, 36912 }, /* SUB */
+{ CPUFUNC(op_9038_5), 0, 36920 }, /* SUB */
+{ CPUFUNC(op_9039_5), 0, 36921 }, /* SUB */
+{ CPUFUNC(op_903a_5), 0, 36922 }, /* SUB */
+{ CPUFUNC(op_903b_5), 0, 36923 }, /* SUB */
+{ CPUFUNC(op_903c_5), 0, 36924 }, /* SUB */
+{ CPUFUNC(op_9040_5), 0, 36928 }, /* SUB */
+{ CPUFUNC(op_9048_5), 0, 36936 }, /* SUB */
+{ CPUFUNC(op_9050_5), 0, 36944 }, /* SUB */
+{ CPUFUNC(op_9058_5), 0, 36952 }, /* SUB */
+{ CPUFUNC(op_9060_5), 0, 36960 }, /* SUB */
+{ CPUFUNC(op_9068_5), 0, 36968 }, /* SUB */
+{ CPUFUNC(op_9070_5), 0, 36976 }, /* SUB */
+{ CPUFUNC(op_9078_5), 0, 36984 }, /* SUB */
+{ CPUFUNC(op_9079_5), 0, 36985 }, /* SUB */
+{ CPUFUNC(op_907a_5), 0, 36986 }, /* SUB */
+{ CPUFUNC(op_907b_5), 0, 36987 }, /* SUB */
+{ CPUFUNC(op_907c_5), 0, 36988 }, /* SUB */
+{ CPUFUNC(op_9080_5), 0, 36992 }, /* SUB */
+{ CPUFUNC(op_9088_5), 0, 37000 }, /* SUB */
+{ CPUFUNC(op_9090_5), 0, 37008 }, /* SUB */
+{ CPUFUNC(op_9098_5), 0, 37016 }, /* SUB */
+{ CPUFUNC(op_90a0_5), 0, 37024 }, /* SUB */
+{ CPUFUNC(op_90a8_5), 0, 37032 }, /* SUB */
+{ CPUFUNC(op_90b0_5), 0, 37040 }, /* SUB */
+{ CPUFUNC(op_90b8_5), 0, 37048 }, /* SUB */
+{ CPUFUNC(op_90b9_5), 0, 37049 }, /* SUB */
+{ CPUFUNC(op_90ba_5), 0, 37050 }, /* SUB */
+{ CPUFUNC(op_90bb_5), 0, 37051 }, /* SUB */
+{ CPUFUNC(op_90bc_5), 0, 37052 }, /* SUB */
+{ CPUFUNC(op_90c0_5), 0, 37056 }, /* SUBA */
+{ CPUFUNC(op_90c8_5), 0, 37064 }, /* SUBA */
+{ CPUFUNC(op_90d0_5), 0, 37072 }, /* SUBA */
+{ CPUFUNC(op_90d8_5), 0, 37080 }, /* SUBA */
+{ CPUFUNC(op_90e0_5), 0, 37088 }, /* SUBA */
+{ CPUFUNC(op_90e8_5), 0, 37096 }, /* SUBA */
+{ CPUFUNC(op_90f0_5), 0, 37104 }, /* SUBA */
+{ CPUFUNC(op_90f8_5), 0, 37112 }, /* SUBA */
+{ CPUFUNC(op_90f9_5), 0, 37113 }, /* SUBA */
+{ CPUFUNC(op_90fa_5), 0, 37114 }, /* SUBA */
+{ CPUFUNC(op_90fb_5), 0, 37115 }, /* SUBA */
+{ CPUFUNC(op_90fc_5), 0, 37116 }, /* SUBA */
+{ CPUFUNC(op_9100_5), 0, 37120 }, /* SUBX */
+{ CPUFUNC(op_9108_5), 0, 37128 }, /* SUBX */
+{ CPUFUNC(op_9110_5), 0, 37136 }, /* SUB */
+{ CPUFUNC(op_9118_5), 0, 37144 }, /* SUB */
+{ CPUFUNC(op_9120_5), 0, 37152 }, /* SUB */
+{ CPUFUNC(op_9128_5), 0, 37160 }, /* SUB */
+{ CPUFUNC(op_9130_5), 0, 37168 }, /* SUB */
+{ CPUFUNC(op_9138_5), 0, 37176 }, /* SUB */
+{ CPUFUNC(op_9139_5), 0, 37177 }, /* SUB */
+{ CPUFUNC(op_9140_5), 0, 37184 }, /* SUBX */
+{ CPUFUNC(op_9148_5), 0, 37192 }, /* SUBX */
+{ CPUFUNC(op_9150_5), 0, 37200 }, /* SUB */
+{ CPUFUNC(op_9158_5), 0, 37208 }, /* SUB */
+{ CPUFUNC(op_9160_5), 0, 37216 }, /* SUB */
+{ CPUFUNC(op_9168_5), 0, 37224 }, /* SUB */
+{ CPUFUNC(op_9170_5), 0, 37232 }, /* SUB */
+{ CPUFUNC(op_9178_5), 0, 37240 }, /* SUB */
+{ CPUFUNC(op_9179_5), 0, 37241 }, /* SUB */
+{ CPUFUNC(op_9180_5), 0, 37248 }, /* SUBX */
+{ CPUFUNC(op_9188_5), 0, 37256 }, /* SUBX */
+{ CPUFUNC(op_9190_5), 0, 37264 }, /* SUB */
+{ CPUFUNC(op_9198_5), 0, 37272 }, /* SUB */
+{ CPUFUNC(op_91a0_5), 0, 37280 }, /* SUB */
+{ CPUFUNC(op_91a8_5), 0, 37288 }, /* SUB */
+{ CPUFUNC(op_91b0_5), 0, 37296 }, /* SUB */
+{ CPUFUNC(op_91b8_5), 0, 37304 }, /* SUB */
+{ CPUFUNC(op_91b9_5), 0, 37305 }, /* SUB */
+{ CPUFUNC(op_91c0_5), 0, 37312 }, /* SUBA */
+{ CPUFUNC(op_91c8_5), 0, 37320 }, /* SUBA */
+{ CPUFUNC(op_91d0_5), 0, 37328 }, /* SUBA */
+{ CPUFUNC(op_91d8_5), 0, 37336 }, /* SUBA */
+{ CPUFUNC(op_91e0_5), 0, 37344 }, /* SUBA */
+{ CPUFUNC(op_91e8_5), 0, 37352 }, /* SUBA */
+{ CPUFUNC(op_91f0_5), 0, 37360 }, /* SUBA */
+{ CPUFUNC(op_91f8_5), 0, 37368 }, /* SUBA */
+{ CPUFUNC(op_91f9_5), 0, 37369 }, /* SUBA */
+{ CPUFUNC(op_91fa_5), 0, 37370 }, /* SUBA */
+{ CPUFUNC(op_91fb_5), 0, 37371 }, /* SUBA */
+{ CPUFUNC(op_91fc_5), 0, 37372 }, /* SUBA */
+{ CPUFUNC(op_b000_5), 0, 45056 }, /* CMP */
+{ CPUFUNC(op_b010_5), 0, 45072 }, /* CMP */
+{ CPUFUNC(op_b018_5), 0, 45080 }, /* CMP */
+{ CPUFUNC(op_b020_5), 0, 45088 }, /* CMP */
+{ CPUFUNC(op_b028_5), 0, 45096 }, /* CMP */
+{ CPUFUNC(op_b030_5), 0, 45104 }, /* CMP */
+{ CPUFUNC(op_b038_5), 0, 45112 }, /* CMP */
+{ CPUFUNC(op_b039_5), 0, 45113 }, /* CMP */
+{ CPUFUNC(op_b03a_5), 0, 45114 }, /* CMP */
+{ CPUFUNC(op_b03b_5), 0, 45115 }, /* CMP */
+{ CPUFUNC(op_b03c_5), 0, 45116 }, /* CMP */
+{ CPUFUNC(op_b040_5), 0, 45120 }, /* CMP */
+{ CPUFUNC(op_b048_5), 0, 45128 }, /* CMP */
+{ CPUFUNC(op_b050_5), 0, 45136 }, /* CMP */
+{ CPUFUNC(op_b058_5), 0, 45144 }, /* CMP */
+{ CPUFUNC(op_b060_5), 0, 45152 }, /* CMP */
+{ CPUFUNC(op_b068_5), 0, 45160 }, /* CMP */
+{ CPUFUNC(op_b070_5), 0, 45168 }, /* CMP */
+{ CPUFUNC(op_b078_5), 0, 45176 }, /* CMP */
+{ CPUFUNC(op_b079_5), 0, 45177 }, /* CMP */
+{ CPUFUNC(op_b07a_5), 0, 45178 }, /* CMP */
+{ CPUFUNC(op_b07b_5), 0, 45179 }, /* CMP */
+{ CPUFUNC(op_b07c_5), 0, 45180 }, /* CMP */
+{ CPUFUNC(op_b080_5), 0, 45184 }, /* CMP */
+{ CPUFUNC(op_b088_5), 0, 45192 }, /* CMP */
+{ CPUFUNC(op_b090_5), 0, 45200 }, /* CMP */
+{ CPUFUNC(op_b098_5), 0, 45208 }, /* CMP */
+{ CPUFUNC(op_b0a0_5), 0, 45216 }, /* CMP */
+{ CPUFUNC(op_b0a8_5), 0, 45224 }, /* CMP */
+{ CPUFUNC(op_b0b0_5), 0, 45232 }, /* CMP */
+{ CPUFUNC(op_b0b8_5), 0, 45240 }, /* CMP */
+{ CPUFUNC(op_b0b9_5), 0, 45241 }, /* CMP */
+{ CPUFUNC(op_b0ba_5), 0, 45242 }, /* CMP */
+{ CPUFUNC(op_b0bb_5), 0, 45243 }, /* CMP */
+{ CPUFUNC(op_b0bc_5), 0, 45244 }, /* CMP */
+{ CPUFUNC(op_b0c0_5), 0, 45248 }, /* CMPA */
+{ CPUFUNC(op_b0c8_5), 0, 45256 }, /* CMPA */
+{ CPUFUNC(op_b0d0_5), 0, 45264 }, /* CMPA */
+{ CPUFUNC(op_b0d8_5), 0, 45272 }, /* CMPA */
+{ CPUFUNC(op_b0e0_5), 0, 45280 }, /* CMPA */
+{ CPUFUNC(op_b0e8_5), 0, 45288 }, /* CMPA */
+{ CPUFUNC(op_b0f0_5), 0, 45296 }, /* CMPA */
+{ CPUFUNC(op_b0f8_5), 0, 45304 }, /* CMPA */
+{ CPUFUNC(op_b0f9_5), 0, 45305 }, /* CMPA */
+{ CPUFUNC(op_b0fa_5), 0, 45306 }, /* CMPA */
+{ CPUFUNC(op_b0fb_5), 0, 45307 }, /* CMPA */
+{ CPUFUNC(op_b0fc_5), 0, 45308 }, /* CMPA */
+{ CPUFUNC(op_b100_5), 0, 45312 }, /* EOR */
+{ CPUFUNC(op_b108_5), 0, 45320 }, /* CMPM */
+{ CPUFUNC(op_b110_5), 0, 45328 }, /* EOR */
+{ CPUFUNC(op_b118_5), 0, 45336 }, /* EOR */
+{ CPUFUNC(op_b120_5), 0, 45344 }, /* EOR */
+{ CPUFUNC(op_b128_5), 0, 45352 }, /* EOR */
+{ CPUFUNC(op_b130_5), 0, 45360 }, /* EOR */
+{ CPUFUNC(op_b138_5), 0, 45368 }, /* EOR */
+{ CPUFUNC(op_b139_5), 0, 45369 }, /* EOR */
+{ CPUFUNC(op_b140_5), 0, 45376 }, /* EOR */
+{ CPUFUNC(op_b148_5), 0, 45384 }, /* CMPM */
+{ CPUFUNC(op_b150_5), 0, 45392 }, /* EOR */
+{ CPUFUNC(op_b158_5), 0, 45400 }, /* EOR */
+{ CPUFUNC(op_b160_5), 0, 45408 }, /* EOR */
+{ CPUFUNC(op_b168_5), 0, 45416 }, /* EOR */
+{ CPUFUNC(op_b170_5), 0, 45424 }, /* EOR */
+{ CPUFUNC(op_b178_5), 0, 45432 }, /* EOR */
+{ CPUFUNC(op_b179_5), 0, 45433 }, /* EOR */
+{ CPUFUNC(op_b180_5), 0, 45440 }, /* EOR */
+{ CPUFUNC(op_b188_5), 0, 45448 }, /* CMPM */
+{ CPUFUNC(op_b190_5), 0, 45456 }, /* EOR */
+{ CPUFUNC(op_b198_5), 0, 45464 }, /* EOR */
+{ CPUFUNC(op_b1a0_5), 0, 45472 }, /* EOR */
+{ CPUFUNC(op_b1a8_5), 0, 45480 }, /* EOR */
+{ CPUFUNC(op_b1b0_5), 0, 45488 }, /* EOR */
+{ CPUFUNC(op_b1b8_5), 0, 45496 }, /* EOR */
+{ CPUFUNC(op_b1b9_5), 0, 45497 }, /* EOR */
+{ CPUFUNC(op_b1c0_5), 0, 45504 }, /* CMPA */
+{ CPUFUNC(op_b1c8_5), 0, 45512 }, /* CMPA */
+{ CPUFUNC(op_b1d0_5), 0, 45520 }, /* CMPA */
+{ CPUFUNC(op_b1d8_5), 0, 45528 }, /* CMPA */
+{ CPUFUNC(op_b1e0_5), 0, 45536 }, /* CMPA */
+{ CPUFUNC(op_b1e8_5), 0, 45544 }, /* CMPA */
+{ CPUFUNC(op_b1f0_5), 0, 45552 }, /* CMPA */
+{ CPUFUNC(op_b1f8_5), 0, 45560 }, /* CMPA */
+{ CPUFUNC(op_b1f9_5), 0, 45561 }, /* CMPA */
+{ CPUFUNC(op_b1fa_5), 0, 45562 }, /* CMPA */
+{ CPUFUNC(op_b1fb_5), 0, 45563 }, /* CMPA */
+{ CPUFUNC(op_b1fc_5), 0, 45564 }, /* CMPA */
+{ CPUFUNC(op_c000_5), 0, 49152 }, /* AND */
+{ CPUFUNC(op_c010_5), 0, 49168 }, /* AND */
+{ CPUFUNC(op_c018_5), 0, 49176 }, /* AND */
+{ CPUFUNC(op_c020_5), 0, 49184 }, /* AND */
+{ CPUFUNC(op_c028_5), 0, 49192 }, /* AND */
+{ CPUFUNC(op_c030_5), 0, 49200 }, /* AND */
+{ CPUFUNC(op_c038_5), 0, 49208 }, /* AND */
+{ CPUFUNC(op_c039_5), 0, 49209 }, /* AND */
+{ CPUFUNC(op_c03a_5), 0, 49210 }, /* AND */
+{ CPUFUNC(op_c03b_5), 0, 49211 }, /* AND */
+{ CPUFUNC(op_c03c_5), 0, 49212 }, /* AND */
+{ CPUFUNC(op_c040_5), 0, 49216 }, /* AND */
+{ CPUFUNC(op_c050_5), 0, 49232 }, /* AND */
+{ CPUFUNC(op_c058_5), 0, 49240 }, /* AND */
+{ CPUFUNC(op_c060_5), 0, 49248 }, /* AND */
+{ CPUFUNC(op_c068_5), 0, 49256 }, /* AND */
+{ CPUFUNC(op_c070_5), 0, 49264 }, /* AND */
+{ CPUFUNC(op_c078_5), 0, 49272 }, /* AND */
+{ CPUFUNC(op_c079_5), 0, 49273 }, /* AND */
+{ CPUFUNC(op_c07a_5), 0, 49274 }, /* AND */
+{ CPUFUNC(op_c07b_5), 0, 49275 }, /* AND */
+{ CPUFUNC(op_c07c_5), 0, 49276 }, /* AND */
+{ CPUFUNC(op_c080_5), 0, 49280 }, /* AND */
+{ CPUFUNC(op_c090_5), 0, 49296 }, /* AND */
+{ CPUFUNC(op_c098_5), 0, 49304 }, /* AND */
+{ CPUFUNC(op_c0a0_5), 0, 49312 }, /* AND */
+{ CPUFUNC(op_c0a8_5), 0, 49320 }, /* AND */
+{ CPUFUNC(op_c0b0_5), 0, 49328 }, /* AND */
+{ CPUFUNC(op_c0b8_5), 0, 49336 }, /* AND */
+{ CPUFUNC(op_c0b9_5), 0, 49337 }, /* AND */
+{ CPUFUNC(op_c0ba_5), 0, 49338 }, /* AND */
+{ CPUFUNC(op_c0bb_5), 0, 49339 }, /* AND */
+{ CPUFUNC(op_c0bc_5), 0, 49340 }, /* AND */
+{ CPUFUNC(op_c0c0_5), 0, 49344 }, /* MULU */
+{ CPUFUNC(op_c0d0_5), 0, 49360 }, /* MULU */
+{ CPUFUNC(op_c0d8_5), 0, 49368 }, /* MULU */
+{ CPUFUNC(op_c0e0_5), 0, 49376 }, /* MULU */
+{ CPUFUNC(op_c0e8_5), 0, 49384 }, /* MULU */
+{ CPUFUNC(op_c0f0_5), 0, 49392 }, /* MULU */
+{ CPUFUNC(op_c0f8_5), 0, 49400 }, /* MULU */
+{ CPUFUNC(op_c0f9_5), 0, 49401 }, /* MULU */
+{ CPUFUNC(op_c0fa_5), 0, 49402 }, /* MULU */
+{ CPUFUNC(op_c0fb_5), 0, 49403 }, /* MULU */
+{ CPUFUNC(op_c0fc_5), 0, 49404 }, /* MULU */
+{ CPUFUNC(op_c100_5), 0, 49408 }, /* ABCD */
+{ CPUFUNC(op_c108_5), 0, 49416 }, /* ABCD */
+{ CPUFUNC(op_c110_5), 0, 49424 }, /* AND */
+{ CPUFUNC(op_c118_5), 0, 49432 }, /* AND */
+{ CPUFUNC(op_c120_5), 0, 49440 }, /* AND */
+{ CPUFUNC(op_c128_5), 0, 49448 }, /* AND */
+{ CPUFUNC(op_c130_5), 0, 49456 }, /* AND */
+{ CPUFUNC(op_c138_5), 0, 49464 }, /* AND */
+{ CPUFUNC(op_c139_5), 0, 49465 }, /* AND */
+{ CPUFUNC(op_c140_5), 0, 49472 }, /* EXG */
+{ CPUFUNC(op_c148_5), 0, 49480 }, /* EXG */
+{ CPUFUNC(op_c150_5), 0, 49488 }, /* AND */
+{ CPUFUNC(op_c158_5), 0, 49496 }, /* AND */
+{ CPUFUNC(op_c160_5), 0, 49504 }, /* AND */
+{ CPUFUNC(op_c168_5), 0, 49512 }, /* AND */
+{ CPUFUNC(op_c170_5), 0, 49520 }, /* AND */
+{ CPUFUNC(op_c178_5), 0, 49528 }, /* AND */
+{ CPUFUNC(op_c179_5), 0, 49529 }, /* AND */
+{ CPUFUNC(op_c188_5), 0, 49544 }, /* EXG */
+{ CPUFUNC(op_c190_5), 0, 49552 }, /* AND */
+{ CPUFUNC(op_c198_5), 0, 49560 }, /* AND */
+{ CPUFUNC(op_c1a0_5), 0, 49568 }, /* AND */
+{ CPUFUNC(op_c1a8_5), 0, 49576 }, /* AND */
+{ CPUFUNC(op_c1b0_5), 0, 49584 }, /* AND */
+{ CPUFUNC(op_c1b8_5), 0, 49592 }, /* AND */
+{ CPUFUNC(op_c1b9_5), 0, 49593 }, /* AND */
+{ CPUFUNC(op_c1c0_5), 0, 49600 }, /* MULS */
+{ CPUFUNC(op_c1d0_5), 0, 49616 }, /* MULS */
+{ CPUFUNC(op_c1d8_5), 0, 49624 }, /* MULS */
+{ CPUFUNC(op_c1e0_5), 0, 49632 }, /* MULS */
+{ CPUFUNC(op_c1e8_5), 0, 49640 }, /* MULS */
+{ CPUFUNC(op_c1f0_5), 0, 49648 }, /* MULS */
+{ CPUFUNC(op_c1f8_5), 0, 49656 }, /* MULS */
+{ CPUFUNC(op_c1f9_5), 0, 49657 }, /* MULS */
+{ CPUFUNC(op_c1fa_5), 0, 49658 }, /* MULS */
+{ CPUFUNC(op_c1fb_5), 0, 49659 }, /* MULS */
+{ CPUFUNC(op_c1fc_5), 0, 49660 }, /* MULS */
+{ CPUFUNC(op_d000_5), 0, 53248 }, /* ADD */
+{ CPUFUNC(op_d010_5), 0, 53264 }, /* ADD */
+{ CPUFUNC(op_d018_5), 0, 53272 }, /* ADD */
+{ CPUFUNC(op_d020_5), 0, 53280 }, /* ADD */
+{ CPUFUNC(op_d028_5), 0, 53288 }, /* ADD */
+{ CPUFUNC(op_d030_5), 0, 53296 }, /* ADD */
+{ CPUFUNC(op_d038_5), 0, 53304 }, /* ADD */
+{ CPUFUNC(op_d039_5), 0, 53305 }, /* ADD */
+{ CPUFUNC(op_d03a_5), 0, 53306 }, /* ADD */
+{ CPUFUNC(op_d03b_5), 0, 53307 }, /* ADD */
+{ CPUFUNC(op_d03c_5), 0, 53308 }, /* ADD */
+{ CPUFUNC(op_d040_5), 0, 53312 }, /* ADD */
+{ CPUFUNC(op_d048_5), 0, 53320 }, /* ADD */
+{ CPUFUNC(op_d050_5), 0, 53328 }, /* ADD */
+{ CPUFUNC(op_d058_5), 0, 53336 }, /* ADD */
+{ CPUFUNC(op_d060_5), 0, 53344 }, /* ADD */
+{ CPUFUNC(op_d068_5), 0, 53352 }, /* ADD */
+{ CPUFUNC(op_d070_5), 0, 53360 }, /* ADD */
+{ CPUFUNC(op_d078_5), 0, 53368 }, /* ADD */
+{ CPUFUNC(op_d079_5), 0, 53369 }, /* ADD */
+{ CPUFUNC(op_d07a_5), 0, 53370 }, /* ADD */
+{ CPUFUNC(op_d07b_5), 0, 53371 }, /* ADD */
+{ CPUFUNC(op_d07c_5), 0, 53372 }, /* ADD */
+{ CPUFUNC(op_d080_5), 0, 53376 }, /* ADD */
+{ CPUFUNC(op_d088_5), 0, 53384 }, /* ADD */
+{ CPUFUNC(op_d090_5), 0, 53392 }, /* ADD */
+{ CPUFUNC(op_d098_5), 0, 53400 }, /* ADD */
+{ CPUFUNC(op_d0a0_5), 0, 53408 }, /* ADD */
+{ CPUFUNC(op_d0a8_5), 0, 53416 }, /* ADD */
+{ CPUFUNC(op_d0b0_5), 0, 53424 }, /* ADD */
+{ CPUFUNC(op_d0b8_5), 0, 53432 }, /* ADD */
+{ CPUFUNC(op_d0b9_5), 0, 53433 }, /* ADD */
+{ CPUFUNC(op_d0ba_5), 0, 53434 }, /* ADD */
+{ CPUFUNC(op_d0bb_5), 0, 53435 }, /* ADD */
+{ CPUFUNC(op_d0bc_5), 0, 53436 }, /* ADD */
+{ CPUFUNC(op_d0c0_5), 0, 53440 }, /* ADDA */
+{ CPUFUNC(op_d0c8_5), 0, 53448 }, /* ADDA */
+{ CPUFUNC(op_d0d0_5), 0, 53456 }, /* ADDA */
+{ CPUFUNC(op_d0d8_5), 0, 53464 }, /* ADDA */
+{ CPUFUNC(op_d0e0_5), 0, 53472 }, /* ADDA */
+{ CPUFUNC(op_d0e8_5), 0, 53480 }, /* ADDA */
+{ CPUFUNC(op_d0f0_5), 0, 53488 }, /* ADDA */
+{ CPUFUNC(op_d0f8_5), 0, 53496 }, /* ADDA */
+{ CPUFUNC(op_d0f9_5), 0, 53497 }, /* ADDA */
+{ CPUFUNC(op_d0fa_5), 0, 53498 }, /* ADDA */
+{ CPUFUNC(op_d0fb_5), 0, 53499 }, /* ADDA */
+{ CPUFUNC(op_d0fc_5), 0, 53500 }, /* ADDA */
+{ CPUFUNC(op_d100_5), 0, 53504 }, /* ADDX */
+{ CPUFUNC(op_d108_5), 0, 53512 }, /* ADDX */
+{ CPUFUNC(op_d110_5), 0, 53520 }, /* ADD */
+{ CPUFUNC(op_d118_5), 0, 53528 }, /* ADD */
+{ CPUFUNC(op_d120_5), 0, 53536 }, /* ADD */
+{ CPUFUNC(op_d128_5), 0, 53544 }, /* ADD */
+{ CPUFUNC(op_d130_5), 0, 53552 }, /* ADD */
+{ CPUFUNC(op_d138_5), 0, 53560 }, /* ADD */
+{ CPUFUNC(op_d139_5), 0, 53561 }, /* ADD */
+{ CPUFUNC(op_d140_5), 0, 53568 }, /* ADDX */
+{ CPUFUNC(op_d148_5), 0, 53576 }, /* ADDX */
+{ CPUFUNC(op_d150_5), 0, 53584 }, /* ADD */
+{ CPUFUNC(op_d158_5), 0, 53592 }, /* ADD */
+{ CPUFUNC(op_d160_5), 0, 53600 }, /* ADD */
+{ CPUFUNC(op_d168_5), 0, 53608 }, /* ADD */
+{ CPUFUNC(op_d170_5), 0, 53616 }, /* ADD */
+{ CPUFUNC(op_d178_5), 0, 53624 }, /* ADD */
+{ CPUFUNC(op_d179_5), 0, 53625 }, /* ADD */
+{ CPUFUNC(op_d180_5), 0, 53632 }, /* ADDX */
+{ CPUFUNC(op_d188_5), 0, 53640 }, /* ADDX */
+{ CPUFUNC(op_d190_5), 0, 53648 }, /* ADD */
+{ CPUFUNC(op_d198_5), 0, 53656 }, /* ADD */
+{ CPUFUNC(op_d1a0_5), 0, 53664 }, /* ADD */
+{ CPUFUNC(op_d1a8_5), 0, 53672 }, /* ADD */
+{ CPUFUNC(op_d1b0_5), 0, 53680 }, /* ADD */
+{ CPUFUNC(op_d1b8_5), 0, 53688 }, /* ADD */
+{ CPUFUNC(op_d1b9_5), 0, 53689 }, /* ADD */
+{ CPUFUNC(op_d1c0_5), 0, 53696 }, /* ADDA */
+{ CPUFUNC(op_d1c8_5), 0, 53704 }, /* ADDA */
+{ CPUFUNC(op_d1d0_5), 0, 53712 }, /* ADDA */
+{ CPUFUNC(op_d1d8_5), 0, 53720 }, /* ADDA */
+{ CPUFUNC(op_d1e0_5), 0, 53728 }, /* ADDA */
+{ CPUFUNC(op_d1e8_5), 0, 53736 }, /* ADDA */
+{ CPUFUNC(op_d1f0_5), 0, 53744 }, /* ADDA */
+{ CPUFUNC(op_d1f8_5), 0, 53752 }, /* ADDA */
+{ CPUFUNC(op_d1f9_5), 0, 53753 }, /* ADDA */
+{ CPUFUNC(op_d1fa_5), 0, 53754 }, /* ADDA */
+{ CPUFUNC(op_d1fb_5), 0, 53755 }, /* ADDA */
+{ CPUFUNC(op_d1fc_5), 0, 53756 }, /* ADDA */
+{ CPUFUNC(op_e000_5), 0, 57344 }, /* ASR */
+{ CPUFUNC(op_e008_5), 0, 57352 }, /* LSR */
+{ CPUFUNC(op_e010_5), 0, 57360 }, /* ROXR */
+{ CPUFUNC(op_e018_5), 0, 57368 }, /* ROR */
+{ CPUFUNC(op_e020_5), 0, 57376 }, /* ASR */
+{ CPUFUNC(op_e028_5), 0, 57384 }, /* LSR */
+{ CPUFUNC(op_e030_5), 0, 57392 }, /* ROXR */
+{ CPUFUNC(op_e038_5), 0, 57400 }, /* ROR */
+{ CPUFUNC(op_e040_5), 0, 57408 }, /* ASR */
+{ CPUFUNC(op_e048_5), 0, 57416 }, /* LSR */
+{ CPUFUNC(op_e050_5), 0, 57424 }, /* ROXR */
+{ CPUFUNC(op_e058_5), 0, 57432 }, /* ROR */
+{ CPUFUNC(op_e060_5), 0, 57440 }, /* ASR */
+{ CPUFUNC(op_e068_5), 0, 57448 }, /* LSR */
+{ CPUFUNC(op_e070_5), 0, 57456 }, /* ROXR */
+{ CPUFUNC(op_e078_5), 0, 57464 }, /* ROR */
+{ CPUFUNC(op_e080_5), 0, 57472 }, /* ASR */
+{ CPUFUNC(op_e088_5), 0, 57480 }, /* LSR */
+{ CPUFUNC(op_e090_5), 0, 57488 }, /* ROXR */
+{ CPUFUNC(op_e098_5), 0, 57496 }, /* ROR */
+{ CPUFUNC(op_e0a0_5), 0, 57504 }, /* ASR */
+{ CPUFUNC(op_e0a8_5), 0, 57512 }, /* LSR */
+{ CPUFUNC(op_e0b0_5), 0, 57520 }, /* ROXR */
+{ CPUFUNC(op_e0b8_5), 0, 57528 }, /* ROR */
+{ CPUFUNC(op_e0d0_5), 0, 57552 }, /* ASRW */
+{ CPUFUNC(op_e0d8_5), 0, 57560 }, /* ASRW */
+{ CPUFUNC(op_e0e0_5), 0, 57568 }, /* ASRW */
+{ CPUFUNC(op_e0e8_5), 0, 57576 }, /* ASRW */
+{ CPUFUNC(op_e0f0_5), 0, 57584 }, /* ASRW */
+{ CPUFUNC(op_e0f8_5), 0, 57592 }, /* ASRW */
+{ CPUFUNC(op_e0f9_5), 0, 57593 }, /* ASRW */
+{ CPUFUNC(op_e100_5), 0, 57600 }, /* ASL */
+{ CPUFUNC(op_e108_5), 0, 57608 }, /* LSL */
+{ CPUFUNC(op_e110_5), 0, 57616 }, /* ROXL */
+{ CPUFUNC(op_e118_5), 0, 57624 }, /* ROL */
+{ CPUFUNC(op_e120_5), 0, 57632 }, /* ASL */
+{ CPUFUNC(op_e128_5), 0, 57640 }, /* LSL */
+{ CPUFUNC(op_e130_5), 0, 57648 }, /* ROXL */
+{ CPUFUNC(op_e138_5), 0, 57656 }, /* ROL */
+{ CPUFUNC(op_e140_5), 0, 57664 }, /* ASL */
+{ CPUFUNC(op_e148_5), 0, 57672 }, /* LSL */
+{ CPUFUNC(op_e150_5), 0, 57680 }, /* ROXL */
+{ CPUFUNC(op_e158_5), 0, 57688 }, /* ROL */
+{ CPUFUNC(op_e160_5), 0, 57696 }, /* ASL */
+{ CPUFUNC(op_e168_5), 0, 57704 }, /* LSL */
+{ CPUFUNC(op_e170_5), 0, 57712 }, /* ROXL */
+{ CPUFUNC(op_e178_5), 0, 57720 }, /* ROL */
+{ CPUFUNC(op_e180_5), 0, 57728 }, /* ASL */
+{ CPUFUNC(op_e188_5), 0, 57736 }, /* LSL */
+{ CPUFUNC(op_e190_5), 0, 57744 }, /* ROXL */
+{ CPUFUNC(op_e198_5), 0, 57752 }, /* ROL */
+{ CPUFUNC(op_e1a0_5), 0, 57760 }, /* ASL */
+{ CPUFUNC(op_e1a8_5), 0, 57768 }, /* LSL */
+{ CPUFUNC(op_e1b0_5), 0, 57776 }, /* ROXL */
+{ CPUFUNC(op_e1b8_5), 0, 57784 }, /* ROL */
+{ CPUFUNC(op_e1d0_5), 0, 57808 }, /* ASLW */
+{ CPUFUNC(op_e1d8_5), 0, 57816 }, /* ASLW */
+{ CPUFUNC(op_e1e0_5), 0, 57824 }, /* ASLW */
+{ CPUFUNC(op_e1e8_5), 0, 57832 }, /* ASLW */
+{ CPUFUNC(op_e1f0_5), 0, 57840 }, /* ASLW */
+{ CPUFUNC(op_e1f8_5), 0, 57848 }, /* ASLW */
+{ CPUFUNC(op_e1f9_5), 0, 57849 }, /* ASLW */
+{ CPUFUNC(op_e2d0_5), 0, 58064 }, /* LSRW */
+{ CPUFUNC(op_e2d8_5), 0, 58072 }, /* LSRW */
+{ CPUFUNC(op_e2e0_5), 0, 58080 }, /* LSRW */
+{ CPUFUNC(op_e2e8_5), 0, 58088 }, /* LSRW */
+{ CPUFUNC(op_e2f0_5), 0, 58096 }, /* LSRW */
+{ CPUFUNC(op_e2f8_5), 0, 58104 }, /* LSRW */
+{ CPUFUNC(op_e2f9_5), 0, 58105 }, /* LSRW */
+{ CPUFUNC(op_e3d0_5), 0, 58320 }, /* LSLW */
+{ CPUFUNC(op_e3d8_5), 0, 58328 }, /* LSLW */
+{ CPUFUNC(op_e3e0_5), 0, 58336 }, /* LSLW */
+{ CPUFUNC(op_e3e8_5), 0, 58344 }, /* LSLW */
+{ CPUFUNC(op_e3f0_5), 0, 58352 }, /* LSLW */
+{ CPUFUNC(op_e3f8_5), 0, 58360 }, /* LSLW */
+{ CPUFUNC(op_e3f9_5), 0, 58361 }, /* LSLW */
+{ CPUFUNC(op_e4d0_5), 0, 58576 }, /* ROXRW */
+{ CPUFUNC(op_e4d8_5), 0, 58584 }, /* ROXRW */
+{ CPUFUNC(op_e4e0_5), 0, 58592 }, /* ROXRW */
+{ CPUFUNC(op_e4e8_5), 0, 58600 }, /* ROXRW */
+{ CPUFUNC(op_e4f0_5), 0, 58608 }, /* ROXRW */
+{ CPUFUNC(op_e4f8_5), 0, 58616 }, /* ROXRW */
+{ CPUFUNC(op_e4f9_5), 0, 58617 }, /* ROXRW */
+{ CPUFUNC(op_e5d0_5), 0, 58832 }, /* ROXLW */
+{ CPUFUNC(op_e5d8_5), 0, 58840 }, /* ROXLW */
+{ CPUFUNC(op_e5e0_5), 0, 58848 }, /* ROXLW */
+{ CPUFUNC(op_e5e8_5), 0, 58856 }, /* ROXLW */
+{ CPUFUNC(op_e5f0_5), 0, 58864 }, /* ROXLW */
+{ CPUFUNC(op_e5f8_5), 0, 58872 }, /* ROXLW */
+{ CPUFUNC(op_e5f9_5), 0, 58873 }, /* ROXLW */
+{ CPUFUNC(op_e6d0_5), 0, 59088 }, /* RORW */
+{ CPUFUNC(op_e6d8_5), 0, 59096 }, /* RORW */
+{ CPUFUNC(op_e6e0_5), 0, 59104 }, /* RORW */
+{ CPUFUNC(op_e6e8_5), 0, 59112 }, /* RORW */
+{ CPUFUNC(op_e6f0_5), 0, 59120 }, /* RORW */
+{ CPUFUNC(op_e6f8_5), 0, 59128 }, /* RORW */
+{ CPUFUNC(op_e6f9_5), 0, 59129 }, /* RORW */
+{ CPUFUNC(op_e7d0_5), 0, 59344 }, /* ROLW */
+{ CPUFUNC(op_e7d8_5), 0, 59352 }, /* ROLW */
+{ CPUFUNC(op_e7e0_5), 0, 59360 }, /* ROLW */
+{ CPUFUNC(op_e7e8_5), 0, 59368 }, /* ROLW */
+{ CPUFUNC(op_e7f0_5), 0, 59376 }, /* ROLW */
+{ CPUFUNC(op_e7f8_5), 0, 59384 }, /* ROLW */
+{ CPUFUNC(op_e7f9_5), 0, 59385 }, /* ROLW */
+{ 0, 0, 0 }};

diff --git a/src/m68000/obj/cputbl.h b/src/m68000/obj/cputbl.h
new file mode 100644 (file)
index 0000000..e5be860
--- /dev/null
+++ b/src/m68000/obj/cputbl.h
@@ -0,0 +1,6320 @@
+extern cpuop_func op_0_4_nf;
+extern cpuop_func op_0_4_ff;
+extern cpuop_func op_10_4_nf;
+extern cpuop_func op_10_4_ff;
+extern cpuop_func op_18_4_nf;
+extern cpuop_func op_18_4_ff;
+extern cpuop_func op_20_4_nf;
+extern cpuop_func op_20_4_ff;
+extern cpuop_func op_28_4_nf;
+extern cpuop_func op_28_4_ff;
+extern cpuop_func op_30_4_nf;
+extern cpuop_func op_30_4_ff;
+extern cpuop_func op_38_4_nf;
+extern cpuop_func op_38_4_ff;
+extern cpuop_func op_39_4_nf;
+extern cpuop_func op_39_4_ff;
+extern cpuop_func op_3c_4_nf;
+extern cpuop_func op_3c_4_ff;
+extern cpuop_func op_40_4_nf;
+extern cpuop_func op_40_4_ff;
+extern cpuop_func op_50_4_nf;
+extern cpuop_func op_50_4_ff;
+extern cpuop_func op_58_4_nf;
+extern cpuop_func op_58_4_ff;
+extern cpuop_func op_60_4_nf;
+extern cpuop_func op_60_4_ff;
+extern cpuop_func op_68_4_nf;
+extern cpuop_func op_68_4_ff;
+extern cpuop_func op_70_4_nf;
+extern cpuop_func op_70_4_ff;
+extern cpuop_func op_78_4_nf;
+extern cpuop_func op_78_4_ff;
+extern cpuop_func op_79_4_nf;
+extern cpuop_func op_79_4_ff;
+extern cpuop_func op_7c_4_nf;
+extern cpuop_func op_7c_4_ff;
+extern cpuop_func op_80_4_nf;
+extern cpuop_func op_80_4_ff;
+extern cpuop_func op_90_4_nf;
+extern cpuop_func op_90_4_ff;
+extern cpuop_func op_98_4_nf;
+extern cpuop_func op_98_4_ff;
+extern cpuop_func op_a0_4_nf;
+extern cpuop_func op_a0_4_ff;
+extern cpuop_func op_a8_4_nf;
+extern cpuop_func op_a8_4_ff;
+extern cpuop_func op_b0_4_nf;
+extern cpuop_func op_b0_4_ff;
+extern cpuop_func op_b8_4_nf;
+extern cpuop_func op_b8_4_ff;
+extern cpuop_func op_b9_4_nf;
+extern cpuop_func op_b9_4_ff;
+extern cpuop_func op_100_4_nf;
+extern cpuop_func op_100_4_ff;
+extern cpuop_func op_108_4_nf;
+extern cpuop_func op_108_4_ff;
+extern cpuop_func op_110_4_nf;
+extern cpuop_func op_110_4_ff;
+extern cpuop_func op_118_4_nf;
+extern cpuop_func op_118_4_ff;
+extern cpuop_func op_120_4_nf;
+extern cpuop_func op_120_4_ff;
+extern cpuop_func op_128_4_nf;
+extern cpuop_func op_128_4_ff;
+extern cpuop_func op_130_4_nf;
+extern cpuop_func op_130_4_ff;
+extern cpuop_func op_138_4_nf;
+extern cpuop_func op_138_4_ff;
+extern cpuop_func op_139_4_nf;
+extern cpuop_func op_139_4_ff;
+extern cpuop_func op_13a_4_nf;
+extern cpuop_func op_13a_4_ff;
+extern cpuop_func op_13b_4_nf;
+extern cpuop_func op_13b_4_ff;
+extern cpuop_func op_13c_4_nf;
+extern cpuop_func op_13c_4_ff;
+extern cpuop_func op_140_4_nf;
+extern cpuop_func op_140_4_ff;
+extern cpuop_func op_148_4_nf;
+extern cpuop_func op_148_4_ff;
+extern cpuop_func op_150_4_nf;
+extern cpuop_func op_150_4_ff;
+extern cpuop_func op_158_4_nf;
+extern cpuop_func op_158_4_ff;
+extern cpuop_func op_160_4_nf;
+extern cpuop_func op_160_4_ff;
+extern cpuop_func op_168_4_nf;
+extern cpuop_func op_168_4_ff;
+extern cpuop_func op_170_4_nf;
+extern cpuop_func op_170_4_ff;
+extern cpuop_func op_178_4_nf;
+extern cpuop_func op_178_4_ff;
+extern cpuop_func op_179_4_nf;
+extern cpuop_func op_179_4_ff;
+extern cpuop_func op_17a_4_nf;
+extern cpuop_func op_17a_4_ff;
+extern cpuop_func op_17b_4_nf;
+extern cpuop_func op_17b_4_ff;
+extern cpuop_func op_180_4_nf;
+extern cpuop_func op_180_4_ff;
+extern cpuop_func op_188_4_nf;
+extern cpuop_func op_188_4_ff;
+extern cpuop_func op_190_4_nf;
+extern cpuop_func op_190_4_ff;
+extern cpuop_func op_198_4_nf;
+extern cpuop_func op_198_4_ff;
+extern cpuop_func op_1a0_4_nf;
+extern cpuop_func op_1a0_4_ff;
+extern cpuop_func op_1a8_4_nf;
+extern cpuop_func op_1a8_4_ff;
+extern cpuop_func op_1b0_4_nf;
+extern cpuop_func op_1b0_4_ff;
+extern cpuop_func op_1b8_4_nf;
+extern cpuop_func op_1b8_4_ff;
+extern cpuop_func op_1b9_4_nf;
+extern cpuop_func op_1b9_4_ff;
+extern cpuop_func op_1ba_4_nf;
+extern cpuop_func op_1ba_4_ff;
+extern cpuop_func op_1bb_4_nf;
+extern cpuop_func op_1bb_4_ff;
+extern cpuop_func op_1c0_4_nf;
+extern cpuop_func op_1c0_4_ff;
+extern cpuop_func op_1c8_4_nf;
+extern cpuop_func op_1c8_4_ff;
+extern cpuop_func op_1d0_4_nf;
+extern cpuop_func op_1d0_4_ff;
+extern cpuop_func op_1d8_4_nf;
+extern cpuop_func op_1d8_4_ff;
+extern cpuop_func op_1e0_4_nf;
+extern cpuop_func op_1e0_4_ff;
+extern cpuop_func op_1e8_4_nf;
+extern cpuop_func op_1e8_4_ff;
+extern cpuop_func op_1f0_4_nf;
+extern cpuop_func op_1f0_4_ff;
+extern cpuop_func op_1f8_4_nf;
+extern cpuop_func op_1f8_4_ff;
+extern cpuop_func op_1f9_4_nf;
+extern cpuop_func op_1f9_4_ff;
+extern cpuop_func op_1fa_4_nf;
+extern cpuop_func op_1fa_4_ff;
+extern cpuop_func op_1fb_4_nf;
+extern cpuop_func op_1fb_4_ff;
+extern cpuop_func op_200_4_nf;
+extern cpuop_func op_200_4_ff;
+extern cpuop_func op_210_4_nf;
+extern cpuop_func op_210_4_ff;
+extern cpuop_func op_218_4_nf;
+extern cpuop_func op_218_4_ff;
+extern cpuop_func op_220_4_nf;
+extern cpuop_func op_220_4_ff;
+extern cpuop_func op_228_4_nf;
+extern cpuop_func op_228_4_ff;
+extern cpuop_func op_230_4_nf;
+extern cpuop_func op_230_4_ff;
+extern cpuop_func op_238_4_nf;
+extern cpuop_func op_238_4_ff;
+extern cpuop_func op_239_4_nf;
+extern cpuop_func op_239_4_ff;
+extern cpuop_func op_23c_4_nf;
+extern cpuop_func op_23c_4_ff;
+extern cpuop_func op_240_4_nf;
+extern cpuop_func op_240_4_ff;
+extern cpuop_func op_250_4_nf;
+extern cpuop_func op_250_4_ff;
+extern cpuop_func op_258_4_nf;
+extern cpuop_func op_258_4_ff;
+extern cpuop_func op_260_4_nf;
+extern cpuop_func op_260_4_ff;
+extern cpuop_func op_268_4_nf;
+extern cpuop_func op_268_4_ff;
+extern cpuop_func op_270_4_nf;
+extern cpuop_func op_270_4_ff;
+extern cpuop_func op_278_4_nf;
+extern cpuop_func op_278_4_ff;
+extern cpuop_func op_279_4_nf;
+extern cpuop_func op_279_4_ff;
+extern cpuop_func op_27c_4_nf;
+extern cpuop_func op_27c_4_ff;
+extern cpuop_func op_280_4_nf;
+extern cpuop_func op_280_4_ff;
+extern cpuop_func op_290_4_nf;
+extern cpuop_func op_290_4_ff;
+extern cpuop_func op_298_4_nf;
+extern cpuop_func op_298_4_ff;
+extern cpuop_func op_2a0_4_nf;
+extern cpuop_func op_2a0_4_ff;
+extern cpuop_func op_2a8_4_nf;
+extern cpuop_func op_2a8_4_ff;
+extern cpuop_func op_2b0_4_nf;
+extern cpuop_func op_2b0_4_ff;
+extern cpuop_func op_2b8_4_nf;
+extern cpuop_func op_2b8_4_ff;
+extern cpuop_func op_2b9_4_nf;
+extern cpuop_func op_2b9_4_ff;
+extern cpuop_func op_400_4_nf;
+extern cpuop_func op_400_4_ff;
+extern cpuop_func op_410_4_nf;
+extern cpuop_func op_410_4_ff;
+extern cpuop_func op_418_4_nf;
+extern cpuop_func op_418_4_ff;
+extern cpuop_func op_420_4_nf;
+extern cpuop_func op_420_4_ff;
+extern cpuop_func op_428_4_nf;
+extern cpuop_func op_428_4_ff;
+extern cpuop_func op_430_4_nf;
+extern cpuop_func op_430_4_ff;
+extern cpuop_func op_438_4_nf;
+extern cpuop_func op_438_4_ff;
+extern cpuop_func op_439_4_nf;
+extern cpuop_func op_439_4_ff;
+extern cpuop_func op_440_4_nf;
+extern cpuop_func op_440_4_ff;
+extern cpuop_func op_450_4_nf;
+extern cpuop_func op_450_4_ff;
+extern cpuop_func op_458_4_nf;
+extern cpuop_func op_458_4_ff;
+extern cpuop_func op_460_4_nf;
+extern cpuop_func op_460_4_ff;
+extern cpuop_func op_468_4_nf;
+extern cpuop_func op_468_4_ff;
+extern cpuop_func op_470_4_nf;
+extern cpuop_func op_470_4_ff;
+extern cpuop_func op_478_4_nf;
+extern cpuop_func op_478_4_ff;
+extern cpuop_func op_479_4_nf;
+extern cpuop_func op_479_4_ff;
+extern cpuop_func op_480_4_nf;
+extern cpuop_func op_480_4_ff;
+extern cpuop_func op_490_4_nf;
+extern cpuop_func op_490_4_ff;
+extern cpuop_func op_498_4_nf;
+extern cpuop_func op_498_4_ff;
+extern cpuop_func op_4a0_4_nf;
+extern cpuop_func op_4a0_4_ff;
+extern cpuop_func op_4a8_4_nf;
+extern cpuop_func op_4a8_4_ff;
+extern cpuop_func op_4b0_4_nf;
+extern cpuop_func op_4b0_4_ff;
+extern cpuop_func op_4b8_4_nf;
+extern cpuop_func op_4b8_4_ff;
+extern cpuop_func op_4b9_4_nf;
+extern cpuop_func op_4b9_4_ff;
+extern cpuop_func op_600_4_nf;
+extern cpuop_func op_600_4_ff;
+extern cpuop_func op_610_4_nf;
+extern cpuop_func op_610_4_ff;
+extern cpuop_func op_618_4_nf;
+extern cpuop_func op_618_4_ff;
+extern cpuop_func op_620_4_nf;
+extern cpuop_func op_620_4_ff;
+extern cpuop_func op_628_4_nf;
+extern cpuop_func op_628_4_ff;
+extern cpuop_func op_630_4_nf;
+extern cpuop_func op_630_4_ff;
+extern cpuop_func op_638_4_nf;
+extern cpuop_func op_638_4_ff;
+extern cpuop_func op_639_4_nf;
+extern cpuop_func op_639_4_ff;
+extern cpuop_func op_640_4_nf;
+extern cpuop_func op_640_4_ff;
+extern cpuop_func op_650_4_nf;
+extern cpuop_func op_650_4_ff;
+extern cpuop_func op_658_4_nf;
+extern cpuop_func op_658_4_ff;
+extern cpuop_func op_660_4_nf;
+extern cpuop_func op_660_4_ff;
+extern cpuop_func op_668_4_nf;
+extern cpuop_func op_668_4_ff;
+extern cpuop_func op_670_4_nf;
+extern cpuop_func op_670_4_ff;
+extern cpuop_func op_678_4_nf;
+extern cpuop_func op_678_4_ff;
+extern cpuop_func op_679_4_nf;
+extern cpuop_func op_679_4_ff;
+extern cpuop_func op_680_4_nf;
+extern cpuop_func op_680_4_ff;
+extern cpuop_func op_690_4_nf;
+extern cpuop_func op_690_4_ff;
+extern cpuop_func op_698_4_nf;
+extern cpuop_func op_698_4_ff;
+extern cpuop_func op_6a0_4_nf;
+extern cpuop_func op_6a0_4_ff;
+extern cpuop_func op_6a8_4_nf;
+extern cpuop_func op_6a8_4_ff;
+extern cpuop_func op_6b0_4_nf;
+extern cpuop_func op_6b0_4_ff;
+extern cpuop_func op_6b8_4_nf;
+extern cpuop_func op_6b8_4_ff;
+extern cpuop_func op_6b9_4_nf;
+extern cpuop_func op_6b9_4_ff;
+extern cpuop_func op_800_4_nf;
+extern cpuop_func op_800_4_ff;
+extern cpuop_func op_810_4_nf;
+extern cpuop_func op_810_4_ff;
+extern cpuop_func op_818_4_nf;
+extern cpuop_func op_818_4_ff;
+extern cpuop_func op_820_4_nf;
+extern cpuop_func op_820_4_ff;
+extern cpuop_func op_828_4_nf;
+extern cpuop_func op_828_4_ff;
+extern cpuop_func op_830_4_nf;
+extern cpuop_func op_830_4_ff;
+extern cpuop_func op_838_4_nf;
+extern cpuop_func op_838_4_ff;
+extern cpuop_func op_839_4_nf;
+extern cpuop_func op_839_4_ff;
+extern cpuop_func op_83a_4_nf;
+extern cpuop_func op_83a_4_ff;
+extern cpuop_func op_83b_4_nf;
+extern cpuop_func op_83b_4_ff;
+extern cpuop_func op_83c_4_nf;
+extern cpuop_func op_83c_4_ff;
+extern cpuop_func op_840_4_nf;
+extern cpuop_func op_840_4_ff;
+extern cpuop_func op_850_4_nf;
+extern cpuop_func op_850_4_ff;
+extern cpuop_func op_858_4_nf;
+extern cpuop_func op_858_4_ff;
+extern cpuop_func op_860_4_nf;
+extern cpuop_func op_860_4_ff;
+extern cpuop_func op_868_4_nf;
+extern cpuop_func op_868_4_ff;
+extern cpuop_func op_870_4_nf;
+extern cpuop_func op_870_4_ff;
+extern cpuop_func op_878_4_nf;
+extern cpuop_func op_878_4_ff;
+extern cpuop_func op_879_4_nf;
+extern cpuop_func op_879_4_ff;
+extern cpuop_func op_87a_4_nf;
+extern cpuop_func op_87a_4_ff;
+extern cpuop_func op_87b_4_nf;
+extern cpuop_func op_87b_4_ff;
+extern cpuop_func op_880_4_nf;
+extern cpuop_func op_880_4_ff;
+extern cpuop_func op_890_4_nf;
+extern cpuop_func op_890_4_ff;
+extern cpuop_func op_898_4_nf;
+extern cpuop_func op_898_4_ff;
+extern cpuop_func op_8a0_4_nf;
+extern cpuop_func op_8a0_4_ff;
+extern cpuop_func op_8a8_4_nf;
+extern cpuop_func op_8a8_4_ff;
+extern cpuop_func op_8b0_4_nf;
+extern cpuop_func op_8b0_4_ff;
+extern cpuop_func op_8b8_4_nf;
+extern cpuop_func op_8b8_4_ff;
+extern cpuop_func op_8b9_4_nf;
+extern cpuop_func op_8b9_4_ff;
+extern cpuop_func op_8ba_4_nf;
+extern cpuop_func op_8ba_4_ff;
+extern cpuop_func op_8bb_4_nf;
+extern cpuop_func op_8bb_4_ff;
+extern cpuop_func op_8c0_4_nf;
+extern cpuop_func op_8c0_4_ff;
+extern cpuop_func op_8d0_4_nf;
+extern cpuop_func op_8d0_4_ff;
+extern cpuop_func op_8d8_4_nf;
+extern cpuop_func op_8d8_4_ff;
+extern cpuop_func op_8e0_4_nf;
+extern cpuop_func op_8e0_4_ff;
+extern cpuop_func op_8e8_4_nf;
+extern cpuop_func op_8e8_4_ff;
+extern cpuop_func op_8f0_4_nf;
+extern cpuop_func op_8f0_4_ff;
+extern cpuop_func op_8f8_4_nf;
+extern cpuop_func op_8f8_4_ff;
+extern cpuop_func op_8f9_4_nf;
+extern cpuop_func op_8f9_4_ff;
+extern cpuop_func op_8fa_4_nf;
+extern cpuop_func op_8fa_4_ff;
+extern cpuop_func op_8fb_4_nf;
+extern cpuop_func op_8fb_4_ff;
+extern cpuop_func op_a00_4_nf;
+extern cpuop_func op_a00_4_ff;
+extern cpuop_func op_a10_4_nf;
+extern cpuop_func op_a10_4_ff;
+extern cpuop_func op_a18_4_nf;
+extern cpuop_func op_a18_4_ff;
+extern cpuop_func op_a20_4_nf;
+extern cpuop_func op_a20_4_ff;
+extern cpuop_func op_a28_4_nf;
+extern cpuop_func op_a28_4_ff;
+extern cpuop_func op_a30_4_nf;
+extern cpuop_func op_a30_4_ff;
+extern cpuop_func op_a38_4_nf;
+extern cpuop_func op_a38_4_ff;
+extern cpuop_func op_a39_4_nf;
+extern cpuop_func op_a39_4_ff;
+extern cpuop_func op_a3c_4_nf;
+extern cpuop_func op_a3c_4_ff;
+extern cpuop_func op_a40_4_nf;
+extern cpuop_func op_a40_4_ff;
+extern cpuop_func op_a50_4_nf;
+extern cpuop_func op_a50_4_ff;
+extern cpuop_func op_a58_4_nf;
+extern cpuop_func op_a58_4_ff;
+extern cpuop_func op_a60_4_nf;
+extern cpuop_func op_a60_4_ff;
+extern cpuop_func op_a68_4_nf;
+extern cpuop_func op_a68_4_ff;
+extern cpuop_func op_a70_4_nf;
+extern cpuop_func op_a70_4_ff;
+extern cpuop_func op_a78_4_nf;
+extern cpuop_func op_a78_4_ff;
+extern cpuop_func op_a79_4_nf;
+extern cpuop_func op_a79_4_ff;
+extern cpuop_func op_a7c_4_nf;
+extern cpuop_func op_a7c_4_ff;
+extern cpuop_func op_a80_4_nf;
+extern cpuop_func op_a80_4_ff;
+extern cpuop_func op_a90_4_nf;
+extern cpuop_func op_a90_4_ff;
+extern cpuop_func op_a98_4_nf;
+extern cpuop_func op_a98_4_ff;
+extern cpuop_func op_aa0_4_nf;
+extern cpuop_func op_aa0_4_ff;
+extern cpuop_func op_aa8_4_nf;
+extern cpuop_func op_aa8_4_ff;
+extern cpuop_func op_ab0_4_nf;
+extern cpuop_func op_ab0_4_ff;
+extern cpuop_func op_ab8_4_nf;
+extern cpuop_func op_ab8_4_ff;
+extern cpuop_func op_ab9_4_nf;
+extern cpuop_func op_ab9_4_ff;
+extern cpuop_func op_c00_4_nf;
+extern cpuop_func op_c00_4_ff;
+extern cpuop_func op_c10_4_nf;
+extern cpuop_func op_c10_4_ff;
+extern cpuop_func op_c18_4_nf;
+extern cpuop_func op_c18_4_ff;
+extern cpuop_func op_c20_4_nf;
+extern cpuop_func op_c20_4_ff;
+extern cpuop_func op_c28_4_nf;
+extern cpuop_func op_c28_4_ff;
+extern cpuop_func op_c30_4_nf;
+extern cpuop_func op_c30_4_ff;
+extern cpuop_func op_c38_4_nf;
+extern cpuop_func op_c38_4_ff;
+extern cpuop_func op_c39_4_nf;
+extern cpuop_func op_c39_4_ff;
+extern cpuop_func op_c3a_4_nf;
+extern cpuop_func op_c3a_4_ff;
+extern cpuop_func op_c3b_4_nf;
+extern cpuop_func op_c3b_4_ff;
+extern cpuop_func op_c40_4_nf;
+extern cpuop_func op_c40_4_ff;
+extern cpuop_func op_c50_4_nf;
+extern cpuop_func op_c50_4_ff;
+extern cpuop_func op_c58_4_nf;
+extern cpuop_func op_c58_4_ff;
+extern cpuop_func op_c60_4_nf;
+extern cpuop_func op_c60_4_ff;
+extern cpuop_func op_c68_4_nf;
+extern cpuop_func op_c68_4_ff;
+extern cpuop_func op_c70_4_nf;
+extern cpuop_func op_c70_4_ff;
+extern cpuop_func op_c78_4_nf;
+extern cpuop_func op_c78_4_ff;
+extern cpuop_func op_c79_4_nf;
+extern cpuop_func op_c79_4_ff;
+extern cpuop_func op_c7a_4_nf;
+extern cpuop_func op_c7a_4_ff;
+extern cpuop_func op_c7b_4_nf;
+extern cpuop_func op_c7b_4_ff;
+extern cpuop_func op_c80_4_nf;
+extern cpuop_func op_c80_4_ff;
+extern cpuop_func op_c90_4_nf;
+extern cpuop_func op_c90_4_ff;
+extern cpuop_func op_c98_4_nf;
+extern cpuop_func op_c98_4_ff;
+extern cpuop_func op_ca0_4_nf;
+extern cpuop_func op_ca0_4_ff;
+extern cpuop_func op_ca8_4_nf;
+extern cpuop_func op_ca8_4_ff;
+extern cpuop_func op_cb0_4_nf;
+extern cpuop_func op_cb0_4_ff;
+extern cpuop_func op_cb8_4_nf;
+extern cpuop_func op_cb8_4_ff;
+extern cpuop_func op_cb9_4_nf;
+extern cpuop_func op_cb9_4_ff;
+extern cpuop_func op_cba_4_nf;
+extern cpuop_func op_cba_4_ff;
+extern cpuop_func op_cbb_4_nf;
+extern cpuop_func op_cbb_4_ff;
+extern cpuop_func op_1000_4_nf;
+extern cpuop_func op_1000_4_ff;
+extern cpuop_func op_1008_4_nf;
+extern cpuop_func op_1008_4_ff;
+extern cpuop_func op_1010_4_nf;
+extern cpuop_func op_1010_4_ff;
+extern cpuop_func op_1018_4_nf;
+extern cpuop_func op_1018_4_ff;
+extern cpuop_func op_1020_4_nf;
+extern cpuop_func op_1020_4_ff;
+extern cpuop_func op_1028_4_nf;
+extern cpuop_func op_1028_4_ff;
+extern cpuop_func op_1030_4_nf;
+extern cpuop_func op_1030_4_ff;
+extern cpuop_func op_1038_4_nf;
+extern cpuop_func op_1038_4_ff;
+extern cpuop_func op_1039_4_nf;
+extern cpuop_func op_1039_4_ff;
+extern cpuop_func op_103a_4_nf;
+extern cpuop_func op_103a_4_ff;
+extern cpuop_func op_103b_4_nf;
+extern cpuop_func op_103b_4_ff;
+extern cpuop_func op_103c_4_nf;
+extern cpuop_func op_103c_4_ff;
+extern cpuop_func op_1080_4_nf;
+extern cpuop_func op_1080_4_ff;
+extern cpuop_func op_1088_4_nf;
+extern cpuop_func op_1088_4_ff;
+extern cpuop_func op_1090_4_nf;
+extern cpuop_func op_1090_4_ff;
+extern cpuop_func op_1098_4_nf;
+extern cpuop_func op_1098_4_ff;
+extern cpuop_func op_10a0_4_nf;
+extern cpuop_func op_10a0_4_ff;
+extern cpuop_func op_10a8_4_nf;
+extern cpuop_func op_10a8_4_ff;
+extern cpuop_func op_10b0_4_nf;
+extern cpuop_func op_10b0_4_ff;
+extern cpuop_func op_10b8_4_nf;
+extern cpuop_func op_10b8_4_ff;
+extern cpuop_func op_10b9_4_nf;
+extern cpuop_func op_10b9_4_ff;
+extern cpuop_func op_10ba_4_nf;
+extern cpuop_func op_10ba_4_ff;
+extern cpuop_func op_10bb_4_nf;
+extern cpuop_func op_10bb_4_ff;
+extern cpuop_func op_10bc_4_nf;
+extern cpuop_func op_10bc_4_ff;
+extern cpuop_func op_10c0_4_nf;
+extern cpuop_func op_10c0_4_ff;
+extern cpuop_func op_10c8_4_nf;
+extern cpuop_func op_10c8_4_ff;
+extern cpuop_func op_10d0_4_nf;
+extern cpuop_func op_10d0_4_ff;
+extern cpuop_func op_10d8_4_nf;
+extern cpuop_func op_10d8_4_ff;
+extern cpuop_func op_10e0_4_nf;
+extern cpuop_func op_10e0_4_ff;
+extern cpuop_func op_10e8_4_nf;
+extern cpuop_func op_10e8_4_ff;
+extern cpuop_func op_10f0_4_nf;
+extern cpuop_func op_10f0_4_ff;
+extern cpuop_func op_10f8_4_nf;
+extern cpuop_func op_10f8_4_ff;
+extern cpuop_func op_10f9_4_nf;
+extern cpuop_func op_10f9_4_ff;
+extern cpuop_func op_10fa_4_nf;
+extern cpuop_func op_10fa_4_ff;
+extern cpuop_func op_10fb_4_nf;
+extern cpuop_func op_10fb_4_ff;
+extern cpuop_func op_10fc_4_nf;
+extern cpuop_func op_10fc_4_ff;
+extern cpuop_func op_1100_4_nf;
+extern cpuop_func op_1100_4_ff;
+extern cpuop_func op_1108_4_nf;
+extern cpuop_func op_1108_4_ff;
+extern cpuop_func op_1110_4_nf;
+extern cpuop_func op_1110_4_ff;
+extern cpuop_func op_1118_4_nf;
+extern cpuop_func op_1118_4_ff;
+extern cpuop_func op_1120_4_nf;
+extern cpuop_func op_1120_4_ff;
+extern cpuop_func op_1128_4_nf;
+extern cpuop_func op_1128_4_ff;
+extern cpuop_func op_1130_4_nf;
+extern cpuop_func op_1130_4_ff;
+extern cpuop_func op_1138_4_nf;
+extern cpuop_func op_1138_4_ff;
+extern cpuop_func op_1139_4_nf;
+extern cpuop_func op_1139_4_ff;
+extern cpuop_func op_113a_4_nf;
+extern cpuop_func op_113a_4_ff;
+extern cpuop_func op_113b_4_nf;
+extern cpuop_func op_113b_4_ff;
+extern cpuop_func op_113c_4_nf;
+extern cpuop_func op_113c_4_ff;
+extern cpuop_func op_1140_4_nf;
+extern cpuop_func op_1140_4_ff;
+extern cpuop_func op_1148_4_nf;
+extern cpuop_func op_1148_4_ff;
+extern cpuop_func op_1150_4_nf;
+extern cpuop_func op_1150_4_ff;
+extern cpuop_func op_1158_4_nf;
+extern cpuop_func op_1158_4_ff;
+extern cpuop_func op_1160_4_nf;
+extern cpuop_func op_1160_4_ff;
+extern cpuop_func op_1168_4_nf;
+extern cpuop_func op_1168_4_ff;
+extern cpuop_func op_1170_4_nf;
+extern cpuop_func op_1170_4_ff;
+extern cpuop_func op_1178_4_nf;
+extern cpuop_func op_1178_4_ff;
+extern cpuop_func op_1179_4_nf;
+extern cpuop_func op_1179_4_ff;
+extern cpuop_func op_117a_4_nf;
+extern cpuop_func op_117a_4_ff;
+extern cpuop_func op_117b_4_nf;
+extern cpuop_func op_117b_4_ff;
+extern cpuop_func op_117c_4_nf;
+extern cpuop_func op_117c_4_ff;
+extern cpuop_func op_1180_4_nf;
+extern cpuop_func op_1180_4_ff;
+extern cpuop_func op_1188_4_nf;
+extern cpuop_func op_1188_4_ff;
+extern cpuop_func op_1190_4_nf;
+extern cpuop_func op_1190_4_ff;
+extern cpuop_func op_1198_4_nf;
+extern cpuop_func op_1198_4_ff;
+extern cpuop_func op_11a0_4_nf;
+extern cpuop_func op_11a0_4_ff;
+extern cpuop_func op_11a8_4_nf;
+extern cpuop_func op_11a8_4_ff;
+extern cpuop_func op_11b0_4_nf;
+extern cpuop_func op_11b0_4_ff;
+extern cpuop_func op_11b8_4_nf;
+extern cpuop_func op_11b8_4_ff;
+extern cpuop_func op_11b9_4_nf;
+extern cpuop_func op_11b9_4_ff;
+extern cpuop_func op_11ba_4_nf;
+extern cpuop_func op_11ba_4_ff;
+extern cpuop_func op_11bb_4_nf;
+extern cpuop_func op_11bb_4_ff;
+extern cpuop_func op_11bc_4_nf;
+extern cpuop_func op_11bc_4_ff;
+extern cpuop_func op_11c0_4_nf;
+extern cpuop_func op_11c0_4_ff;
+extern cpuop_func op_11c8_4_nf;
+extern cpuop_func op_11c8_4_ff;
+extern cpuop_func op_11d0_4_nf;
+extern cpuop_func op_11d0_4_ff;
+extern cpuop_func op_11d8_4_nf;
+extern cpuop_func op_11d8_4_ff;
+extern cpuop_func op_11e0_4_nf;
+extern cpuop_func op_11e0_4_ff;
+extern cpuop_func op_11e8_4_nf;
+extern cpuop_func op_11e8_4_ff;
+extern cpuop_func op_11f0_4_nf;
+extern cpuop_func op_11f0_4_ff;
+extern cpuop_func op_11f8_4_nf;
+extern cpuop_func op_11f8_4_ff;
+extern cpuop_func op_11f9_4_nf;
+extern cpuop_func op_11f9_4_ff;
+extern cpuop_func op_11fa_4_nf;
+extern cpuop_func op_11fa_4_ff;
+extern cpuop_func op_11fb_4_nf;
+extern cpuop_func op_11fb_4_ff;
+extern cpuop_func op_11fc_4_nf;
+extern cpuop_func op_11fc_4_ff;
+extern cpuop_func op_13c0_4_nf;
+extern cpuop_func op_13c0_4_ff;
+extern cpuop_func op_13c8_4_nf;
+extern cpuop_func op_13c8_4_ff;
+extern cpuop_func op_13d0_4_nf;
+extern cpuop_func op_13d0_4_ff;
+extern cpuop_func op_13d8_4_nf;
+extern cpuop_func op_13d8_4_ff;
+extern cpuop_func op_13e0_4_nf;
+extern cpuop_func op_13e0_4_ff;
+extern cpuop_func op_13e8_4_nf;
+extern cpuop_func op_13e8_4_ff;
+extern cpuop_func op_13f0_4_nf;
+extern cpuop_func op_13f0_4_ff;
+extern cpuop_func op_13f8_4_nf;
+extern cpuop_func op_13f8_4_ff;
+extern cpuop_func op_13f9_4_nf;
+extern cpuop_func op_13f9_4_ff;
+extern cpuop_func op_13fa_4_nf;
+extern cpuop_func op_13fa_4_ff;
+extern cpuop_func op_13fb_4_nf;
+extern cpuop_func op_13fb_4_ff;
+extern cpuop_func op_13fc_4_nf;
+extern cpuop_func op_13fc_4_ff;
+extern cpuop_func op_2000_4_nf;
+extern cpuop_func op_2000_4_ff;
+extern cpuop_func op_2008_4_nf;
+extern cpuop_func op_2008_4_ff;
+extern cpuop_func op_2010_4_nf;
+extern cpuop_func op_2010_4_ff;
+extern cpuop_func op_2018_4_nf;
+extern cpuop_func op_2018_4_ff;
+extern cpuop_func op_2020_4_nf;
+extern cpuop_func op_2020_4_ff;
+extern cpuop_func op_2028_4_nf;
+extern cpuop_func op_2028_4_ff;
+extern cpuop_func op_2030_4_nf;
+extern cpuop_func op_2030_4_ff;
+extern cpuop_func op_2038_4_nf;
+extern cpuop_func op_2038_4_ff;
+extern cpuop_func op_2039_4_nf;
+extern cpuop_func op_2039_4_ff;
+extern cpuop_func op_203a_4_nf;
+extern cpuop_func op_203a_4_ff;
+extern cpuop_func op_203b_4_nf;
+extern cpuop_func op_203b_4_ff;
+extern cpuop_func op_203c_4_nf;
+extern cpuop_func op_203c_4_ff;
+extern cpuop_func op_2040_4_nf;
+extern cpuop_func op_2040_4_ff;
+extern cpuop_func op_2048_4_nf;
+extern cpuop_func op_2048_4_ff;
+extern cpuop_func op_2050_4_nf;
+extern cpuop_func op_2050_4_ff;
+extern cpuop_func op_2058_4_nf;
+extern cpuop_func op_2058_4_ff;
+extern cpuop_func op_2060_4_nf;
+extern cpuop_func op_2060_4_ff;
+extern cpuop_func op_2068_4_nf;
+extern cpuop_func op_2068_4_ff;
+extern cpuop_func op_2070_4_nf;
+extern cpuop_func op_2070_4_ff;
+extern cpuop_func op_2078_4_nf;
+extern cpuop_func op_2078_4_ff;
+extern cpuop_func op_2079_4_nf;
+extern cpuop_func op_2079_4_ff;
+extern cpuop_func op_207a_4_nf;
+extern cpuop_func op_207a_4_ff;
+extern cpuop_func op_207b_4_nf;
+extern cpuop_func op_207b_4_ff;
+extern cpuop_func op_207c_4_nf;
+extern cpuop_func op_207c_4_ff;
+extern cpuop_func op_2080_4_nf;
+extern cpuop_func op_2080_4_ff;
+extern cpuop_func op_2088_4_nf;
+extern cpuop_func op_2088_4_ff;
+extern cpuop_func op_2090_4_nf;
+extern cpuop_func op_2090_4_ff;
+extern cpuop_func op_2098_4_nf;
+extern cpuop_func op_2098_4_ff;
+extern cpuop_func op_20a0_4_nf;
+extern cpuop_func op_20a0_4_ff;
+extern cpuop_func op_20a8_4_nf;
+extern cpuop_func op_20a8_4_ff;
+extern cpuop_func op_20b0_4_nf;
+extern cpuop_func op_20b0_4_ff;
+extern cpuop_func op_20b8_4_nf;
+extern cpuop_func op_20b8_4_ff;
+extern cpuop_func op_20b9_4_nf;
+extern cpuop_func op_20b9_4_ff;
+extern cpuop_func op_20ba_4_nf;
+extern cpuop_func op_20ba_4_ff;
+extern cpuop_func op_20bb_4_nf;
+extern cpuop_func op_20bb_4_ff;
+extern cpuop_func op_20bc_4_nf;
+extern cpuop_func op_20bc_4_ff;
+extern cpuop_func op_20c0_4_nf;
+extern cpuop_func op_20c0_4_ff;
+extern cpuop_func op_20c8_4_nf;
+extern cpuop_func op_20c8_4_ff;
+extern cpuop_func op_20d0_4_nf;
+extern cpuop_func op_20d0_4_ff;
+extern cpuop_func op_20d8_4_nf;
+extern cpuop_func op_20d8_4_ff;
+extern cpuop_func op_20e0_4_nf;
+extern cpuop_func op_20e0_4_ff;
+extern cpuop_func op_20e8_4_nf;
+extern cpuop_func op_20e8_4_ff;
+extern cpuop_func op_20f0_4_nf;
+extern cpuop_func op_20f0_4_ff;
+extern cpuop_func op_20f8_4_nf;
+extern cpuop_func op_20f8_4_ff;
+extern cpuop_func op_20f9_4_nf;
+extern cpuop_func op_20f9_4_ff;
+extern cpuop_func op_20fa_4_nf;
+extern cpuop_func op_20fa_4_ff;
+extern cpuop_func op_20fb_4_nf;
+extern cpuop_func op_20fb_4_ff;
+extern cpuop_func op_20fc_4_nf;
+extern cpuop_func op_20fc_4_ff;
+extern cpuop_func op_2100_4_nf;
+extern cpuop_func op_2100_4_ff;
+extern cpuop_func op_2108_4_nf;
+extern cpuop_func op_2108_4_ff;
+extern cpuop_func op_2110_4_nf;
+extern cpuop_func op_2110_4_ff;
+extern cpuop_func op_2118_4_nf;
+extern cpuop_func op_2118_4_ff;
+extern cpuop_func op_2120_4_nf;
+extern cpuop_func op_2120_4_ff;
+extern cpuop_func op_2128_4_nf;
+extern cpuop_func op_2128_4_ff;
+extern cpuop_func op_2130_4_nf;
+extern cpuop_func op_2130_4_ff;
+extern cpuop_func op_2138_4_nf;
+extern cpuop_func op_2138_4_ff;
+extern cpuop_func op_2139_4_nf;
+extern cpuop_func op_2139_4_ff;
+extern cpuop_func op_213a_4_nf;
+extern cpuop_func op_213a_4_ff;
+extern cpuop_func op_213b_4_nf;
+extern cpuop_func op_213b_4_ff;
+extern cpuop_func op_213c_4_nf;
+extern cpuop_func op_213c_4_ff;
+extern cpuop_func op_2140_4_nf;
+extern cpuop_func op_2140_4_ff;
+extern cpuop_func op_2148_4_nf;
+extern cpuop_func op_2148_4_ff;
+extern cpuop_func op_2150_4_nf;
+extern cpuop_func op_2150_4_ff;
+extern cpuop_func op_2158_4_nf;
+extern cpuop_func op_2158_4_ff;
+extern cpuop_func op_2160_4_nf;
+extern cpuop_func op_2160_4_ff;
+extern cpuop_func op_2168_4_nf;
+extern cpuop_func op_2168_4_ff;
+extern cpuop_func op_2170_4_nf;
+extern cpuop_func op_2170_4_ff;
+extern cpuop_func op_2178_4_nf;
+extern cpuop_func op_2178_4_ff;
+extern cpuop_func op_2179_4_nf;
+extern cpuop_func op_2179_4_ff;
+extern cpuop_func op_217a_4_nf;
+extern cpuop_func op_217a_4_ff;
+extern cpuop_func op_217b_4_nf;
+extern cpuop_func op_217b_4_ff;
+extern cpuop_func op_217c_4_nf;
+extern cpuop_func op_217c_4_ff;
+extern cpuop_func op_2180_4_nf;
+extern cpuop_func op_2180_4_ff;
+extern cpuop_func op_2188_4_nf;
+extern cpuop_func op_2188_4_ff;
+extern cpuop_func op_2190_4_nf;
+extern cpuop_func op_2190_4_ff;
+extern cpuop_func op_2198_4_nf;
+extern cpuop_func op_2198_4_ff;
+extern cpuop_func op_21a0_4_nf;
+extern cpuop_func op_21a0_4_ff;
+extern cpuop_func op_21a8_4_nf;
+extern cpuop_func op_21a8_4_ff;
+extern cpuop_func op_21b0_4_nf;
+extern cpuop_func op_21b0_4_ff;
+extern cpuop_func op_21b8_4_nf;
+extern cpuop_func op_21b8_4_ff;
+extern cpuop_func op_21b9_4_nf;
+extern cpuop_func op_21b9_4_ff;
+extern cpuop_func op_21ba_4_nf;
+extern cpuop_func op_21ba_4_ff;
+extern cpuop_func op_21bb_4_nf;
+extern cpuop_func op_21bb_4_ff;
+extern cpuop_func op_21bc_4_nf;
+extern cpuop_func op_21bc_4_ff;
+extern cpuop_func op_21c0_4_nf;
+extern cpuop_func op_21c0_4_ff;
+extern cpuop_func op_21c8_4_nf;
+extern cpuop_func op_21c8_4_ff;
+extern cpuop_func op_21d0_4_nf;
+extern cpuop_func op_21d0_4_ff;
+extern cpuop_func op_21d8_4_nf;
+extern cpuop_func op_21d8_4_ff;
+extern cpuop_func op_21e0_4_nf;
+extern cpuop_func op_21e0_4_ff;
+extern cpuop_func op_21e8_4_nf;
+extern cpuop_func op_21e8_4_ff;
+extern cpuop_func op_21f0_4_nf;
+extern cpuop_func op_21f0_4_ff;
+extern cpuop_func op_21f8_4_nf;
+extern cpuop_func op_21f8_4_ff;
+extern cpuop_func op_21f9_4_nf;
+extern cpuop_func op_21f9_4_ff;
+extern cpuop_func op_21fa_4_nf;
+extern cpuop_func op_21fa_4_ff;
+extern cpuop_func op_21fb_4_nf;
+extern cpuop_func op_21fb_4_ff;
+extern cpuop_func op_21fc_4_nf;
+extern cpuop_func op_21fc_4_ff;
+extern cpuop_func op_23c0_4_nf;
+extern cpuop_func op_23c0_4_ff;
+extern cpuop_func op_23c8_4_nf;
+extern cpuop_func op_23c8_4_ff;
+extern cpuop_func op_23d0_4_nf;
+extern cpuop_func op_23d0_4_ff;
+extern cpuop_func op_23d8_4_nf;
+extern cpuop_func op_23d8_4_ff;
+extern cpuop_func op_23e0_4_nf;
+extern cpuop_func op_23e0_4_ff;
+extern cpuop_func op_23e8_4_nf;
+extern cpuop_func op_23e8_4_ff;
+extern cpuop_func op_23f0_4_nf;
+extern cpuop_func op_23f0_4_ff;
+extern cpuop_func op_23f8_4_nf;
+extern cpuop_func op_23f8_4_ff;
+extern cpuop_func op_23f9_4_nf;
+extern cpuop_func op_23f9_4_ff;
+extern cpuop_func op_23fa_4_nf;
+extern cpuop_func op_23fa_4_ff;
+extern cpuop_func op_23fb_4_nf;
+extern cpuop_func op_23fb_4_ff;
+extern cpuop_func op_23fc_4_nf;
+extern cpuop_func op_23fc_4_ff;
+extern cpuop_func op_3000_4_nf;
+extern cpuop_func op_3000_4_ff;
+extern cpuop_func op_3008_4_nf;
+extern cpuop_func op_3008_4_ff;
+extern cpuop_func op_3010_4_nf;
+extern cpuop_func op_3010_4_ff;
+extern cpuop_func op_3018_4_nf;
+extern cpuop_func op_3018_4_ff;
+extern cpuop_func op_3020_4_nf;
+extern cpuop_func op_3020_4_ff;
+extern cpuop_func op_3028_4_nf;
+extern cpuop_func op_3028_4_ff;
+extern cpuop_func op_3030_4_nf;
+extern cpuop_func op_3030_4_ff;
+extern cpuop_func op_3038_4_nf;
+extern cpuop_func op_3038_4_ff;
+extern cpuop_func op_3039_4_nf;
+extern cpuop_func op_3039_4_ff;
+extern cpuop_func op_303a_4_nf;
+extern cpuop_func op_303a_4_ff;
+extern cpuop_func op_303b_4_nf;
+extern cpuop_func op_303b_4_ff;
+extern cpuop_func op_303c_4_nf;
+extern cpuop_func op_303c_4_ff;
+extern cpuop_func op_3040_4_nf;
+extern cpuop_func op_3040_4_ff;
+extern cpuop_func op_3048_4_nf;
+extern cpuop_func op_3048_4_ff;
+extern cpuop_func op_3050_4_nf;
+extern cpuop_func op_3050_4_ff;
+extern cpuop_func op_3058_4_nf;
+extern cpuop_func op_3058_4_ff;
+extern cpuop_func op_3060_4_nf;
+extern cpuop_func op_3060_4_ff;
+extern cpuop_func op_3068_4_nf;
+extern cpuop_func op_3068_4_ff;
+extern cpuop_func op_3070_4_nf;
+extern cpuop_func op_3070_4_ff;
+extern cpuop_func op_3078_4_nf;
+extern cpuop_func op_3078_4_ff;
+extern cpuop_func op_3079_4_nf;
+extern cpuop_func op_3079_4_ff;
+extern cpuop_func op_307a_4_nf;
+extern cpuop_func op_307a_4_ff;
+extern cpuop_func op_307b_4_nf;
+extern cpuop_func op_307b_4_ff;
+extern cpuop_func op_307c_4_nf;
+extern cpuop_func op_307c_4_ff;
+extern cpuop_func op_3080_4_nf;
+extern cpuop_func op_3080_4_ff;
+extern cpuop_func op_3088_4_nf;
+extern cpuop_func op_3088_4_ff;
+extern cpuop_func op_3090_4_nf;
+extern cpuop_func op_3090_4_ff;
+extern cpuop_func op_3098_4_nf;
+extern cpuop_func op_3098_4_ff;
+extern cpuop_func op_30a0_4_nf;
+extern cpuop_func op_30a0_4_ff;
+extern cpuop_func op_30a8_4_nf;
+extern cpuop_func op_30a8_4_ff;
+extern cpuop_func op_30b0_4_nf;
+extern cpuop_func op_30b0_4_ff;
+extern cpuop_func op_30b8_4_nf;
+extern cpuop_func op_30b8_4_ff;
+extern cpuop_func op_30b9_4_nf;
+extern cpuop_func op_30b9_4_ff;
+extern cpuop_func op_30ba_4_nf;
+extern cpuop_func op_30ba_4_ff;
+extern cpuop_func op_30bb_4_nf;
+extern cpuop_func op_30bb_4_ff;
+extern cpuop_func op_30bc_4_nf;
+extern cpuop_func op_30bc_4_ff;
+extern cpuop_func op_30c0_4_nf;
+extern cpuop_func op_30c0_4_ff;
+extern cpuop_func op_30c8_4_nf;
+extern cpuop_func op_30c8_4_ff;
+extern cpuop_func op_30d0_4_nf;
+extern cpuop_func op_30d0_4_ff;
+extern cpuop_func op_30d8_4_nf;
+extern cpuop_func op_30d8_4_ff;
+extern cpuop_func op_30e0_4_nf;
+extern cpuop_func op_30e0_4_ff;
+extern cpuop_func op_30e8_4_nf;
+extern cpuop_func op_30e8_4_ff;
+extern cpuop_func op_30f0_4_nf;
+extern cpuop_func op_30f0_4_ff;
+extern cpuop_func op_30f8_4_nf;
+extern cpuop_func op_30f8_4_ff;
+extern cpuop_func op_30f9_4_nf;
+extern cpuop_func op_30f9_4_ff;
+extern cpuop_func op_30fa_4_nf;
+extern cpuop_func op_30fa_4_ff;
+extern cpuop_func op_30fb_4_nf;
+extern cpuop_func op_30fb_4_ff;
+extern cpuop_func op_30fc_4_nf;
+extern cpuop_func op_30fc_4_ff;
+extern cpuop_func op_3100_4_nf;
+extern cpuop_func op_3100_4_ff;
+extern cpuop_func op_3108_4_nf;
+extern cpuop_func op_3108_4_ff;
+extern cpuop_func op_3110_4_nf;
+extern cpuop_func op_3110_4_ff;
+extern cpuop_func op_3118_4_nf;
+extern cpuop_func op_3118_4_ff;
+extern cpuop_func op_3120_4_nf;
+extern cpuop_func op_3120_4_ff;
+extern cpuop_func op_3128_4_nf;
+extern cpuop_func op_3128_4_ff;
+extern cpuop_func op_3130_4_nf;
+extern cpuop_func op_3130_4_ff;
+extern cpuop_func op_3138_4_nf;
+extern cpuop_func op_3138_4_ff;
+extern cpuop_func op_3139_4_nf;
+extern cpuop_func op_3139_4_ff;
+extern cpuop_func op_313a_4_nf;
+extern cpuop_func op_313a_4_ff;
+extern cpuop_func op_313b_4_nf;
+extern cpuop_func op_313b_4_ff;
+extern cpuop_func op_313c_4_nf;
+extern cpuop_func op_313c_4_ff;
+extern cpuop_func op_3140_4_nf;
+extern cpuop_func op_3140_4_ff;
+extern cpuop_func op_3148_4_nf;
+extern cpuop_func op_3148_4_ff;
+extern cpuop_func op_3150_4_nf;
+extern cpuop_func op_3150_4_ff;
+extern cpuop_func op_3158_4_nf;
+extern cpuop_func op_3158_4_ff;
+extern cpuop_func op_3160_4_nf;
+extern cpuop_func op_3160_4_ff;
+extern cpuop_func op_3168_4_nf;
+extern cpuop_func op_3168_4_ff;
+extern cpuop_func op_3170_4_nf;
+extern cpuop_func op_3170_4_ff;
+extern cpuop_func op_3178_4_nf;
+extern cpuop_func op_3178_4_ff;
+extern cpuop_func op_3179_4_nf;
+extern cpuop_func op_3179_4_ff;
+extern cpuop_func op_317a_4_nf;
+extern cpuop_func op_317a_4_ff;
+extern cpuop_func op_317b_4_nf;
+extern cpuop_func op_317b_4_ff;
+extern cpuop_func op_317c_4_nf;
+extern cpuop_func op_317c_4_ff;
+extern cpuop_func op_3180_4_nf;
+extern cpuop_func op_3180_4_ff;
+extern cpuop_func op_3188_4_nf;
+extern cpuop_func op_3188_4_ff;
+extern cpuop_func op_3190_4_nf;
+extern cpuop_func op_3190_4_ff;
+extern cpuop_func op_3198_4_nf;
+extern cpuop_func op_3198_4_ff;
+extern cpuop_func op_31a0_4_nf;
+extern cpuop_func op_31a0_4_ff;
+extern cpuop_func op_31a8_4_nf;
+extern cpuop_func op_31a8_4_ff;
+extern cpuop_func op_31b0_4_nf;
+extern cpuop_func op_31b0_4_ff;
+extern cpuop_func op_31b8_4_nf;
+extern cpuop_func op_31b8_4_ff;
+extern cpuop_func op_31b9_4_nf;
+extern cpuop_func op_31b9_4_ff;
+extern cpuop_func op_31ba_4_nf;
+extern cpuop_func op_31ba_4_ff;
+extern cpuop_func op_31bb_4_nf;
+extern cpuop_func op_31bb_4_ff;
+extern cpuop_func op_31bc_4_nf;
+extern cpuop_func op_31bc_4_ff;
+extern cpuop_func op_31c0_4_nf;
+extern cpuop_func op_31c0_4_ff;
+extern cpuop_func op_31c8_4_nf;
+extern cpuop_func op_31c8_4_ff;
+extern cpuop_func op_31d0_4_nf;
+extern cpuop_func op_31d0_4_ff;
+extern cpuop_func op_31d8_4_nf;
+extern cpuop_func op_31d8_4_ff;
+extern cpuop_func op_31e0_4_nf;
+extern cpuop_func op_31e0_4_ff;
+extern cpuop_func op_31e8_4_nf;
+extern cpuop_func op_31e8_4_ff;
+extern cpuop_func op_31f0_4_nf;
+extern cpuop_func op_31f0_4_ff;
+extern cpuop_func op_31f8_4_nf;
+extern cpuop_func op_31f8_4_ff;
+extern cpuop_func op_31f9_4_nf;
+extern cpuop_func op_31f9_4_ff;
+extern cpuop_func op_31fa_4_nf;
+extern cpuop_func op_31fa_4_ff;
+extern cpuop_func op_31fb_4_nf;
+extern cpuop_func op_31fb_4_ff;
+extern cpuop_func op_31fc_4_nf;
+extern cpuop_func op_31fc_4_ff;
+extern cpuop_func op_33c0_4_nf;
+extern cpuop_func op_33c0_4_ff;
+extern cpuop_func op_33c8_4_nf;
+extern cpuop_func op_33c8_4_ff;
+extern cpuop_func op_33d0_4_nf;
+extern cpuop_func op_33d0_4_ff;
+extern cpuop_func op_33d8_4_nf;
+extern cpuop_func op_33d8_4_ff;
+extern cpuop_func op_33e0_4_nf;
+extern cpuop_func op_33e0_4_ff;
+extern cpuop_func op_33e8_4_nf;
+extern cpuop_func op_33e8_4_ff;
+extern cpuop_func op_33f0_4_nf;
+extern cpuop_func op_33f0_4_ff;
+extern cpuop_func op_33f8_4_nf;
+extern cpuop_func op_33f8_4_ff;
+extern cpuop_func op_33f9_4_nf;
+extern cpuop_func op_33f9_4_ff;
+extern cpuop_func op_33fa_4_nf;
+extern cpuop_func op_33fa_4_ff;
+extern cpuop_func op_33fb_4_nf;
+extern cpuop_func op_33fb_4_ff;
+extern cpuop_func op_33fc_4_nf;
+extern cpuop_func op_33fc_4_ff;
+extern cpuop_func op_4000_4_nf;
+extern cpuop_func op_4000_4_ff;
+extern cpuop_func op_4010_4_nf;
+extern cpuop_func op_4010_4_ff;
+extern cpuop_func op_4018_4_nf;
+extern cpuop_func op_4018_4_ff;
+extern cpuop_func op_4020_4_nf;
+extern cpuop_func op_4020_4_ff;
+extern cpuop_func op_4028_4_nf;
+extern cpuop_func op_4028_4_ff;
+extern cpuop_func op_4030_4_nf;
+extern cpuop_func op_4030_4_ff;
+extern cpuop_func op_4038_4_nf;
+extern cpuop_func op_4038_4_ff;
+extern cpuop_func op_4039_4_nf;
+extern cpuop_func op_4039_4_ff;
+extern cpuop_func op_4040_4_nf;
+extern cpuop_func op_4040_4_ff;
+extern cpuop_func op_4050_4_nf;
+extern cpuop_func op_4050_4_ff;
+extern cpuop_func op_4058_4_nf;
+extern cpuop_func op_4058_4_ff;
+extern cpuop_func op_4060_4_nf;
+extern cpuop_func op_4060_4_ff;
+extern cpuop_func op_4068_4_nf;
+extern cpuop_func op_4068_4_ff;
+extern cpuop_func op_4070_4_nf;
+extern cpuop_func op_4070_4_ff;
+extern cpuop_func op_4078_4_nf;
+extern cpuop_func op_4078_4_ff;
+extern cpuop_func op_4079_4_nf;
+extern cpuop_func op_4079_4_ff;
+extern cpuop_func op_4080_4_nf;
+extern cpuop_func op_4080_4_ff;
+extern cpuop_func op_4090_4_nf;
+extern cpuop_func op_4090_4_ff;
+extern cpuop_func op_4098_4_nf;
+extern cpuop_func op_4098_4_ff;
+extern cpuop_func op_40a0_4_nf;
+extern cpuop_func op_40a0_4_ff;
+extern cpuop_func op_40a8_4_nf;
+extern cpuop_func op_40a8_4_ff;
+extern cpuop_func op_40b0_4_nf;
+extern cpuop_func op_40b0_4_ff;
+extern cpuop_func op_40b8_4_nf;
+extern cpuop_func op_40b8_4_ff;
+extern cpuop_func op_40b9_4_nf;
+extern cpuop_func op_40b9_4_ff;
+extern cpuop_func op_40c0_4_nf;
+extern cpuop_func op_40c0_4_ff;
+extern cpuop_func op_40d0_4_nf;
+extern cpuop_func op_40d0_4_ff;
+extern cpuop_func op_40d8_4_nf;
+extern cpuop_func op_40d8_4_ff;
+extern cpuop_func op_40e0_4_nf;
+extern cpuop_func op_40e0_4_ff;
+extern cpuop_func op_40e8_4_nf;
+extern cpuop_func op_40e8_4_ff;
+extern cpuop_func op_40f0_4_nf;
+extern cpuop_func op_40f0_4_ff;
+extern cpuop_func op_40f8_4_nf;
+extern cpuop_func op_40f8_4_ff;
+extern cpuop_func op_40f9_4_nf;
+extern cpuop_func op_40f9_4_ff;
+extern cpuop_func op_4180_4_nf;
+extern cpuop_func op_4180_4_ff;
+extern cpuop_func op_4190_4_nf;
+extern cpuop_func op_4190_4_ff;
+extern cpuop_func op_4198_4_nf;
+extern cpuop_func op_4198_4_ff;
+extern cpuop_func op_41a0_4_nf;
+extern cpuop_func op_41a0_4_ff;
+extern cpuop_func op_41a8_4_nf;
+extern cpuop_func op_41a8_4_ff;
+extern cpuop_func op_41b0_4_nf;
+extern cpuop_func op_41b0_4_ff;
+extern cpuop_func op_41b8_4_nf;
+extern cpuop_func op_41b8_4_ff;
+extern cpuop_func op_41b9_4_nf;
+extern cpuop_func op_41b9_4_ff;
+extern cpuop_func op_41ba_4_nf;
+extern cpuop_func op_41ba_4_ff;
+extern cpuop_func op_41bb_4_nf;
+extern cpuop_func op_41bb_4_ff;
+extern cpuop_func op_41bc_4_nf;
+extern cpuop_func op_41bc_4_ff;
+extern cpuop_func op_41d0_4_nf;
+extern cpuop_func op_41d0_4_ff;
+extern cpuop_func op_41e8_4_nf;
+extern cpuop_func op_41e8_4_ff;
+extern cpuop_func op_41f0_4_nf;
+extern cpuop_func op_41f0_4_ff;
+extern cpuop_func op_41f8_4_nf;
+extern cpuop_func op_41f8_4_ff;
+extern cpuop_func op_41f9_4_nf;
+extern cpuop_func op_41f9_4_ff;
+extern cpuop_func op_41fa_4_nf;
+extern cpuop_func op_41fa_4_ff;
+extern cpuop_func op_41fb_4_nf;
+extern cpuop_func op_41fb_4_ff;
+extern cpuop_func op_4200_4_nf;
+extern cpuop_func op_4200_4_ff;
+extern cpuop_func op_4210_4_nf;
+extern cpuop_func op_4210_4_ff;
+extern cpuop_func op_4218_4_nf;
+extern cpuop_func op_4218_4_ff;
+extern cpuop_func op_4220_4_nf;
+extern cpuop_func op_4220_4_ff;
+extern cpuop_func op_4228_4_nf;
+extern cpuop_func op_4228_4_ff;
+extern cpuop_func op_4230_4_nf;
+extern cpuop_func op_4230_4_ff;
+extern cpuop_func op_4238_4_nf;
+extern cpuop_func op_4238_4_ff;
+extern cpuop_func op_4239_4_nf;
+extern cpuop_func op_4239_4_ff;
+extern cpuop_func op_4240_4_nf;
+extern cpuop_func op_4240_4_ff;
+extern cpuop_func op_4250_4_nf;
+extern cpuop_func op_4250_4_ff;
+extern cpuop_func op_4258_4_nf;
+extern cpuop_func op_4258_4_ff;
+extern cpuop_func op_4260_4_nf;
+extern cpuop_func op_4260_4_ff;
+extern cpuop_func op_4268_4_nf;
+extern cpuop_func op_4268_4_ff;
+extern cpuop_func op_4270_4_nf;
+extern cpuop_func op_4270_4_ff;
+extern cpuop_func op_4278_4_nf;
+extern cpuop_func op_4278_4_ff;
+extern cpuop_func op_4279_4_nf;
+extern cpuop_func op_4279_4_ff;
+extern cpuop_func op_4280_4_nf;
+extern cpuop_func op_4280_4_ff;
+extern cpuop_func op_4290_4_nf;
+extern cpuop_func op_4290_4_ff;
+extern cpuop_func op_4298_4_nf;
+extern cpuop_func op_4298_4_ff;
+extern cpuop_func op_42a0_4_nf;
+extern cpuop_func op_42a0_4_ff;
+extern cpuop_func op_42a8_4_nf;
+extern cpuop_func op_42a8_4_ff;
+extern cpuop_func op_42b0_4_nf;
+extern cpuop_func op_42b0_4_ff;
+extern cpuop_func op_42b8_4_nf;
+extern cpuop_func op_42b8_4_ff;
+extern cpuop_func op_42b9_4_nf;
+extern cpuop_func op_42b9_4_ff;
+extern cpuop_func op_4400_4_nf;
+extern cpuop_func op_4400_4_ff;
+extern cpuop_func op_4410_4_nf;
+extern cpuop_func op_4410_4_ff;
+extern cpuop_func op_4418_4_nf;
+extern cpuop_func op_4418_4_ff;
+extern cpuop_func op_4420_4_nf;
+extern cpuop_func op_4420_4_ff;
+extern cpuop_func op_4428_4_nf;
+extern cpuop_func op_4428_4_ff;
+extern cpuop_func op_4430_4_nf;
+extern cpuop_func op_4430_4_ff;
+extern cpuop_func op_4438_4_nf;
+extern cpuop_func op_4438_4_ff;
+extern cpuop_func op_4439_4_nf;
+extern cpuop_func op_4439_4_ff;
+extern cpuop_func op_4440_4_nf;
+extern cpuop_func op_4440_4_ff;
+extern cpuop_func op_4450_4_nf;
+extern cpuop_func op_4450_4_ff;
+extern cpuop_func op_4458_4_nf;
+extern cpuop_func op_4458_4_ff;
+extern cpuop_func op_4460_4_nf;
+extern cpuop_func op_4460_4_ff;
+extern cpuop_func op_4468_4_nf;
+extern cpuop_func op_4468_4_ff;
+extern cpuop_func op_4470_4_nf;
+extern cpuop_func op_4470_4_ff;
+extern cpuop_func op_4478_4_nf;
+extern cpuop_func op_4478_4_ff;
+extern cpuop_func op_4479_4_nf;
+extern cpuop_func op_4479_4_ff;
+extern cpuop_func op_4480_4_nf;
+extern cpuop_func op_4480_4_ff;
+extern cpuop_func op_4490_4_nf;
+extern cpuop_func op_4490_4_ff;
+extern cpuop_func op_4498_4_nf;
+extern cpuop_func op_4498_4_ff;
+extern cpuop_func op_44a0_4_nf;
+extern cpuop_func op_44a0_4_ff;
+extern cpuop_func op_44a8_4_nf;
+extern cpuop_func op_44a8_4_ff;
+extern cpuop_func op_44b0_4_nf;
+extern cpuop_func op_44b0_4_ff;
+extern cpuop_func op_44b8_4_nf;
+extern cpuop_func op_44b8_4_ff;
+extern cpuop_func op_44b9_4_nf;
+extern cpuop_func op_44b9_4_ff;
+extern cpuop_func op_44c0_4_nf;
+extern cpuop_func op_44c0_4_ff;
+extern cpuop_func op_44d0_4_nf;
+extern cpuop_func op_44d0_4_ff;
+extern cpuop_func op_44d8_4_nf;
+extern cpuop_func op_44d8_4_ff;
+extern cpuop_func op_44e0_4_nf;
+extern cpuop_func op_44e0_4_ff;
+extern cpuop_func op_44e8_4_nf;
+extern cpuop_func op_44e8_4_ff;
+extern cpuop_func op_44f0_4_nf;
+extern cpuop_func op_44f0_4_ff;
+extern cpuop_func op_44f8_4_nf;
+extern cpuop_func op_44f8_4_ff;
+extern cpuop_func op_44f9_4_nf;
+extern cpuop_func op_44f9_4_ff;
+extern cpuop_func op_44fa_4_nf;
+extern cpuop_func op_44fa_4_ff;
+extern cpuop_func op_44fb_4_nf;
+extern cpuop_func op_44fb_4_ff;
+extern cpuop_func op_44fc_4_nf;
+extern cpuop_func op_44fc_4_ff;
+extern cpuop_func op_4600_4_nf;
+extern cpuop_func op_4600_4_ff;
+extern cpuop_func op_4610_4_nf;
+extern cpuop_func op_4610_4_ff;
+extern cpuop_func op_4618_4_nf;
+extern cpuop_func op_4618_4_ff;
+extern cpuop_func op_4620_4_nf;
+extern cpuop_func op_4620_4_ff;
+extern cpuop_func op_4628_4_nf;
+extern cpuop_func op_4628_4_ff;
+extern cpuop_func op_4630_4_nf;
+extern cpuop_func op_4630_4_ff;
+extern cpuop_func op_4638_4_nf;
+extern cpuop_func op_4638_4_ff;
+extern cpuop_func op_4639_4_nf;
+extern cpuop_func op_4639_4_ff;
+extern cpuop_func op_4640_4_nf;
+extern cpuop_func op_4640_4_ff;
+extern cpuop_func op_4650_4_nf;
+extern cpuop_func op_4650_4_ff;
+extern cpuop_func op_4658_4_nf;
+extern cpuop_func op_4658_4_ff;
+extern cpuop_func op_4660_4_nf;
+extern cpuop_func op_4660_4_ff;
+extern cpuop_func op_4668_4_nf;
+extern cpuop_func op_4668_4_ff;
+extern cpuop_func op_4670_4_nf;
+extern cpuop_func op_4670_4_ff;
+extern cpuop_func op_4678_4_nf;
+extern cpuop_func op_4678_4_ff;
+extern cpuop_func op_4679_4_nf;
+extern cpuop_func op_4679_4_ff;
+extern cpuop_func op_4680_4_nf;
+extern cpuop_func op_4680_4_ff;
+extern cpuop_func op_4690_4_nf;
+extern cpuop_func op_4690_4_ff;
+extern cpuop_func op_4698_4_nf;
+extern cpuop_func op_4698_4_ff;
+extern cpuop_func op_46a0_4_nf;
+extern cpuop_func op_46a0_4_ff;
+extern cpuop_func op_46a8_4_nf;
+extern cpuop_func op_46a8_4_ff;
+extern cpuop_func op_46b0_4_nf;
+extern cpuop_func op_46b0_4_ff;
+extern cpuop_func op_46b8_4_nf;
+extern cpuop_func op_46b8_4_ff;
+extern cpuop_func op_46b9_4_nf;
+extern cpuop_func op_46b9_4_ff;
+extern cpuop_func op_46c0_4_nf;
+extern cpuop_func op_46c0_4_ff;
+extern cpuop_func op_46d0_4_nf;
+extern cpuop_func op_46d0_4_ff;
+extern cpuop_func op_46d8_4_nf;
+extern cpuop_func op_46d8_4_ff;
+extern cpuop_func op_46e0_4_nf;
+extern cpuop_func op_46e0_4_ff;
+extern cpuop_func op_46e8_4_nf;
+extern cpuop_func op_46e8_4_ff;
+extern cpuop_func op_46f0_4_nf;
+extern cpuop_func op_46f0_4_ff;
+extern cpuop_func op_46f8_4_nf;
+extern cpuop_func op_46f8_4_ff;
+extern cpuop_func op_46f9_4_nf;
+extern cpuop_func op_46f9_4_ff;
+extern cpuop_func op_46fa_4_nf;
+extern cpuop_func op_46fa_4_ff;
+extern cpuop_func op_46fb_4_nf;
+extern cpuop_func op_46fb_4_ff;
+extern cpuop_func op_46fc_4_nf;
+extern cpuop_func op_46fc_4_ff;
+extern cpuop_func op_4800_4_nf;
+extern cpuop_func op_4800_4_ff;
+extern cpuop_func op_4810_4_nf;
+extern cpuop_func op_4810_4_ff;
+extern cpuop_func op_4818_4_nf;
+extern cpuop_func op_4818_4_ff;
+extern cpuop_func op_4820_4_nf;
+extern cpuop_func op_4820_4_ff;
+extern cpuop_func op_4828_4_nf;
+extern cpuop_func op_4828_4_ff;
+extern cpuop_func op_4830_4_nf;
+extern cpuop_func op_4830_4_ff;
+extern cpuop_func op_4838_4_nf;
+extern cpuop_func op_4838_4_ff;
+extern cpuop_func op_4839_4_nf;
+extern cpuop_func op_4839_4_ff;
+extern cpuop_func op_4840_4_nf;
+extern cpuop_func op_4840_4_ff;
+extern cpuop_func op_4850_4_nf;
+extern cpuop_func op_4850_4_ff;
+extern cpuop_func op_4868_4_nf;
+extern cpuop_func op_4868_4_ff;
+extern cpuop_func op_4870_4_nf;
+extern cpuop_func op_4870_4_ff;
+extern cpuop_func op_4878_4_nf;
+extern cpuop_func op_4878_4_ff;
+extern cpuop_func op_4879_4_nf;
+extern cpuop_func op_4879_4_ff;
+extern cpuop_func op_487a_4_nf;
+extern cpuop_func op_487a_4_ff;
+extern cpuop_func op_487b_4_nf;
+extern cpuop_func op_487b_4_ff;
+extern cpuop_func op_4880_4_nf;
+extern cpuop_func op_4880_4_ff;
+extern cpuop_func op_4890_4_nf;
+extern cpuop_func op_4890_4_ff;
+extern cpuop_func op_48a0_4_nf;
+extern cpuop_func op_48a0_4_ff;
+extern cpuop_func op_48a8_4_nf;
+extern cpuop_func op_48a8_4_ff;
+extern cpuop_func op_48b0_4_nf;
+extern cpuop_func op_48b0_4_ff;
+extern cpuop_func op_48b8_4_nf;
+extern cpuop_func op_48b8_4_ff;
+extern cpuop_func op_48b9_4_nf;
+extern cpuop_func op_48b9_4_ff;
+extern cpuop_func op_48c0_4_nf;
+extern cpuop_func op_48c0_4_ff;
+extern cpuop_func op_48d0_4_nf;
+extern cpuop_func op_48d0_4_ff;
+extern cpuop_func op_48e0_4_nf;
+extern cpuop_func op_48e0_4_ff;
+extern cpuop_func op_48e8_4_nf;
+extern cpuop_func op_48e8_4_ff;
+extern cpuop_func op_48f0_4_nf;
+extern cpuop_func op_48f0_4_ff;
+extern cpuop_func op_48f8_4_nf;
+extern cpuop_func op_48f8_4_ff;
+extern cpuop_func op_48f9_4_nf;
+extern cpuop_func op_48f9_4_ff;
+extern cpuop_func op_4a00_4_nf;
+extern cpuop_func op_4a00_4_ff;
+extern cpuop_func op_4a10_4_nf;
+extern cpuop_func op_4a10_4_ff;
+extern cpuop_func op_4a18_4_nf;
+extern cpuop_func op_4a18_4_ff;
+extern cpuop_func op_4a20_4_nf;
+extern cpuop_func op_4a20_4_ff;
+extern cpuop_func op_4a28_4_nf;
+extern cpuop_func op_4a28_4_ff;
+extern cpuop_func op_4a30_4_nf;
+extern cpuop_func op_4a30_4_ff;
+extern cpuop_func op_4a38_4_nf;
+extern cpuop_func op_4a38_4_ff;
+extern cpuop_func op_4a39_4_nf;
+extern cpuop_func op_4a39_4_ff;
+extern cpuop_func op_4a3a_4_nf;
+extern cpuop_func op_4a3a_4_ff;
+extern cpuop_func op_4a3b_4_nf;
+extern cpuop_func op_4a3b_4_ff;
+extern cpuop_func op_4a3c_4_nf;
+extern cpuop_func op_4a3c_4_ff;
+extern cpuop_func op_4a40_4_nf;
+extern cpuop_func op_4a40_4_ff;
+extern cpuop_func op_4a48_4_nf;
+extern cpuop_func op_4a48_4_ff;
+extern cpuop_func op_4a50_4_nf;
+extern cpuop_func op_4a50_4_ff;
+extern cpuop_func op_4a58_4_nf;
+extern cpuop_func op_4a58_4_ff;
+extern cpuop_func op_4a60_4_nf;
+extern cpuop_func op_4a60_4_ff;
+extern cpuop_func op_4a68_4_nf;
+extern cpuop_func op_4a68_4_ff;
+extern cpuop_func op_4a70_4_nf;
+extern cpuop_func op_4a70_4_ff;
+extern cpuop_func op_4a78_4_nf;
+extern cpuop_func op_4a78_4_ff;
+extern cpuop_func op_4a79_4_nf;
+extern cpuop_func op_4a79_4_ff;
+extern cpuop_func op_4a7a_4_nf;
+extern cpuop_func op_4a7a_4_ff;
+extern cpuop_func op_4a7b_4_nf;
+extern cpuop_func op_4a7b_4_ff;
+extern cpuop_func op_4a7c_4_nf;
+extern cpuop_func op_4a7c_4_ff;
+extern cpuop_func op_4a80_4_nf;
+extern cpuop_func op_4a80_4_ff;
+extern cpuop_func op_4a88_4_nf;
+extern cpuop_func op_4a88_4_ff;
+extern cpuop_func op_4a90_4_nf;
+extern cpuop_func op_4a90_4_ff;
+extern cpuop_func op_4a98_4_nf;
+extern cpuop_func op_4a98_4_ff;
+extern cpuop_func op_4aa0_4_nf;
+extern cpuop_func op_4aa0_4_ff;
+extern cpuop_func op_4aa8_4_nf;
+extern cpuop_func op_4aa8_4_ff;
+extern cpuop_func op_4ab0_4_nf;
+extern cpuop_func op_4ab0_4_ff;
+extern cpuop_func op_4ab8_4_nf;
+extern cpuop_func op_4ab8_4_ff;
+extern cpuop_func op_4ab9_4_nf;
+extern cpuop_func op_4ab9_4_ff;
+extern cpuop_func op_4aba_4_nf;
+extern cpuop_func op_4aba_4_ff;
+extern cpuop_func op_4abb_4_nf;
+extern cpuop_func op_4abb_4_ff;
+extern cpuop_func op_4abc_4_nf;
+extern cpuop_func op_4abc_4_ff;
+extern cpuop_func op_4ac0_4_nf;
+extern cpuop_func op_4ac0_4_ff;
+extern cpuop_func op_4ad0_4_nf;
+extern cpuop_func op_4ad0_4_ff;
+extern cpuop_func op_4ad8_4_nf;
+extern cpuop_func op_4ad8_4_ff;
+extern cpuop_func op_4ae0_4_nf;
+extern cpuop_func op_4ae0_4_ff;
+extern cpuop_func op_4ae8_4_nf;
+extern cpuop_func op_4ae8_4_ff;
+extern cpuop_func op_4af0_4_nf;
+extern cpuop_func op_4af0_4_ff;
+extern cpuop_func op_4af8_4_nf;
+extern cpuop_func op_4af8_4_ff;
+extern cpuop_func op_4af9_4_nf;
+extern cpuop_func op_4af9_4_ff;
+extern cpuop_func op_4c90_4_nf;
+extern cpuop_func op_4c90_4_ff;
+extern cpuop_func op_4c98_4_nf;
+extern cpuop_func op_4c98_4_ff;
+extern cpuop_func op_4ca8_4_nf;
+extern cpuop_func op_4ca8_4_ff;
+extern cpuop_func op_4cb0_4_nf;
+extern cpuop_func op_4cb0_4_ff;
+extern cpuop_func op_4cb8_4_nf;
+extern cpuop_func op_4cb8_4_ff;
+extern cpuop_func op_4cb9_4_nf;
+extern cpuop_func op_4cb9_4_ff;
+extern cpuop_func op_4cba_4_nf;
+extern cpuop_func op_4cba_4_ff;
+extern cpuop_func op_4cbb_4_nf;
+extern cpuop_func op_4cbb_4_ff;
+extern cpuop_func op_4cd0_4_nf;
+extern cpuop_func op_4cd0_4_ff;
+extern cpuop_func op_4cd8_4_nf;
+extern cpuop_func op_4cd8_4_ff;
+extern cpuop_func op_4ce8_4_nf;
+extern cpuop_func op_4ce8_4_ff;
+extern cpuop_func op_4cf0_4_nf;
+extern cpuop_func op_4cf0_4_ff;
+extern cpuop_func op_4cf8_4_nf;
+extern cpuop_func op_4cf8_4_ff;
+extern cpuop_func op_4cf9_4_nf;
+extern cpuop_func op_4cf9_4_ff;
+extern cpuop_func op_4cfa_4_nf;
+extern cpuop_func op_4cfa_4_ff;
+extern cpuop_func op_4cfb_4_nf;
+extern cpuop_func op_4cfb_4_ff;
+extern cpuop_func op_4e40_4_nf;
+extern cpuop_func op_4e40_4_ff;
+extern cpuop_func op_4e50_4_nf;
+extern cpuop_func op_4e50_4_ff;
+extern cpuop_func op_4e58_4_nf;
+extern cpuop_func op_4e58_4_ff;
+extern cpuop_func op_4e60_4_nf;
+extern cpuop_func op_4e60_4_ff;
+extern cpuop_func op_4e68_4_nf;
+extern cpuop_func op_4e68_4_ff;
+extern cpuop_func op_4e70_4_nf;
+extern cpuop_func op_4e70_4_ff;
+extern cpuop_func op_4e71_4_nf;
+extern cpuop_func op_4e71_4_ff;
+extern cpuop_func op_4e72_4_nf;
+extern cpuop_func op_4e72_4_ff;
+extern cpuop_func op_4e73_4_nf;
+extern cpuop_func op_4e73_4_ff;
+extern cpuop_func op_4e74_4_nf;
+extern cpuop_func op_4e74_4_ff;
+extern cpuop_func op_4e75_4_nf;
+extern cpuop_func op_4e75_4_ff;
+extern cpuop_func op_4e76_4_nf;
+extern cpuop_func op_4e76_4_ff;
+extern cpuop_func op_4e77_4_nf;
+extern cpuop_func op_4e77_4_ff;
+extern cpuop_func op_4e90_4_nf;
+extern cpuop_func op_4e90_4_ff;
+extern cpuop_func op_4ea8_4_nf;
+extern cpuop_func op_4ea8_4_ff;
+extern cpuop_func op_4eb0_4_nf;
+extern cpuop_func op_4eb0_4_ff;
+extern cpuop_func op_4eb8_4_nf;
+extern cpuop_func op_4eb8_4_ff;
+extern cpuop_func op_4eb9_4_nf;
+extern cpuop_func op_4eb9_4_ff;
+extern cpuop_func op_4eba_4_nf;
+extern cpuop_func op_4eba_4_ff;
+extern cpuop_func op_4ebb_4_nf;
+extern cpuop_func op_4ebb_4_ff;
+extern cpuop_func op_4ed0_4_nf;
+extern cpuop_func op_4ed0_4_ff;
+extern cpuop_func op_4ee8_4_nf;
+extern cpuop_func op_4ee8_4_ff;
+extern cpuop_func op_4ef0_4_nf;
+extern cpuop_func op_4ef0_4_ff;
+extern cpuop_func op_4ef8_4_nf;
+extern cpuop_func op_4ef8_4_ff;
+extern cpuop_func op_4ef9_4_nf;
+extern cpuop_func op_4ef9_4_ff;
+extern cpuop_func op_4efa_4_nf;
+extern cpuop_func op_4efa_4_ff;
+extern cpuop_func op_4efb_4_nf;
+extern cpuop_func op_4efb_4_ff;
+extern cpuop_func op_5000_4_nf;
+extern cpuop_func op_5000_4_ff;
+extern cpuop_func op_5010_4_nf;
+extern cpuop_func op_5010_4_ff;
+extern cpuop_func op_5018_4_nf;
+extern cpuop_func op_5018_4_ff;
+extern cpuop_func op_5020_4_nf;
+extern cpuop_func op_5020_4_ff;
+extern cpuop_func op_5028_4_nf;
+extern cpuop_func op_5028_4_ff;
+extern cpuop_func op_5030_4_nf;
+extern cpuop_func op_5030_4_ff;
+extern cpuop_func op_5038_4_nf;
+extern cpuop_func op_5038_4_ff;
+extern cpuop_func op_5039_4_nf;
+extern cpuop_func op_5039_4_ff;
+extern cpuop_func op_5040_4_nf;
+extern cpuop_func op_5040_4_ff;
+extern cpuop_func op_5048_4_nf;
+extern cpuop_func op_5048_4_ff;
+extern cpuop_func op_5050_4_nf;
+extern cpuop_func op_5050_4_ff;
+extern cpuop_func op_5058_4_nf;
+extern cpuop_func op_5058_4_ff;
+extern cpuop_func op_5060_4_nf;
+extern cpuop_func op_5060_4_ff;
+extern cpuop_func op_5068_4_nf;
+extern cpuop_func op_5068_4_ff;
+extern cpuop_func op_5070_4_nf;
+extern cpuop_func op_5070_4_ff;
+extern cpuop_func op_5078_4_nf;
+extern cpuop_func op_5078_4_ff;
+extern cpuop_func op_5079_4_nf;
+extern cpuop_func op_5079_4_ff;
+extern cpuop_func op_5080_4_nf;
+extern cpuop_func op_5080_4_ff;
+extern cpuop_func op_5088_4_nf;
+extern cpuop_func op_5088_4_ff;
+extern cpuop_func op_5090_4_nf;
+extern cpuop_func op_5090_4_ff;
+extern cpuop_func op_5098_4_nf;
+extern cpuop_func op_5098_4_ff;
+extern cpuop_func op_50a0_4_nf;
+extern cpuop_func op_50a0_4_ff;
+extern cpuop_func op_50a8_4_nf;
+extern cpuop_func op_50a8_4_ff;
+extern cpuop_func op_50b0_4_nf;
+extern cpuop_func op_50b0_4_ff;
+extern cpuop_func op_50b8_4_nf;
+extern cpuop_func op_50b8_4_ff;
+extern cpuop_func op_50b9_4_nf;
+extern cpuop_func op_50b9_4_ff;
+extern cpuop_func op_50c0_4_nf;
+extern cpuop_func op_50c0_4_ff;
+extern cpuop_func op_50c8_4_nf;
+extern cpuop_func op_50c8_4_ff;
+extern cpuop_func op_50d0_4_nf;
+extern cpuop_func op_50d0_4_ff;
+extern cpuop_func op_50d8_4_nf;
+extern cpuop_func op_50d8_4_ff;
+extern cpuop_func op_50e0_4_nf;
+extern cpuop_func op_50e0_4_ff;
+extern cpuop_func op_50e8_4_nf;
+extern cpuop_func op_50e8_4_ff;
+extern cpuop_func op_50f0_4_nf;
+extern cpuop_func op_50f0_4_ff;
+extern cpuop_func op_50f8_4_nf;
+extern cpuop_func op_50f8_4_ff;
+extern cpuop_func op_50f9_4_nf;
+extern cpuop_func op_50f9_4_ff;
+extern cpuop_func op_5100_4_nf;
+extern cpuop_func op_5100_4_ff;
+extern cpuop_func op_5110_4_nf;
+extern cpuop_func op_5110_4_ff;
+extern cpuop_func op_5118_4_nf;
+extern cpuop_func op_5118_4_ff;
+extern cpuop_func op_5120_4_nf;
+extern cpuop_func op_5120_4_ff;
+extern cpuop_func op_5128_4_nf;
+extern cpuop_func op_5128_4_ff;
+extern cpuop_func op_5130_4_nf;
+extern cpuop_func op_5130_4_ff;
+extern cpuop_func op_5138_4_nf;
+extern cpuop_func op_5138_4_ff;
+extern cpuop_func op_5139_4_nf;
+extern cpuop_func op_5139_4_ff;
+extern cpuop_func op_5140_4_nf;
+extern cpuop_func op_5140_4_ff;
+extern cpuop_func op_5148_4_nf;
+extern cpuop_func op_5148_4_ff;
+extern cpuop_func op_5150_4_nf;
+extern cpuop_func op_5150_4_ff;
+extern cpuop_func op_5158_4_nf;
+extern cpuop_func op_5158_4_ff;
+extern cpuop_func op_5160_4_nf;
+extern cpuop_func op_5160_4_ff;
+extern cpuop_func op_5168_4_nf;
+extern cpuop_func op_5168_4_ff;
+extern cpuop_func op_5170_4_nf;
+extern cpuop_func op_5170_4_ff;
+extern cpuop_func op_5178_4_nf;
+extern cpuop_func op_5178_4_ff;
+extern cpuop_func op_5179_4_nf;
+extern cpuop_func op_5179_4_ff;
+extern cpuop_func op_5180_4_nf;
+extern cpuop_func op_5180_4_ff;
+extern cpuop_func op_5188_4_nf;
+extern cpuop_func op_5188_4_ff;
+extern cpuop_func op_5190_4_nf;
+extern cpuop_func op_5190_4_ff;
+extern cpuop_func op_5198_4_nf;
+extern cpuop_func op_5198_4_ff;
+extern cpuop_func op_51a0_4_nf;
+extern cpuop_func op_51a0_4_ff;
+extern cpuop_func op_51a8_4_nf;
+extern cpuop_func op_51a8_4_ff;
+extern cpuop_func op_51b0_4_nf;
+extern cpuop_func op_51b0_4_ff;
+extern cpuop_func op_51b8_4_nf;
+extern cpuop_func op_51b8_4_ff;
+extern cpuop_func op_51b9_4_nf;
+extern cpuop_func op_51b9_4_ff;
+extern cpuop_func op_51c0_4_nf;
+extern cpuop_func op_51c0_4_ff;
+extern cpuop_func op_51c8_4_nf;
+extern cpuop_func op_51c8_4_ff;
+extern cpuop_func op_51d0_4_nf;
+extern cpuop_func op_51d0_4_ff;
+extern cpuop_func op_51d8_4_nf;
+extern cpuop_func op_51d8_4_ff;
+extern cpuop_func op_51e0_4_nf;
+extern cpuop_func op_51e0_4_ff;
+extern cpuop_func op_51e8_4_nf;
+extern cpuop_func op_51e8_4_ff;
+extern cpuop_func op_51f0_4_nf;
+extern cpuop_func op_51f0_4_ff;
+extern cpuop_func op_51f8_4_nf;
+extern cpuop_func op_51f8_4_ff;
+extern cpuop_func op_51f9_4_nf;
+extern cpuop_func op_51f9_4_ff;
+extern cpuop_func op_52c0_4_nf;
+extern cpuop_func op_52c0_4_ff;
+extern cpuop_func op_52c8_4_nf;
+extern cpuop_func op_52c8_4_ff;
+extern cpuop_func op_52d0_4_nf;
+extern cpuop_func op_52d0_4_ff;
+extern cpuop_func op_52d8_4_nf;
+extern cpuop_func op_52d8_4_ff;
+extern cpuop_func op_52e0_4_nf;
+extern cpuop_func op_52e0_4_ff;
+extern cpuop_func op_52e8_4_nf;
+extern cpuop_func op_52e8_4_ff;
+extern cpuop_func op_52f0_4_nf;
+extern cpuop_func op_52f0_4_ff;
+extern cpuop_func op_52f8_4_nf;
+extern cpuop_func op_52f8_4_ff;
+extern cpuop_func op_52f9_4_nf;
+extern cpuop_func op_52f9_4_ff;
+extern cpuop_func op_53c0_4_nf;
+extern cpuop_func op_53c0_4_ff;
+extern cpuop_func op_53c8_4_nf;
+extern cpuop_func op_53c8_4_ff;
+extern cpuop_func op_53d0_4_nf;
+extern cpuop_func op_53d0_4_ff;
+extern cpuop_func op_53d8_4_nf;
+extern cpuop_func op_53d8_4_ff;
+extern cpuop_func op_53e0_4_nf;
+extern cpuop_func op_53e0_4_ff;
+extern cpuop_func op_53e8_4_nf;
+extern cpuop_func op_53e8_4_ff;
+extern cpuop_func op_53f0_4_nf;
+extern cpuop_func op_53f0_4_ff;
+extern cpuop_func op_53f8_4_nf;
+extern cpuop_func op_53f8_4_ff;
+extern cpuop_func op_53f9_4_nf;
+extern cpuop_func op_53f9_4_ff;
+extern cpuop_func op_54c0_4_nf;
+extern cpuop_func op_54c0_4_ff;
+extern cpuop_func op_54c8_4_nf;
+extern cpuop_func op_54c8_4_ff;
+extern cpuop_func op_54d0_4_nf;
+extern cpuop_func op_54d0_4_ff;
+extern cpuop_func op_54d8_4_nf;
+extern cpuop_func op_54d8_4_ff;
+extern cpuop_func op_54e0_4_nf;
+extern cpuop_func op_54e0_4_ff;
+extern cpuop_func op_54e8_4_nf;
+extern cpuop_func op_54e8_4_ff;
+extern cpuop_func op_54f0_4_nf;
+extern cpuop_func op_54f0_4_ff;
+extern cpuop_func op_54f8_4_nf;
+extern cpuop_func op_54f8_4_ff;
+extern cpuop_func op_54f9_4_nf;
+extern cpuop_func op_54f9_4_ff;
+extern cpuop_func op_55c0_4_nf;
+extern cpuop_func op_55c0_4_ff;
+extern cpuop_func op_55c8_4_nf;
+extern cpuop_func op_55c8_4_ff;
+extern cpuop_func op_55d0_4_nf;
+extern cpuop_func op_55d0_4_ff;
+extern cpuop_func op_55d8_4_nf;
+extern cpuop_func op_55d8_4_ff;
+extern cpuop_func op_55e0_4_nf;
+extern cpuop_func op_55e0_4_ff;
+extern cpuop_func op_55e8_4_nf;
+extern cpuop_func op_55e8_4_ff;
+extern cpuop_func op_55f0_4_nf;
+extern cpuop_func op_55f0_4_ff;
+extern cpuop_func op_55f8_4_nf;
+extern cpuop_func op_55f8_4_ff;
+extern cpuop_func op_55f9_4_nf;
+extern cpuop_func op_55f9_4_ff;
+extern cpuop_func op_56c0_4_nf;
+extern cpuop_func op_56c0_4_ff;
+extern cpuop_func op_56c8_4_nf;
+extern cpuop_func op_56c8_4_ff;
+extern cpuop_func op_56d0_4_nf;
+extern cpuop_func op_56d0_4_ff;
+extern cpuop_func op_56d8_4_nf;
+extern cpuop_func op_56d8_4_ff;
+extern cpuop_func op_56e0_4_nf;
+extern cpuop_func op_56e0_4_ff;
+extern cpuop_func op_56e8_4_nf;
+extern cpuop_func op_56e8_4_ff;
+extern cpuop_func op_56f0_4_nf;
+extern cpuop_func op_56f0_4_ff;
+extern cpuop_func op_56f8_4_nf;
+extern cpuop_func op_56f8_4_ff;
+extern cpuop_func op_56f9_4_nf;
+extern cpuop_func op_56f9_4_ff;
+extern cpuop_func op_57c0_4_nf;
+extern cpuop_func op_57c0_4_ff;
+extern cpuop_func op_57c8_4_nf;
+extern cpuop_func op_57c8_4_ff;
+extern cpuop_func op_57d0_4_nf;
+extern cpuop_func op_57d0_4_ff;
+extern cpuop_func op_57d8_4_nf;
+extern cpuop_func op_57d8_4_ff;
+extern cpuop_func op_57e0_4_nf;
+extern cpuop_func op_57e0_4_ff;
+extern cpuop_func op_57e8_4_nf;
+extern cpuop_func op_57e8_4_ff;
+extern cpuop_func op_57f0_4_nf;
+extern cpuop_func op_57f0_4_ff;
+extern cpuop_func op_57f8_4_nf;
+extern cpuop_func op_57f8_4_ff;
+extern cpuop_func op_57f9_4_nf;
+extern cpuop_func op_57f9_4_ff;
+extern cpuop_func op_58c0_4_nf;
+extern cpuop_func op_58c0_4_ff;
+extern cpuop_func op_58c8_4_nf;
+extern cpuop_func op_58c8_4_ff;
+extern cpuop_func op_58d0_4_nf;
+extern cpuop_func op_58d0_4_ff;
+extern cpuop_func op_58d8_4_nf;
+extern cpuop_func op_58d8_4_ff;
+extern cpuop_func op_58e0_4_nf;
+extern cpuop_func op_58e0_4_ff;
+extern cpuop_func op_58e8_4_nf;
+extern cpuop_func op_58e8_4_ff;
+extern cpuop_func op_58f0_4_nf;
+extern cpuop_func op_58f0_4_ff;
+extern cpuop_func op_58f8_4_nf;
+extern cpuop_func op_58f8_4_ff;
+extern cpuop_func op_58f9_4_nf;
+extern cpuop_func op_58f9_4_ff;
+extern cpuop_func op_59c0_4_nf;
+extern cpuop_func op_59c0_4_ff;
+extern cpuop_func op_59c8_4_nf;
+extern cpuop_func op_59c8_4_ff;
+extern cpuop_func op_59d0_4_nf;
+extern cpuop_func op_59d0_4_ff;
+extern cpuop_func op_59d8_4_nf;
+extern cpuop_func op_59d8_4_ff;
+extern cpuop_func op_59e0_4_nf;
+extern cpuop_func op_59e0_4_ff;
+extern cpuop_func op_59e8_4_nf;
+extern cpuop_func op_59e8_4_ff;
+extern cpuop_func op_59f0_4_nf;
+extern cpuop_func op_59f0_4_ff;
+extern cpuop_func op_59f8_4_nf;
+extern cpuop_func op_59f8_4_ff;
+extern cpuop_func op_59f9_4_nf;
+extern cpuop_func op_59f9_4_ff;
+extern cpuop_func op_5ac0_4_nf;
+extern cpuop_func op_5ac0_4_ff;
+extern cpuop_func op_5ac8_4_nf;
+extern cpuop_func op_5ac8_4_ff;
+extern cpuop_func op_5ad0_4_nf;
+extern cpuop_func op_5ad0_4_ff;
+extern cpuop_func op_5ad8_4_nf;
+extern cpuop_func op_5ad8_4_ff;
+extern cpuop_func op_5ae0_4_nf;
+extern cpuop_func op_5ae0_4_ff;
+extern cpuop_func op_5ae8_4_nf;
+extern cpuop_func op_5ae8_4_ff;
+extern cpuop_func op_5af0_4_nf;
+extern cpuop_func op_5af0_4_ff;
+extern cpuop_func op_5af8_4_nf;
+extern cpuop_func op_5af8_4_ff;
+extern cpuop_func op_5af9_4_nf;
+extern cpuop_func op_5af9_4_ff;
+extern cpuop_func op_5bc0_4_nf;
+extern cpuop_func op_5bc0_4_ff;
+extern cpuop_func op_5bc8_4_nf;
+extern cpuop_func op_5bc8_4_ff;
+extern cpuop_func op_5bd0_4_nf;
+extern cpuop_func op_5bd0_4_ff;
+extern cpuop_func op_5bd8_4_nf;
+extern cpuop_func op_5bd8_4_ff;
+extern cpuop_func op_5be0_4_nf;
+extern cpuop_func op_5be0_4_ff;
+extern cpuop_func op_5be8_4_nf;
+extern cpuop_func op_5be8_4_ff;
+extern cpuop_func op_5bf0_4_nf;
+extern cpuop_func op_5bf0_4_ff;
+extern cpuop_func op_5bf8_4_nf;
+extern cpuop_func op_5bf8_4_ff;
+extern cpuop_func op_5bf9_4_nf;
+extern cpuop_func op_5bf9_4_ff;
+extern cpuop_func op_5cc0_4_nf;
+extern cpuop_func op_5cc0_4_ff;
+extern cpuop_func op_5cc8_4_nf;
+extern cpuop_func op_5cc8_4_ff;
+extern cpuop_func op_5cd0_4_nf;
+extern cpuop_func op_5cd0_4_ff;
+extern cpuop_func op_5cd8_4_nf;
+extern cpuop_func op_5cd8_4_ff;
+extern cpuop_func op_5ce0_4_nf;
+extern cpuop_func op_5ce0_4_ff;
+extern cpuop_func op_5ce8_4_nf;
+extern cpuop_func op_5ce8_4_ff;
+extern cpuop_func op_5cf0_4_nf;
+extern cpuop_func op_5cf0_4_ff;
+extern cpuop_func op_5cf8_4_nf;
+extern cpuop_func op_5cf8_4_ff;
+extern cpuop_func op_5cf9_4_nf;
+extern cpuop_func op_5cf9_4_ff;
+extern cpuop_func op_5dc0_4_nf;
+extern cpuop_func op_5dc0_4_ff;
+extern cpuop_func op_5dc8_4_nf;
+extern cpuop_func op_5dc8_4_ff;
+extern cpuop_func op_5dd0_4_nf;
+extern cpuop_func op_5dd0_4_ff;
+extern cpuop_func op_5dd8_4_nf;
+extern cpuop_func op_5dd8_4_ff;
+extern cpuop_func op_5de0_4_nf;
+extern cpuop_func op_5de0_4_ff;
+extern cpuop_func op_5de8_4_nf;
+extern cpuop_func op_5de8_4_ff;
+extern cpuop_func op_5df0_4_nf;
+extern cpuop_func op_5df0_4_ff;
+extern cpuop_func op_5df8_4_nf;
+extern cpuop_func op_5df8_4_ff;
+extern cpuop_func op_5df9_4_nf;
+extern cpuop_func op_5df9_4_ff;
+extern cpuop_func op_5ec0_4_nf;
+extern cpuop_func op_5ec0_4_ff;
+extern cpuop_func op_5ec8_4_nf;
+extern cpuop_func op_5ec8_4_ff;
+extern cpuop_func op_5ed0_4_nf;
+extern cpuop_func op_5ed0_4_ff;
+extern cpuop_func op_5ed8_4_nf;
+extern cpuop_func op_5ed8_4_ff;
+extern cpuop_func op_5ee0_4_nf;
+extern cpuop_func op_5ee0_4_ff;
+extern cpuop_func op_5ee8_4_nf;
+extern cpuop_func op_5ee8_4_ff;
+extern cpuop_func op_5ef0_4_nf;
+extern cpuop_func op_5ef0_4_ff;
+extern cpuop_func op_5ef8_4_nf;
+extern cpuop_func op_5ef8_4_ff;
+extern cpuop_func op_5ef9_4_nf;
+extern cpuop_func op_5ef9_4_ff;
+extern cpuop_func op_5fc0_4_nf;
+extern cpuop_func op_5fc0_4_ff;
+extern cpuop_func op_5fc8_4_nf;
+extern cpuop_func op_5fc8_4_ff;
+extern cpuop_func op_5fd0_4_nf;
+extern cpuop_func op_5fd0_4_ff;
+extern cpuop_func op_5fd8_4_nf;
+extern cpuop_func op_5fd8_4_ff;
+extern cpuop_func op_5fe0_4_nf;
+extern cpuop_func op_5fe0_4_ff;
+extern cpuop_func op_5fe8_4_nf;
+extern cpuop_func op_5fe8_4_ff;
+extern cpuop_func op_5ff0_4_nf;
+extern cpuop_func op_5ff0_4_ff;
+extern cpuop_func op_5ff8_4_nf;
+extern cpuop_func op_5ff8_4_ff;
+extern cpuop_func op_5ff9_4_nf;
+extern cpuop_func op_5ff9_4_ff;
+extern cpuop_func op_6000_4_nf;
+extern cpuop_func op_6000_4_ff;
+extern cpuop_func op_6001_4_nf;
+extern cpuop_func op_6001_4_ff;
+extern cpuop_func op_60ff_4_nf;
+extern cpuop_func op_60ff_4_ff;
+extern cpuop_func op_6100_4_nf;
+extern cpuop_func op_6100_4_ff;
+extern cpuop_func op_6101_4_nf;
+extern cpuop_func op_6101_4_ff;
+extern cpuop_func op_61ff_4_nf;
+extern cpuop_func op_61ff_4_ff;
+extern cpuop_func op_6200_4_nf;
+extern cpuop_func op_6200_4_ff;
+extern cpuop_func op_6201_4_nf;
+extern cpuop_func op_6201_4_ff;
+extern cpuop_func op_62ff_4_nf;
+extern cpuop_func op_62ff_4_ff;
+extern cpuop_func op_6300_4_nf;
+extern cpuop_func op_6300_4_ff;
+extern cpuop_func op_6301_4_nf;
+extern cpuop_func op_6301_4_ff;
+extern cpuop_func op_63ff_4_nf;
+extern cpuop_func op_63ff_4_ff;
+extern cpuop_func op_6400_4_nf;
+extern cpuop_func op_6400_4_ff;
+extern cpuop_func op_6401_4_nf;
+extern cpuop_func op_6401_4_ff;
+extern cpuop_func op_64ff_4_nf;
+extern cpuop_func op_64ff_4_ff;
+extern cpuop_func op_6500_4_nf;
+extern cpuop_func op_6500_4_ff;
+extern cpuop_func op_6501_4_nf;
+extern cpuop_func op_6501_4_ff;
+extern cpuop_func op_65ff_4_nf;
+extern cpuop_func op_65ff_4_ff;
+extern cpuop_func op_6600_4_nf;
+extern cpuop_func op_6600_4_ff;
+extern cpuop_func op_6601_4_nf;
+extern cpuop_func op_6601_4_ff;
+extern cpuop_func op_66ff_4_nf;
+extern cpuop_func op_66ff_4_ff;
+extern cpuop_func op_6700_4_nf;
+extern cpuop_func op_6700_4_ff;
+extern cpuop_func op_6701_4_nf;
+extern cpuop_func op_6701_4_ff;
+extern cpuop_func op_67ff_4_nf;
+extern cpuop_func op_67ff_4_ff;
+extern cpuop_func op_6800_4_nf;
+extern cpuop_func op_6800_4_ff;
+extern cpuop_func op_6801_4_nf;
+extern cpuop_func op_6801_4_ff;
+extern cpuop_func op_68ff_4_nf;
+extern cpuop_func op_68ff_4_ff;
+extern cpuop_func op_6900_4_nf;
+extern cpuop_func op_6900_4_ff;
+extern cpuop_func op_6901_4_nf;
+extern cpuop_func op_6901_4_ff;
+extern cpuop_func op_69ff_4_nf;
+extern cpuop_func op_69ff_4_ff;
+extern cpuop_func op_6a00_4_nf;
+extern cpuop_func op_6a00_4_ff;
+extern cpuop_func op_6a01_4_nf;
+extern cpuop_func op_6a01_4_ff;
+extern cpuop_func op_6aff_4_nf;
+extern cpuop_func op_6aff_4_ff;
+extern cpuop_func op_6b00_4_nf;
+extern cpuop_func op_6b00_4_ff;
+extern cpuop_func op_6b01_4_nf;
+extern cpuop_func op_6b01_4_ff;
+extern cpuop_func op_6bff_4_nf;
+extern cpuop_func op_6bff_4_ff;
+extern cpuop_func op_6c00_4_nf;
+extern cpuop_func op_6c00_4_ff;
+extern cpuop_func op_6c01_4_nf;
+extern cpuop_func op_6c01_4_ff;
+extern cpuop_func op_6cff_4_nf;
+extern cpuop_func op_6cff_4_ff;
+extern cpuop_func op_6d00_4_nf;
+extern cpuop_func op_6d00_4_ff;
+extern cpuop_func op_6d01_4_nf;
+extern cpuop_func op_6d01_4_ff;
+extern cpuop_func op_6dff_4_nf;
+extern cpuop_func op_6dff_4_ff;
+extern cpuop_func op_6e00_4_nf;
+extern cpuop_func op_6e00_4_ff;
+extern cpuop_func op_6e01_4_nf;
+extern cpuop_func op_6e01_4_ff;
+extern cpuop_func op_6eff_4_nf;
+extern cpuop_func op_6eff_4_ff;
+extern cpuop_func op_6f00_4_nf;
+extern cpuop_func op_6f00_4_ff;
+extern cpuop_func op_6f01_4_nf;
+extern cpuop_func op_6f01_4_ff;
+extern cpuop_func op_6fff_4_nf;
+extern cpuop_func op_6fff_4_ff;
+extern cpuop_func op_7000_4_nf;
+extern cpuop_func op_7000_4_ff;
+extern cpuop_func op_8000_4_nf;
+extern cpuop_func op_8000_4_ff;
+extern cpuop_func op_8010_4_nf;
+extern cpuop_func op_8010_4_ff;
+extern cpuop_func op_8018_4_nf;
+extern cpuop_func op_8018_4_ff;
+extern cpuop_func op_8020_4_nf;
+extern cpuop_func op_8020_4_ff;
+extern cpuop_func op_8028_4_nf;
+extern cpuop_func op_8028_4_ff;
+extern cpuop_func op_8030_4_nf;
+extern cpuop_func op_8030_4_ff;
+extern cpuop_func op_8038_4_nf;
+extern cpuop_func op_8038_4_ff;
+extern cpuop_func op_8039_4_nf;
+extern cpuop_func op_8039_4_ff;
+extern cpuop_func op_803a_4_nf;
+extern cpuop_func op_803a_4_ff;
+extern cpuop_func op_803b_4_nf;
+extern cpuop_func op_803b_4_ff;
+extern cpuop_func op_803c_4_nf;
+extern cpuop_func op_803c_4_ff;
+extern cpuop_func op_8040_4_nf;
+extern cpuop_func op_8040_4_ff;
+extern cpuop_func op_8050_4_nf;
+extern cpuop_func op_8050_4_ff;
+extern cpuop_func op_8058_4_nf;
+extern cpuop_func op_8058_4_ff;
+extern cpuop_func op_8060_4_nf;
+extern cpuop_func op_8060_4_ff;
+extern cpuop_func op_8068_4_nf;
+extern cpuop_func op_8068_4_ff;
+extern cpuop_func op_8070_4_nf;
+extern cpuop_func op_8070_4_ff;
+extern cpuop_func op_8078_4_nf;
+extern cpuop_func op_8078_4_ff;
+extern cpuop_func op_8079_4_nf;
+extern cpuop_func op_8079_4_ff;
+extern cpuop_func op_807a_4_nf;
+extern cpuop_func op_807a_4_ff;
+extern cpuop_func op_807b_4_nf;
+extern cpuop_func op_807b_4_ff;
+extern cpuop_func op_807c_4_nf;
+extern cpuop_func op_807c_4_ff;
+extern cpuop_func op_8080_4_nf;
+extern cpuop_func op_8080_4_ff;
+extern cpuop_func op_8090_4_nf;
+extern cpuop_func op_8090_4_ff;
+extern cpuop_func op_8098_4_nf;
+extern cpuop_func op_8098_4_ff;
+extern cpuop_func op_80a0_4_nf;
+extern cpuop_func op_80a0_4_ff;
+extern cpuop_func op_80a8_4_nf;
+extern cpuop_func op_80a8_4_ff;
+extern cpuop_func op_80b0_4_nf;
+extern cpuop_func op_80b0_4_ff;
+extern cpuop_func op_80b8_4_nf;
+extern cpuop_func op_80b8_4_ff;
+extern cpuop_func op_80b9_4_nf;
+extern cpuop_func op_80b9_4_ff;
+extern cpuop_func op_80ba_4_nf;
+extern cpuop_func op_80ba_4_ff;
+extern cpuop_func op_80bb_4_nf;
+extern cpuop_func op_80bb_4_ff;
+extern cpuop_func op_80bc_4_nf;
+extern cpuop_func op_80bc_4_ff;
+extern cpuop_func op_80c0_4_nf;
+extern cpuop_func op_80c0_4_ff;
+extern cpuop_func op_80d0_4_nf;
+extern cpuop_func op_80d0_4_ff;
+extern cpuop_func op_80d8_4_nf;
+extern cpuop_func op_80d8_4_ff;
+extern cpuop_func op_80e0_4_nf;
+extern cpuop_func op_80e0_4_ff;
+extern cpuop_func op_80e8_4_nf;
+extern cpuop_func op_80e8_4_ff;
+extern cpuop_func op_80f0_4_nf;
+extern cpuop_func op_80f0_4_ff;
+extern cpuop_func op_80f8_4_nf;
+extern cpuop_func op_80f8_4_ff;
+extern cpuop_func op_80f9_4_nf;
+extern cpuop_func op_80f9_4_ff;
+extern cpuop_func op_80fa_4_nf;
+extern cpuop_func op_80fa_4_ff;
+extern cpuop_func op_80fb_4_nf;
+extern cpuop_func op_80fb_4_ff;
+extern cpuop_func op_80fc_4_nf;
+extern cpuop_func op_80fc_4_ff;
+extern cpuop_func op_8100_4_nf;
+extern cpuop_func op_8100_4_ff;
+extern cpuop_func op_8108_4_nf;
+extern cpuop_func op_8108_4_ff;
+extern cpuop_func op_8110_4_nf;
+extern cpuop_func op_8110_4_ff;
+extern cpuop_func op_8118_4_nf;
+extern cpuop_func op_8118_4_ff;
+extern cpuop_func op_8120_4_nf;
+extern cpuop_func op_8120_4_ff;
+extern cpuop_func op_8128_4_nf;
+extern cpuop_func op_8128_4_ff;
+extern cpuop_func op_8130_4_nf;
+extern cpuop_func op_8130_4_ff;
+extern cpuop_func op_8138_4_nf;
+extern cpuop_func op_8138_4_ff;
+extern cpuop_func op_8139_4_nf;
+extern cpuop_func op_8139_4_ff;
+extern cpuop_func op_8150_4_nf;
+extern cpuop_func op_8150_4_ff;
+extern cpuop_func op_8158_4_nf;
+extern cpuop_func op_8158_4_ff;
+extern cpuop_func op_8160_4_nf;
+extern cpuop_func op_8160_4_ff;
+extern cpuop_func op_8168_4_nf;
+extern cpuop_func op_8168_4_ff;
+extern cpuop_func op_8170_4_nf;
+extern cpuop_func op_8170_4_ff;
+extern cpuop_func op_8178_4_nf;
+extern cpuop_func op_8178_4_ff;
+extern cpuop_func op_8179_4_nf;
+extern cpuop_func op_8179_4_ff;
+extern cpuop_func op_8190_4_nf;
+extern cpuop_func op_8190_4_ff;
+extern cpuop_func op_8198_4_nf;
+extern cpuop_func op_8198_4_ff;
+extern cpuop_func op_81a0_4_nf;
+extern cpuop_func op_81a0_4_ff;
+extern cpuop_func op_81a8_4_nf;
+extern cpuop_func op_81a8_4_ff;
+extern cpuop_func op_81b0_4_nf;
+extern cpuop_func op_81b0_4_ff;
+extern cpuop_func op_81b8_4_nf;
+extern cpuop_func op_81b8_4_ff;
+extern cpuop_func op_81b9_4_nf;
+extern cpuop_func op_81b9_4_ff;
+extern cpuop_func op_81c0_4_nf;
+extern cpuop_func op_81c0_4_ff;
+extern cpuop_func op_81d0_4_nf;
+extern cpuop_func op_81d0_4_ff;
+extern cpuop_func op_81d8_4_nf;
+extern cpuop_func op_81d8_4_ff;
+extern cpuop_func op_81e0_4_nf;
+extern cpuop_func op_81e0_4_ff;
+extern cpuop_func op_81e8_4_nf;
+extern cpuop_func op_81e8_4_ff;
+extern cpuop_func op_81f0_4_nf;
+extern cpuop_func op_81f0_4_ff;
+extern cpuop_func op_81f8_4_nf;
+extern cpuop_func op_81f8_4_ff;
+extern cpuop_func op_81f9_4_nf;
+extern cpuop_func op_81f9_4_ff;
+extern cpuop_func op_81fa_4_nf;
+extern cpuop_func op_81fa_4_ff;
+extern cpuop_func op_81fb_4_nf;
+extern cpuop_func op_81fb_4_ff;
+extern cpuop_func op_81fc_4_nf;
+extern cpuop_func op_81fc_4_ff;
+extern cpuop_func op_9000_4_nf;
+extern cpuop_func op_9000_4_ff;
+extern cpuop_func op_9010_4_nf;
+extern cpuop_func op_9010_4_ff;
+extern cpuop_func op_9018_4_nf;
+extern cpuop_func op_9018_4_ff;
+extern cpuop_func op_9020_4_nf;
+extern cpuop_func op_9020_4_ff;
+extern cpuop_func op_9028_4_nf;
+extern cpuop_func op_9028_4_ff;
+extern cpuop_func op_9030_4_nf;
+extern cpuop_func op_9030_4_ff;
+extern cpuop_func op_9038_4_nf;
+extern cpuop_func op_9038_4_ff;
+extern cpuop_func op_9039_4_nf;
+extern cpuop_func op_9039_4_ff;
+extern cpuop_func op_903a_4_nf;
+extern cpuop_func op_903a_4_ff;
+extern cpuop_func op_903b_4_nf;
+extern cpuop_func op_903b_4_ff;
+extern cpuop_func op_903c_4_nf;
+extern cpuop_func op_903c_4_ff;
+extern cpuop_func op_9040_4_nf;
+extern cpuop_func op_9040_4_ff;
+extern cpuop_func op_9048_4_nf;
+extern cpuop_func op_9048_4_ff;
+extern cpuop_func op_9050_4_nf;
+extern cpuop_func op_9050_4_ff;
+extern cpuop_func op_9058_4_nf;
+extern cpuop_func op_9058_4_ff;
+extern cpuop_func op_9060_4_nf;
+extern cpuop_func op_9060_4_ff;
+extern cpuop_func op_9068_4_nf;
+extern cpuop_func op_9068_4_ff;
+extern cpuop_func op_9070_4_nf;
+extern cpuop_func op_9070_4_ff;
+extern cpuop_func op_9078_4_nf;
+extern cpuop_func op_9078_4_ff;
+extern cpuop_func op_9079_4_nf;
+extern cpuop_func op_9079_4_ff;
+extern cpuop_func op_907a_4_nf;
+extern cpuop_func op_907a_4_ff;
+extern cpuop_func op_907b_4_nf;
+extern cpuop_func op_907b_4_ff;
+extern cpuop_func op_907c_4_nf;
+extern cpuop_func op_907c_4_ff;
+extern cpuop_func op_9080_4_nf;
+extern cpuop_func op_9080_4_ff;
+extern cpuop_func op_9088_4_nf;
+extern cpuop_func op_9088_4_ff;
+extern cpuop_func op_9090_4_nf;
+extern cpuop_func op_9090_4_ff;
+extern cpuop_func op_9098_4_nf;
+extern cpuop_func op_9098_4_ff;
+extern cpuop_func op_90a0_4_nf;
+extern cpuop_func op_90a0_4_ff;
+extern cpuop_func op_90a8_4_nf;
+extern cpuop_func op_90a8_4_ff;
+extern cpuop_func op_90b0_4_nf;
+extern cpuop_func op_90b0_4_ff;
+extern cpuop_func op_90b8_4_nf;
+extern cpuop_func op_90b8_4_ff;
+extern cpuop_func op_90b9_4_nf;
+extern cpuop_func op_90b9_4_ff;
+extern cpuop_func op_90ba_4_nf;
+extern cpuop_func op_90ba_4_ff;
+extern cpuop_func op_90bb_4_nf;
+extern cpuop_func op_90bb_4_ff;
+extern cpuop_func op_90bc_4_nf;
+extern cpuop_func op_90bc_4_ff;
+extern cpuop_func op_90c0_4_nf;
+extern cpuop_func op_90c0_4_ff;
+extern cpuop_func op_90c8_4_nf;
+extern cpuop_func op_90c8_4_ff;
+extern cpuop_func op_90d0_4_nf;
+extern cpuop_func op_90d0_4_ff;
+extern cpuop_func op_90d8_4_nf;
+extern cpuop_func op_90d8_4_ff;
+extern cpuop_func op_90e0_4_nf;
+extern cpuop_func op_90e0_4_ff;
+extern cpuop_func op_90e8_4_nf;
+extern cpuop_func op_90e8_4_ff;
+extern cpuop_func op_90f0_4_nf;
+extern cpuop_func op_90f0_4_ff;
+extern cpuop_func op_90f8_4_nf;
+extern cpuop_func op_90f8_4_ff;
+extern cpuop_func op_90f9_4_nf;
+extern cpuop_func op_90f9_4_ff;
+extern cpuop_func op_90fa_4_nf;
+extern cpuop_func op_90fa_4_ff;
+extern cpuop_func op_90fb_4_nf;
+extern cpuop_func op_90fb_4_ff;
+extern cpuop_func op_90fc_4_nf;
+extern cpuop_func op_90fc_4_ff;
+extern cpuop_func op_9100_4_nf;
+extern cpuop_func op_9100_4_ff;
+extern cpuop_func op_9108_4_nf;
+extern cpuop_func op_9108_4_ff;
+extern cpuop_func op_9110_4_nf;
+extern cpuop_func op_9110_4_ff;
+extern cpuop_func op_9118_4_nf;
+extern cpuop_func op_9118_4_ff;
+extern cpuop_func op_9120_4_nf;
+extern cpuop_func op_9120_4_ff;
+extern cpuop_func op_9128_4_nf;
+extern cpuop_func op_9128_4_ff;
+extern cpuop_func op_9130_4_nf;
+extern cpuop_func op_9130_4_ff;
+extern cpuop_func op_9138_4_nf;
+extern cpuop_func op_9138_4_ff;
+extern cpuop_func op_9139_4_nf;
+extern cpuop_func op_9139_4_ff;
+extern cpuop_func op_9140_4_nf;
+extern cpuop_func op_9140_4_ff;
+extern cpuop_func op_9148_4_nf;
+extern cpuop_func op_9148_4_ff;
+extern cpuop_func op_9150_4_nf;
+extern cpuop_func op_9150_4_ff;
+extern cpuop_func op_9158_4_nf;
+extern cpuop_func op_9158_4_ff;
+extern cpuop_func op_9160_4_nf;
+extern cpuop_func op_9160_4_ff;
+extern cpuop_func op_9168_4_nf;
+extern cpuop_func op_9168_4_ff;
+extern cpuop_func op_9170_4_nf;
+extern cpuop_func op_9170_4_ff;
+extern cpuop_func op_9178_4_nf;
+extern cpuop_func op_9178_4_ff;
+extern cpuop_func op_9179_4_nf;
+extern cpuop_func op_9179_4_ff;
+extern cpuop_func op_9180_4_nf;
+extern cpuop_func op_9180_4_ff;
+extern cpuop_func op_9188_4_nf;
+extern cpuop_func op_9188_4_ff;
+extern cpuop_func op_9190_4_nf;
+extern cpuop_func op_9190_4_ff;
+extern cpuop_func op_9198_4_nf;
+extern cpuop_func op_9198_4_ff;
+extern cpuop_func op_91a0_4_nf;
+extern cpuop_func op_91a0_4_ff;
+extern cpuop_func op_91a8_4_nf;
+extern cpuop_func op_91a8_4_ff;
+extern cpuop_func op_91b0_4_nf;
+extern cpuop_func op_91b0_4_ff;
+extern cpuop_func op_91b8_4_nf;
+extern cpuop_func op_91b8_4_ff;
+extern cpuop_func op_91b9_4_nf;
+extern cpuop_func op_91b9_4_ff;
+extern cpuop_func op_91c0_4_nf;
+extern cpuop_func op_91c0_4_ff;
+extern cpuop_func op_91c8_4_nf;
+extern cpuop_func op_91c8_4_ff;
+extern cpuop_func op_91d0_4_nf;
+extern cpuop_func op_91d0_4_ff;
+extern cpuop_func op_91d8_4_nf;
+extern cpuop_func op_91d8_4_ff;
+extern cpuop_func op_91e0_4_nf;
+extern cpuop_func op_91e0_4_ff;
+extern cpuop_func op_91e8_4_nf;
+extern cpuop_func op_91e8_4_ff;
+extern cpuop_func op_91f0_4_nf;
+extern cpuop_func op_91f0_4_ff;
+extern cpuop_func op_91f8_4_nf;
+extern cpuop_func op_91f8_4_ff;
+extern cpuop_func op_91f9_4_nf;
+extern cpuop_func op_91f9_4_ff;
+extern cpuop_func op_91fa_4_nf;
+extern cpuop_func op_91fa_4_ff;
+extern cpuop_func op_91fb_4_nf;
+extern cpuop_func op_91fb_4_ff;
+extern cpuop_func op_91fc_4_nf;
+extern cpuop_func op_91fc_4_ff;
+extern cpuop_func op_b000_4_nf;
+extern cpuop_func op_b000_4_ff;
+extern cpuop_func op_b010_4_nf;
+extern cpuop_func op_b010_4_ff;
+extern cpuop_func op_b018_4_nf;
+extern cpuop_func op_b018_4_ff;
+extern cpuop_func op_b020_4_nf;
+extern cpuop_func op_b020_4_ff;
+extern cpuop_func op_b028_4_nf;
+extern cpuop_func op_b028_4_ff;
+extern cpuop_func op_b030_4_nf;
+extern cpuop_func op_b030_4_ff;
+extern cpuop_func op_b038_4_nf;
+extern cpuop_func op_b038_4_ff;
+extern cpuop_func op_b039_4_nf;
+extern cpuop_func op_b039_4_ff;
+extern cpuop_func op_b03a_4_nf;
+extern cpuop_func op_b03a_4_ff;
+extern cpuop_func op_b03b_4_nf;
+extern cpuop_func op_b03b_4_ff;
+extern cpuop_func op_b03c_4_nf;
+extern cpuop_func op_b03c_4_ff;
+extern cpuop_func op_b040_4_nf;
+extern cpuop_func op_b040_4_ff;
+extern cpuop_func op_b048_4_nf;
+extern cpuop_func op_b048_4_ff;
+extern cpuop_func op_b050_4_nf;
+extern cpuop_func op_b050_4_ff;
+extern cpuop_func op_b058_4_nf;
+extern cpuop_func op_b058_4_ff;
+extern cpuop_func op_b060_4_nf;
+extern cpuop_func op_b060_4_ff;
+extern cpuop_func op_b068_4_nf;
+extern cpuop_func op_b068_4_ff;
+extern cpuop_func op_b070_4_nf;
+extern cpuop_func op_b070_4_ff;
+extern cpuop_func op_b078_4_nf;
+extern cpuop_func op_b078_4_ff;
+extern cpuop_func op_b079_4_nf;
+extern cpuop_func op_b079_4_ff;
+extern cpuop_func op_b07a_4_nf;
+extern cpuop_func op_b07a_4_ff;
+extern cpuop_func op_b07b_4_nf;
+extern cpuop_func op_b07b_4_ff;
+extern cpuop_func op_b07c_4_nf;
+extern cpuop_func op_b07c_4_ff;
+extern cpuop_func op_b080_4_nf;
+extern cpuop_func op_b080_4_ff;
+extern cpuop_func op_b088_4_nf;
+extern cpuop_func op_b088_4_ff;
+extern cpuop_func op_b090_4_nf;
+extern cpuop_func op_b090_4_ff;
+extern cpuop_func op_b098_4_nf;
+extern cpuop_func op_b098_4_ff;
+extern cpuop_func op_b0a0_4_nf;
+extern cpuop_func op_b0a0_4_ff;
+extern cpuop_func op_b0a8_4_nf;
+extern cpuop_func op_b0a8_4_ff;
+extern cpuop_func op_b0b0_4_nf;
+extern cpuop_func op_b0b0_4_ff;
+extern cpuop_func op_b0b8_4_nf;
+extern cpuop_func op_b0b8_4_ff;
+extern cpuop_func op_b0b9_4_nf;
+extern cpuop_func op_b0b9_4_ff;
+extern cpuop_func op_b0ba_4_nf;
+extern cpuop_func op_b0ba_4_ff;
+extern cpuop_func op_b0bb_4_nf;
+extern cpuop_func op_b0bb_4_ff;
+extern cpuop_func op_b0bc_4_nf;
+extern cpuop_func op_b0bc_4_ff;
+extern cpuop_func op_b0c0_4_nf;
+extern cpuop_func op_b0c0_4_ff;
+extern cpuop_func op_b0c8_4_nf;
+extern cpuop_func op_b0c8_4_ff;
+extern cpuop_func op_b0d0_4_nf;
+extern cpuop_func op_b0d0_4_ff;
+extern cpuop_func op_b0d8_4_nf;
+extern cpuop_func op_b0d8_4_ff;
+extern cpuop_func op_b0e0_4_nf;
+extern cpuop_func op_b0e0_4_ff;
+extern cpuop_func op_b0e8_4_nf;
+extern cpuop_func op_b0e8_4_ff;
+extern cpuop_func op_b0f0_4_nf;
+extern cpuop_func op_b0f0_4_ff;
+extern cpuop_func op_b0f8_4_nf;
+extern cpuop_func op_b0f8_4_ff;
+extern cpuop_func op_b0f9_4_nf;
+extern cpuop_func op_b0f9_4_ff;
+extern cpuop_func op_b0fa_4_nf;
+extern cpuop_func op_b0fa_4_ff;
+extern cpuop_func op_b0fb_4_nf;
+extern cpuop_func op_b0fb_4_ff;
+extern cpuop_func op_b0fc_4_nf;
+extern cpuop_func op_b0fc_4_ff;
+extern cpuop_func op_b100_4_nf;
+extern cpuop_func op_b100_4_ff;
+extern cpuop_func op_b108_4_nf;
+extern cpuop_func op_b108_4_ff;
+extern cpuop_func op_b110_4_nf;
+extern cpuop_func op_b110_4_ff;
+extern cpuop_func op_b118_4_nf;
+extern cpuop_func op_b118_4_ff;
+extern cpuop_func op_b120_4_nf;
+extern cpuop_func op_b120_4_ff;
+extern cpuop_func op_b128_4_nf;
+extern cpuop_func op_b128_4_ff;
+extern cpuop_func op_b130_4_nf;
+extern cpuop_func op_b130_4_ff;
+extern cpuop_func op_b138_4_nf;
+extern cpuop_func op_b138_4_ff;
+extern cpuop_func op_b139_4_nf;
+extern cpuop_func op_b139_4_ff;
+extern cpuop_func op_b140_4_nf;
+extern cpuop_func op_b140_4_ff;
+extern cpuop_func op_b148_4_nf;
+extern cpuop_func op_b148_4_ff;
+extern cpuop_func op_b150_4_nf;
+extern cpuop_func op_b150_4_ff;
+extern cpuop_func op_b158_4_nf;
+extern cpuop_func op_b158_4_ff;
+extern cpuop_func op_b160_4_nf;
+extern cpuop_func op_b160_4_ff;
+extern cpuop_func op_b168_4_nf;
+extern cpuop_func op_b168_4_ff;
+extern cpuop_func op_b170_4_nf;
+extern cpuop_func op_b170_4_ff;
+extern cpuop_func op_b178_4_nf;
+extern cpuop_func op_b178_4_ff;
+extern cpuop_func op_b179_4_nf;
+extern cpuop_func op_b179_4_ff;
+extern cpuop_func op_b180_4_nf;
+extern cpuop_func op_b180_4_ff;
+extern cpuop_func op_b188_4_nf;
+extern cpuop_func op_b188_4_ff;
+extern cpuop_func op_b190_4_nf;
+extern cpuop_func op_b190_4_ff;
+extern cpuop_func op_b198_4_nf;
+extern cpuop_func op_b198_4_ff;
+extern cpuop_func op_b1a0_4_nf;
+extern cpuop_func op_b1a0_4_ff;
+extern cpuop_func op_b1a8_4_nf;
+extern cpuop_func op_b1a8_4_ff;
+extern cpuop_func op_b1b0_4_nf;
+extern cpuop_func op_b1b0_4_ff;
+extern cpuop_func op_b1b8_4_nf;
+extern cpuop_func op_b1b8_4_ff;
+extern cpuop_func op_b1b9_4_nf;
+extern cpuop_func op_b1b9_4_ff;
+extern cpuop_func op_b1c0_4_nf;
+extern cpuop_func op_b1c0_4_ff;
+extern cpuop_func op_b1c8_4_nf;
+extern cpuop_func op_b1c8_4_ff;
+extern cpuop_func op_b1d0_4_nf;
+extern cpuop_func op_b1d0_4_ff;
+extern cpuop_func op_b1d8_4_nf;
+extern cpuop_func op_b1d8_4_ff;
+extern cpuop_func op_b1e0_4_nf;
+extern cpuop_func op_b1e0_4_ff;
+extern cpuop_func op_b1e8_4_nf;
+extern cpuop_func op_b1e8_4_ff;
+extern cpuop_func op_b1f0_4_nf;
+extern cpuop_func op_b1f0_4_ff;
+extern cpuop_func op_b1f8_4_nf;
+extern cpuop_func op_b1f8_4_ff;
+extern cpuop_func op_b1f9_4_nf;
+extern cpuop_func op_b1f9_4_ff;
+extern cpuop_func op_b1fa_4_nf;
+extern cpuop_func op_b1fa_4_ff;
+extern cpuop_func op_b1fb_4_nf;
+extern cpuop_func op_b1fb_4_ff;
+extern cpuop_func op_b1fc_4_nf;
+extern cpuop_func op_b1fc_4_ff;
+extern cpuop_func op_c000_4_nf;
+extern cpuop_func op_c000_4_ff;
+extern cpuop_func op_c010_4_nf;
+extern cpuop_func op_c010_4_ff;
+extern cpuop_func op_c018_4_nf;
+extern cpuop_func op_c018_4_ff;
+extern cpuop_func op_c020_4_nf;
+extern cpuop_func op_c020_4_ff;
+extern cpuop_func op_c028_4_nf;
+extern cpuop_func op_c028_4_ff;
+extern cpuop_func op_c030_4_nf;
+extern cpuop_func op_c030_4_ff;
+extern cpuop_func op_c038_4_nf;
+extern cpuop_func op_c038_4_ff;
+extern cpuop_func op_c039_4_nf;
+extern cpuop_func op_c039_4_ff;
+extern cpuop_func op_c03a_4_nf;
+extern cpuop_func op_c03a_4_ff;
+extern cpuop_func op_c03b_4_nf;
+extern cpuop_func op_c03b_4_ff;
+extern cpuop_func op_c03c_4_nf;
+extern cpuop_func op_c03c_4_ff;
+extern cpuop_func op_c040_4_nf;
+extern cpuop_func op_c040_4_ff;
+extern cpuop_func op_c050_4_nf;
+extern cpuop_func op_c050_4_ff;
+extern cpuop_func op_c058_4_nf;
+extern cpuop_func op_c058_4_ff;
+extern cpuop_func op_c060_4_nf;
+extern cpuop_func op_c060_4_ff;
+extern cpuop_func op_c068_4_nf;
+extern cpuop_func op_c068_4_ff;
+extern cpuop_func op_c070_4_nf;
+extern cpuop_func op_c070_4_ff;
+extern cpuop_func op_c078_4_nf;
+extern cpuop_func op_c078_4_ff;
+extern cpuop_func op_c079_4_nf;
+extern cpuop_func op_c079_4_ff;
+extern cpuop_func op_c07a_4_nf;
+extern cpuop_func op_c07a_4_ff;
+extern cpuop_func op_c07b_4_nf;
+extern cpuop_func op_c07b_4_ff;
+extern cpuop_func op_c07c_4_nf;
+extern cpuop_func op_c07c_4_ff;
+extern cpuop_func op_c080_4_nf;
+extern cpuop_func op_c080_4_ff;
+extern cpuop_func op_c090_4_nf;
+extern cpuop_func op_c090_4_ff;
+extern cpuop_func op_c098_4_nf;
+extern cpuop_func op_c098_4_ff;
+extern cpuop_func op_c0a0_4_nf;
+extern cpuop_func op_c0a0_4_ff;
+extern cpuop_func op_c0a8_4_nf;
+extern cpuop_func op_c0a8_4_ff;
+extern cpuop_func op_c0b0_4_nf;
+extern cpuop_func op_c0b0_4_ff;
+extern cpuop_func op_c0b8_4_nf;
+extern cpuop_func op_c0b8_4_ff;
+extern cpuop_func op_c0b9_4_nf;
+extern cpuop_func op_c0b9_4_ff;
+extern cpuop_func op_c0ba_4_nf;
+extern cpuop_func op_c0ba_4_ff;
+extern cpuop_func op_c0bb_4_nf;
+extern cpuop_func op_c0bb_4_ff;
+extern cpuop_func op_c0bc_4_nf;
+extern cpuop_func op_c0bc_4_ff;
+extern cpuop_func op_c0c0_4_nf;
+extern cpuop_func op_c0c0_4_ff;
+extern cpuop_func op_c0d0_4_nf;
+extern cpuop_func op_c0d0_4_ff;
+extern cpuop_func op_c0d8_4_nf;
+extern cpuop_func op_c0d8_4_ff;
+extern cpuop_func op_c0e0_4_nf;
+extern cpuop_func op_c0e0_4_ff;
+extern cpuop_func op_c0e8_4_nf;
+extern cpuop_func op_c0e8_4_ff;
+extern cpuop_func op_c0f0_4_nf;
+extern cpuop_func op_c0f0_4_ff;
+extern cpuop_func op_c0f8_4_nf;
+extern cpuop_func op_c0f8_4_ff;
+extern cpuop_func op_c0f9_4_nf;
+extern cpuop_func op_c0f9_4_ff;
+extern cpuop_func op_c0fa_4_nf;
+extern cpuop_func op_c0fa_4_ff;
+extern cpuop_func op_c0fb_4_nf;
+extern cpuop_func op_c0fb_4_ff;
+extern cpuop_func op_c0fc_4_nf;
+extern cpuop_func op_c0fc_4_ff;
+extern cpuop_func op_c100_4_nf;
+extern cpuop_func op_c100_4_ff;
+extern cpuop_func op_c108_4_nf;
+extern cpuop_func op_c108_4_ff;
+extern cpuop_func op_c110_4_nf;
+extern cpuop_func op_c110_4_ff;
+extern cpuop_func op_c118_4_nf;
+extern cpuop_func op_c118_4_ff;
+extern cpuop_func op_c120_4_nf;
+extern cpuop_func op_c120_4_ff;
+extern cpuop_func op_c128_4_nf;
+extern cpuop_func op_c128_4_ff;
+extern cpuop_func op_c130_4_nf;
+extern cpuop_func op_c130_4_ff;
+extern cpuop_func op_c138_4_nf;
+extern cpuop_func op_c138_4_ff;
+extern cpuop_func op_c139_4_nf;
+extern cpuop_func op_c139_4_ff;
+extern cpuop_func op_c140_4_nf;
+extern cpuop_func op_c140_4_ff;
+extern cpuop_func op_c148_4_nf;
+extern cpuop_func op_c148_4_ff;
+extern cpuop_func op_c150_4_nf;
+extern cpuop_func op_c150_4_ff;
+extern cpuop_func op_c158_4_nf;
+extern cpuop_func op_c158_4_ff;
+extern cpuop_func op_c160_4_nf;
+extern cpuop_func op_c160_4_ff;
+extern cpuop_func op_c168_4_nf;
+extern cpuop_func op_c168_4_ff;
+extern cpuop_func op_c170_4_nf;
+extern cpuop_func op_c170_4_ff;
+extern cpuop_func op_c178_4_nf;
+extern cpuop_func op_c178_4_ff;
+extern cpuop_func op_c179_4_nf;
+extern cpuop_func op_c179_4_ff;
+extern cpuop_func op_c188_4_nf;
+extern cpuop_func op_c188_4_ff;
+extern cpuop_func op_c190_4_nf;
+extern cpuop_func op_c190_4_ff;
+extern cpuop_func op_c198_4_nf;
+extern cpuop_func op_c198_4_ff;
+extern cpuop_func op_c1a0_4_nf;
+extern cpuop_func op_c1a0_4_ff;
+extern cpuop_func op_c1a8_4_nf;
+extern cpuop_func op_c1a8_4_ff;
+extern cpuop_func op_c1b0_4_nf;
+extern cpuop_func op_c1b0_4_ff;
+extern cpuop_func op_c1b8_4_nf;
+extern cpuop_func op_c1b8_4_ff;
+extern cpuop_func op_c1b9_4_nf;
+extern cpuop_func op_c1b9_4_ff;
+extern cpuop_func op_c1c0_4_nf;
+extern cpuop_func op_c1c0_4_ff;
+extern cpuop_func op_c1d0_4_nf;
+extern cpuop_func op_c1d0_4_ff;
+extern cpuop_func op_c1d8_4_nf;
+extern cpuop_func op_c1d8_4_ff;
+extern cpuop_func op_c1e0_4_nf;
+extern cpuop_func op_c1e0_4_ff;
+extern cpuop_func op_c1e8_4_nf;
+extern cpuop_func op_c1e8_4_ff;
+extern cpuop_func op_c1f0_4_nf;
+extern cpuop_func op_c1f0_4_ff;
+extern cpuop_func op_c1f8_4_nf;
+extern cpuop_func op_c1f8_4_ff;
+extern cpuop_func op_c1f9_4_nf;
+extern cpuop_func op_c1f9_4_ff;
+extern cpuop_func op_c1fa_4_nf;
+extern cpuop_func op_c1fa_4_ff;
+extern cpuop_func op_c1fb_4_nf;
+extern cpuop_func op_c1fb_4_ff;
+extern cpuop_func op_c1fc_4_nf;
+extern cpuop_func op_c1fc_4_ff;
+extern cpuop_func op_d000_4_nf;
+extern cpuop_func op_d000_4_ff;
+extern cpuop_func op_d010_4_nf;
+extern cpuop_func op_d010_4_ff;
+extern cpuop_func op_d018_4_nf;
+extern cpuop_func op_d018_4_ff;
+extern cpuop_func op_d020_4_nf;
+extern cpuop_func op_d020_4_ff;
+extern cpuop_func op_d028_4_nf;
+extern cpuop_func op_d028_4_ff;
+extern cpuop_func op_d030_4_nf;
+extern cpuop_func op_d030_4_ff;
+extern cpuop_func op_d038_4_nf;
+extern cpuop_func op_d038_4_ff;
+extern cpuop_func op_d039_4_nf;
+extern cpuop_func op_d039_4_ff;
+extern cpuop_func op_d03a_4_nf;
+extern cpuop_func op_d03a_4_ff;
+extern cpuop_func op_d03b_4_nf;
+extern cpuop_func op_d03b_4_ff;
+extern cpuop_func op_d03c_4_nf;
+extern cpuop_func op_d03c_4_ff;
+extern cpuop_func op_d040_4_nf;
+extern cpuop_func op_d040_4_ff;
+extern cpuop_func op_d048_4_nf;
+extern cpuop_func op_d048_4_ff;
+extern cpuop_func op_d050_4_nf;
+extern cpuop_func op_d050_4_ff;
+extern cpuop_func op_d058_4_nf;
+extern cpuop_func op_d058_4_ff;
+extern cpuop_func op_d060_4_nf;
+extern cpuop_func op_d060_4_ff;
+extern cpuop_func op_d068_4_nf;
+extern cpuop_func op_d068_4_ff;
+extern cpuop_func op_d070_4_nf;
+extern cpuop_func op_d070_4_ff;
+extern cpuop_func op_d078_4_nf;
+extern cpuop_func op_d078_4_ff;
+extern cpuop_func op_d079_4_nf;
+extern cpuop_func op_d079_4_ff;
+extern cpuop_func op_d07a_4_nf;
+extern cpuop_func op_d07a_4_ff;
+extern cpuop_func op_d07b_4_nf;
+extern cpuop_func op_d07b_4_ff;
+extern cpuop_func op_d07c_4_nf;
+extern cpuop_func op_d07c_4_ff;
+extern cpuop_func op_d080_4_nf;
+extern cpuop_func op_d080_4_ff;
+extern cpuop_func op_d088_4_nf;
+extern cpuop_func op_d088_4_ff;
+extern cpuop_func op_d090_4_nf;
+extern cpuop_func op_d090_4_ff;
+extern cpuop_func op_d098_4_nf;
+extern cpuop_func op_d098_4_ff;
+extern cpuop_func op_d0a0_4_nf;
+extern cpuop_func op_d0a0_4_ff;
+extern cpuop_func op_d0a8_4_nf;
+extern cpuop_func op_d0a8_4_ff;
+extern cpuop_func op_d0b0_4_nf;
+extern cpuop_func op_d0b0_4_ff;
+extern cpuop_func op_d0b8_4_nf;
+extern cpuop_func op_d0b8_4_ff;
+extern cpuop_func op_d0b9_4_nf;
+extern cpuop_func op_d0b9_4_ff;
+extern cpuop_func op_d0ba_4_nf;
+extern cpuop_func op_d0ba_4_ff;
+extern cpuop_func op_d0bb_4_nf;
+extern cpuop_func op_d0bb_4_ff;
+extern cpuop_func op_d0bc_4_nf;
+extern cpuop_func op_d0bc_4_ff;
+extern cpuop_func op_d0c0_4_nf;
+extern cpuop_func op_d0c0_4_ff;
+extern cpuop_func op_d0c8_4_nf;
+extern cpuop_func op_d0c8_4_ff;
+extern cpuop_func op_d0d0_4_nf;
+extern cpuop_func op_d0d0_4_ff;
+extern cpuop_func op_d0d8_4_nf;
+extern cpuop_func op_d0d8_4_ff;
+extern cpuop_func op_d0e0_4_nf;
+extern cpuop_func op_d0e0_4_ff;
+extern cpuop_func op_d0e8_4_nf;
+extern cpuop_func op_d0e8_4_ff;
+extern cpuop_func op_d0f0_4_nf;
+extern cpuop_func op_d0f0_4_ff;
+extern cpuop_func op_d0f8_4_nf;
+extern cpuop_func op_d0f8_4_ff;
+extern cpuop_func op_d0f9_4_nf;
+extern cpuop_func op_d0f9_4_ff;
+extern cpuop_func op_d0fa_4_nf;
+extern cpuop_func op_d0fa_4_ff;
+extern cpuop_func op_d0fb_4_nf;
+extern cpuop_func op_d0fb_4_ff;
+extern cpuop_func op_d0fc_4_nf;
+extern cpuop_func op_d0fc_4_ff;
+extern cpuop_func op_d100_4_nf;
+extern cpuop_func op_d100_4_ff;
+extern cpuop_func op_d108_4_nf;
+extern cpuop_func op_d108_4_ff;
+extern cpuop_func op_d110_4_nf;
+extern cpuop_func op_d110_4_ff;
+extern cpuop_func op_d118_4_nf;
+extern cpuop_func op_d118_4_ff;
+extern cpuop_func op_d120_4_nf;
+extern cpuop_func op_d120_4_ff;
+extern cpuop_func op_d128_4_nf;
+extern cpuop_func op_d128_4_ff;
+extern cpuop_func op_d130_4_nf;
+extern cpuop_func op_d130_4_ff;
+extern cpuop_func op_d138_4_nf;
+extern cpuop_func op_d138_4_ff;
+extern cpuop_func op_d139_4_nf;
+extern cpuop_func op_d139_4_ff;
+extern cpuop_func op_d140_4_nf;
+extern cpuop_func op_d140_4_ff;
+extern cpuop_func op_d148_4_nf;
+extern cpuop_func op_d148_4_ff;
+extern cpuop_func op_d150_4_nf;
+extern cpuop_func op_d150_4_ff;
+extern cpuop_func op_d158_4_nf;
+extern cpuop_func op_d158_4_ff;
+extern cpuop_func op_d160_4_nf;
+extern cpuop_func op_d160_4_ff;
+extern cpuop_func op_d168_4_nf;
+extern cpuop_func op_d168_4_ff;
+extern cpuop_func op_d170_4_nf;
+extern cpuop_func op_d170_4_ff;
+extern cpuop_func op_d178_4_nf;
+extern cpuop_func op_d178_4_ff;
+extern cpuop_func op_d179_4_nf;
+extern cpuop_func op_d179_4_ff;
+extern cpuop_func op_d180_4_nf;
+extern cpuop_func op_d180_4_ff;
+extern cpuop_func op_d188_4_nf;
+extern cpuop_func op_d188_4_ff;
+extern cpuop_func op_d190_4_nf;
+extern cpuop_func op_d190_4_ff;
+extern cpuop_func op_d198_4_nf;
+extern cpuop_func op_d198_4_ff;
+extern cpuop_func op_d1a0_4_nf;
+extern cpuop_func op_d1a0_4_ff;
+extern cpuop_func op_d1a8_4_nf;
+extern cpuop_func op_d1a8_4_ff;
+extern cpuop_func op_d1b0_4_nf;
+extern cpuop_func op_d1b0_4_ff;
+extern cpuop_func op_d1b8_4_nf;
+extern cpuop_func op_d1b8_4_ff;
+extern cpuop_func op_d1b9_4_nf;
+extern cpuop_func op_d1b9_4_ff;
+extern cpuop_func op_d1c0_4_nf;
+extern cpuop_func op_d1c0_4_ff;
+extern cpuop_func op_d1c8_4_nf;
+extern cpuop_func op_d1c8_4_ff;
+extern cpuop_func op_d1d0_4_nf;
+extern cpuop_func op_d1d0_4_ff;
+extern cpuop_func op_d1d8_4_nf;
+extern cpuop_func op_d1d8_4_ff;
+extern cpuop_func op_d1e0_4_nf;
+extern cpuop_func op_d1e0_4_ff;
+extern cpuop_func op_d1e8_4_nf;
+extern cpuop_func op_d1e8_4_ff;
+extern cpuop_func op_d1f0_4_nf;
+extern cpuop_func op_d1f0_4_ff;
+extern cpuop_func op_d1f8_4_nf;
+extern cpuop_func op_d1f8_4_ff;
+extern cpuop_func op_d1f9_4_nf;
+extern cpuop_func op_d1f9_4_ff;
+extern cpuop_func op_d1fa_4_nf;
+extern cpuop_func op_d1fa_4_ff;
+extern cpuop_func op_d1fb_4_nf;
+extern cpuop_func op_d1fb_4_ff;
+extern cpuop_func op_d1fc_4_nf;
+extern cpuop_func op_d1fc_4_ff;
+extern cpuop_func op_e000_4_nf;
+extern cpuop_func op_e000_4_ff;
+extern cpuop_func op_e008_4_nf;
+extern cpuop_func op_e008_4_ff;
+extern cpuop_func op_e010_4_nf;
+extern cpuop_func op_e010_4_ff;
+extern cpuop_func op_e018_4_nf;
+extern cpuop_func op_e018_4_ff;
+extern cpuop_func op_e020_4_nf;
+extern cpuop_func op_e020_4_ff;
+extern cpuop_func op_e028_4_nf;
+extern cpuop_func op_e028_4_ff;
+extern cpuop_func op_e030_4_nf;
+extern cpuop_func op_e030_4_ff;
+extern cpuop_func op_e038_4_nf;
+extern cpuop_func op_e038_4_ff;
+extern cpuop_func op_e040_4_nf;
+extern cpuop_func op_e040_4_ff;
+extern cpuop_func op_e048_4_nf;
+extern cpuop_func op_e048_4_ff;
+extern cpuop_func op_e050_4_nf;
+extern cpuop_func op_e050_4_ff;
+extern cpuop_func op_e058_4_nf;
+extern cpuop_func op_e058_4_ff;
+extern cpuop_func op_e060_4_nf;
+extern cpuop_func op_e060_4_ff;
+extern cpuop_func op_e068_4_nf;
+extern cpuop_func op_e068_4_ff;
+extern cpuop_func op_e070_4_nf;
+extern cpuop_func op_e070_4_ff;
+extern cpuop_func op_e078_4_nf;
+extern cpuop_func op_e078_4_ff;
+extern cpuop_func op_e080_4_nf;
+extern cpuop_func op_e080_4_ff;
+extern cpuop_func op_e088_4_nf;
+extern cpuop_func op_e088_4_ff;
+extern cpuop_func op_e090_4_nf;
+extern cpuop_func op_e090_4_ff;
+extern cpuop_func op_e098_4_nf;
+extern cpuop_func op_e098_4_ff;
+extern cpuop_func op_e0a0_4_nf;
+extern cpuop_func op_e0a0_4_ff;
+extern cpuop_func op_e0a8_4_nf;
+extern cpuop_func op_e0a8_4_ff;
+extern cpuop_func op_e0b0_4_nf;
+extern cpuop_func op_e0b0_4_ff;
+extern cpuop_func op_e0b8_4_nf;
+extern cpuop_func op_e0b8_4_ff;
+extern cpuop_func op_e0d0_4_nf;
+extern cpuop_func op_e0d0_4_ff;
+extern cpuop_func op_e0d8_4_nf;
+extern cpuop_func op_e0d8_4_ff;
+extern cpuop_func op_e0e0_4_nf;
+extern cpuop_func op_e0e0_4_ff;
+extern cpuop_func op_e0e8_4_nf;
+extern cpuop_func op_e0e8_4_ff;
+extern cpuop_func op_e0f0_4_nf;
+extern cpuop_func op_e0f0_4_ff;
+extern cpuop_func op_e0f8_4_nf;
+extern cpuop_func op_e0f8_4_ff;
+extern cpuop_func op_e0f9_4_nf;
+extern cpuop_func op_e0f9_4_ff;
+extern cpuop_func op_e100_4_nf;
+extern cpuop_func op_e100_4_ff;
+extern cpuop_func op_e108_4_nf;
+extern cpuop_func op_e108_4_ff;
+extern cpuop_func op_e110_4_nf;
+extern cpuop_func op_e110_4_ff;
+extern cpuop_func op_e118_4_nf;
+extern cpuop_func op_e118_4_ff;
+extern cpuop_func op_e120_4_nf;
+extern cpuop_func op_e120_4_ff;
+extern cpuop_func op_e128_4_nf;
+extern cpuop_func op_e128_4_ff;
+extern cpuop_func op_e130_4_nf;
+extern cpuop_func op_e130_4_ff;
+extern cpuop_func op_e138_4_nf;
+extern cpuop_func op_e138_4_ff;
+extern cpuop_func op_e140_4_nf;
+extern cpuop_func op_e140_4_ff;
+extern cpuop_func op_e148_4_nf;
+extern cpuop_func op_e148_4_ff;
+extern cpuop_func op_e150_4_nf;
+extern cpuop_func op_e150_4_ff;
+extern cpuop_func op_e158_4_nf;
+extern cpuop_func op_e158_4_ff;
+extern cpuop_func op_e160_4_nf;
+extern cpuop_func op_e160_4_ff;
+extern cpuop_func op_e168_4_nf;
+extern cpuop_func op_e168_4_ff;
+extern cpuop_func op_e170_4_nf;
+extern cpuop_func op_e170_4_ff;
+extern cpuop_func op_e178_4_nf;
+extern cpuop_func op_e178_4_ff;
+extern cpuop_func op_e180_4_nf;
+extern cpuop_func op_e180_4_ff;
+extern cpuop_func op_e188_4_nf;
+extern cpuop_func op_e188_4_ff;
+extern cpuop_func op_e190_4_nf;
+extern cpuop_func op_e190_4_ff;
+extern cpuop_func op_e198_4_nf;
+extern cpuop_func op_e198_4_ff;
+extern cpuop_func op_e1a0_4_nf;
+extern cpuop_func op_e1a0_4_ff;
+extern cpuop_func op_e1a8_4_nf;
+extern cpuop_func op_e1a8_4_ff;
+extern cpuop_func op_e1b0_4_nf;
+extern cpuop_func op_e1b0_4_ff;
+extern cpuop_func op_e1b8_4_nf;
+extern cpuop_func op_e1b8_4_ff;
+extern cpuop_func op_e1d0_4_nf;
+extern cpuop_func op_e1d0_4_ff;
+extern cpuop_func op_e1d8_4_nf;
+extern cpuop_func op_e1d8_4_ff;
+extern cpuop_func op_e1e0_4_nf;
+extern cpuop_func op_e1e0_4_ff;
+extern cpuop_func op_e1e8_4_nf;
+extern cpuop_func op_e1e8_4_ff;
+extern cpuop_func op_e1f0_4_nf;
+extern cpuop_func op_e1f0_4_ff;
+extern cpuop_func op_e1f8_4_nf;
+extern cpuop_func op_e1f8_4_ff;
+extern cpuop_func op_e1f9_4_nf;
+extern cpuop_func op_e1f9_4_ff;
+extern cpuop_func op_e2d0_4_nf;
+extern cpuop_func op_e2d0_4_ff;
+extern cpuop_func op_e2d8_4_nf;
+extern cpuop_func op_e2d8_4_ff;
+extern cpuop_func op_e2e0_4_nf;
+extern cpuop_func op_e2e0_4_ff;
+extern cpuop_func op_e2e8_4_nf;
+extern cpuop_func op_e2e8_4_ff;
+extern cpuop_func op_e2f0_4_nf;
+extern cpuop_func op_e2f0_4_ff;
+extern cpuop_func op_e2f8_4_nf;
+extern cpuop_func op_e2f8_4_ff;
+extern cpuop_func op_e2f9_4_nf;
+extern cpuop_func op_e2f9_4_ff;
+extern cpuop_func op_e3d0_4_nf;
+extern cpuop_func op_e3d0_4_ff;
+extern cpuop_func op_e3d8_4_nf;
+extern cpuop_func op_e3d8_4_ff;
+extern cpuop_func op_e3e0_4_nf;
+extern cpuop_func op_e3e0_4_ff;
+extern cpuop_func op_e3e8_4_nf;
+extern cpuop_func op_e3e8_4_ff;
+extern cpuop_func op_e3f0_4_nf;
+extern cpuop_func op_e3f0_4_ff;
+extern cpuop_func op_e3f8_4_nf;
+extern cpuop_func op_e3f8_4_ff;
+extern cpuop_func op_e3f9_4_nf;
+extern cpuop_func op_e3f9_4_ff;
+extern cpuop_func op_e4d0_4_nf;
+extern cpuop_func op_e4d0_4_ff;
+extern cpuop_func op_e4d8_4_nf;
+extern cpuop_func op_e4d8_4_ff;
+extern cpuop_func op_e4e0_4_nf;
+extern cpuop_func op_e4e0_4_ff;
+extern cpuop_func op_e4e8_4_nf;
+extern cpuop_func op_e4e8_4_ff;
+extern cpuop_func op_e4f0_4_nf;
+extern cpuop_func op_e4f0_4_ff;
+extern cpuop_func op_e4f8_4_nf;
+extern cpuop_func op_e4f8_4_ff;
+extern cpuop_func op_e4f9_4_nf;
+extern cpuop_func op_e4f9_4_ff;
+extern cpuop_func op_e5d0_4_nf;
+extern cpuop_func op_e5d0_4_ff;
+extern cpuop_func op_e5d8_4_nf;
+extern cpuop_func op_e5d8_4_ff;
+extern cpuop_func op_e5e0_4_nf;
+extern cpuop_func op_e5e0_4_ff;
+extern cpuop_func op_e5e8_4_nf;
+extern cpuop_func op_e5e8_4_ff;
+extern cpuop_func op_e5f0_4_nf;
+extern cpuop_func op_e5f0_4_ff;
+extern cpuop_func op_e5f8_4_nf;
+extern cpuop_func op_e5f8_4_ff;
+extern cpuop_func op_e5f9_4_nf;
+extern cpuop_func op_e5f9_4_ff;
+extern cpuop_func op_e6d0_4_nf;
+extern cpuop_func op_e6d0_4_ff;
+extern cpuop_func op_e6d8_4_nf;
+extern cpuop_func op_e6d8_4_ff;
+extern cpuop_func op_e6e0_4_nf;
+extern cpuop_func op_e6e0_4_ff;
+extern cpuop_func op_e6e8_4_nf;
+extern cpuop_func op_e6e8_4_ff;
+extern cpuop_func op_e6f0_4_nf;
+extern cpuop_func op_e6f0_4_ff;
+extern cpuop_func op_e6f8_4_nf;
+extern cpuop_func op_e6f8_4_ff;
+extern cpuop_func op_e6f9_4_nf;
+extern cpuop_func op_e6f9_4_ff;
+extern cpuop_func op_e7d0_4_nf;
+extern cpuop_func op_e7d0_4_ff;
+extern cpuop_func op_e7d8_4_nf;
+extern cpuop_func op_e7d8_4_ff;
+extern cpuop_func op_e7e0_4_nf;
+extern cpuop_func op_e7e0_4_ff;
+extern cpuop_func op_e7e8_4_nf;
+extern cpuop_func op_e7e8_4_ff;
+extern cpuop_func op_e7f0_4_nf;
+extern cpuop_func op_e7f0_4_ff;
+extern cpuop_func op_e7f8_4_nf;
+extern cpuop_func op_e7f8_4_ff;
+extern cpuop_func op_e7f9_4_nf;
+extern cpuop_func op_e7f9_4_ff;
+extern cpuop_func op_0_5_nf;
+extern cpuop_func op_0_5_ff;
+extern cpuop_func op_10_5_nf;
+extern cpuop_func op_10_5_ff;
+extern cpuop_func op_18_5_nf;
+extern cpuop_func op_18_5_ff;
+extern cpuop_func op_20_5_nf;
+extern cpuop_func op_20_5_ff;
+extern cpuop_func op_28_5_nf;
+extern cpuop_func op_28_5_ff;
+extern cpuop_func op_30_5_nf;
+extern cpuop_func op_30_5_ff;
+extern cpuop_func op_38_5_nf;
+extern cpuop_func op_38_5_ff;
+extern cpuop_func op_39_5_nf;
+extern cpuop_func op_39_5_ff;
+extern cpuop_func op_3c_5_nf;
+extern cpuop_func op_3c_5_ff;
+extern cpuop_func op_40_5_nf;
+extern cpuop_func op_40_5_ff;
+extern cpuop_func op_50_5_nf;
+extern cpuop_func op_50_5_ff;
+extern cpuop_func op_58_5_nf;
+extern cpuop_func op_58_5_ff;
+extern cpuop_func op_60_5_nf;
+extern cpuop_func op_60_5_ff;
+extern cpuop_func op_68_5_nf;
+extern cpuop_func op_68_5_ff;
+extern cpuop_func op_70_5_nf;
+extern cpuop_func op_70_5_ff;
+extern cpuop_func op_78_5_nf;
+extern cpuop_func op_78_5_ff;
+extern cpuop_func op_79_5_nf;
+extern cpuop_func op_79_5_ff;
+extern cpuop_func op_7c_5_nf;
+extern cpuop_func op_7c_5_ff;
+extern cpuop_func op_80_5_nf;
+extern cpuop_func op_80_5_ff;
+extern cpuop_func op_90_5_nf;
+extern cpuop_func op_90_5_ff;
+extern cpuop_func op_98_5_nf;
+extern cpuop_func op_98_5_ff;
+extern cpuop_func op_a0_5_nf;
+extern cpuop_func op_a0_5_ff;
+extern cpuop_func op_a8_5_nf;
+extern cpuop_func op_a8_5_ff;
+extern cpuop_func op_b0_5_nf;
+extern cpuop_func op_b0_5_ff;
+extern cpuop_func op_b8_5_nf;
+extern cpuop_func op_b8_5_ff;
+extern cpuop_func op_b9_5_nf;
+extern cpuop_func op_b9_5_ff;
+extern cpuop_func op_100_5_nf;
+extern cpuop_func op_100_5_ff;
+extern cpuop_func op_108_5_nf;
+extern cpuop_func op_108_5_ff;
+extern cpuop_func op_110_5_nf;
+extern cpuop_func op_110_5_ff;
+extern cpuop_func op_118_5_nf;
+extern cpuop_func op_118_5_ff;
+extern cpuop_func op_120_5_nf;
+extern cpuop_func op_120_5_ff;
+extern cpuop_func op_128_5_nf;
+extern cpuop_func op_128_5_ff;
+extern cpuop_func op_130_5_nf;
+extern cpuop_func op_130_5_ff;
+extern cpuop_func op_138_5_nf;
+extern cpuop_func op_138_5_ff;
+extern cpuop_func op_139_5_nf;
+extern cpuop_func op_139_5_ff;
+extern cpuop_func op_13a_5_nf;
+extern cpuop_func op_13a_5_ff;
+extern cpuop_func op_13b_5_nf;
+extern cpuop_func op_13b_5_ff;
+extern cpuop_func op_13c_5_nf;
+extern cpuop_func op_13c_5_ff;
+extern cpuop_func op_140_5_nf;
+extern cpuop_func op_140_5_ff;
+extern cpuop_func op_148_5_nf;
+extern cpuop_func op_148_5_ff;
+extern cpuop_func op_150_5_nf;
+extern cpuop_func op_150_5_ff;
+extern cpuop_func op_158_5_nf;
+extern cpuop_func op_158_5_ff;
+extern cpuop_func op_160_5_nf;
+extern cpuop_func op_160_5_ff;
+extern cpuop_func op_168_5_nf;
+extern cpuop_func op_168_5_ff;
+extern cpuop_func op_170_5_nf;
+extern cpuop_func op_170_5_ff;
+extern cpuop_func op_178_5_nf;
+extern cpuop_func op_178_5_ff;
+extern cpuop_func op_179_5_nf;
+extern cpuop_func op_179_5_ff;
+extern cpuop_func op_17a_5_nf;
+extern cpuop_func op_17a_5_ff;
+extern cpuop_func op_17b_5_nf;
+extern cpuop_func op_17b_5_ff;
+extern cpuop_func op_180_5_nf;
+extern cpuop_func op_180_5_ff;
+extern cpuop_func op_188_5_nf;
+extern cpuop_func op_188_5_ff;
+extern cpuop_func op_190_5_nf;
+extern cpuop_func op_190_5_ff;
+extern cpuop_func op_198_5_nf;
+extern cpuop_func op_198_5_ff;
+extern cpuop_func op_1a0_5_nf;
+extern cpuop_func op_1a0_5_ff;
+extern cpuop_func op_1a8_5_nf;
+extern cpuop_func op_1a8_5_ff;
+extern cpuop_func op_1b0_5_nf;
+extern cpuop_func op_1b0_5_ff;
+extern cpuop_func op_1b8_5_nf;
+extern cpuop_func op_1b8_5_ff;
+extern cpuop_func op_1b9_5_nf;
+extern cpuop_func op_1b9_5_ff;
+extern cpuop_func op_1ba_5_nf;
+extern cpuop_func op_1ba_5_ff;
+extern cpuop_func op_1bb_5_nf;
+extern cpuop_func op_1bb_5_ff;
+extern cpuop_func op_1c0_5_nf;
+extern cpuop_func op_1c0_5_ff;
+extern cpuop_func op_1c8_5_nf;
+extern cpuop_func op_1c8_5_ff;
+extern cpuop_func op_1d0_5_nf;
+extern cpuop_func op_1d0_5_ff;
+extern cpuop_func op_1d8_5_nf;
+extern cpuop_func op_1d8_5_ff;
+extern cpuop_func op_1e0_5_nf;
+extern cpuop_func op_1e0_5_ff;
+extern cpuop_func op_1e8_5_nf;
+extern cpuop_func op_1e8_5_ff;
+extern cpuop_func op_1f0_5_nf;
+extern cpuop_func op_1f0_5_ff;
+extern cpuop_func op_1f8_5_nf;
+extern cpuop_func op_1f8_5_ff;
+extern cpuop_func op_1f9_5_nf;
+extern cpuop_func op_1f9_5_ff;
+extern cpuop_func op_1fa_5_nf;
+extern cpuop_func op_1fa_5_ff;
+extern cpuop_func op_1fb_5_nf;
+extern cpuop_func op_1fb_5_ff;
+extern cpuop_func op_200_5_nf;
+extern cpuop_func op_200_5_ff;
+extern cpuop_func op_210_5_nf;
+extern cpuop_func op_210_5_ff;
+extern cpuop_func op_218_5_nf;
+extern cpuop_func op_218_5_ff;
+extern cpuop_func op_220_5_nf;
+extern cpuop_func op_220_5_ff;
+extern cpuop_func op_228_5_nf;
+extern cpuop_func op_228_5_ff;
+extern cpuop_func op_230_5_nf;
+extern cpuop_func op_230_5_ff;
+extern cpuop_func op_238_5_nf;
+extern cpuop_func op_238_5_ff;
+extern cpuop_func op_239_5_nf;
+extern cpuop_func op_239_5_ff;
+extern cpuop_func op_23c_5_nf;
+extern cpuop_func op_23c_5_ff;
+extern cpuop_func op_240_5_nf;
+extern cpuop_func op_240_5_ff;
+extern cpuop_func op_250_5_nf;
+extern cpuop_func op_250_5_ff;
+extern cpuop_func op_258_5_nf;
+extern cpuop_func op_258_5_ff;
+extern cpuop_func op_260_5_nf;
+extern cpuop_func op_260_5_ff;
+extern cpuop_func op_268_5_nf;
+extern cpuop_func op_268_5_ff;
+extern cpuop_func op_270_5_nf;
+extern cpuop_func op_270_5_ff;
+extern cpuop_func op_278_5_nf;
+extern cpuop_func op_278_5_ff;
+extern cpuop_func op_279_5_nf;
+extern cpuop_func op_279_5_ff;
+extern cpuop_func op_27c_5_nf;
+extern cpuop_func op_27c_5_ff;
+extern cpuop_func op_280_5_nf;
+extern cpuop_func op_280_5_ff;
+extern cpuop_func op_290_5_nf;
+extern cpuop_func op_290_5_ff;
+extern cpuop_func op_298_5_nf;
+extern cpuop_func op_298_5_ff;
+extern cpuop_func op_2a0_5_nf;
+extern cpuop_func op_2a0_5_ff;
+extern cpuop_func op_2a8_5_nf;
+extern cpuop_func op_2a8_5_ff;
+extern cpuop_func op_2b0_5_nf;
+extern cpuop_func op_2b0_5_ff;
+extern cpuop_func op_2b8_5_nf;
+extern cpuop_func op_2b8_5_ff;
+extern cpuop_func op_2b9_5_nf;
+extern cpuop_func op_2b9_5_ff;
+extern cpuop_func op_400_5_nf;
+extern cpuop_func op_400_5_ff;
+extern cpuop_func op_410_5_nf;
+extern cpuop_func op_410_5_ff;
+extern cpuop_func op_418_5_nf;
+extern cpuop_func op_418_5_ff;
+extern cpuop_func op_420_5_nf;
+extern cpuop_func op_420_5_ff;
+extern cpuop_func op_428_5_nf;
+extern cpuop_func op_428_5_ff;
+extern cpuop_func op_430_5_nf;
+extern cpuop_func op_430_5_ff;
+extern cpuop_func op_438_5_nf;
+extern cpuop_func op_438_5_ff;
+extern cpuop_func op_439_5_nf;
+extern cpuop_func op_439_5_ff;
+extern cpuop_func op_440_5_nf;
+extern cpuop_func op_440_5_ff;
+extern cpuop_func op_450_5_nf;
+extern cpuop_func op_450_5_ff;
+extern cpuop_func op_458_5_nf;
+extern cpuop_func op_458_5_ff;
+extern cpuop_func op_460_5_nf;
+extern cpuop_func op_460_5_ff;
+extern cpuop_func op_468_5_nf;
+extern cpuop_func op_468_5_ff;
+extern cpuop_func op_470_5_nf;
+extern cpuop_func op_470_5_ff;
+extern cpuop_func op_478_5_nf;
+extern cpuop_func op_478_5_ff;
+extern cpuop_func op_479_5_nf;
+extern cpuop_func op_479_5_ff;
+extern cpuop_func op_480_5_nf;
+extern cpuop_func op_480_5_ff;
+extern cpuop_func op_490_5_nf;
+extern cpuop_func op_490_5_ff;
+extern cpuop_func op_498_5_nf;
+extern cpuop_func op_498_5_ff;
+extern cpuop_func op_4a0_5_nf;
+extern cpuop_func op_4a0_5_ff;
+extern cpuop_func op_4a8_5_nf;
+extern cpuop_func op_4a8_5_ff;
+extern cpuop_func op_4b0_5_nf;
+extern cpuop_func op_4b0_5_ff;
+extern cpuop_func op_4b8_5_nf;
+extern cpuop_func op_4b8_5_ff;
+extern cpuop_func op_4b9_5_nf;
+extern cpuop_func op_4b9_5_ff;
+extern cpuop_func op_600_5_nf;
+extern cpuop_func op_600_5_ff;
+extern cpuop_func op_610_5_nf;
+extern cpuop_func op_610_5_ff;
+extern cpuop_func op_618_5_nf;
+extern cpuop_func op_618_5_ff;
+extern cpuop_func op_620_5_nf;
+extern cpuop_func op_620_5_ff;
+extern cpuop_func op_628_5_nf;
+extern cpuop_func op_628_5_ff;
+extern cpuop_func op_630_5_nf;
+extern cpuop_func op_630_5_ff;
+extern cpuop_func op_638_5_nf;
+extern cpuop_func op_638_5_ff;
+extern cpuop_func op_639_5_nf;
+extern cpuop_func op_639_5_ff;
+extern cpuop_func op_640_5_nf;
+extern cpuop_func op_640_5_ff;
+extern cpuop_func op_650_5_nf;
+extern cpuop_func op_650_5_ff;
+extern cpuop_func op_658_5_nf;
+extern cpuop_func op_658_5_ff;
+extern cpuop_func op_660_5_nf;
+extern cpuop_func op_660_5_ff;
+extern cpuop_func op_668_5_nf;
+extern cpuop_func op_668_5_ff;
+extern cpuop_func op_670_5_nf;
+extern cpuop_func op_670_5_ff;
+extern cpuop_func op_678_5_nf;
+extern cpuop_func op_678_5_ff;
+extern cpuop_func op_679_5_nf;
+extern cpuop_func op_679_5_ff;
+extern cpuop_func op_680_5_nf;
+extern cpuop_func op_680_5_ff;
+extern cpuop_func op_690_5_nf;
+extern cpuop_func op_690_5_ff;
+extern cpuop_func op_698_5_nf;
+extern cpuop_func op_698_5_ff;
+extern cpuop_func op_6a0_5_nf;
+extern cpuop_func op_6a0_5_ff;
+extern cpuop_func op_6a8_5_nf;
+extern cpuop_func op_6a8_5_ff;
+extern cpuop_func op_6b0_5_nf;
+extern cpuop_func op_6b0_5_ff;
+extern cpuop_func op_6b8_5_nf;
+extern cpuop_func op_6b8_5_ff;
+extern cpuop_func op_6b9_5_nf;
+extern cpuop_func op_6b9_5_ff;
+extern cpuop_func op_800_5_nf;
+extern cpuop_func op_800_5_ff;
+extern cpuop_func op_810_5_nf;
+extern cpuop_func op_810_5_ff;
+extern cpuop_func op_818_5_nf;
+extern cpuop_func op_818_5_ff;
+extern cpuop_func op_820_5_nf;
+extern cpuop_func op_820_5_ff;
+extern cpuop_func op_828_5_nf;
+extern cpuop_func op_828_5_ff;
+extern cpuop_func op_830_5_nf;
+extern cpuop_func op_830_5_ff;
+extern cpuop_func op_838_5_nf;
+extern cpuop_func op_838_5_ff;
+extern cpuop_func op_839_5_nf;
+extern cpuop_func op_839_5_ff;
+extern cpuop_func op_83a_5_nf;
+extern cpuop_func op_83a_5_ff;
+extern cpuop_func op_83b_5_nf;
+extern cpuop_func op_83b_5_ff;
+extern cpuop_func op_83c_5_nf;
+extern cpuop_func op_83c_5_ff;
+extern cpuop_func op_840_5_nf;
+extern cpuop_func op_840_5_ff;
+extern cpuop_func op_850_5_nf;
+extern cpuop_func op_850_5_ff;
+extern cpuop_func op_858_5_nf;
+extern cpuop_func op_858_5_ff;
+extern cpuop_func op_860_5_nf;
+extern cpuop_func op_860_5_ff;
+extern cpuop_func op_868_5_nf;
+extern cpuop_func op_868_5_ff;
+extern cpuop_func op_870_5_nf;
+extern cpuop_func op_870_5_ff;
+extern cpuop_func op_878_5_nf;
+extern cpuop_func op_878_5_ff;
+extern cpuop_func op_879_5_nf;
+extern cpuop_func op_879_5_ff;
+extern cpuop_func op_87a_5_nf;
+extern cpuop_func op_87a_5_ff;
+extern cpuop_func op_87b_5_nf;
+extern cpuop_func op_87b_5_ff;
+extern cpuop_func op_880_5_nf;
+extern cpuop_func op_880_5_ff;
+extern cpuop_func op_890_5_nf;
+extern cpuop_func op_890_5_ff;
+extern cpuop_func op_898_5_nf;
+extern cpuop_func op_898_5_ff;
+extern cpuop_func op_8a0_5_nf;
+extern cpuop_func op_8a0_5_ff;
+extern cpuop_func op_8a8_5_nf;
+extern cpuop_func op_8a8_5_ff;
+extern cpuop_func op_8b0_5_nf;
+extern cpuop_func op_8b0_5_ff;
+extern cpuop_func op_8b8_5_nf;
+extern cpuop_func op_8b8_5_ff;
+extern cpuop_func op_8b9_5_nf;
+extern cpuop_func op_8b9_5_ff;
+extern cpuop_func op_8ba_5_nf;
+extern cpuop_func op_8ba_5_ff;
+extern cpuop_func op_8bb_5_nf;
+extern cpuop_func op_8bb_5_ff;
+extern cpuop_func op_8c0_5_nf;
+extern cpuop_func op_8c0_5_ff;
+extern cpuop_func op_8d0_5_nf;
+extern cpuop_func op_8d0_5_ff;
+extern cpuop_func op_8d8_5_nf;
+extern cpuop_func op_8d8_5_ff;
+extern cpuop_func op_8e0_5_nf;
+extern cpuop_func op_8e0_5_ff;
+extern cpuop_func op_8e8_5_nf;
+extern cpuop_func op_8e8_5_ff;
+extern cpuop_func op_8f0_5_nf;
+extern cpuop_func op_8f0_5_ff;
+extern cpuop_func op_8f8_5_nf;
+extern cpuop_func op_8f8_5_ff;
+extern cpuop_func op_8f9_5_nf;
+extern cpuop_func op_8f9_5_ff;
+extern cpuop_func op_8fa_5_nf;
+extern cpuop_func op_8fa_5_ff;
+extern cpuop_func op_8fb_5_nf;
+extern cpuop_func op_8fb_5_ff;
+extern cpuop_func op_a00_5_nf;
+extern cpuop_func op_a00_5_ff;
+extern cpuop_func op_a10_5_nf;
+extern cpuop_func op_a10_5_ff;
+extern cpuop_func op_a18_5_nf;
+extern cpuop_func op_a18_5_ff;
+extern cpuop_func op_a20_5_nf;
+extern cpuop_func op_a20_5_ff;
+extern cpuop_func op_a28_5_nf;
+extern cpuop_func op_a28_5_ff;
+extern cpuop_func op_a30_5_nf;
+extern cpuop_func op_a30_5_ff;
+extern cpuop_func op_a38_5_nf;
+extern cpuop_func op_a38_5_ff;
+extern cpuop_func op_a39_5_nf;
+extern cpuop_func op_a39_5_ff;
+extern cpuop_func op_a3c_5_nf;
+extern cpuop_func op_a3c_5_ff;
+extern cpuop_func op_a40_5_nf;
+extern cpuop_func op_a40_5_ff;
+extern cpuop_func op_a50_5_nf;
+extern cpuop_func op_a50_5_ff;
+extern cpuop_func op_a58_5_nf;
+extern cpuop_func op_a58_5_ff;
+extern cpuop_func op_a60_5_nf;
+extern cpuop_func op_a60_5_ff;
+extern cpuop_func op_a68_5_nf;
+extern cpuop_func op_a68_5_ff;
+extern cpuop_func op_a70_5_nf;
+extern cpuop_func op_a70_5_ff;
+extern cpuop_func op_a78_5_nf;
+extern cpuop_func op_a78_5_ff;
+extern cpuop_func op_a79_5_nf;
+extern cpuop_func op_a79_5_ff;
+extern cpuop_func op_a7c_5_nf;
+extern cpuop_func op_a7c_5_ff;
+extern cpuop_func op_a80_5_nf;
+extern cpuop_func op_a80_5_ff;
+extern cpuop_func op_a90_5_nf;
+extern cpuop_func op_a90_5_ff;
+extern cpuop_func op_a98_5_nf;
+extern cpuop_func op_a98_5_ff;
+extern cpuop_func op_aa0_5_nf;
+extern cpuop_func op_aa0_5_ff;
+extern cpuop_func op_aa8_5_nf;
+extern cpuop_func op_aa8_5_ff;
+extern cpuop_func op_ab0_5_nf;
+extern cpuop_func op_ab0_5_ff;
+extern cpuop_func op_ab8_5_nf;
+extern cpuop_func op_ab8_5_ff;
+extern cpuop_func op_ab9_5_nf;
+extern cpuop_func op_ab9_5_ff;
+extern cpuop_func op_c00_5_nf;
+extern cpuop_func op_c00_5_ff;
+extern cpuop_func op_c10_5_nf;
+extern cpuop_func op_c10_5_ff;
+extern cpuop_func op_c18_5_nf;
+extern cpuop_func op_c18_5_ff;
+extern cpuop_func op_c20_5_nf;
+extern cpuop_func op_c20_5_ff;
+extern cpuop_func op_c28_5_nf;
+extern cpuop_func op_c28_5_ff;
+extern cpuop_func op_c30_5_nf;
+extern cpuop_func op_c30_5_ff;
+extern cpuop_func op_c38_5_nf;
+extern cpuop_func op_c38_5_ff;
+extern cpuop_func op_c39_5_nf;
+extern cpuop_func op_c39_5_ff;
+extern cpuop_func op_c3a_5_nf;
+extern cpuop_func op_c3a_5_ff;
+extern cpuop_func op_c3b_5_nf;
+extern cpuop_func op_c3b_5_ff;
+extern cpuop_func op_c40_5_nf;
+extern cpuop_func op_c40_5_ff;
+extern cpuop_func op_c50_5_nf;
+extern cpuop_func op_c50_5_ff;
+extern cpuop_func op_c58_5_nf;
+extern cpuop_func op_c58_5_ff;
+extern cpuop_func op_c60_5_nf;
+extern cpuop_func op_c60_5_ff;
+extern cpuop_func op_c68_5_nf;
+extern cpuop_func op_c68_5_ff;
+extern cpuop_func op_c70_5_nf;
+extern cpuop_func op_c70_5_ff;
+extern cpuop_func op_c78_5_nf;
+extern cpuop_func op_c78_5_ff;
+extern cpuop_func op_c79_5_nf;
+extern cpuop_func op_c79_5_ff;
+extern cpuop_func op_c7a_5_nf;
+extern cpuop_func op_c7a_5_ff;
+extern cpuop_func op_c7b_5_nf;
+extern cpuop_func op_c7b_5_ff;
+extern cpuop_func op_c80_5_nf;
+extern cpuop_func op_c80_5_ff;
+extern cpuop_func op_c90_5_nf;
+extern cpuop_func op_c90_5_ff;
+extern cpuop_func op_c98_5_nf;
+extern cpuop_func op_c98_5_ff;
+extern cpuop_func op_ca0_5_nf;
+extern cpuop_func op_ca0_5_ff;
+extern cpuop_func op_ca8_5_nf;
+extern cpuop_func op_ca8_5_ff;
+extern cpuop_func op_cb0_5_nf;
+extern cpuop_func op_cb0_5_ff;
+extern cpuop_func op_cb8_5_nf;
+extern cpuop_func op_cb8_5_ff;
+extern cpuop_func op_cb9_5_nf;
+extern cpuop_func op_cb9_5_ff;
+extern cpuop_func op_cba_5_nf;
+extern cpuop_func op_cba_5_ff;
+extern cpuop_func op_cbb_5_nf;
+extern cpuop_func op_cbb_5_ff;
+extern cpuop_func op_1000_5_nf;
+extern cpuop_func op_1000_5_ff;
+extern cpuop_func op_1008_5_nf;
+extern cpuop_func op_1008_5_ff;
+extern cpuop_func op_1010_5_nf;
+extern cpuop_func op_1010_5_ff;
+extern cpuop_func op_1018_5_nf;
+extern cpuop_func op_1018_5_ff;
+extern cpuop_func op_1020_5_nf;
+extern cpuop_func op_1020_5_ff;
+extern cpuop_func op_1028_5_nf;
+extern cpuop_func op_1028_5_ff;
+extern cpuop_func op_1030_5_nf;
+extern cpuop_func op_1030_5_ff;
+extern cpuop_func op_1038_5_nf;
+extern cpuop_func op_1038_5_ff;
+extern cpuop_func op_1039_5_nf;
+extern cpuop_func op_1039_5_ff;
+extern cpuop_func op_103a_5_nf;
+extern cpuop_func op_103a_5_ff;
+extern cpuop_func op_103b_5_nf;
+extern cpuop_func op_103b_5_ff;
+extern cpuop_func op_103c_5_nf;
+extern cpuop_func op_103c_5_ff;
+extern cpuop_func op_1080_5_nf;
+extern cpuop_func op_1080_5_ff;
+extern cpuop_func op_1088_5_nf;
+extern cpuop_func op_1088_5_ff;
+extern cpuop_func op_1090_5_nf;
+extern cpuop_func op_1090_5_ff;
+extern cpuop_func op_1098_5_nf;
+extern cpuop_func op_1098_5_ff;
+extern cpuop_func op_10a0_5_nf;
+extern cpuop_func op_10a0_5_ff;
+extern cpuop_func op_10a8_5_nf;
+extern cpuop_func op_10a8_5_ff;
+extern cpuop_func op_10b0_5_nf;
+extern cpuop_func op_10b0_5_ff;
+extern cpuop_func op_10b8_5_nf;
+extern cpuop_func op_10b8_5_ff;
+extern cpuop_func op_10b9_5_nf;
+extern cpuop_func op_10b9_5_ff;
+extern cpuop_func op_10ba_5_nf;
+extern cpuop_func op_10ba_5_ff;
+extern cpuop_func op_10bb_5_nf;
+extern cpuop_func op_10bb_5_ff;
+extern cpuop_func op_10bc_5_nf;
+extern cpuop_func op_10bc_5_ff;
+extern cpuop_func op_10c0_5_nf;
+extern cpuop_func op_10c0_5_ff;
+extern cpuop_func op_10c8_5_nf;
+extern cpuop_func op_10c8_5_ff;
+extern cpuop_func op_10d0_5_nf;
+extern cpuop_func op_10d0_5_ff;
+extern cpuop_func op_10d8_5_nf;
+extern cpuop_func op_10d8_5_ff;
+extern cpuop_func op_10e0_5_nf;
+extern cpuop_func op_10e0_5_ff;
+extern cpuop_func op_10e8_5_nf;
+extern cpuop_func op_10e8_5_ff;
+extern cpuop_func op_10f0_5_nf;
+extern cpuop_func op_10f0_5_ff;
+extern cpuop_func op_10f8_5_nf;
+extern cpuop_func op_10f8_5_ff;
+extern cpuop_func op_10f9_5_nf;
+extern cpuop_func op_10f9_5_ff;
+extern cpuop_func op_10fa_5_nf;
+extern cpuop_func op_10fa_5_ff;
+extern cpuop_func op_10fb_5_nf;
+extern cpuop_func op_10fb_5_ff;
+extern cpuop_func op_10fc_5_nf;
+extern cpuop_func op_10fc_5_ff;
+extern cpuop_func op_1100_5_nf;
+extern cpuop_func op_1100_5_ff;
+extern cpuop_func op_1108_5_nf;
+extern cpuop_func op_1108_5_ff;
+extern cpuop_func op_1110_5_nf;
+extern cpuop_func op_1110_5_ff;
+extern cpuop_func op_1118_5_nf;
+extern cpuop_func op_1118_5_ff;
+extern cpuop_func op_1120_5_nf;
+extern cpuop_func op_1120_5_ff;
+extern cpuop_func op_1128_5_nf;
+extern cpuop_func op_1128_5_ff;
+extern cpuop_func op_1130_5_nf;
+extern cpuop_func op_1130_5_ff;
+extern cpuop_func op_1138_5_nf;
+extern cpuop_func op_1138_5_ff;
+extern cpuop_func op_1139_5_nf;
+extern cpuop_func op_1139_5_ff;
+extern cpuop_func op_113a_5_nf;
+extern cpuop_func op_113a_5_ff;
+extern cpuop_func op_113b_5_nf;
+extern cpuop_func op_113b_5_ff;
+extern cpuop_func op_113c_5_nf;
+extern cpuop_func op_113c_5_ff;
+extern cpuop_func op_1140_5_nf;
+extern cpuop_func op_1140_5_ff;
+extern cpuop_func op_1148_5_nf;
+extern cpuop_func op_1148_5_ff;
+extern cpuop_func op_1150_5_nf;
+extern cpuop_func op_1150_5_ff;
+extern cpuop_func op_1158_5_nf;
+extern cpuop_func op_1158_5_ff;
+extern cpuop_func op_1160_5_nf;
+extern cpuop_func op_1160_5_ff;
+extern cpuop_func op_1168_5_nf;
+extern cpuop_func op_1168_5_ff;
+extern cpuop_func op_1170_5_nf;
+extern cpuop_func op_1170_5_ff;
+extern cpuop_func op_1178_5_nf;
+extern cpuop_func op_1178_5_ff;
+extern cpuop_func op_1179_5_nf;
+extern cpuop_func op_1179_5_ff;
+extern cpuop_func op_117a_5_nf;
+extern cpuop_func op_117a_5_ff;
+extern cpuop_func op_117b_5_nf;
+extern cpuop_func op_117b_5_ff;
+extern cpuop_func op_117c_5_nf;
+extern cpuop_func op_117c_5_ff;
+extern cpuop_func op_1180_5_nf;
+extern cpuop_func op_1180_5_ff;
+extern cpuop_func op_1188_5_nf;
+extern cpuop_func op_1188_5_ff;
+extern cpuop_func op_1190_5_nf;
+extern cpuop_func op_1190_5_ff;
+extern cpuop_func op_1198_5_nf;
+extern cpuop_func op_1198_5_ff;
+extern cpuop_func op_11a0_5_nf;
+extern cpuop_func op_11a0_5_ff;
+extern cpuop_func op_11a8_5_nf;
+extern cpuop_func op_11a8_5_ff;
+extern cpuop_func op_11b0_5_nf;
+extern cpuop_func op_11b0_5_ff;
+extern cpuop_func op_11b8_5_nf;
+extern cpuop_func op_11b8_5_ff;
+extern cpuop_func op_11b9_5_nf;
+extern cpuop_func op_11b9_5_ff;
+extern cpuop_func op_11ba_5_nf;
+extern cpuop_func op_11ba_5_ff;
+extern cpuop_func op_11bb_5_nf;
+extern cpuop_func op_11bb_5_ff;
+extern cpuop_func op_11bc_5_nf;
+extern cpuop_func op_11bc_5_ff;
+extern cpuop_func op_11c0_5_nf;
+extern cpuop_func op_11c0_5_ff;
+extern cpuop_func op_11c8_5_nf;
+extern cpuop_func op_11c8_5_ff;
+extern cpuop_func op_11d0_5_nf;
+extern cpuop_func op_11d0_5_ff;
+extern cpuop_func op_11d8_5_nf;
+extern cpuop_func op_11d8_5_ff;
+extern cpuop_func op_11e0_5_nf;
+extern cpuop_func op_11e0_5_ff;
+extern cpuop_func op_11e8_5_nf;
+extern cpuop_func op_11e8_5_ff;
+extern cpuop_func op_11f0_5_nf;
+extern cpuop_func op_11f0_5_ff;
+extern cpuop_func op_11f8_5_nf;
+extern cpuop_func op_11f8_5_ff;
+extern cpuop_func op_11f9_5_nf;
+extern cpuop_func op_11f9_5_ff;
+extern cpuop_func op_11fa_5_nf;
+extern cpuop_func op_11fa_5_ff;
+extern cpuop_func op_11fb_5_nf;
+extern cpuop_func op_11fb_5_ff;
+extern cpuop_func op_11fc_5_nf;
+extern cpuop_func op_11fc_5_ff;
+extern cpuop_func op_13c0_5_nf;
+extern cpuop_func op_13c0_5_ff;
+extern cpuop_func op_13c8_5_nf;
+extern cpuop_func op_13c8_5_ff;
+extern cpuop_func op_13d0_5_nf;
+extern cpuop_func op_13d0_5_ff;
+extern cpuop_func op_13d8_5_nf;
+extern cpuop_func op_13d8_5_ff;
+extern cpuop_func op_13e0_5_nf;
+extern cpuop_func op_13e0_5_ff;
+extern cpuop_func op_13e8_5_nf;
+extern cpuop_func op_13e8_5_ff;
+extern cpuop_func op_13f0_5_nf;
+extern cpuop_func op_13f0_5_ff;
+extern cpuop_func op_13f8_5_nf;
+extern cpuop_func op_13f8_5_ff;
+extern cpuop_func op_13f9_5_nf;
+extern cpuop_func op_13f9_5_ff;
+extern cpuop_func op_13fa_5_nf;
+extern cpuop_func op_13fa_5_ff;
+extern cpuop_func op_13fb_5_nf;
+extern cpuop_func op_13fb_5_ff;
+extern cpuop_func op_13fc_5_nf;
+extern cpuop_func op_13fc_5_ff;
+extern cpuop_func op_2000_5_nf;
+extern cpuop_func op_2000_5_ff;
+extern cpuop_func op_2008_5_nf;
+extern cpuop_func op_2008_5_ff;
+extern cpuop_func op_2010_5_nf;
+extern cpuop_func op_2010_5_ff;
+extern cpuop_func op_2018_5_nf;
+extern cpuop_func op_2018_5_ff;
+extern cpuop_func op_2020_5_nf;
+extern cpuop_func op_2020_5_ff;
+extern cpuop_func op_2028_5_nf;
+extern cpuop_func op_2028_5_ff;
+extern cpuop_func op_2030_5_nf;
+extern cpuop_func op_2030_5_ff;
+extern cpuop_func op_2038_5_nf;
+extern cpuop_func op_2038_5_ff;
+extern cpuop_func op_2039_5_nf;
+extern cpuop_func op_2039_5_ff;
+extern cpuop_func op_203a_5_nf;
+extern cpuop_func op_203a_5_ff;
+extern cpuop_func op_203b_5_nf;
+extern cpuop_func op_203b_5_ff;
+extern cpuop_func op_203c_5_nf;
+extern cpuop_func op_203c_5_ff;
+extern cpuop_func op_2040_5_nf;
+extern cpuop_func op_2040_5_ff;
+extern cpuop_func op_2048_5_nf;
+extern cpuop_func op_2048_5_ff;
+extern cpuop_func op_2050_5_nf;
+extern cpuop_func op_2050_5_ff;
+extern cpuop_func op_2058_5_nf;
+extern cpuop_func op_2058_5_ff;
+extern cpuop_func op_2060_5_nf;
+extern cpuop_func op_2060_5_ff;
+extern cpuop_func op_2068_5_nf;
+extern cpuop_func op_2068_5_ff;
+extern cpuop_func op_2070_5_nf;
+extern cpuop_func op_2070_5_ff;
+extern cpuop_func op_2078_5_nf;
+extern cpuop_func op_2078_5_ff;
+extern cpuop_func op_2079_5_nf;
+extern cpuop_func op_2079_5_ff;
+extern cpuop_func op_207a_5_nf;
+extern cpuop_func op_207a_5_ff;
+extern cpuop_func op_207b_5_nf;
+extern cpuop_func op_207b_5_ff;
+extern cpuop_func op_207c_5_nf;
+extern cpuop_func op_207c_5_ff;
+extern cpuop_func op_2080_5_nf;
+extern cpuop_func op_2080_5_ff;
+extern cpuop_func op_2088_5_nf;
+extern cpuop_func op_2088_5_ff;
+extern cpuop_func op_2090_5_nf;
+extern cpuop_func op_2090_5_ff;
+extern cpuop_func op_2098_5_nf;
+extern cpuop_func op_2098_5_ff;
+extern cpuop_func op_20a0_5_nf;
+extern cpuop_func op_20a0_5_ff;
+extern cpuop_func op_20a8_5_nf;
+extern cpuop_func op_20a8_5_ff;
+extern cpuop_func op_20b0_5_nf;
+extern cpuop_func op_20b0_5_ff;
+extern cpuop_func op_20b8_5_nf;
+extern cpuop_func op_20b8_5_ff;
+extern cpuop_func op_20b9_5_nf;
+extern cpuop_func op_20b9_5_ff;
+extern cpuop_func op_20ba_5_nf;
+extern cpuop_func op_20ba_5_ff;
+extern cpuop_func op_20bb_5_nf;
+extern cpuop_func op_20bb_5_ff;
+extern cpuop_func op_20bc_5_nf;
+extern cpuop_func op_20bc_5_ff;
+extern cpuop_func op_20c0_5_nf;
+extern cpuop_func op_20c0_5_ff;
+extern cpuop_func op_20c8_5_nf;
+extern cpuop_func op_20c8_5_ff;
+extern cpuop_func op_20d0_5_nf;
+extern cpuop_func op_20d0_5_ff;
+extern cpuop_func op_20d8_5_nf;
+extern cpuop_func op_20d8_5_ff;
+extern cpuop_func op_20e0_5_nf;
+extern cpuop_func op_20e0_5_ff;
+extern cpuop_func op_20e8_5_nf;
+extern cpuop_func op_20e8_5_ff;
+extern cpuop_func op_20f0_5_nf;
+extern cpuop_func op_20f0_5_ff;
+extern cpuop_func op_20f8_5_nf;
+extern cpuop_func op_20f8_5_ff;
+extern cpuop_func op_20f9_5_nf;
+extern cpuop_func op_20f9_5_ff;
+extern cpuop_func op_20fa_5_nf;
+extern cpuop_func op_20fa_5_ff;
+extern cpuop_func op_20fb_5_nf;
+extern cpuop_func op_20fb_5_ff;
+extern cpuop_func op_20fc_5_nf;
+extern cpuop_func op_20fc_5_ff;
+extern cpuop_func op_2100_5_nf;
+extern cpuop_func op_2100_5_ff;
+extern cpuop_func op_2108_5_nf;
+extern cpuop_func op_2108_5_ff;
+extern cpuop_func op_2110_5_nf;
+extern cpuop_func op_2110_5_ff;
+extern cpuop_func op_2118_5_nf;
+extern cpuop_func op_2118_5_ff;
+extern cpuop_func op_2120_5_nf;
+extern cpuop_func op_2120_5_ff;
+extern cpuop_func op_2128_5_nf;
+extern cpuop_func op_2128_5_ff;
+extern cpuop_func op_2130_5_nf;
+extern cpuop_func op_2130_5_ff;
+extern cpuop_func op_2138_5_nf;
+extern cpuop_func op_2138_5_ff;
+extern cpuop_func op_2139_5_nf;
+extern cpuop_func op_2139_5_ff;
+extern cpuop_func op_213a_5_nf;
+extern cpuop_func op_213a_5_ff;
+extern cpuop_func op_213b_5_nf;
+extern cpuop_func op_213b_5_ff;
+extern cpuop_func op_213c_5_nf;
+extern cpuop_func op_213c_5_ff;
+extern cpuop_func op_2140_5_nf;
+extern cpuop_func op_2140_5_ff;
+extern cpuop_func op_2148_5_nf;
+extern cpuop_func op_2148_5_ff;
+extern cpuop_func op_2150_5_nf;
+extern cpuop_func op_2150_5_ff;
+extern cpuop_func op_2158_5_nf;
+extern cpuop_func op_2158_5_ff;
+extern cpuop_func op_2160_5_nf;
+extern cpuop_func op_2160_5_ff;
+extern cpuop_func op_2168_5_nf;
+extern cpuop_func op_2168_5_ff;
+extern cpuop_func op_2170_5_nf;
+extern cpuop_func op_2170_5_ff;
+extern cpuop_func op_2178_5_nf;
+extern cpuop_func op_2178_5_ff;
+extern cpuop_func op_2179_5_nf;
+extern cpuop_func op_2179_5_ff;
+extern cpuop_func op_217a_5_nf;
+extern cpuop_func op_217a_5_ff;
+extern cpuop_func op_217b_5_nf;
+extern cpuop_func op_217b_5_ff;
+extern cpuop_func op_217c_5_nf;
+extern cpuop_func op_217c_5_ff;
+extern cpuop_func op_2180_5_nf;
+extern cpuop_func op_2180_5_ff;
+extern cpuop_func op_2188_5_nf;
+extern cpuop_func op_2188_5_ff;
+extern cpuop_func op_2190_5_nf;
+extern cpuop_func op_2190_5_ff;
+extern cpuop_func op_2198_5_nf;
+extern cpuop_func op_2198_5_ff;
+extern cpuop_func op_21a0_5_nf;
+extern cpuop_func op_21a0_5_ff;
+extern cpuop_func op_21a8_5_nf;
+extern cpuop_func op_21a8_5_ff;
+extern cpuop_func op_21b0_5_nf;
+extern cpuop_func op_21b0_5_ff;
+extern cpuop_func op_21b8_5_nf;
+extern cpuop_func op_21b8_5_ff;
+extern cpuop_func op_21b9_5_nf;
+extern cpuop_func op_21b9_5_ff;
+extern cpuop_func op_21ba_5_nf;
+extern cpuop_func op_21ba_5_ff;
+extern cpuop_func op_21bb_5_nf;
+extern cpuop_func op_21bb_5_ff;
+extern cpuop_func op_21bc_5_nf;
+extern cpuop_func op_21bc_5_ff;
+extern cpuop_func op_21c0_5_nf;
+extern cpuop_func op_21c0_5_ff;
+extern cpuop_func op_21c8_5_nf;
+extern cpuop_func op_21c8_5_ff;
+extern cpuop_func op_21d0_5_nf;
+extern cpuop_func op_21d0_5_ff;
+extern cpuop_func op_21d8_5_nf;
+extern cpuop_func op_21d8_5_ff;
+extern cpuop_func op_21e0_5_nf;
+extern cpuop_func op_21e0_5_ff;
+extern cpuop_func op_21e8_5_nf;
+extern cpuop_func op_21e8_5_ff;
+extern cpuop_func op_21f0_5_nf;
+extern cpuop_func op_21f0_5_ff;
+extern cpuop_func op_21f8_5_nf;
+extern cpuop_func op_21f8_5_ff;
+extern cpuop_func op_21f9_5_nf;
+extern cpuop_func op_21f9_5_ff;
+extern cpuop_func op_21fa_5_nf;
+extern cpuop_func op_21fa_5_ff;
+extern cpuop_func op_21fb_5_nf;
+extern cpuop_func op_21fb_5_ff;
+extern cpuop_func op_21fc_5_nf;
+extern cpuop_func op_21fc_5_ff;
+extern cpuop_func op_23c0_5_nf;
+extern cpuop_func op_23c0_5_ff;
+extern cpuop_func op_23c8_5_nf;
+extern cpuop_func op_23c8_5_ff;
+extern cpuop_func op_23d0_5_nf;
+extern cpuop_func op_23d0_5_ff;
+extern cpuop_func op_23d8_5_nf;
+extern cpuop_func op_23d8_5_ff;
+extern cpuop_func op_23e0_5_nf;
+extern cpuop_func op_23e0_5_ff;
+extern cpuop_func op_23e8_5_nf;
+extern cpuop_func op_23e8_5_ff;
+extern cpuop_func op_23f0_5_nf;
+extern cpuop_func op_23f0_5_ff;
+extern cpuop_func op_23f8_5_nf;
+extern cpuop_func op_23f8_5_ff;
+extern cpuop_func op_23f9_5_nf;
+extern cpuop_func op_23f9_5_ff;
+extern cpuop_func op_23fa_5_nf;
+extern cpuop_func op_23fa_5_ff;
+extern cpuop_func op_23fb_5_nf;
+extern cpuop_func op_23fb_5_ff;
+extern cpuop_func op_23fc_5_nf;
+extern cpuop_func op_23fc_5_ff;
+extern cpuop_func op_3000_5_nf;
+extern cpuop_func op_3000_5_ff;
+extern cpuop_func op_3008_5_nf;
+extern cpuop_func op_3008_5_ff;
+extern cpuop_func op_3010_5_nf;
+extern cpuop_func op_3010_5_ff;
+extern cpuop_func op_3018_5_nf;
+extern cpuop_func op_3018_5_ff;
+extern cpuop_func op_3020_5_nf;
+extern cpuop_func op_3020_5_ff;
+extern cpuop_func op_3028_5_nf;
+extern cpuop_func op_3028_5_ff;
+extern cpuop_func op_3030_5_nf;
+extern cpuop_func op_3030_5_ff;
+extern cpuop_func op_3038_5_nf;
+extern cpuop_func op_3038_5_ff;
+extern cpuop_func op_3039_5_nf;
+extern cpuop_func op_3039_5_ff;
+extern cpuop_func op_303a_5_nf;
+extern cpuop_func op_303a_5_ff;
+extern cpuop_func op_303b_5_nf;
+extern cpuop_func op_303b_5_ff;
+extern cpuop_func op_303c_5_nf;
+extern cpuop_func op_303c_5_ff;
+extern cpuop_func op_3040_5_nf;
+extern cpuop_func op_3040_5_ff;
+extern cpuop_func op_3048_5_nf;
+extern cpuop_func op_3048_5_ff;
+extern cpuop_func op_3050_5_nf;
+extern cpuop_func op_3050_5_ff;
+extern cpuop_func op_3058_5_nf;
+extern cpuop_func op_3058_5_ff;
+extern cpuop_func op_3060_5_nf;
+extern cpuop_func op_3060_5_ff;
+extern cpuop_func op_3068_5_nf;
+extern cpuop_func op_3068_5_ff;
+extern cpuop_func op_3070_5_nf;
+extern cpuop_func op_3070_5_ff;
+extern cpuop_func op_3078_5_nf;
+extern cpuop_func op_3078_5_ff;
+extern cpuop_func op_3079_5_nf;
+extern cpuop_func op_3079_5_ff;
+extern cpuop_func op_307a_5_nf;
+extern cpuop_func op_307a_5_ff;
+extern cpuop_func op_307b_5_nf;
+extern cpuop_func op_307b_5_ff;
+extern cpuop_func op_307c_5_nf;
+extern cpuop_func op_307c_5_ff;
+extern cpuop_func op_3080_5_nf;
+extern cpuop_func op_3080_5_ff;
+extern cpuop_func op_3088_5_nf;
+extern cpuop_func op_3088_5_ff;
+extern cpuop_func op_3090_5_nf;
+extern cpuop_func op_3090_5_ff;
+extern cpuop_func op_3098_5_nf;
+extern cpuop_func op_3098_5_ff;
+extern cpuop_func op_30a0_5_nf;
+extern cpuop_func op_30a0_5_ff;
+extern cpuop_func op_30a8_5_nf;
+extern cpuop_func op_30a8_5_ff;
+extern cpuop_func op_30b0_5_nf;
+extern cpuop_func op_30b0_5_ff;
+extern cpuop_func op_30b8_5_nf;
+extern cpuop_func op_30b8_5_ff;
+extern cpuop_func op_30b9_5_nf;
+extern cpuop_func op_30b9_5_ff;
+extern cpuop_func op_30ba_5_nf;
+extern cpuop_func op_30ba_5_ff;
+extern cpuop_func op_30bb_5_nf;
+extern cpuop_func op_30bb_5_ff;
+extern cpuop_func op_30bc_5_nf;
+extern cpuop_func op_30bc_5_ff;
+extern cpuop_func op_30c0_5_nf;
+extern cpuop_func op_30c0_5_ff;
+extern cpuop_func op_30c8_5_nf;
+extern cpuop_func op_30c8_5_ff;
+extern cpuop_func op_30d0_5_nf;
+extern cpuop_func op_30d0_5_ff;
+extern cpuop_func op_30d8_5_nf;
+extern cpuop_func op_30d8_5_ff;
+extern cpuop_func op_30e0_5_nf;
+extern cpuop_func op_30e0_5_ff;
+extern cpuop_func op_30e8_5_nf;
+extern cpuop_func op_30e8_5_ff;
+extern cpuop_func op_30f0_5_nf;
+extern cpuop_func op_30f0_5_ff;
+extern cpuop_func op_30f8_5_nf;
+extern cpuop_func op_30f8_5_ff;
+extern cpuop_func op_30f9_5_nf;
+extern cpuop_func op_30f9_5_ff;
+extern cpuop_func op_30fa_5_nf;
+extern cpuop_func op_30fa_5_ff;
+extern cpuop_func op_30fb_5_nf;
+extern cpuop_func op_30fb_5_ff;
+extern cpuop_func op_30fc_5_nf;
+extern cpuop_func op_30fc_5_ff;
+extern cpuop_func op_3100_5_nf;
+extern cpuop_func op_3100_5_ff;
+extern cpuop_func op_3108_5_nf;
+extern cpuop_func op_3108_5_ff;
+extern cpuop_func op_3110_5_nf;
+extern cpuop_func op_3110_5_ff;
+extern cpuop_func op_3118_5_nf;
+extern cpuop_func op_3118_5_ff;
+extern cpuop_func op_3120_5_nf;
+extern cpuop_func op_3120_5_ff;
+extern cpuop_func op_3128_5_nf;
+extern cpuop_func op_3128_5_ff;
+extern cpuop_func op_3130_5_nf;
+extern cpuop_func op_3130_5_ff;
+extern cpuop_func op_3138_5_nf;
+extern cpuop_func op_3138_5_ff;
+extern cpuop_func op_3139_5_nf;
+extern cpuop_func op_3139_5_ff;
+extern cpuop_func op_313a_5_nf;
+extern cpuop_func op_313a_5_ff;
+extern cpuop_func op_313b_5_nf;
+extern cpuop_func op_313b_5_ff;
+extern cpuop_func op_313c_5_nf;
+extern cpuop_func op_313c_5_ff;
+extern cpuop_func op_3140_5_nf;
+extern cpuop_func op_3140_5_ff;
+extern cpuop_func op_3148_5_nf;
+extern cpuop_func op_3148_5_ff;
+extern cpuop_func op_3150_5_nf;
+extern cpuop_func op_3150_5_ff;
+extern cpuop_func op_3158_5_nf;
+extern cpuop_func op_3158_5_ff;
+extern cpuop_func op_3160_5_nf;
+extern cpuop_func op_3160_5_ff;
+extern cpuop_func op_3168_5_nf;
+extern cpuop_func op_3168_5_ff;
+extern cpuop_func op_3170_5_nf;
+extern cpuop_func op_3170_5_ff;
+extern cpuop_func op_3178_5_nf;
+extern cpuop_func op_3178_5_ff;
+extern cpuop_func op_3179_5_nf;
+extern cpuop_func op_3179_5_ff;
+extern cpuop_func op_317a_5_nf;
+extern cpuop_func op_317a_5_ff;
+extern cpuop_func op_317b_5_nf;
+extern cpuop_func op_317b_5_ff;
+extern cpuop_func op_317c_5_nf;
+extern cpuop_func op_317c_5_ff;
+extern cpuop_func op_3180_5_nf;
+extern cpuop_func op_3180_5_ff;
+extern cpuop_func op_3188_5_nf;
+extern cpuop_func op_3188_5_ff;
+extern cpuop_func op_3190_5_nf;
+extern cpuop_func op_3190_5_ff;
+extern cpuop_func op_3198_5_nf;
+extern cpuop_func op_3198_5_ff;
+extern cpuop_func op_31a0_5_nf;
+extern cpuop_func op_31a0_5_ff;
+extern cpuop_func op_31a8_5_nf;
+extern cpuop_func op_31a8_5_ff;
+extern cpuop_func op_31b0_5_nf;
+extern cpuop_func op_31b0_5_ff;
+extern cpuop_func op_31b8_5_nf;
+extern cpuop_func op_31b8_5_ff;
+extern cpuop_func op_31b9_5_nf;
+extern cpuop_func op_31b9_5_ff;
+extern cpuop_func op_31ba_5_nf;
+extern cpuop_func op_31ba_5_ff;
+extern cpuop_func op_31bb_5_nf;
+extern cpuop_func op_31bb_5_ff;
+extern cpuop_func op_31bc_5_nf;
+extern cpuop_func op_31bc_5_ff;
+extern cpuop_func op_31c0_5_nf;
+extern cpuop_func op_31c0_5_ff;
+extern cpuop_func op_31c8_5_nf;
+extern cpuop_func op_31c8_5_ff;
+extern cpuop_func op_31d0_5_nf;
+extern cpuop_func op_31d0_5_ff;
+extern cpuop_func op_31d8_5_nf;
+extern cpuop_func op_31d8_5_ff;
+extern cpuop_func op_31e0_5_nf;
+extern cpuop_func op_31e0_5_ff;
+extern cpuop_func op_31e8_5_nf;
+extern cpuop_func op_31e8_5_ff;
+extern cpuop_func op_31f0_5_nf;
+extern cpuop_func op_31f0_5_ff;
+extern cpuop_func op_31f8_5_nf;
+extern cpuop_func op_31f8_5_ff;
+extern cpuop_func op_31f9_5_nf;
+extern cpuop_func op_31f9_5_ff;
+extern cpuop_func op_31fa_5_nf;
+extern cpuop_func op_31fa_5_ff;
+extern cpuop_func op_31fb_5_nf;
+extern cpuop_func op_31fb_5_ff;
+extern cpuop_func op_31fc_5_nf;
+extern cpuop_func op_31fc_5_ff;
+extern cpuop_func op_33c0_5_nf;
+extern cpuop_func op_33c0_5_ff;
+extern cpuop_func op_33c8_5_nf;
+extern cpuop_func op_33c8_5_ff;
+extern cpuop_func op_33d0_5_nf;
+extern cpuop_func op_33d0_5_ff;
+extern cpuop_func op_33d8_5_nf;
+extern cpuop_func op_33d8_5_ff;
+extern cpuop_func op_33e0_5_nf;
+extern cpuop_func op_33e0_5_ff;
+extern cpuop_func op_33e8_5_nf;
+extern cpuop_func op_33e8_5_ff;
+extern cpuop_func op_33f0_5_nf;
+extern cpuop_func op_33f0_5_ff;
+extern cpuop_func op_33f8_5_nf;
+extern cpuop_func op_33f8_5_ff;
+extern cpuop_func op_33f9_5_nf;
+extern cpuop_func op_33f9_5_ff;
+extern cpuop_func op_33fa_5_nf;
+extern cpuop_func op_33fa_5_ff;
+extern cpuop_func op_33fb_5_nf;
+extern cpuop_func op_33fb_5_ff;
+extern cpuop_func op_33fc_5_nf;
+extern cpuop_func op_33fc_5_ff;
+extern cpuop_func op_4000_5_nf;
+extern cpuop_func op_4000_5_ff;
+extern cpuop_func op_4010_5_nf;
+extern cpuop_func op_4010_5_ff;
+extern cpuop_func op_4018_5_nf;
+extern cpuop_func op_4018_5_ff;
+extern cpuop_func op_4020_5_nf;
+extern cpuop_func op_4020_5_ff;
+extern cpuop_func op_4028_5_nf;
+extern cpuop_func op_4028_5_ff;
+extern cpuop_func op_4030_5_nf;
+extern cpuop_func op_4030_5_ff;
+extern cpuop_func op_4038_5_nf;
+extern cpuop_func op_4038_5_ff;
+extern cpuop_func op_4039_5_nf;
+extern cpuop_func op_4039_5_ff;
+extern cpuop_func op_4040_5_nf;
+extern cpuop_func op_4040_5_ff;
+extern cpuop_func op_4050_5_nf;
+extern cpuop_func op_4050_5_ff;
+extern cpuop_func op_4058_5_nf;
+extern cpuop_func op_4058_5_ff;
+extern cpuop_func op_4060_5_nf;
+extern cpuop_func op_4060_5_ff;
+extern cpuop_func op_4068_5_nf;
+extern cpuop_func op_4068_5_ff;
+extern cpuop_func op_4070_5_nf;
+extern cpuop_func op_4070_5_ff;
+extern cpuop_func op_4078_5_nf;
+extern cpuop_func op_4078_5_ff;
+extern cpuop_func op_4079_5_nf;
+extern cpuop_func op_4079_5_ff;
+extern cpuop_func op_4080_5_nf;
+extern cpuop_func op_4080_5_ff;
+extern cpuop_func op_4090_5_nf;
+extern cpuop_func op_4090_5_ff;
+extern cpuop_func op_4098_5_nf;
+extern cpuop_func op_4098_5_ff;
+extern cpuop_func op_40a0_5_nf;
+extern cpuop_func op_40a0_5_ff;
+extern cpuop_func op_40a8_5_nf;
+extern cpuop_func op_40a8_5_ff;
+extern cpuop_func op_40b0_5_nf;
+extern cpuop_func op_40b0_5_ff;
+extern cpuop_func op_40b8_5_nf;
+extern cpuop_func op_40b8_5_ff;
+extern cpuop_func op_40b9_5_nf;
+extern cpuop_func op_40b9_5_ff;
+extern cpuop_func op_40c0_5_nf;
+extern cpuop_func op_40c0_5_ff;
+extern cpuop_func op_40d0_5_nf;
+extern cpuop_func op_40d0_5_ff;
+extern cpuop_func op_40d8_5_nf;
+extern cpuop_func op_40d8_5_ff;
+extern cpuop_func op_40e0_5_nf;
+extern cpuop_func op_40e0_5_ff;
+extern cpuop_func op_40e8_5_nf;
+extern cpuop_func op_40e8_5_ff;
+extern cpuop_func op_40f0_5_nf;
+extern cpuop_func op_40f0_5_ff;
+extern cpuop_func op_40f8_5_nf;
+extern cpuop_func op_40f8_5_ff;
+extern cpuop_func op_40f9_5_nf;
+extern cpuop_func op_40f9_5_ff;
+extern cpuop_func op_4180_5_nf;
+extern cpuop_func op_4180_5_ff;
+extern cpuop_func op_4190_5_nf;
+extern cpuop_func op_4190_5_ff;
+extern cpuop_func op_4198_5_nf;
+extern cpuop_func op_4198_5_ff;
+extern cpuop_func op_41a0_5_nf;
+extern cpuop_func op_41a0_5_ff;
+extern cpuop_func op_41a8_5_nf;
+extern cpuop_func op_41a8_5_ff;
+extern cpuop_func op_41b0_5_nf;
+extern cpuop_func op_41b0_5_ff;
+extern cpuop_func op_41b8_5_nf;
+extern cpuop_func op_41b8_5_ff;
+extern cpuop_func op_41b9_5_nf;
+extern cpuop_func op_41b9_5_ff;
+extern cpuop_func op_41ba_5_nf;
+extern cpuop_func op_41ba_5_ff;
+extern cpuop_func op_41bb_5_nf;
+extern cpuop_func op_41bb_5_ff;
+extern cpuop_func op_41bc_5_nf;
+extern cpuop_func op_41bc_5_ff;
+extern cpuop_func op_41d0_5_nf;
+extern cpuop_func op_41d0_5_ff;
+extern cpuop_func op_41e8_5_nf;
+extern cpuop_func op_41e8_5_ff;
+extern cpuop_func op_41f0_5_nf;
+extern cpuop_func op_41f0_5_ff;
+extern cpuop_func op_41f8_5_nf;
+extern cpuop_func op_41f8_5_ff;
+extern cpuop_func op_41f9_5_nf;
+extern cpuop_func op_41f9_5_ff;
+extern cpuop_func op_41fa_5_nf;
+extern cpuop_func op_41fa_5_ff;
+extern cpuop_func op_41fb_5_nf;
+extern cpuop_func op_41fb_5_ff;
+extern cpuop_func op_4200_5_nf;
+extern cpuop_func op_4200_5_ff;
+extern cpuop_func op_4210_5_nf;
+extern cpuop_func op_4210_5_ff;
+extern cpuop_func op_4218_5_nf;
+extern cpuop_func op_4218_5_ff;
+extern cpuop_func op_4220_5_nf;
+extern cpuop_func op_4220_5_ff;
+extern cpuop_func op_4228_5_nf;
+extern cpuop_func op_4228_5_ff;
+extern cpuop_func op_4230_5_nf;
+extern cpuop_func op_4230_5_ff;
+extern cpuop_func op_4238_5_nf;
+extern cpuop_func op_4238_5_ff;
+extern cpuop_func op_4239_5_nf;
+extern cpuop_func op_4239_5_ff;
+extern cpuop_func op_4240_5_nf;
+extern cpuop_func op_4240_5_ff;
+extern cpuop_func op_4250_5_nf;
+extern cpuop_func op_4250_5_ff;
+extern cpuop_func op_4258_5_nf;
+extern cpuop_func op_4258_5_ff;
+extern cpuop_func op_4260_5_nf;
+extern cpuop_func op_4260_5_ff;
+extern cpuop_func op_4268_5_nf;
+extern cpuop_func op_4268_5_ff;
+extern cpuop_func op_4270_5_nf;
+extern cpuop_func op_4270_5_ff;
+extern cpuop_func op_4278_5_nf;
+extern cpuop_func op_4278_5_ff;
+extern cpuop_func op_4279_5_nf;
+extern cpuop_func op_4279_5_ff;
+extern cpuop_func op_4280_5_nf;
+extern cpuop_func op_4280_5_ff;
+extern cpuop_func op_4290_5_nf;
+extern cpuop_func op_4290_5_ff;
+extern cpuop_func op_4298_5_nf;
+extern cpuop_func op_4298_5_ff;
+extern cpuop_func op_42a0_5_nf;
+extern cpuop_func op_42a0_5_ff;
+extern cpuop_func op_42a8_5_nf;
+extern cpuop_func op_42a8_5_ff;
+extern cpuop_func op_42b0_5_nf;
+extern cpuop_func op_42b0_5_ff;
+extern cpuop_func op_42b8_5_nf;
+extern cpuop_func op_42b8_5_ff;
+extern cpuop_func op_42b9_5_nf;
+extern cpuop_func op_42b9_5_ff;
+extern cpuop_func op_4400_5_nf;
+extern cpuop_func op_4400_5_ff;
+extern cpuop_func op_4410_5_nf;
+extern cpuop_func op_4410_5_ff;
+extern cpuop_func op_4418_5_nf;
+extern cpuop_func op_4418_5_ff;
+extern cpuop_func op_4420_5_nf;
+extern cpuop_func op_4420_5_ff;
+extern cpuop_func op_4428_5_nf;
+extern cpuop_func op_4428_5_ff;
+extern cpuop_func op_4430_5_nf;
+extern cpuop_func op_4430_5_ff;
+extern cpuop_func op_4438_5_nf;
+extern cpuop_func op_4438_5_ff;
+extern cpuop_func op_4439_5_nf;
+extern cpuop_func op_4439_5_ff;
+extern cpuop_func op_4440_5_nf;
+extern cpuop_func op_4440_5_ff;
+extern cpuop_func op_4450_5_nf;
+extern cpuop_func op_4450_5_ff;
+extern cpuop_func op_4458_5_nf;
+extern cpuop_func op_4458_5_ff;
+extern cpuop_func op_4460_5_nf;
+extern cpuop_func op_4460_5_ff;
+extern cpuop_func op_4468_5_nf;
+extern cpuop_func op_4468_5_ff;
+extern cpuop_func op_4470_5_nf;
+extern cpuop_func op_4470_5_ff;
+extern cpuop_func op_4478_5_nf;
+extern cpuop_func op_4478_5_ff;
+extern cpuop_func op_4479_5_nf;
+extern cpuop_func op_4479_5_ff;
+extern cpuop_func op_4480_5_nf;
+extern cpuop_func op_4480_5_ff;
+extern cpuop_func op_4490_5_nf;
+extern cpuop_func op_4490_5_ff;
+extern cpuop_func op_4498_5_nf;
+extern cpuop_func op_4498_5_ff;
+extern cpuop_func op_44a0_5_nf;
+extern cpuop_func op_44a0_5_ff;
+extern cpuop_func op_44a8_5_nf;
+extern cpuop_func op_44a8_5_ff;
+extern cpuop_func op_44b0_5_nf;
+extern cpuop_func op_44b0_5_ff;
+extern cpuop_func op_44b8_5_nf;
+extern cpuop_func op_44b8_5_ff;
+extern cpuop_func op_44b9_5_nf;
+extern cpuop_func op_44b9_5_ff;
+extern cpuop_func op_44c0_5_nf;
+extern cpuop_func op_44c0_5_ff;
+extern cpuop_func op_44d0_5_nf;
+extern cpuop_func op_44d0_5_ff;
+extern cpuop_func op_44d8_5_nf;
+extern cpuop_func op_44d8_5_ff;
+extern cpuop_func op_44e0_5_nf;
+extern cpuop_func op_44e0_5_ff;
+extern cpuop_func op_44e8_5_nf;
+extern cpuop_func op_44e8_5_ff;
+extern cpuop_func op_44f0_5_nf;
+extern cpuop_func op_44f0_5_ff;
+extern cpuop_func op_44f8_5_nf;
+extern cpuop_func op_44f8_5_ff;
+extern cpuop_func op_44f9_5_nf;
+extern cpuop_func op_44f9_5_ff;
+extern cpuop_func op_44fa_5_nf;
+extern cpuop_func op_44fa_5_ff;
+extern cpuop_func op_44fb_5_nf;
+extern cpuop_func op_44fb_5_ff;
+extern cpuop_func op_44fc_5_nf;
+extern cpuop_func op_44fc_5_ff;
+extern cpuop_func op_4600_5_nf;
+extern cpuop_func op_4600_5_ff;
+extern cpuop_func op_4610_5_nf;
+extern cpuop_func op_4610_5_ff;
+extern cpuop_func op_4618_5_nf;
+extern cpuop_func op_4618_5_ff;
+extern cpuop_func op_4620_5_nf;
+extern cpuop_func op_4620_5_ff;
+extern cpuop_func op_4628_5_nf;
+extern cpuop_func op_4628_5_ff;
+extern cpuop_func op_4630_5_nf;
+extern cpuop_func op_4630_5_ff;
+extern cpuop_func op_4638_5_nf;
+extern cpuop_func op_4638_5_ff;
+extern cpuop_func op_4639_5_nf;
+extern cpuop_func op_4639_5_ff;
+extern cpuop_func op_4640_5_nf;
+extern cpuop_func op_4640_5_ff;
+extern cpuop_func op_4650_5_nf;
+extern cpuop_func op_4650_5_ff;
+extern cpuop_func op_4658_5_nf;
+extern cpuop_func op_4658_5_ff;
+extern cpuop_func op_4660_5_nf;
+extern cpuop_func op_4660_5_ff;
+extern cpuop_func op_4668_5_nf;
+extern cpuop_func op_4668_5_ff;
+extern cpuop_func op_4670_5_nf;
+extern cpuop_func op_4670_5_ff;
+extern cpuop_func op_4678_5_nf;
+extern cpuop_func op_4678_5_ff;
+extern cpuop_func op_4679_5_nf;
+extern cpuop_func op_4679_5_ff;
+extern cpuop_func op_4680_5_nf;
+extern cpuop_func op_4680_5_ff;
+extern cpuop_func op_4690_5_nf;
+extern cpuop_func op_4690_5_ff;
+extern cpuop_func op_4698_5_nf;
+extern cpuop_func op_4698_5_ff;
+extern cpuop_func op_46a0_5_nf;
+extern cpuop_func op_46a0_5_ff;
+extern cpuop_func op_46a8_5_nf;
+extern cpuop_func op_46a8_5_ff;
+extern cpuop_func op_46b0_5_nf;
+extern cpuop_func op_46b0_5_ff;
+extern cpuop_func op_46b8_5_nf;
+extern cpuop_func op_46b8_5_ff;
+extern cpuop_func op_46b9_5_nf;
+extern cpuop_func op_46b9_5_ff;
+extern cpuop_func op_46c0_5_nf;
+extern cpuop_func op_46c0_5_ff;
+extern cpuop_func op_46d0_5_nf;
+extern cpuop_func op_46d0_5_ff;
+extern cpuop_func op_46d8_5_nf;
+extern cpuop_func op_46d8_5_ff;
+extern cpuop_func op_46e0_5_nf;
+extern cpuop_func op_46e0_5_ff;
+extern cpuop_func op_46e8_5_nf;
+extern cpuop_func op_46e8_5_ff;
+extern cpuop_func op_46f0_5_nf;
+extern cpuop_func op_46f0_5_ff;
+extern cpuop_func op_46f8_5_nf;
+extern cpuop_func op_46f8_5_ff;
+extern cpuop_func op_46f9_5_nf;
+extern cpuop_func op_46f9_5_ff;
+extern cpuop_func op_46fa_5_nf;
+extern cpuop_func op_46fa_5_ff;
+extern cpuop_func op_46fb_5_nf;
+extern cpuop_func op_46fb_5_ff;
+extern cpuop_func op_46fc_5_nf;
+extern cpuop_func op_46fc_5_ff;
+extern cpuop_func op_4800_5_nf;
+extern cpuop_func op_4800_5_ff;
+extern cpuop_func op_4810_5_nf;
+extern cpuop_func op_4810_5_ff;
+extern cpuop_func op_4818_5_nf;
+extern cpuop_func op_4818_5_ff;
+extern cpuop_func op_4820_5_nf;
+extern cpuop_func op_4820_5_ff;
+extern cpuop_func op_4828_5_nf;
+extern cpuop_func op_4828_5_ff;
+extern cpuop_func op_4830_5_nf;
+extern cpuop_func op_4830_5_ff;
+extern cpuop_func op_4838_5_nf;
+extern cpuop_func op_4838_5_ff;
+extern cpuop_func op_4839_5_nf;
+extern cpuop_func op_4839_5_ff;
+extern cpuop_func op_4840_5_nf;
+extern cpuop_func op_4840_5_ff;
+extern cpuop_func op_4850_5_nf;
+extern cpuop_func op_4850_5_ff;
+extern cpuop_func op_4868_5_nf;
+extern cpuop_func op_4868_5_ff;
+extern cpuop_func op_4870_5_nf;
+extern cpuop_func op_4870_5_ff;
+extern cpuop_func op_4878_5_nf;
+extern cpuop_func op_4878_5_ff;
+extern cpuop_func op_4879_5_nf;
+extern cpuop_func op_4879_5_ff;
+extern cpuop_func op_487a_5_nf;
+extern cpuop_func op_487a_5_ff;
+extern cpuop_func op_487b_5_nf;
+extern cpuop_func op_487b_5_ff;
+extern cpuop_func op_4880_5_nf;
+extern cpuop_func op_4880_5_ff;
+extern cpuop_func op_4890_5_nf;
+extern cpuop_func op_4890_5_ff;
+extern cpuop_func op_48a0_5_nf;
+extern cpuop_func op_48a0_5_ff;
+extern cpuop_func op_48a8_5_nf;
+extern cpuop_func op_48a8_5_ff;
+extern cpuop_func op_48b0_5_nf;
+extern cpuop_func op_48b0_5_ff;
+extern cpuop_func op_48b8_5_nf;
+extern cpuop_func op_48b8_5_ff;
+extern cpuop_func op_48b9_5_nf;
+extern cpuop_func op_48b9_5_ff;
+extern cpuop_func op_48c0_5_nf;
+extern cpuop_func op_48c0_5_ff;
+extern cpuop_func op_48d0_5_nf;
+extern cpuop_func op_48d0_5_ff;
+extern cpuop_func op_48e0_5_nf;
+extern cpuop_func op_48e0_5_ff;
+extern cpuop_func op_48e8_5_nf;
+extern cpuop_func op_48e8_5_ff;
+extern cpuop_func op_48f0_5_nf;
+extern cpuop_func op_48f0_5_ff;
+extern cpuop_func op_48f8_5_nf;
+extern cpuop_func op_48f8_5_ff;
+extern cpuop_func op_48f9_5_nf;
+extern cpuop_func op_48f9_5_ff;
+extern cpuop_func op_4a00_5_nf;
+extern cpuop_func op_4a00_5_ff;
+extern cpuop_func op_4a10_5_nf;
+extern cpuop_func op_4a10_5_ff;
+extern cpuop_func op_4a18_5_nf;
+extern cpuop_func op_4a18_5_ff;
+extern cpuop_func op_4a20_5_nf;
+extern cpuop_func op_4a20_5_ff;
+extern cpuop_func op_4a28_5_nf;
+extern cpuop_func op_4a28_5_ff;
+extern cpuop_func op_4a30_5_nf;
+extern cpuop_func op_4a30_5_ff;
+extern cpuop_func op_4a38_5_nf;
+extern cpuop_func op_4a38_5_ff;
+extern cpuop_func op_4a39_5_nf;
+extern cpuop_func op_4a39_5_ff;
+extern cpuop_func op_4a3a_5_nf;
+extern cpuop_func op_4a3a_5_ff;
+extern cpuop_func op_4a3b_5_nf;
+extern cpuop_func op_4a3b_5_ff;
+extern cpuop_func op_4a3c_5_nf;
+extern cpuop_func op_4a3c_5_ff;
+extern cpuop_func op_4a40_5_nf;
+extern cpuop_func op_4a40_5_ff;
+extern cpuop_func op_4a48_5_nf;
+extern cpuop_func op_4a48_5_ff;
+extern cpuop_func op_4a50_5_nf;
+extern cpuop_func op_4a50_5_ff;
+extern cpuop_func op_4a58_5_nf;
+extern cpuop_func op_4a58_5_ff;
+extern cpuop_func op_4a60_5_nf;
+extern cpuop_func op_4a60_5_ff;
+extern cpuop_func op_4a68_5_nf;
+extern cpuop_func op_4a68_5_ff;
+extern cpuop_func op_4a70_5_nf;
+extern cpuop_func op_4a70_5_ff;
+extern cpuop_func op_4a78_5_nf;
+extern cpuop_func op_4a78_5_ff;
+extern cpuop_func op_4a79_5_nf;
+extern cpuop_func op_4a79_5_ff;
+extern cpuop_func op_4a7a_5_nf;
+extern cpuop_func op_4a7a_5_ff;
+extern cpuop_func op_4a7b_5_nf;
+extern cpuop_func op_4a7b_5_ff;
+extern cpuop_func op_4a7c_5_nf;
+extern cpuop_func op_4a7c_5_ff;
+extern cpuop_func op_4a80_5_nf;
+extern cpuop_func op_4a80_5_ff;
+extern cpuop_func op_4a88_5_nf;
+extern cpuop_func op_4a88_5_ff;
+extern cpuop_func op_4a90_5_nf;
+extern cpuop_func op_4a90_5_ff;
+extern cpuop_func op_4a98_5_nf;
+extern cpuop_func op_4a98_5_ff;
+extern cpuop_func op_4aa0_5_nf;
+extern cpuop_func op_4aa0_5_ff;
+extern cpuop_func op_4aa8_5_nf;
+extern cpuop_func op_4aa8_5_ff;
+extern cpuop_func op_4ab0_5_nf;
+extern cpuop_func op_4ab0_5_ff;
+extern cpuop_func op_4ab8_5_nf;
+extern cpuop_func op_4ab8_5_ff;
+extern cpuop_func op_4ab9_5_nf;
+extern cpuop_func op_4ab9_5_ff;
+extern cpuop_func op_4aba_5_nf;
+extern cpuop_func op_4aba_5_ff;
+extern cpuop_func op_4abb_5_nf;
+extern cpuop_func op_4abb_5_ff;
+extern cpuop_func op_4abc_5_nf;
+extern cpuop_func op_4abc_5_ff;
+extern cpuop_func op_4ac0_5_nf;
+extern cpuop_func op_4ac0_5_ff;
+extern cpuop_func op_4ad0_5_nf;
+extern cpuop_func op_4ad0_5_ff;
+extern cpuop_func op_4ad8_5_nf;
+extern cpuop_func op_4ad8_5_ff;
+extern cpuop_func op_4ae0_5_nf;
+extern cpuop_func op_4ae0_5_ff;
+extern cpuop_func op_4ae8_5_nf;
+extern cpuop_func op_4ae8_5_ff;
+extern cpuop_func op_4af0_5_nf;
+extern cpuop_func op_4af0_5_ff;
+extern cpuop_func op_4af8_5_nf;
+extern cpuop_func op_4af8_5_ff;
+extern cpuop_func op_4af9_5_nf;
+extern cpuop_func op_4af9_5_ff;
+extern cpuop_func op_4c90_5_nf;
+extern cpuop_func op_4c90_5_ff;
+extern cpuop_func op_4c98_5_nf;
+extern cpuop_func op_4c98_5_ff;
+extern cpuop_func op_4ca8_5_nf;
+extern cpuop_func op_4ca8_5_ff;
+extern cpuop_func op_4cb0_5_nf;
+extern cpuop_func op_4cb0_5_ff;
+extern cpuop_func op_4cb8_5_nf;
+extern cpuop_func op_4cb8_5_ff;
+extern cpuop_func op_4cb9_5_nf;
+extern cpuop_func op_4cb9_5_ff;
+extern cpuop_func op_4cba_5_nf;
+extern cpuop_func op_4cba_5_ff;
+extern cpuop_func op_4cbb_5_nf;
+extern cpuop_func op_4cbb_5_ff;
+extern cpuop_func op_4cd0_5_nf;
+extern cpuop_func op_4cd0_5_ff;
+extern cpuop_func op_4cd8_5_nf;
+extern cpuop_func op_4cd8_5_ff;
+extern cpuop_func op_4ce8_5_nf;
+extern cpuop_func op_4ce8_5_ff;
+extern cpuop_func op_4cf0_5_nf;
+extern cpuop_func op_4cf0_5_ff;
+extern cpuop_func op_4cf8_5_nf;
+extern cpuop_func op_4cf8_5_ff;
+extern cpuop_func op_4cf9_5_nf;
+extern cpuop_func op_4cf9_5_ff;
+extern cpuop_func op_4cfa_5_nf;
+extern cpuop_func op_4cfa_5_ff;
+extern cpuop_func op_4cfb_5_nf;
+extern cpuop_func op_4cfb_5_ff;
+extern cpuop_func op_4e40_5_nf;
+extern cpuop_func op_4e40_5_ff;
+extern cpuop_func op_4e50_5_nf;
+extern cpuop_func op_4e50_5_ff;
+extern cpuop_func op_4e58_5_nf;
+extern cpuop_func op_4e58_5_ff;
+extern cpuop_func op_4e60_5_nf;
+extern cpuop_func op_4e60_5_ff;
+extern cpuop_func op_4e68_5_nf;
+extern cpuop_func op_4e68_5_ff;
+extern cpuop_func op_4e70_5_nf;
+extern cpuop_func op_4e70_5_ff;
+extern cpuop_func op_4e71_5_nf;
+extern cpuop_func op_4e71_5_ff;
+extern cpuop_func op_4e72_5_nf;
+extern cpuop_func op_4e72_5_ff;
+extern cpuop_func op_4e73_5_nf;
+extern cpuop_func op_4e73_5_ff;
+extern cpuop_func op_4e74_5_nf;
+extern cpuop_func op_4e74_5_ff;
+extern cpuop_func op_4e75_5_nf;
+extern cpuop_func op_4e75_5_ff;
+extern cpuop_func op_4e76_5_nf;
+extern cpuop_func op_4e76_5_ff;
+extern cpuop_func op_4e77_5_nf;
+extern cpuop_func op_4e77_5_ff;
+extern cpuop_func op_4e90_5_nf;
+extern cpuop_func op_4e90_5_ff;
+extern cpuop_func op_4ea8_5_nf;
+extern cpuop_func op_4ea8_5_ff;
+extern cpuop_func op_4eb0_5_nf;
+extern cpuop_func op_4eb0_5_ff;
+extern cpuop_func op_4eb8_5_nf;
+extern cpuop_func op_4eb8_5_ff;
+extern cpuop_func op_4eb9_5_nf;
+extern cpuop_func op_4eb9_5_ff;
+extern cpuop_func op_4eba_5_nf;
+extern cpuop_func op_4eba_5_ff;
+extern cpuop_func op_4ebb_5_nf;
+extern cpuop_func op_4ebb_5_ff;
+extern cpuop_func op_4ed0_5_nf;
+extern cpuop_func op_4ed0_5_ff;
+extern cpuop_func op_4ee8_5_nf;
+extern cpuop_func op_4ee8_5_ff;
+extern cpuop_func op_4ef0_5_nf;
+extern cpuop_func op_4ef0_5_ff;
+extern cpuop_func op_4ef8_5_nf;
+extern cpuop_func op_4ef8_5_ff;
+extern cpuop_func op_4ef9_5_nf;
+extern cpuop_func op_4ef9_5_ff;
+extern cpuop_func op_4efa_5_nf;
+extern cpuop_func op_4efa_5_ff;
+extern cpuop_func op_4efb_5_nf;
+extern cpuop_func op_4efb_5_ff;
+extern cpuop_func op_5000_5_nf;
+extern cpuop_func op_5000_5_ff;
+extern cpuop_func op_5010_5_nf;
+extern cpuop_func op_5010_5_ff;
+extern cpuop_func op_5018_5_nf;
+extern cpuop_func op_5018_5_ff;
+extern cpuop_func op_5020_5_nf;
+extern cpuop_func op_5020_5_ff;
+extern cpuop_func op_5028_5_nf;
+extern cpuop_func op_5028_5_ff;
+extern cpuop_func op_5030_5_nf;
+extern cpuop_func op_5030_5_ff;
+extern cpuop_func op_5038_5_nf;
+extern cpuop_func op_5038_5_ff;
+extern cpuop_func op_5039_5_nf;
+extern cpuop_func op_5039_5_ff;
+extern cpuop_func op_5040_5_nf;
+extern cpuop_func op_5040_5_ff;
+extern cpuop_func op_5048_5_nf;
+extern cpuop_func op_5048_5_ff;
+extern cpuop_func op_5050_5_nf;
+extern cpuop_func op_5050_5_ff;
+extern cpuop_func op_5058_5_nf;
+extern cpuop_func op_5058_5_ff;
+extern cpuop_func op_5060_5_nf;
+extern cpuop_func op_5060_5_ff;
+extern cpuop_func op_5068_5_nf;
+extern cpuop_func op_5068_5_ff;
+extern cpuop_func op_5070_5_nf;
+extern cpuop_func op_5070_5_ff;
+extern cpuop_func op_5078_5_nf;
+extern cpuop_func op_5078_5_ff;
+extern cpuop_func op_5079_5_nf;
+extern cpuop_func op_5079_5_ff;
+extern cpuop_func op_5080_5_nf;
+extern cpuop_func op_5080_5_ff;
+extern cpuop_func op_5088_5_nf;
+extern cpuop_func op_5088_5_ff;
+extern cpuop_func op_5090_5_nf;
+extern cpuop_func op_5090_5_ff;
+extern cpuop_func op_5098_5_nf;
+extern cpuop_func op_5098_5_ff;
+extern cpuop_func op_50a0_5_nf;
+extern cpuop_func op_50a0_5_ff;
+extern cpuop_func op_50a8_5_nf;
+extern cpuop_func op_50a8_5_ff;
+extern cpuop_func op_50b0_5_nf;
+extern cpuop_func op_50b0_5_ff;
+extern cpuop_func op_50b8_5_nf;
+extern cpuop_func op_50b8_5_ff;
+extern cpuop_func op_50b9_5_nf;
+extern cpuop_func op_50b9_5_ff;
+extern cpuop_func op_50c0_5_nf;
+extern cpuop_func op_50c0_5_ff;
+extern cpuop_func op_50c8_5_nf;
+extern cpuop_func op_50c8_5_ff;
+extern cpuop_func op_50d0_5_nf;
+extern cpuop_func op_50d0_5_ff;
+extern cpuop_func op_50d8_5_nf;
+extern cpuop_func op_50d8_5_ff;
+extern cpuop_func op_50e0_5_nf;
+extern cpuop_func op_50e0_5_ff;
+extern cpuop_func op_50e8_5_nf;
+extern cpuop_func op_50e8_5_ff;
+extern cpuop_func op_50f0_5_nf;
+extern cpuop_func op_50f0_5_ff;
+extern cpuop_func op_50f8_5_nf;
+extern cpuop_func op_50f8_5_ff;
+extern cpuop_func op_50f9_5_nf;
+extern cpuop_func op_50f9_5_ff;
+extern cpuop_func op_5100_5_nf;
+extern cpuop_func op_5100_5_ff;
+extern cpuop_func op_5110_5_nf;
+extern cpuop_func op_5110_5_ff;
+extern cpuop_func op_5118_5_nf;
+extern cpuop_func op_5118_5_ff;
+extern cpuop_func op_5120_5_nf;
+extern cpuop_func op_5120_5_ff;
+extern cpuop_func op_5128_5_nf;
+extern cpuop_func op_5128_5_ff;
+extern cpuop_func op_5130_5_nf;
+extern cpuop_func op_5130_5_ff;
+extern cpuop_func op_5138_5_nf;
+extern cpuop_func op_5138_5_ff;
+extern cpuop_func op_5139_5_nf;
+extern cpuop_func op_5139_5_ff;
+extern cpuop_func op_5140_5_nf;
+extern cpuop_func op_5140_5_ff;
+extern cpuop_func op_5148_5_nf;
+extern cpuop_func op_5148_5_ff;
+extern cpuop_func op_5150_5_nf;
+extern cpuop_func op_5150_5_ff;
+extern cpuop_func op_5158_5_nf;
+extern cpuop_func op_5158_5_ff;
+extern cpuop_func op_5160_5_nf;
+extern cpuop_func op_5160_5_ff;
+extern cpuop_func op_5168_5_nf;
+extern cpuop_func op_5168_5_ff;
+extern cpuop_func op_5170_5_nf;
+extern cpuop_func op_5170_5_ff;
+extern cpuop_func op_5178_5_nf;
+extern cpuop_func op_5178_5_ff;
+extern cpuop_func op_5179_5_nf;
+extern cpuop_func op_5179_5_ff;
+extern cpuop_func op_5180_5_nf;
+extern cpuop_func op_5180_5_ff;
+extern cpuop_func op_5188_5_nf;
+extern cpuop_func op_5188_5_ff;
+extern cpuop_func op_5190_5_nf;
+extern cpuop_func op_5190_5_ff;
+extern cpuop_func op_5198_5_nf;
+extern cpuop_func op_5198_5_ff;
+extern cpuop_func op_51a0_5_nf;
+extern cpuop_func op_51a0_5_ff;
+extern cpuop_func op_51a8_5_nf;
+extern cpuop_func op_51a8_5_ff;
+extern cpuop_func op_51b0_5_nf;
+extern cpuop_func op_51b0_5_ff;
+extern cpuop_func op_51b8_5_nf;
+extern cpuop_func op_51b8_5_ff;
+extern cpuop_func op_51b9_5_nf;
+extern cpuop_func op_51b9_5_ff;
+extern cpuop_func op_51c0_5_nf;
+extern cpuop_func op_51c0_5_ff;
+extern cpuop_func op_51c8_5_nf;
+extern cpuop_func op_51c8_5_ff;
+extern cpuop_func op_51d0_5_nf;
+extern cpuop_func op_51d0_5_ff;
+extern cpuop_func op_51d8_5_nf;
+extern cpuop_func op_51d8_5_ff;
+extern cpuop_func op_51e0_5_nf;
+extern cpuop_func op_51e0_5_ff;
+extern cpuop_func op_51e8_5_nf;
+extern cpuop_func op_51e8_5_ff;
+extern cpuop_func op_51f0_5_nf;
+extern cpuop_func op_51f0_5_ff;
+extern cpuop_func op_51f8_5_nf;
+extern cpuop_func op_51f8_5_ff;
+extern cpuop_func op_51f9_5_nf;
+extern cpuop_func op_51f9_5_ff;
+extern cpuop_func op_52c0_5_nf;
+extern cpuop_func op_52c0_5_ff;
+extern cpuop_func op_52c8_5_nf;
+extern cpuop_func op_52c8_5_ff;
+extern cpuop_func op_52d0_5_nf;
+extern cpuop_func op_52d0_5_ff;
+extern cpuop_func op_52d8_5_nf;
+extern cpuop_func op_52d8_5_ff;
+extern cpuop_func op_52e0_5_nf;
+extern cpuop_func op_52e0_5_ff;
+extern cpuop_func op_52e8_5_nf;
+extern cpuop_func op_52e8_5_ff;
+extern cpuop_func op_52f0_5_nf;
+extern cpuop_func op_52f0_5_ff;
+extern cpuop_func op_52f8_5_nf;
+extern cpuop_func op_52f8_5_ff;
+extern cpuop_func op_52f9_5_nf;
+extern cpuop_func op_52f9_5_ff;
+extern cpuop_func op_53c0_5_nf;
+extern cpuop_func op_53c0_5_ff;
+extern cpuop_func op_53c8_5_nf;
+extern cpuop_func op_53c8_5_ff;
+extern cpuop_func op_53d0_5_nf;
+extern cpuop_func op_53d0_5_ff;
+extern cpuop_func op_53d8_5_nf;
+extern cpuop_func op_53d8_5_ff;
+extern cpuop_func op_53e0_5_nf;
+extern cpuop_func op_53e0_5_ff;
+extern cpuop_func op_53e8_5_nf;
+extern cpuop_func op_53e8_5_ff;
+extern cpuop_func op_53f0_5_nf;
+extern cpuop_func op_53f0_5_ff;
+extern cpuop_func op_53f8_5_nf;
+extern cpuop_func op_53f8_5_ff;
+extern cpuop_func op_53f9_5_nf;
+extern cpuop_func op_53f9_5_ff;
+extern cpuop_func op_54c0_5_nf;
+extern cpuop_func op_54c0_5_ff;
+extern cpuop_func op_54c8_5_nf;
+extern cpuop_func op_54c8_5_ff;
+extern cpuop_func op_54d0_5_nf;
+extern cpuop_func op_54d0_5_ff;
+extern cpuop_func op_54d8_5_nf;
+extern cpuop_func op_54d8_5_ff;
+extern cpuop_func op_54e0_5_nf;
+extern cpuop_func op_54e0_5_ff;
+extern cpuop_func op_54e8_5_nf;
+extern cpuop_func op_54e8_5_ff;
+extern cpuop_func op_54f0_5_nf;
+extern cpuop_func op_54f0_5_ff;
+extern cpuop_func op_54f8_5_nf;
+extern cpuop_func op_54f8_5_ff;
+extern cpuop_func op_54f9_5_nf;
+extern cpuop_func op_54f9_5_ff;
+extern cpuop_func op_55c0_5_nf;
+extern cpuop_func op_55c0_5_ff;
+extern cpuop_func op_55c8_5_nf;
+extern cpuop_func op_55c8_5_ff;
+extern cpuop_func op_55d0_5_nf;
+extern cpuop_func op_55d0_5_ff;
+extern cpuop_func op_55d8_5_nf;
+extern cpuop_func op_55d8_5_ff;
+extern cpuop_func op_55e0_5_nf;
+extern cpuop_func op_55e0_5_ff;
+extern cpuop_func op_55e8_5_nf;
+extern cpuop_func op_55e8_5_ff;
+extern cpuop_func op_55f0_5_nf;
+extern cpuop_func op_55f0_5_ff;
+extern cpuop_func op_55f8_5_nf;
+extern cpuop_func op_55f8_5_ff;
+extern cpuop_func op_55f9_5_nf;
+extern cpuop_func op_55f9_5_ff;
+extern cpuop_func op_56c0_5_nf;
+extern cpuop_func op_56c0_5_ff;
+extern cpuop_func op_56c8_5_nf;
+extern cpuop_func op_56c8_5_ff;
+extern cpuop_func op_56d0_5_nf;
+extern cpuop_func op_56d0_5_ff;
+extern cpuop_func op_56d8_5_nf;
+extern cpuop_func op_56d8_5_ff;
+extern cpuop_func op_56e0_5_nf;
+extern cpuop_func op_56e0_5_ff;
+extern cpuop_func op_56e8_5_nf;
+extern cpuop_func op_56e8_5_ff;
+extern cpuop_func op_56f0_5_nf;
+extern cpuop_func op_56f0_5_ff;
+extern cpuop_func op_56f8_5_nf;
+extern cpuop_func op_56f8_5_ff;
+extern cpuop_func op_56f9_5_nf;
+extern cpuop_func op_56f9_5_ff;
+extern cpuop_func op_57c0_5_nf;
+extern cpuop_func op_57c0_5_ff;
+extern cpuop_func op_57c8_5_nf;
+extern cpuop_func op_57c8_5_ff;
+extern cpuop_func op_57d0_5_nf;
+extern cpuop_func op_57d0_5_ff;
+extern cpuop_func op_57d8_5_nf;
+extern cpuop_func op_57d8_5_ff;
+extern cpuop_func op_57e0_5_nf;
+extern cpuop_func op_57e0_5_ff;
+extern cpuop_func op_57e8_5_nf;
+extern cpuop_func op_57e8_5_ff;
+extern cpuop_func op_57f0_5_nf;
+extern cpuop_func op_57f0_5_ff;
+extern cpuop_func op_57f8_5_nf;
+extern cpuop_func op_57f8_5_ff;
+extern cpuop_func op_57f9_5_nf;
+extern cpuop_func op_57f9_5_ff;
+extern cpuop_func op_58c0_5_nf;
+extern cpuop_func op_58c0_5_ff;
+extern cpuop_func op_58c8_5_nf;
+extern cpuop_func op_58c8_5_ff;
+extern cpuop_func op_58d0_5_nf;
+extern cpuop_func op_58d0_5_ff;
+extern cpuop_func op_58d8_5_nf;
+extern cpuop_func op_58d8_5_ff;
+extern cpuop_func op_58e0_5_nf;
+extern cpuop_func op_58e0_5_ff;
+extern cpuop_func op_58e8_5_nf;
+extern cpuop_func op_58e8_5_ff;
+extern cpuop_func op_58f0_5_nf;
+extern cpuop_func op_58f0_5_ff;
+extern cpuop_func op_58f8_5_nf;
+extern cpuop_func op_58f8_5_ff;
+extern cpuop_func op_58f9_5_nf;
+extern cpuop_func op_58f9_5_ff;
+extern cpuop_func op_59c0_5_nf;
+extern cpuop_func op_59c0_5_ff;
+extern cpuop_func op_59c8_5_nf;
+extern cpuop_func op_59c8_5_ff;
+extern cpuop_func op_59d0_5_nf;
+extern cpuop_func op_59d0_5_ff;
+extern cpuop_func op_59d8_5_nf;
+extern cpuop_func op_59d8_5_ff;
+extern cpuop_func op_59e0_5_nf;
+extern cpuop_func op_59e0_5_ff;
+extern cpuop_func op_59e8_5_nf;
+extern cpuop_func op_59e8_5_ff;
+extern cpuop_func op_59f0_5_nf;
+extern cpuop_func op_59f0_5_ff;
+extern cpuop_func op_59f8_5_nf;
+extern cpuop_func op_59f8_5_ff;
+extern cpuop_func op_59f9_5_nf;
+extern cpuop_func op_59f9_5_ff;
+extern cpuop_func op_5ac0_5_nf;
+extern cpuop_func op_5ac0_5_ff;
+extern cpuop_func op_5ac8_5_nf;
+extern cpuop_func op_5ac8_5_ff;
+extern cpuop_func op_5ad0_5_nf;
+extern cpuop_func op_5ad0_5_ff;
+extern cpuop_func op_5ad8_5_nf;
+extern cpuop_func op_5ad8_5_ff;
+extern cpuop_func op_5ae0_5_nf;
+extern cpuop_func op_5ae0_5_ff;
+extern cpuop_func op_5ae8_5_nf;
+extern cpuop_func op_5ae8_5_ff;
+extern cpuop_func op_5af0_5_nf;
+extern cpuop_func op_5af0_5_ff;
+extern cpuop_func op_5af8_5_nf;
+extern cpuop_func op_5af8_5_ff;
+extern cpuop_func op_5af9_5_nf;
+extern cpuop_func op_5af9_5_ff;
+extern cpuop_func op_5bc0_5_nf;
+extern cpuop_func op_5bc0_5_ff;
+extern cpuop_func op_5bc8_5_nf;
+extern cpuop_func op_5bc8_5_ff;
+extern cpuop_func op_5bd0_5_nf;
+extern cpuop_func op_5bd0_5_ff;
+extern cpuop_func op_5bd8_5_nf;
+extern cpuop_func op_5bd8_5_ff;
+extern cpuop_func op_5be0_5_nf;
+extern cpuop_func op_5be0_5_ff;
+extern cpuop_func op_5be8_5_nf;
+extern cpuop_func op_5be8_5_ff;
+extern cpuop_func op_5bf0_5_nf;
+extern cpuop_func op_5bf0_5_ff;
+extern cpuop_func op_5bf8_5_nf;
+extern cpuop_func op_5bf8_5_ff;
+extern cpuop_func op_5bf9_5_nf;
+extern cpuop_func op_5bf9_5_ff;
+extern cpuop_func op_5cc0_5_nf;
+extern cpuop_func op_5cc0_5_ff;
+extern cpuop_func op_5cc8_5_nf;
+extern cpuop_func op_5cc8_5_ff;
+extern cpuop_func op_5cd0_5_nf;
+extern cpuop_func op_5cd0_5_ff;
+extern cpuop_func op_5cd8_5_nf;
+extern cpuop_func op_5cd8_5_ff;
+extern cpuop_func op_5ce0_5_nf;
+extern cpuop_func op_5ce0_5_ff;
+extern cpuop_func op_5ce8_5_nf;
+extern cpuop_func op_5ce8_5_ff;
+extern cpuop_func op_5cf0_5_nf;
+extern cpuop_func op_5cf0_5_ff;
+extern cpuop_func op_5cf8_5_nf;
+extern cpuop_func op_5cf8_5_ff;
+extern cpuop_func op_5cf9_5_nf;
+extern cpuop_func op_5cf9_5_ff;
+extern cpuop_func op_5dc0_5_nf;
+extern cpuop_func op_5dc0_5_ff;
+extern cpuop_func op_5dc8_5_nf;
+extern cpuop_func op_5dc8_5_ff;
+extern cpuop_func op_5dd0_5_nf;
+extern cpuop_func op_5dd0_5_ff;
+extern cpuop_func op_5dd8_5_nf;
+extern cpuop_func op_5dd8_5_ff;
+extern cpuop_func op_5de0_5_nf;
+extern cpuop_func op_5de0_5_ff;
+extern cpuop_func op_5de8_5_nf;
+extern cpuop_func op_5de8_5_ff;
+extern cpuop_func op_5df0_5_nf;
+extern cpuop_func op_5df0_5_ff;
+extern cpuop_func op_5df8_5_nf;
+extern cpuop_func op_5df8_5_ff;
+extern cpuop_func op_5df9_5_nf;
+extern cpuop_func op_5df9_5_ff;
+extern cpuop_func op_5ec0_5_nf;
+extern cpuop_func op_5ec0_5_ff;
+extern cpuop_func op_5ec8_5_nf;
+extern cpuop_func op_5ec8_5_ff;
+extern cpuop_func op_5ed0_5_nf;
+extern cpuop_func op_5ed0_5_ff;
+extern cpuop_func op_5ed8_5_nf;
+extern cpuop_func op_5ed8_5_ff;
+extern cpuop_func op_5ee0_5_nf;
+extern cpuop_func op_5ee0_5_ff;
+extern cpuop_func op_5ee8_5_nf;
+extern cpuop_func op_5ee8_5_ff;
+extern cpuop_func op_5ef0_5_nf;
+extern cpuop_func op_5ef0_5_ff;
+extern cpuop_func op_5ef8_5_nf;
+extern cpuop_func op_5ef8_5_ff;
+extern cpuop_func op_5ef9_5_nf;
+extern cpuop_func op_5ef9_5_ff;
+extern cpuop_func op_5fc0_5_nf;
+extern cpuop_func op_5fc0_5_ff;
+extern cpuop_func op_5fc8_5_nf;
+extern cpuop_func op_5fc8_5_ff;
+extern cpuop_func op_5fd0_5_nf;
+extern cpuop_func op_5fd0_5_ff;
+extern cpuop_func op_5fd8_5_nf;
+extern cpuop_func op_5fd8_5_ff;
+extern cpuop_func op_5fe0_5_nf;
+extern cpuop_func op_5fe0_5_ff;
+extern cpuop_func op_5fe8_5_nf;
+extern cpuop_func op_5fe8_5_ff;
+extern cpuop_func op_5ff0_5_nf;
+extern cpuop_func op_5ff0_5_ff;
+extern cpuop_func op_5ff8_5_nf;
+extern cpuop_func op_5ff8_5_ff;
+extern cpuop_func op_5ff9_5_nf;
+extern cpuop_func op_5ff9_5_ff;
+extern cpuop_func op_6000_5_nf;
+extern cpuop_func op_6000_5_ff;
+extern cpuop_func op_6001_5_nf;
+extern cpuop_func op_6001_5_ff;
+extern cpuop_func op_60ff_5_nf;
+extern cpuop_func op_60ff_5_ff;
+extern cpuop_func op_6100_5_nf;
+extern cpuop_func op_6100_5_ff;
+extern cpuop_func op_6101_5_nf;
+extern cpuop_func op_6101_5_ff;
+extern cpuop_func op_61ff_5_nf;
+extern cpuop_func op_61ff_5_ff;
+extern cpuop_func op_6200_5_nf;
+extern cpuop_func op_6200_5_ff;
+extern cpuop_func op_6201_5_nf;
+extern cpuop_func op_6201_5_ff;
+extern cpuop_func op_62ff_5_nf;
+extern cpuop_func op_62ff_5_ff;
+extern cpuop_func op_6300_5_nf;
+extern cpuop_func op_6300_5_ff;
+extern cpuop_func op_6301_5_nf;
+extern cpuop_func op_6301_5_ff;
+extern cpuop_func op_63ff_5_nf;
+extern cpuop_func op_63ff_5_ff;
+extern cpuop_func op_6400_5_nf;
+extern cpuop_func op_6400_5_ff;
+extern cpuop_func op_6401_5_nf;
+extern cpuop_func op_6401_5_ff;
+extern cpuop_func op_64ff_5_nf;
+extern cpuop_func op_64ff_5_ff;
+extern cpuop_func op_6500_5_nf;
+extern cpuop_func op_6500_5_ff;
+extern cpuop_func op_6501_5_nf;
+extern cpuop_func op_6501_5_ff;
+extern cpuop_func op_65ff_5_nf;
+extern cpuop_func op_65ff_5_ff;
+extern cpuop_func op_6600_5_nf;
+extern cpuop_func op_6600_5_ff;
+extern cpuop_func op_6601_5_nf;
+extern cpuop_func op_6601_5_ff;
+extern cpuop_func op_66ff_5_nf;
+extern cpuop_func op_66ff_5_ff;
+extern cpuop_func op_6700_5_nf;
+extern cpuop_func op_6700_5_ff;
+extern cpuop_func op_6701_5_nf;
+extern cpuop_func op_6701_5_ff;
+extern cpuop_func op_67ff_5_nf;
+extern cpuop_func op_67ff_5_ff;
+extern cpuop_func op_6800_5_nf;
+extern cpuop_func op_6800_5_ff;
+extern cpuop_func op_6801_5_nf;
+extern cpuop_func op_6801_5_ff;
+extern cpuop_func op_68ff_5_nf;
+extern cpuop_func op_68ff_5_ff;
+extern cpuop_func op_6900_5_nf;
+extern cpuop_func op_6900_5_ff;
+extern cpuop_func op_6901_5_nf;
+extern cpuop_func op_6901_5_ff;
+extern cpuop_func op_69ff_5_nf;
+extern cpuop_func op_69ff_5_ff;
+extern cpuop_func op_6a00_5_nf;
+extern cpuop_func op_6a00_5_ff;
+extern cpuop_func op_6a01_5_nf;
+extern cpuop_func op_6a01_5_ff;
+extern cpuop_func op_6aff_5_nf;
+extern cpuop_func op_6aff_5_ff;
+extern cpuop_func op_6b00_5_nf;
+extern cpuop_func op_6b00_5_ff;
+extern cpuop_func op_6b01_5_nf;
+extern cpuop_func op_6b01_5_ff;
+extern cpuop_func op_6bff_5_nf;
+extern cpuop_func op_6bff_5_ff;
+extern cpuop_func op_6c00_5_nf;
+extern cpuop_func op_6c00_5_ff;
+extern cpuop_func op_6c01_5_nf;
+extern cpuop_func op_6c01_5_ff;
+extern cpuop_func op_6cff_5_nf;
+extern cpuop_func op_6cff_5_ff;
+extern cpuop_func op_6d00_5_nf;
+extern cpuop_func op_6d00_5_ff;
+extern cpuop_func op_6d01_5_nf;
+extern cpuop_func op_6d01_5_ff;
+extern cpuop_func op_6dff_5_nf;
+extern cpuop_func op_6dff_5_ff;
+extern cpuop_func op_6e00_5_nf;
+extern cpuop_func op_6e00_5_ff;
+extern cpuop_func op_6e01_5_nf;
+extern cpuop_func op_6e01_5_ff;
+extern cpuop_func op_6eff_5_nf;
+extern cpuop_func op_6eff_5_ff;
+extern cpuop_func op_6f00_5_nf;
+extern cpuop_func op_6f00_5_ff;
+extern cpuop_func op_6f01_5_nf;
+extern cpuop_func op_6f01_5_ff;
+extern cpuop_func op_6fff_5_nf;
+extern cpuop_func op_6fff_5_ff;
+extern cpuop_func op_7000_5_nf;
+extern cpuop_func op_7000_5_ff;
+extern cpuop_func op_8000_5_nf;
+extern cpuop_func op_8000_5_ff;
+extern cpuop_func op_8010_5_nf;
+extern cpuop_func op_8010_5_ff;
+extern cpuop_func op_8018_5_nf;
+extern cpuop_func op_8018_5_ff;
+extern cpuop_func op_8020_5_nf;
+extern cpuop_func op_8020_5_ff;
+extern cpuop_func op_8028_5_nf;
+extern cpuop_func op_8028_5_ff;
+extern cpuop_func op_8030_5_nf;
+extern cpuop_func op_8030_5_ff;
+extern cpuop_func op_8038_5_nf;
+extern cpuop_func op_8038_5_ff;
+extern cpuop_func op_8039_5_nf;
+extern cpuop_func op_8039_5_ff;
+extern cpuop_func op_803a_5_nf;
+extern cpuop_func op_803a_5_ff;
+extern cpuop_func op_803b_5_nf;
+extern cpuop_func op_803b_5_ff;
+extern cpuop_func op_803c_5_nf;
+extern cpuop_func op_803c_5_ff;
+extern cpuop_func op_8040_5_nf;
+extern cpuop_func op_8040_5_ff;
+extern cpuop_func op_8050_5_nf;
+extern cpuop_func op_8050_5_ff;
+extern cpuop_func op_8058_5_nf;
+extern cpuop_func op_8058_5_ff;
+extern cpuop_func op_8060_5_nf;
+extern cpuop_func op_8060_5_ff;
+extern cpuop_func op_8068_5_nf;
+extern cpuop_func op_8068_5_ff;
+extern cpuop_func op_8070_5_nf;
+extern cpuop_func op_8070_5_ff;
+extern cpuop_func op_8078_5_nf;
+extern cpuop_func op_8078_5_ff;
+extern cpuop_func op_8079_5_nf;
+extern cpuop_func op_8079_5_ff;
+extern cpuop_func op_807a_5_nf;
+extern cpuop_func op_807a_5_ff;
+extern cpuop_func op_807b_5_nf;
+extern cpuop_func op_807b_5_ff;
+extern cpuop_func op_807c_5_nf;
+extern cpuop_func op_807c_5_ff;
+extern cpuop_func op_8080_5_nf;
+extern cpuop_func op_8080_5_ff;
+extern cpuop_func op_8090_5_nf;
+extern cpuop_func op_8090_5_ff;
+extern cpuop_func op_8098_5_nf;
+extern cpuop_func op_8098_5_ff;
+extern cpuop_func op_80a0_5_nf;
+extern cpuop_func op_80a0_5_ff;
+extern cpuop_func op_80a8_5_nf;
+extern cpuop_func op_80a8_5_ff;
+extern cpuop_func op_80b0_5_nf;
+extern cpuop_func op_80b0_5_ff;
+extern cpuop_func op_80b8_5_nf;
+extern cpuop_func op_80b8_5_ff;
+extern cpuop_func op_80b9_5_nf;
+extern cpuop_func op_80b9_5_ff;
+extern cpuop_func op_80ba_5_nf;
+extern cpuop_func op_80ba_5_ff;
+extern cpuop_func op_80bb_5_nf;
+extern cpuop_func op_80bb_5_ff;
+extern cpuop_func op_80bc_5_nf;
+extern cpuop_func op_80bc_5_ff;
+extern cpuop_func op_80c0_5_nf;
+extern cpuop_func op_80c0_5_ff;
+extern cpuop_func op_80d0_5_nf;
+extern cpuop_func op_80d0_5_ff;
+extern cpuop_func op_80d8_5_nf;
+extern cpuop_func op_80d8_5_ff;
+extern cpuop_func op_80e0_5_nf;
+extern cpuop_func op_80e0_5_ff;
+extern cpuop_func op_80e8_5_nf;
+extern cpuop_func op_80e8_5_ff;
+extern cpuop_func op_80f0_5_nf;
+extern cpuop_func op_80f0_5_ff;
+extern cpuop_func op_80f8_5_nf;
+extern cpuop_func op_80f8_5_ff;
+extern cpuop_func op_80f9_5_nf;
+extern cpuop_func op_80f9_5_ff;
+extern cpuop_func op_80fa_5_nf;
+extern cpuop_func op_80fa_5_ff;
+extern cpuop_func op_80fb_5_nf;
+extern cpuop_func op_80fb_5_ff;
+extern cpuop_func op_80fc_5_nf;
+extern cpuop_func op_80fc_5_ff;
+extern cpuop_func op_8100_5_nf;
+extern cpuop_func op_8100_5_ff;
+extern cpuop_func op_8108_5_nf;
+extern cpuop_func op_8108_5_ff;
+extern cpuop_func op_8110_5_nf;
+extern cpuop_func op_8110_5_ff;
+extern cpuop_func op_8118_5_nf;
+extern cpuop_func op_8118_5_ff;
+extern cpuop_func op_8120_5_nf;
+extern cpuop_func op_8120_5_ff;
+extern cpuop_func op_8128_5_nf;
+extern cpuop_func op_8128_5_ff;
+extern cpuop_func op_8130_5_nf;
+extern cpuop_func op_8130_5_ff;
+extern cpuop_func op_8138_5_nf;
+extern cpuop_func op_8138_5_ff;
+extern cpuop_func op_8139_5_nf;
+extern cpuop_func op_8139_5_ff;
+extern cpuop_func op_8150_5_nf;
+extern cpuop_func op_8150_5_ff;
+extern cpuop_func op_8158_5_nf;
+extern cpuop_func op_8158_5_ff;
+extern cpuop_func op_8160_5_nf;
+extern cpuop_func op_8160_5_ff;
+extern cpuop_func op_8168_5_nf;
+extern cpuop_func op_8168_5_ff;
+extern cpuop_func op_8170_5_nf;
+extern cpuop_func op_8170_5_ff;
+extern cpuop_func op_8178_5_nf;
+extern cpuop_func op_8178_5_ff;
+extern cpuop_func op_8179_5_nf;
+extern cpuop_func op_8179_5_ff;
+extern cpuop_func op_8190_5_nf;
+extern cpuop_func op_8190_5_ff;
+extern cpuop_func op_8198_5_nf;
+extern cpuop_func op_8198_5_ff;
+extern cpuop_func op_81a0_5_nf;
+extern cpuop_func op_81a0_5_ff;
+extern cpuop_func op_81a8_5_nf;
+extern cpuop_func op_81a8_5_ff;
+extern cpuop_func op_81b0_5_nf;
+extern cpuop_func op_81b0_5_ff;
+extern cpuop_func op_81b8_5_nf;
+extern cpuop_func op_81b8_5_ff;
+extern cpuop_func op_81b9_5_nf;
+extern cpuop_func op_81b9_5_ff;
+extern cpuop_func op_81c0_5_nf;
+extern cpuop_func op_81c0_5_ff;
+extern cpuop_func op_81d0_5_nf;
+extern cpuop_func op_81d0_5_ff;
+extern cpuop_func op_81d8_5_nf;
+extern cpuop_func op_81d8_5_ff;
+extern cpuop_func op_81e0_5_nf;
+extern cpuop_func op_81e0_5_ff;
+extern cpuop_func op_81e8_5_nf;
+extern cpuop_func op_81e8_5_ff;
+extern cpuop_func op_81f0_5_nf;
+extern cpuop_func op_81f0_5_ff;
+extern cpuop_func op_81f8_5_nf;
+extern cpuop_func op_81f8_5_ff;
+extern cpuop_func op_81f9_5_nf;
+extern cpuop_func op_81f9_5_ff;
+extern cpuop_func op_81fa_5_nf;
+extern cpuop_func op_81fa_5_ff;
+extern cpuop_func op_81fb_5_nf;
+extern cpuop_func op_81fb_5_ff;
+extern cpuop_func op_81fc_5_nf;
+extern cpuop_func op_81fc_5_ff;
+extern cpuop_func op_9000_5_nf;
+extern cpuop_func op_9000_5_ff;
+extern cpuop_func op_9010_5_nf;
+extern cpuop_func op_9010_5_ff;
+extern cpuop_func op_9018_5_nf;
+extern cpuop_func op_9018_5_ff;
+extern cpuop_func op_9020_5_nf;
+extern cpuop_func op_9020_5_ff;
+extern cpuop_func op_9028_5_nf;
+extern cpuop_func op_9028_5_ff;
+extern cpuop_func op_9030_5_nf;
+extern cpuop_func op_9030_5_ff;
+extern cpuop_func op_9038_5_nf;
+extern cpuop_func op_9038_5_ff;
+extern cpuop_func op_9039_5_nf;
+extern cpuop_func op_9039_5_ff;
+extern cpuop_func op_903a_5_nf;
+extern cpuop_func op_903a_5_ff;
+extern cpuop_func op_903b_5_nf;
+extern cpuop_func op_903b_5_ff;
+extern cpuop_func op_903c_5_nf;
+extern cpuop_func op_903c_5_ff;
+extern cpuop_func op_9040_5_nf;
+extern cpuop_func op_9040_5_ff;
+extern cpuop_func op_9048_5_nf;
+extern cpuop_func op_9048_5_ff;
+extern cpuop_func op_9050_5_nf;
+extern cpuop_func op_9050_5_ff;
+extern cpuop_func op_9058_5_nf;
+extern cpuop_func op_9058_5_ff;
+extern cpuop_func op_9060_5_nf;
+extern cpuop_func op_9060_5_ff;
+extern cpuop_func op_9068_5_nf;
+extern cpuop_func op_9068_5_ff;
+extern cpuop_func op_9070_5_nf;
+extern cpuop_func op_9070_5_ff;
+extern cpuop_func op_9078_5_nf;
+extern cpuop_func op_9078_5_ff;
+extern cpuop_func op_9079_5_nf;
+extern cpuop_func op_9079_5_ff;
+extern cpuop_func op_907a_5_nf;
+extern cpuop_func op_907a_5_ff;
+extern cpuop_func op_907b_5_nf;
+extern cpuop_func op_907b_5_ff;
+extern cpuop_func op_907c_5_nf;
+extern cpuop_func op_907c_5_ff;
+extern cpuop_func op_9080_5_nf;
+extern cpuop_func op_9080_5_ff;
+extern cpuop_func op_9088_5_nf;
+extern cpuop_func op_9088_5_ff;
+extern cpuop_func op_9090_5_nf;
+extern cpuop_func op_9090_5_ff;
+extern cpuop_func op_9098_5_nf;
+extern cpuop_func op_9098_5_ff;
+extern cpuop_func op_90a0_5_nf;
+extern cpuop_func op_90a0_5_ff;
+extern cpuop_func op_90a8_5_nf;
+extern cpuop_func op_90a8_5_ff;
+extern cpuop_func op_90b0_5_nf;
+extern cpuop_func op_90b0_5_ff;
+extern cpuop_func op_90b8_5_nf;
+extern cpuop_func op_90b8_5_ff;
+extern cpuop_func op_90b9_5_nf;
+extern cpuop_func op_90b9_5_ff;
+extern cpuop_func op_90ba_5_nf;
+extern cpuop_func op_90ba_5_ff;
+extern cpuop_func op_90bb_5_nf;
+extern cpuop_func op_90bb_5_ff;
+extern cpuop_func op_90bc_5_nf;
+extern cpuop_func op_90bc_5_ff;
+extern cpuop_func op_90c0_5_nf;
+extern cpuop_func op_90c0_5_ff;
+extern cpuop_func op_90c8_5_nf;
+extern cpuop_func op_90c8_5_ff;
+extern cpuop_func op_90d0_5_nf;
+extern cpuop_func op_90d0_5_ff;
+extern cpuop_func op_90d8_5_nf;
+extern cpuop_func op_90d8_5_ff;
+extern cpuop_func op_90e0_5_nf;
+extern cpuop_func op_90e0_5_ff;
+extern cpuop_func op_90e8_5_nf;
+extern cpuop_func op_90e8_5_ff;
+extern cpuop_func op_90f0_5_nf;
+extern cpuop_func op_90f0_5_ff;
+extern cpuop_func op_90f8_5_nf;
+extern cpuop_func op_90f8_5_ff;
+extern cpuop_func op_90f9_5_nf;
+extern cpuop_func op_90f9_5_ff;
+extern cpuop_func op_90fa_5_nf;
+extern cpuop_func op_90fa_5_ff;
+extern cpuop_func op_90fb_5_nf;
+extern cpuop_func op_90fb_5_ff;
+extern cpuop_func op_90fc_5_nf;
+extern cpuop_func op_90fc_5_ff;
+extern cpuop_func op_9100_5_nf;
+extern cpuop_func op_9100_5_ff;
+extern cpuop_func op_9108_5_nf;
+extern cpuop_func op_9108_5_ff;
+extern cpuop_func op_9110_5_nf;
+extern cpuop_func op_9110_5_ff;
+extern cpuop_func op_9118_5_nf;
+extern cpuop_func op_9118_5_ff;
+extern cpuop_func op_9120_5_nf;
+extern cpuop_func op_9120_5_ff;
+extern cpuop_func op_9128_5_nf;
+extern cpuop_func op_9128_5_ff;
+extern cpuop_func op_9130_5_nf;
+extern cpuop_func op_9130_5_ff;
+extern cpuop_func op_9138_5_nf;
+extern cpuop_func op_9138_5_ff;
+extern cpuop_func op_9139_5_nf;
+extern cpuop_func op_9139_5_ff;
+extern cpuop_func op_9140_5_nf;
+extern cpuop_func op_9140_5_ff;
+extern cpuop_func op_9148_5_nf;
+extern cpuop_func op_9148_5_ff;
+extern cpuop_func op_9150_5_nf;
+extern cpuop_func op_9150_5_ff;
+extern cpuop_func op_9158_5_nf;
+extern cpuop_func op_9158_5_ff;
+extern cpuop_func op_9160_5_nf;
+extern cpuop_func op_9160_5_ff;
+extern cpuop_func op_9168_5_nf;
+extern cpuop_func op_9168_5_ff;
+extern cpuop_func op_9170_5_nf;
+extern cpuop_func op_9170_5_ff;
+extern cpuop_func op_9178_5_nf;
+extern cpuop_func op_9178_5_ff;
+extern cpuop_func op_9179_5_nf;
+extern cpuop_func op_9179_5_ff;
+extern cpuop_func op_9180_5_nf;
+extern cpuop_func op_9180_5_ff;
+extern cpuop_func op_9188_5_nf;
+extern cpuop_func op_9188_5_ff;
+extern cpuop_func op_9190_5_nf;
+extern cpuop_func op_9190_5_ff;
+extern cpuop_func op_9198_5_nf;
+extern cpuop_func op_9198_5_ff;
+extern cpuop_func op_91a0_5_nf;
+extern cpuop_func op_91a0_5_ff;
+extern cpuop_func op_91a8_5_nf;
+extern cpuop_func op_91a8_5_ff;
+extern cpuop_func op_91b0_5_nf;
+extern cpuop_func op_91b0_5_ff;
+extern cpuop_func op_91b8_5_nf;
+extern cpuop_func op_91b8_5_ff;
+extern cpuop_func op_91b9_5_nf;
+extern cpuop_func op_91b9_5_ff;
+extern cpuop_func op_91c0_5_nf;
+extern cpuop_func op_91c0_5_ff;
+extern cpuop_func op_91c8_5_nf;
+extern cpuop_func op_91c8_5_ff;
+extern cpuop_func op_91d0_5_nf;
+extern cpuop_func op_91d0_5_ff;
+extern cpuop_func op_91d8_5_nf;
+extern cpuop_func op_91d8_5_ff;
+extern cpuop_func op_91e0_5_nf;
+extern cpuop_func op_91e0_5_ff;
+extern cpuop_func op_91e8_5_nf;
+extern cpuop_func op_91e8_5_ff;
+extern cpuop_func op_91f0_5_nf;
+extern cpuop_func op_91f0_5_ff;
+extern cpuop_func op_91f8_5_nf;
+extern cpuop_func op_91f8_5_ff;
+extern cpuop_func op_91f9_5_nf;
+extern cpuop_func op_91f9_5_ff;
+extern cpuop_func op_91fa_5_nf;
+extern cpuop_func op_91fa_5_ff;
+extern cpuop_func op_91fb_5_nf;
+extern cpuop_func op_91fb_5_ff;
+extern cpuop_func op_91fc_5_nf;
+extern cpuop_func op_91fc_5_ff;
+extern cpuop_func op_b000_5_nf;
+extern cpuop_func op_b000_5_ff;
+extern cpuop_func op_b010_5_nf;
+extern cpuop_func op_b010_5_ff;
+extern cpuop_func op_b018_5_nf;
+extern cpuop_func op_b018_5_ff;
+extern cpuop_func op_b020_5_nf;
+extern cpuop_func op_b020_5_ff;
+extern cpuop_func op_b028_5_nf;
+extern cpuop_func op_b028_5_ff;
+extern cpuop_func op_b030_5_nf;
+extern cpuop_func op_b030_5_ff;
+extern cpuop_func op_b038_5_nf;
+extern cpuop_func op_b038_5_ff;
+extern cpuop_func op_b039_5_nf;
+extern cpuop_func op_b039_5_ff;
+extern cpuop_func op_b03a_5_nf;
+extern cpuop_func op_b03a_5_ff;
+extern cpuop_func op_b03b_5_nf;
+extern cpuop_func op_b03b_5_ff;
+extern cpuop_func op_b03c_5_nf;
+extern cpuop_func op_b03c_5_ff;
+extern cpuop_func op_b040_5_nf;
+extern cpuop_func op_b040_5_ff;
+extern cpuop_func op_b048_5_nf;
+extern cpuop_func op_b048_5_ff;
+extern cpuop_func op_b050_5_nf;
+extern cpuop_func op_b050_5_ff;
+extern cpuop_func op_b058_5_nf;
+extern cpuop_func op_b058_5_ff;
+extern cpuop_func op_b060_5_nf;
+extern cpuop_func op_b060_5_ff;
+extern cpuop_func op_b068_5_nf;
+extern cpuop_func op_b068_5_ff;
+extern cpuop_func op_b070_5_nf;
+extern cpuop_func op_b070_5_ff;
+extern cpuop_func op_b078_5_nf;
+extern cpuop_func op_b078_5_ff;
+extern cpuop_func op_b079_5_nf;
+extern cpuop_func op_b079_5_ff;
+extern cpuop_func op_b07a_5_nf;
+extern cpuop_func op_b07a_5_ff;
+extern cpuop_func op_b07b_5_nf;
+extern cpuop_func op_b07b_5_ff;
+extern cpuop_func op_b07c_5_nf;
+extern cpuop_func op_b07c_5_ff;
+extern cpuop_func op_b080_5_nf;
+extern cpuop_func op_b080_5_ff;
+extern cpuop_func op_b088_5_nf;
+extern cpuop_func op_b088_5_ff;
+extern cpuop_func op_b090_5_nf;
+extern cpuop_func op_b090_5_ff;
+extern cpuop_func op_b098_5_nf;
+extern cpuop_func op_b098_5_ff;
+extern cpuop_func op_b0a0_5_nf;
+extern cpuop_func op_b0a0_5_ff;
+extern cpuop_func op_b0a8_5_nf;
+extern cpuop_func op_b0a8_5_ff;
+extern cpuop_func op_b0b0_5_nf;
+extern cpuop_func op_b0b0_5_ff;
+extern cpuop_func op_b0b8_5_nf;
+extern cpuop_func op_b0b8_5_ff;
+extern cpuop_func op_b0b9_5_nf;
+extern cpuop_func op_b0b9_5_ff;
+extern cpuop_func op_b0ba_5_nf;
+extern cpuop_func op_b0ba_5_ff;
+extern cpuop_func op_b0bb_5_nf;
+extern cpuop_func op_b0bb_5_ff;
+extern cpuop_func op_b0bc_5_nf;
+extern cpuop_func op_b0bc_5_ff;
+extern cpuop_func op_b0c0_5_nf;
+extern cpuop_func op_b0c0_5_ff;
+extern cpuop_func op_b0c8_5_nf;
+extern cpuop_func op_b0c8_5_ff;
+extern cpuop_func op_b0d0_5_nf;
+extern cpuop_func op_b0d0_5_ff;
+extern cpuop_func op_b0d8_5_nf;
+extern cpuop_func op_b0d8_5_ff;
+extern cpuop_func op_b0e0_5_nf;
+extern cpuop_func op_b0e0_5_ff;
+extern cpuop_func op_b0e8_5_nf;
+extern cpuop_func op_b0e8_5_ff;
+extern cpuop_func op_b0f0_5_nf;
+extern cpuop_func op_b0f0_5_ff;
+extern cpuop_func op_b0f8_5_nf;
+extern cpuop_func op_b0f8_5_ff;
+extern cpuop_func op_b0f9_5_nf;
+extern cpuop_func op_b0f9_5_ff;
+extern cpuop_func op_b0fa_5_nf;
+extern cpuop_func op_b0fa_5_ff;
+extern cpuop_func op_b0fb_5_nf;
+extern cpuop_func op_b0fb_5_ff;
+extern cpuop_func op_b0fc_5_nf;
+extern cpuop_func op_b0fc_5_ff;
+extern cpuop_func op_b100_5_nf;
+extern cpuop_func op_b100_5_ff;
+extern cpuop_func op_b108_5_nf;
+extern cpuop_func op_b108_5_ff;
+extern cpuop_func op_b110_5_nf;
+extern cpuop_func op_b110_5_ff;
+extern cpuop_func op_b118_5_nf;
+extern cpuop_func op_b118_5_ff;
+extern cpuop_func op_b120_5_nf;
+extern cpuop_func op_b120_5_ff;
+extern cpuop_func op_b128_5_nf;
+extern cpuop_func op_b128_5_ff;
+extern cpuop_func op_b130_5_nf;
+extern cpuop_func op_b130_5_ff;
+extern cpuop_func op_b138_5_nf;
+extern cpuop_func op_b138_5_ff;
+extern cpuop_func op_b139_5_nf;
+extern cpuop_func op_b139_5_ff;
+extern cpuop_func op_b140_5_nf;
+extern cpuop_func op_b140_5_ff;
+extern cpuop_func op_b148_5_nf;
+extern cpuop_func op_b148_5_ff;
+extern cpuop_func op_b150_5_nf;
+extern cpuop_func op_b150_5_ff;
+extern cpuop_func op_b158_5_nf;
+extern cpuop_func op_b158_5_ff;
+extern cpuop_func op_b160_5_nf;
+extern cpuop_func op_b160_5_ff;
+extern cpuop_func op_b168_5_nf;
+extern cpuop_func op_b168_5_ff;
+extern cpuop_func op_b170_5_nf;
+extern cpuop_func op_b170_5_ff;
+extern cpuop_func op_b178_5_nf;
+extern cpuop_func op_b178_5_ff;
+extern cpuop_func op_b179_5_nf;
+extern cpuop_func op_b179_5_ff;
+extern cpuop_func op_b180_5_nf;
+extern cpuop_func op_b180_5_ff;
+extern cpuop_func op_b188_5_nf;
+extern cpuop_func op_b188_5_ff;
+extern cpuop_func op_b190_5_nf;
+extern cpuop_func op_b190_5_ff;
+extern cpuop_func op_b198_5_nf;
+extern cpuop_func op_b198_5_ff;
+extern cpuop_func op_b1a0_5_nf;
+extern cpuop_func op_b1a0_5_ff;
+extern cpuop_func op_b1a8_5_nf;
+extern cpuop_func op_b1a8_5_ff;
+extern cpuop_func op_b1b0_5_nf;
+extern cpuop_func op_b1b0_5_ff;
+extern cpuop_func op_b1b8_5_nf;
+extern cpuop_func op_b1b8_5_ff;
+extern cpuop_func op_b1b9_5_nf;
+extern cpuop_func op_b1b9_5_ff;
+extern cpuop_func op_b1c0_5_nf;
+extern cpuop_func op_b1c0_5_ff;
+extern cpuop_func op_b1c8_5_nf;
+extern cpuop_func op_b1c8_5_ff;
+extern cpuop_func op_b1d0_5_nf;
+extern cpuop_func op_b1d0_5_ff;
+extern cpuop_func op_b1d8_5_nf;
+extern cpuop_func op_b1d8_5_ff;
+extern cpuop_func op_b1e0_5_nf;
+extern cpuop_func op_b1e0_5_ff;
+extern cpuop_func op_b1e8_5_nf;
+extern cpuop_func op_b1e8_5_ff;
+extern cpuop_func op_b1f0_5_nf;
+extern cpuop_func op_b1f0_5_ff;
+extern cpuop_func op_b1f8_5_nf;
+extern cpuop_func op_b1f8_5_ff;
+extern cpuop_func op_b1f9_5_nf;
+extern cpuop_func op_b1f9_5_ff;
+extern cpuop_func op_b1fa_5_nf;
+extern cpuop_func op_b1fa_5_ff;
+extern cpuop_func op_b1fb_5_nf;
+extern cpuop_func op_b1fb_5_ff;
+extern cpuop_func op_b1fc_5_nf;
+extern cpuop_func op_b1fc_5_ff;
+extern cpuop_func op_c000_5_nf;
+extern cpuop_func op_c000_5_ff;
+extern cpuop_func op_c010_5_nf;
+extern cpuop_func op_c010_5_ff;
+extern cpuop_func op_c018_5_nf;
+extern cpuop_func op_c018_5_ff;
+extern cpuop_func op_c020_5_nf;
+extern cpuop_func op_c020_5_ff;
+extern cpuop_func op_c028_5_nf;
+extern cpuop_func op_c028_5_ff;
+extern cpuop_func op_c030_5_nf;
+extern cpuop_func op_c030_5_ff;
+extern cpuop_func op_c038_5_nf;
+extern cpuop_func op_c038_5_ff;
+extern cpuop_func op_c039_5_nf;
+extern cpuop_func op_c039_5_ff;
+extern cpuop_func op_c03a_5_nf;
+extern cpuop_func op_c03a_5_ff;
+extern cpuop_func op_c03b_5_nf;
+extern cpuop_func op_c03b_5_ff;
+extern cpuop_func op_c03c_5_nf;
+extern cpuop_func op_c03c_5_ff;
+extern cpuop_func op_c040_5_nf;
+extern cpuop_func op_c040_5_ff;
+extern cpuop_func op_c050_5_nf;
+extern cpuop_func op_c050_5_ff;
+extern cpuop_func op_c058_5_nf;
+extern cpuop_func op_c058_5_ff;
+extern cpuop_func op_c060_5_nf;
+extern cpuop_func op_c060_5_ff;
+extern cpuop_func op_c068_5_nf;
+extern cpuop_func op_c068_5_ff;
+extern cpuop_func op_c070_5_nf;
+extern cpuop_func op_c070_5_ff;
+extern cpuop_func op_c078_5_nf;
+extern cpuop_func op_c078_5_ff;
+extern cpuop_func op_c079_5_nf;
+extern cpuop_func op_c079_5_ff;
+extern cpuop_func op_c07a_5_nf;
+extern cpuop_func op_c07a_5_ff;
+extern cpuop_func op_c07b_5_nf;
+extern cpuop_func op_c07b_5_ff;
+extern cpuop_func op_c07c_5_nf;
+extern cpuop_func op_c07c_5_ff;
+extern cpuop_func op_c080_5_nf;
+extern cpuop_func op_c080_5_ff;
+extern cpuop_func op_c090_5_nf;
+extern cpuop_func op_c090_5_ff;
+extern cpuop_func op_c098_5_nf;
+extern cpuop_func op_c098_5_ff;
+extern cpuop_func op_c0a0_5_nf;
+extern cpuop_func op_c0a0_5_ff;
+extern cpuop_func op_c0a8_5_nf;
+extern cpuop_func op_c0a8_5_ff;
+extern cpuop_func op_c0b0_5_nf;
+extern cpuop_func op_c0b0_5_ff;
+extern cpuop_func op_c0b8_5_nf;
+extern cpuop_func op_c0b8_5_ff;
+extern cpuop_func op_c0b9_5_nf;
+extern cpuop_func op_c0b9_5_ff;
+extern cpuop_func op_c0ba_5_nf;
+extern cpuop_func op_c0ba_5_ff;
+extern cpuop_func op_c0bb_5_nf;
+extern cpuop_func op_c0bb_5_ff;
+extern cpuop_func op_c0bc_5_nf;
+extern cpuop_func op_c0bc_5_ff;
+extern cpuop_func op_c0c0_5_nf;
+extern cpuop_func op_c0c0_5_ff;
+extern cpuop_func op_c0d0_5_nf;
+extern cpuop_func op_c0d0_5_ff;
+extern cpuop_func op_c0d8_5_nf;
+extern cpuop_func op_c0d8_5_ff;
+extern cpuop_func op_c0e0_5_nf;
+extern cpuop_func op_c0e0_5_ff;
+extern cpuop_func op_c0e8_5_nf;
+extern cpuop_func op_c0e8_5_ff;
+extern cpuop_func op_c0f0_5_nf;
+extern cpuop_func op_c0f0_5_ff;
+extern cpuop_func op_c0f8_5_nf;
+extern cpuop_func op_c0f8_5_ff;
+extern cpuop_func op_c0f9_5_nf;
+extern cpuop_func op_c0f9_5_ff;
+extern cpuop_func op_c0fa_5_nf;
+extern cpuop_func op_c0fa_5_ff;
+extern cpuop_func op_c0fb_5_nf;
+extern cpuop_func op_c0fb_5_ff;
+extern cpuop_func op_c0fc_5_nf;
+extern cpuop_func op_c0fc_5_ff;
+extern cpuop_func op_c100_5_nf;
+extern cpuop_func op_c100_5_ff;
+extern cpuop_func op_c108_5_nf;
+extern cpuop_func op_c108_5_ff;
+extern cpuop_func op_c110_5_nf;
+extern cpuop_func op_c110_5_ff;
+extern cpuop_func op_c118_5_nf;
+extern cpuop_func op_c118_5_ff;
+extern cpuop_func op_c120_5_nf;
+extern cpuop_func op_c120_5_ff;
+extern cpuop_func op_c128_5_nf;
+extern cpuop_func op_c128_5_ff;
+extern cpuop_func op_c130_5_nf;
+extern cpuop_func op_c130_5_ff;
+extern cpuop_func op_c138_5_nf;
+extern cpuop_func op_c138_5_ff;
+extern cpuop_func op_c139_5_nf;
+extern cpuop_func op_c139_5_ff;
+extern cpuop_func op_c140_5_nf;
+extern cpuop_func op_c140_5_ff;
+extern cpuop_func op_c148_5_nf;
+extern cpuop_func op_c148_5_ff;
+extern cpuop_func op_c150_5_nf;
+extern cpuop_func op_c150_5_ff;
+extern cpuop_func op_c158_5_nf;
+extern cpuop_func op_c158_5_ff;
+extern cpuop_func op_c160_5_nf;
+extern cpuop_func op_c160_5_ff;
+extern cpuop_func op_c168_5_nf;
+extern cpuop_func op_c168_5_ff;
+extern cpuop_func op_c170_5_nf;
+extern cpuop_func op_c170_5_ff;
+extern cpuop_func op_c178_5_nf;
+extern cpuop_func op_c178_5_ff;
+extern cpuop_func op_c179_5_nf;
+extern cpuop_func op_c179_5_ff;
+extern cpuop_func op_c188_5_nf;
+extern cpuop_func op_c188_5_ff;
+extern cpuop_func op_c190_5_nf;
+extern cpuop_func op_c190_5_ff;
+extern cpuop_func op_c198_5_nf;
+extern cpuop_func op_c198_5_ff;
+extern cpuop_func op_c1a0_5_nf;
+extern cpuop_func op_c1a0_5_ff;
+extern cpuop_func op_c1a8_5_nf;
+extern cpuop_func op_c1a8_5_ff;
+extern cpuop_func op_c1b0_5_nf;
+extern cpuop_func op_c1b0_5_ff;
+extern cpuop_func op_c1b8_5_nf;
+extern cpuop_func op_c1b8_5_ff;
+extern cpuop_func op_c1b9_5_nf;
+extern cpuop_func op_c1b9_5_ff;
+extern cpuop_func op_c1c0_5_nf;
+extern cpuop_func op_c1c0_5_ff;
+extern cpuop_func op_c1d0_5_nf;
+extern cpuop_func op_c1d0_5_ff;
+extern cpuop_func op_c1d8_5_nf;
+extern cpuop_func op_c1d8_5_ff;
+extern cpuop_func op_c1e0_5_nf;
+extern cpuop_func op_c1e0_5_ff;
+extern cpuop_func op_c1e8_5_nf;
+extern cpuop_func op_c1e8_5_ff;
+extern cpuop_func op_c1f0_5_nf;
+extern cpuop_func op_c1f0_5_ff;
+extern cpuop_func op_c1f8_5_nf;
+extern cpuop_func op_c1f8_5_ff;
+extern cpuop_func op_c1f9_5_nf;
+extern cpuop_func op_c1f9_5_ff;
+extern cpuop_func op_c1fa_5_nf;
+extern cpuop_func op_c1fa_5_ff;
+extern cpuop_func op_c1fb_5_nf;
+extern cpuop_func op_c1fb_5_ff;
+extern cpuop_func op_c1fc_5_nf;
+extern cpuop_func op_c1fc_5_ff;
+extern cpuop_func op_d000_5_nf;
+extern cpuop_func op_d000_5_ff;
+extern cpuop_func op_d010_5_nf;
+extern cpuop_func op_d010_5_ff;
+extern cpuop_func op_d018_5_nf;
+extern cpuop_func op_d018_5_ff;
+extern cpuop_func op_d020_5_nf;
+extern cpuop_func op_d020_5_ff;
+extern cpuop_func op_d028_5_nf;
+extern cpuop_func op_d028_5_ff;
+extern cpuop_func op_d030_5_nf;
+extern cpuop_func op_d030_5_ff;
+extern cpuop_func op_d038_5_nf;
+extern cpuop_func op_d038_5_ff;
+extern cpuop_func op_d039_5_nf;
+extern cpuop_func op_d039_5_ff;
+extern cpuop_func op_d03a_5_nf;
+extern cpuop_func op_d03a_5_ff;
+extern cpuop_func op_d03b_5_nf;
+extern cpuop_func op_d03b_5_ff;
+extern cpuop_func op_d03c_5_nf;
+extern cpuop_func op_d03c_5_ff;
+extern cpuop_func op_d040_5_nf;
+extern cpuop_func op_d040_5_ff;
+extern cpuop_func op_d048_5_nf;
+extern cpuop_func op_d048_5_ff;
+extern cpuop_func op_d050_5_nf;
+extern cpuop_func op_d050_5_ff;
+extern cpuop_func op_d058_5_nf;
+extern cpuop_func op_d058_5_ff;
+extern cpuop_func op_d060_5_nf;
+extern cpuop_func op_d060_5_ff;
+extern cpuop_func op_d068_5_nf;
+extern cpuop_func op_d068_5_ff;
+extern cpuop_func op_d070_5_nf;
+extern cpuop_func op_d070_5_ff;
+extern cpuop_func op_d078_5_nf;
+extern cpuop_func op_d078_5_ff;
+extern cpuop_func op_d079_5_nf;
+extern cpuop_func op_d079_5_ff;
+extern cpuop_func op_d07a_5_nf;
+extern cpuop_func op_d07a_5_ff;
+extern cpuop_func op_d07b_5_nf;
+extern cpuop_func op_d07b_5_ff;
+extern cpuop_func op_d07c_5_nf;
+extern cpuop_func op_d07c_5_ff;
+extern cpuop_func op_d080_5_nf;
+extern cpuop_func op_d080_5_ff;
+extern cpuop_func op_d088_5_nf;
+extern cpuop_func op_d088_5_ff;
+extern cpuop_func op_d090_5_nf;
+extern cpuop_func op_d090_5_ff;
+extern cpuop_func op_d098_5_nf;
+extern cpuop_func op_d098_5_ff;
+extern cpuop_func op_d0a0_5_nf;
+extern cpuop_func op_d0a0_5_ff;
+extern cpuop_func op_d0a8_5_nf;
+extern cpuop_func op_d0a8_5_ff;
+extern cpuop_func op_d0b0_5_nf;
+extern cpuop_func op_d0b0_5_ff;
+extern cpuop_func op_d0b8_5_nf;
+extern cpuop_func op_d0b8_5_ff;
+extern cpuop_func op_d0b9_5_nf;
+extern cpuop_func op_d0b9_5_ff;
+extern cpuop_func op_d0ba_5_nf;
+extern cpuop_func op_d0ba_5_ff;
+extern cpuop_func op_d0bb_5_nf;
+extern cpuop_func op_d0bb_5_ff;
+extern cpuop_func op_d0bc_5_nf;
+extern cpuop_func op_d0bc_5_ff;
+extern cpuop_func op_d0c0_5_nf;
+extern cpuop_func op_d0c0_5_ff;
+extern cpuop_func op_d0c8_5_nf;
+extern cpuop_func op_d0c8_5_ff;
+extern cpuop_func op_d0d0_5_nf;
+extern cpuop_func op_d0d0_5_ff;
+extern cpuop_func op_d0d8_5_nf;
+extern cpuop_func op_d0d8_5_ff;
+extern cpuop_func op_d0e0_5_nf;
+extern cpuop_func op_d0e0_5_ff;
+extern cpuop_func op_d0e8_5_nf;
+extern cpuop_func op_d0e8_5_ff;
+extern cpuop_func op_d0f0_5_nf;
+extern cpuop_func op_d0f0_5_ff;
+extern cpuop_func op_d0f8_5_nf;
+extern cpuop_func op_d0f8_5_ff;
+extern cpuop_func op_d0f9_5_nf;
+extern cpuop_func op_d0f9_5_ff;
+extern cpuop_func op_d0fa_5_nf;
+extern cpuop_func op_d0fa_5_ff;
+extern cpuop_func op_d0fb_5_nf;
+extern cpuop_func op_d0fb_5_ff;
+extern cpuop_func op_d0fc_5_nf;
+extern cpuop_func op_d0fc_5_ff;
+extern cpuop_func op_d100_5_nf;
+extern cpuop_func op_d100_5_ff;
+extern cpuop_func op_d108_5_nf;
+extern cpuop_func op_d108_5_ff;
+extern cpuop_func op_d110_5_nf;
+extern cpuop_func op_d110_5_ff;
+extern cpuop_func op_d118_5_nf;
+extern cpuop_func op_d118_5_ff;
+extern cpuop_func op_d120_5_nf;
+extern cpuop_func op_d120_5_ff;
+extern cpuop_func op_d128_5_nf;
+extern cpuop_func op_d128_5_ff;
+extern cpuop_func op_d130_5_nf;
+extern cpuop_func op_d130_5_ff;
+extern cpuop_func op_d138_5_nf;
+extern cpuop_func op_d138_5_ff;
+extern cpuop_func op_d139_5_nf;
+extern cpuop_func op_d139_5_ff;
+extern cpuop_func op_d140_5_nf;
+extern cpuop_func op_d140_5_ff;
+extern cpuop_func op_d148_5_nf;
+extern cpuop_func op_d148_5_ff;
+extern cpuop_func op_d150_5_nf;
+extern cpuop_func op_d150_5_ff;
+extern cpuop_func op_d158_5_nf;
+extern cpuop_func op_d158_5_ff;
+extern cpuop_func op_d160_5_nf;
+extern cpuop_func op_d160_5_ff;
+extern cpuop_func op_d168_5_nf;
+extern cpuop_func op_d168_5_ff;
+extern cpuop_func op_d170_5_nf;
+extern cpuop_func op_d170_5_ff;
+extern cpuop_func op_d178_5_nf;
+extern cpuop_func op_d178_5_ff;
+extern cpuop_func op_d179_5_nf;
+extern cpuop_func op_d179_5_ff;
+extern cpuop_func op_d180_5_nf;
+extern cpuop_func op_d180_5_ff;
+extern cpuop_func op_d188_5_nf;
+extern cpuop_func op_d188_5_ff;
+extern cpuop_func op_d190_5_nf;
+extern cpuop_func op_d190_5_ff;
+extern cpuop_func op_d198_5_nf;
+extern cpuop_func op_d198_5_ff;
+extern cpuop_func op_d1a0_5_nf;
+extern cpuop_func op_d1a0_5_ff;
+extern cpuop_func op_d1a8_5_nf;
+extern cpuop_func op_d1a8_5_ff;
+extern cpuop_func op_d1b0_5_nf;
+extern cpuop_func op_d1b0_5_ff;
+extern cpuop_func op_d1b8_5_nf;
+extern cpuop_func op_d1b8_5_ff;
+extern cpuop_func op_d1b9_5_nf;
+extern cpuop_func op_d1b9_5_ff;
+extern cpuop_func op_d1c0_5_nf;
+extern cpuop_func op_d1c0_5_ff;
+extern cpuop_func op_d1c8_5_nf;
+extern cpuop_func op_d1c8_5_ff;
+extern cpuop_func op_d1d0_5_nf;
+extern cpuop_func op_d1d0_5_ff;
+extern cpuop_func op_d1d8_5_nf;
+extern cpuop_func op_d1d8_5_ff;
+extern cpuop_func op_d1e0_5_nf;
+extern cpuop_func op_d1e0_5_ff;
+extern cpuop_func op_d1e8_5_nf;
+extern cpuop_func op_d1e8_5_ff;
+extern cpuop_func op_d1f0_5_nf;
+extern cpuop_func op_d1f0_5_ff;
+extern cpuop_func op_d1f8_5_nf;
+extern cpuop_func op_d1f8_5_ff;
+extern cpuop_func op_d1f9_5_nf;
+extern cpuop_func op_d1f9_5_ff;
+extern cpuop_func op_d1fa_5_nf;
+extern cpuop_func op_d1fa_5_ff;
+extern cpuop_func op_d1fb_5_nf;
+extern cpuop_func op_d1fb_5_ff;
+extern cpuop_func op_d1fc_5_nf;
+extern cpuop_func op_d1fc_5_ff;
+extern cpuop_func op_e000_5_nf;
+extern cpuop_func op_e000_5_ff;
+extern cpuop_func op_e008_5_nf;
+extern cpuop_func op_e008_5_ff;
+extern cpuop_func op_e010_5_nf;
+extern cpuop_func op_e010_5_ff;
+extern cpuop_func op_e018_5_nf;
+extern cpuop_func op_e018_5_ff;
+extern cpuop_func op_e020_5_nf;
+extern cpuop_func op_e020_5_ff;
+extern cpuop_func op_e028_5_nf;
+extern cpuop_func op_e028_5_ff;
+extern cpuop_func op_e030_5_nf;
+extern cpuop_func op_e030_5_ff;
+extern cpuop_func op_e038_5_nf;
+extern cpuop_func op_e038_5_ff;
+extern cpuop_func op_e040_5_nf;
+extern cpuop_func op_e040_5_ff;
+extern cpuop_func op_e048_5_nf;
+extern cpuop_func op_e048_5_ff;
+extern cpuop_func op_e050_5_nf;
+extern cpuop_func op_e050_5_ff;
+extern cpuop_func op_e058_5_nf;
+extern cpuop_func op_e058_5_ff;
+extern cpuop_func op_e060_5_nf;
+extern cpuop_func op_e060_5_ff;
+extern cpuop_func op_e068_5_nf;
+extern cpuop_func op_e068_5_ff;
+extern cpuop_func op_e070_5_nf;
+extern cpuop_func op_e070_5_ff;
+extern cpuop_func op_e078_5_nf;
+extern cpuop_func op_e078_5_ff;
+extern cpuop_func op_e080_5_nf;
+extern cpuop_func op_e080_5_ff;
+extern cpuop_func op_e088_5_nf;
+extern cpuop_func op_e088_5_ff;
+extern cpuop_func op_e090_5_nf;
+extern cpuop_func op_e090_5_ff;
+extern cpuop_func op_e098_5_nf;
+extern cpuop_func op_e098_5_ff;
+extern cpuop_func op_e0a0_5_nf;
+extern cpuop_func op_e0a0_5_ff;
+extern cpuop_func op_e0a8_5_nf;
+extern cpuop_func op_e0a8_5_ff;
+extern cpuop_func op_e0b0_5_nf;
+extern cpuop_func op_e0b0_5_ff;
+extern cpuop_func op_e0b8_5_nf;
+extern cpuop_func op_e0b8_5_ff;
+extern cpuop_func op_e0d0_5_nf;
+extern cpuop_func op_e0d0_5_ff;
+extern cpuop_func op_e0d8_5_nf;
+extern cpuop_func op_e0d8_5_ff;
+extern cpuop_func op_e0e0_5_nf;
+extern cpuop_func op_e0e0_5_ff;
+extern cpuop_func op_e0e8_5_nf;
+extern cpuop_func op_e0e8_5_ff;
+extern cpuop_func op_e0f0_5_nf;
+extern cpuop_func op_e0f0_5_ff;
+extern cpuop_func op_e0f8_5_nf;
+extern cpuop_func op_e0f8_5_ff;
+extern cpuop_func op_e0f9_5_nf;
+extern cpuop_func op_e0f9_5_ff;
+extern cpuop_func op_e100_5_nf;
+extern cpuop_func op_e100_5_ff;
+extern cpuop_func op_e108_5_nf;
+extern cpuop_func op_e108_5_ff;
+extern cpuop_func op_e110_5_nf;
+extern cpuop_func op_e110_5_ff;
+extern cpuop_func op_e118_5_nf;
+extern cpuop_func op_e118_5_ff;
+extern cpuop_func op_e120_5_nf;
+extern cpuop_func op_e120_5_ff;
+extern cpuop_func op_e128_5_nf;
+extern cpuop_func op_e128_5_ff;
+extern cpuop_func op_e130_5_nf;
+extern cpuop_func op_e130_5_ff;
+extern cpuop_func op_e138_5_nf;
+extern cpuop_func op_e138_5_ff;
+extern cpuop_func op_e140_5_nf;
+extern cpuop_func op_e140_5_ff;
+extern cpuop_func op_e148_5_nf;
+extern cpuop_func op_e148_5_ff;
+extern cpuop_func op_e150_5_nf;
+extern cpuop_func op_e150_5_ff;
+extern cpuop_func op_e158_5_nf;
+extern cpuop_func op_e158_5_ff;
+extern cpuop_func op_e160_5_nf;
+extern cpuop_func op_e160_5_ff;
+extern cpuop_func op_e168_5_nf;
+extern cpuop_func op_e168_5_ff;
+extern cpuop_func op_e170_5_nf;
+extern cpuop_func op_e170_5_ff;
+extern cpuop_func op_e178_5_nf;
+extern cpuop_func op_e178_5_ff;
+extern cpuop_func op_e180_5_nf;
+extern cpuop_func op_e180_5_ff;
+extern cpuop_func op_e188_5_nf;
+extern cpuop_func op_e188_5_ff;
+extern cpuop_func op_e190_5_nf;
+extern cpuop_func op_e190_5_ff;
+extern cpuop_func op_e198_5_nf;
+extern cpuop_func op_e198_5_ff;
+extern cpuop_func op_e1a0_5_nf;
+extern cpuop_func op_e1a0_5_ff;
+extern cpuop_func op_e1a8_5_nf;
+extern cpuop_func op_e1a8_5_ff;
+extern cpuop_func op_e1b0_5_nf;
+extern cpuop_func op_e1b0_5_ff;
+extern cpuop_func op_e1b8_5_nf;
+extern cpuop_func op_e1b8_5_ff;
+extern cpuop_func op_e1d0_5_nf;
+extern cpuop_func op_e1d0_5_ff;
+extern cpuop_func op_e1d8_5_nf;
+extern cpuop_func op_e1d8_5_ff;
+extern cpuop_func op_e1e0_5_nf;
+extern cpuop_func op_e1e0_5_ff;
+extern cpuop_func op_e1e8_5_nf;
+extern cpuop_func op_e1e8_5_ff;
+extern cpuop_func op_e1f0_5_nf;
+extern cpuop_func op_e1f0_5_ff;
+extern cpuop_func op_e1f8_5_nf;
+extern cpuop_func op_e1f8_5_ff;
+extern cpuop_func op_e1f9_5_nf;
+extern cpuop_func op_e1f9_5_ff;
+extern cpuop_func op_e2d0_5_nf;
+extern cpuop_func op_e2d0_5_ff;
+extern cpuop_func op_e2d8_5_nf;
+extern cpuop_func op_e2d8_5_ff;
+extern cpuop_func op_e2e0_5_nf;
+extern cpuop_func op_e2e0_5_ff;
+extern cpuop_func op_e2e8_5_nf;
+extern cpuop_func op_e2e8_5_ff;
+extern cpuop_func op_e2f0_5_nf;
+extern cpuop_func op_e2f0_5_ff;
+extern cpuop_func op_e2f8_5_nf;
+extern cpuop_func op_e2f8_5_ff;
+extern cpuop_func op_e2f9_5_nf;
+extern cpuop_func op_e2f9_5_ff;
+extern cpuop_func op_e3d0_5_nf;
+extern cpuop_func op_e3d0_5_ff;
+extern cpuop_func op_e3d8_5_nf;
+extern cpuop_func op_e3d8_5_ff;
+extern cpuop_func op_e3e0_5_nf;
+extern cpuop_func op_e3e0_5_ff;
+extern cpuop_func op_e3e8_5_nf;
+extern cpuop_func op_e3e8_5_ff;
+extern cpuop_func op_e3f0_5_nf;
+extern cpuop_func op_e3f0_5_ff;
+extern cpuop_func op_e3f8_5_nf;
+extern cpuop_func op_e3f8_5_ff;
+extern cpuop_func op_e3f9_5_nf;
+extern cpuop_func op_e3f9_5_ff;
+extern cpuop_func op_e4d0_5_nf;
+extern cpuop_func op_e4d0_5_ff;
+extern cpuop_func op_e4d8_5_nf;
+extern cpuop_func op_e4d8_5_ff;
+extern cpuop_func op_e4e0_5_nf;
+extern cpuop_func op_e4e0_5_ff;
+extern cpuop_func op_e4e8_5_nf;
+extern cpuop_func op_e4e8_5_ff;
+extern cpuop_func op_e4f0_5_nf;
+extern cpuop_func op_e4f0_5_ff;
+extern cpuop_func op_e4f8_5_nf;
+extern cpuop_func op_e4f8_5_ff;
+extern cpuop_func op_e4f9_5_nf;
+extern cpuop_func op_e4f9_5_ff;
+extern cpuop_func op_e5d0_5_nf;
+extern cpuop_func op_e5d0_5_ff;
+extern cpuop_func op_e5d8_5_nf;
+extern cpuop_func op_e5d8_5_ff;
+extern cpuop_func op_e5e0_5_nf;
+extern cpuop_func op_e5e0_5_ff;
+extern cpuop_func op_e5e8_5_nf;
+extern cpuop_func op_e5e8_5_ff;
+extern cpuop_func op_e5f0_5_nf;
+extern cpuop_func op_e5f0_5_ff;
+extern cpuop_func op_e5f8_5_nf;
+extern cpuop_func op_e5f8_5_ff;
+extern cpuop_func op_e5f9_5_nf;
+extern cpuop_func op_e5f9_5_ff;
+extern cpuop_func op_e6d0_5_nf;
+extern cpuop_func op_e6d0_5_ff;
+extern cpuop_func op_e6d8_5_nf;
+extern cpuop_func op_e6d8_5_ff;
+extern cpuop_func op_e6e0_5_nf;
+extern cpuop_func op_e6e0_5_ff;
+extern cpuop_func op_e6e8_5_nf;
+extern cpuop_func op_e6e8_5_ff;
+extern cpuop_func op_e6f0_5_nf;
+extern cpuop_func op_e6f0_5_ff;
+extern cpuop_func op_e6f8_5_nf;
+extern cpuop_func op_e6f8_5_ff;
+extern cpuop_func op_e6f9_5_nf;
+extern cpuop_func op_e6f9_5_ff;
+extern cpuop_func op_e7d0_5_nf;
+extern cpuop_func op_e7d0_5_ff;
+extern cpuop_func op_e7d8_5_nf;
+extern cpuop_func op_e7d8_5_ff;
+extern cpuop_func op_e7e0_5_nf;
+extern cpuop_func op_e7e0_5_ff;
+extern cpuop_func op_e7e8_5_nf;
+extern cpuop_func op_e7e8_5_ff;
+extern cpuop_func op_e7f0_5_nf;
+extern cpuop_func op_e7f0_5_ff;
+extern cpuop_func op_e7f8_5_nf;
+extern cpuop_func op_e7f8_5_ff;
+extern cpuop_func op_e7f9_5_nf;
+extern cpuop_func op_e7f9_5_ff;