--- /dev/null
+#include "cpudefs.h"
+#include "cpuextra.h"
+#include "inlines.h"
+#include "cputbl.h"
+#define CPUFUNC(x) x##_ff
+#ifdef NOFLAGS
+#include "noflags.h"
+#endif
+
+const int areg_byteinc[] = { 1, 1, 1, 1, 1, 1, 1, 2 };
+const int imm8_table[] = { 8, 1, 2, 3, 4, 5, 6, 7 };
+
+const int movem_index1[256] = {
+0x08, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x06, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x07, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x06, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
+};
+
+const int movem_index2[256] = {
+0xFFFFFFFF, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x01, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x00, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x01, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
+};
+
+const int movem_next[256] = {
+0x00, 0x00, 0x00, 0x02, 0x00, 0x04, 0x04, 0x06, 0x00, 0x08, 0x08, 0x0A, 0x08, 0x0C, 0x0C, 0x0E,
+0x00, 0x10, 0x10, 0x12, 0x10, 0x14, 0x14, 0x16, 0x10, 0x18, 0x18, 0x1A, 0x18, 0x1C, 0x1C, 0x1E,
+0x00, 0x20, 0x20, 0x22, 0x20, 0x24, 0x24, 0x26, 0x20, 0x28, 0x28, 0x2A, 0x28, 0x2C, 0x2C, 0x2E,
+0x20, 0x30, 0x30, 0x32, 0x30, 0x34, 0x34, 0x36, 0x30, 0x38, 0x38, 0x3A, 0x38, 0x3C, 0x3C, 0x3E,
+0x00, 0x40, 0x40, 0x42, 0x40, 0x44, 0x44, 0x46, 0x40, 0x48, 0x48, 0x4A, 0x48, 0x4C, 0x4C, 0x4E,
+0x40, 0x50, 0x50, 0x52, 0x50, 0x54, 0x54, 0x56, 0x50, 0x58, 0x58, 0x5A, 0x58, 0x5C, 0x5C, 0x5E,
+0x40, 0x60, 0x60, 0x62, 0x60, 0x64, 0x64, 0x66, 0x60, 0x68, 0x68, 0x6A, 0x68, 0x6C, 0x6C, 0x6E,
+0x60, 0x70, 0x70, 0x72, 0x70, 0x74, 0x74, 0x76, 0x70, 0x78, 0x78, 0x7A, 0x78, 0x7C, 0x7C, 0x7E,
+0x00, 0x80, 0x80, 0x82, 0x80, 0x84, 0x84, 0x86, 0x80, 0x88, 0x88, 0x8A, 0x88, 0x8C, 0x8C, 0x8E,
+0x80, 0x90, 0x90, 0x92, 0x90, 0x94, 0x94, 0x96, 0x90, 0x98, 0x98, 0x9A, 0x98, 0x9C, 0x9C, 0x9E,
+0x80, 0xA0, 0xA0, 0xA2, 0xA0, 0xA4, 0xA4, 0xA6, 0xA0, 0xA8, 0xA8, 0xAA, 0xA8, 0xAC, 0xAC, 0xAE,
+0xA0, 0xB0, 0xB0, 0xB2, 0xB0, 0xB4, 0xB4, 0xB6, 0xB0, 0xB8, 0xB8, 0xBA, 0xB8, 0xBC, 0xBC, 0xBE,
+0x80, 0xC0, 0xC0, 0xC2, 0xC0, 0xC4, 0xC4, 0xC6, 0xC0, 0xC8, 0xC8, 0xCA, 0xC8, 0xCC, 0xCC, 0xCE,
+0xC0, 0xD0, 0xD0, 0xD2, 0xD0, 0xD4, 0xD4, 0xD6, 0xD0, 0xD8, 0xD8, 0xDA, 0xD8, 0xDC, 0xDC, 0xDE,
+0xC0, 0xE0, 0xE0, 0xE2, 0xE0, 0xE4, 0xE4, 0xE6, 0xE0, 0xE8, 0xE8, 0xEA, 0xE8, 0xEC, 0xEC, 0xEE,
+0xE0, 0xF0, 0xF0, 0xF2, 0xF0, 0xF4, 0xF4, 0xF6, 0xF0, 0xF8, 0xF8, 0xFA, 0xF8, 0xFC, 0xFC, 0xFE,
+};
+
+
+#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8)
+#define PART_1 1
+#define PART_2 1
+#define PART_3 1
+#define PART_4 1
+#define PART_5 1
+#define PART_6 1
+#define PART_7 1
+#define PART_8 1
+#endif
+
+#ifdef PART_1
+unsigned long CPUFUNC(op_0_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 8;
+{{ int8_t src = get_ibyte(2);
+{ int8_t dst = m68k_dreg(regs, dstreg);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_10_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_18_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_20_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 18;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_28_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_30_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 22;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_38_4)(uint32_t opcode) /* OR */
+{
+ OpcodeFamily = 1; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_39_4)(uint32_t opcode) /* OR */
+{
+ OpcodeFamily = 1; CurrentInstrCycles = 24;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_3c_4)(uint32_t opcode) /* ORSR */
+{
+ OpcodeFamily = 4; CurrentInstrCycles = 20;
+{ MakeSR();
+{ int16_t src = get_iword(2);
+ src &= 0xFF;
+ regs.sr |= src;
+ MakeFromSR();
+}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_40_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 8;
+{{ int16_t src = get_iword(2);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_50_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_58_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg(regs, dstreg) += 2;
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_60_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_68_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_70_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_78_4)(uint32_t opcode) /* OR */
+{
+ OpcodeFamily = 1; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_79_4)(uint32_t opcode) /* OR */
+{
+ OpcodeFamily = 1; CurrentInstrCycles = 24;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_7c_4)(uint32_t opcode) /* ORSR */
+{
+ OpcodeFamily = 4; CurrentInstrCycles = 20;
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel18; }
+{ MakeSR();
+{ int16_t src = get_iword(2);
+ regs.sr |= src;
+ MakeFromSR();
+}}}m68k_incpc(4);
+endlabel18: ;
+return 20;
+}
+unsigned long CPUFUNC(op_80_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 16;
+{{ int32_t src = get_ilong(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_90_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_98_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg(regs, dstreg) += 4;
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_a0_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 30;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_a8_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_b0_4)(uint32_t opcode) /* OR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 1; CurrentInstrCycles = 34;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_b8_4)(uint32_t opcode) /* OR */
+{
+ OpcodeFamily = 1; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_b9_4)(uint32_t opcode) /* OR */
+{
+ OpcodeFamily = 1; CurrentInstrCycles = 36;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_ilong(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src |= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_100_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 6;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= 31;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_108_4)(uint32_t opcode) /* MVPMR */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 29; CurrentInstrCycles = 16;
+{ uint32_t memp = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ uint16_t val = (m68k_read_memory_8(memp) << 8) + m68k_read_memory_8(memp + 2);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_110_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_118_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_120_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 10;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_128_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_130_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 14;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_138_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 21; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_139_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 21; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_13a_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = 2;
+ OpcodeFamily = 21; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_getpc () + 2;
+ dsta += (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_13b_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = 3;
+ OpcodeFamily = 21; CurrentInstrCycles = 14;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_13c_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 21; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ int8_t dst = get_ibyte(2);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_140_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 8;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= 31;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_148_4)(uint32_t opcode) /* MVPMR */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 29; CurrentInstrCycles = 24;
+{ uint32_t memp = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ uint32_t val = (m68k_read_memory_8(memp) << 24) + (m68k_read_memory_8(memp + 2) << 16)
+ + (m68k_read_memory_8(memp + 4) << 8) + m68k_read_memory_8(memp + 6);
+ m68k_dreg(regs, dstreg) = (val);
+}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_150_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_158_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_160_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 14;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_168_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_170_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 18;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_178_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 22; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_179_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 22; CurrentInstrCycles = 20;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_17a_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = 2;
+ OpcodeFamily = 22; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_getpc () + 2;
+ dsta += (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_17b_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = 3;
+ OpcodeFamily = 22; CurrentInstrCycles = 18;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_180_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 10;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= 31;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_dreg(regs, dstreg) = (dst);
+ if ( src < 16 ) { m68k_incpc(2); return 8; }
+}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_188_4)(uint32_t opcode) /* MVPRM */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 28; CurrentInstrCycles = 16;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+ uint32_t memp = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ m68k_write_memory_8(memp, src >> 8); m68k_write_memory_8(memp + 2, src);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_190_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_198_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1a0_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 14;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_1a8_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1b0_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 18;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1b8_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 23; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1b9_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 23; CurrentInstrCycles = 20;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_1ba_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = 2;
+ OpcodeFamily = 23; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_getpc () + 2;
+ dsta += (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1bb_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = 3;
+ OpcodeFamily = 23; CurrentInstrCycles = 18;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1c0_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 8;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= 31;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1c8_4)(uint32_t opcode) /* MVPRM */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 28; CurrentInstrCycles = 24;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+ uint32_t memp = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ m68k_write_memory_8(memp, src >> 24); m68k_write_memory_8(memp + 2, src >> 16);
+ m68k_write_memory_8(memp + 4, src >> 8); m68k_write_memory_8(memp + 6, src);
+}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_1d0_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1d8_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1e0_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 14;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_1e8_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1f0_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 18;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1f8_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 24; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1f9_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ OpcodeFamily = 24; CurrentInstrCycles = 20;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_1fa_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = 2;
+ OpcodeFamily = 24; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_getpc () + 2;
+ dsta += (int32_t)(int16_t)get_iword(2);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1fb_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t srcreg = ((opcode >> 9) & 7);
+ uint32_t dstreg = 3;
+ OpcodeFamily = 24; CurrentInstrCycles = 18;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_200_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 8;
+{{ int8_t src = get_ibyte(2);
+{ int8_t dst = m68k_dreg(regs, dstreg);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_210_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_218_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_220_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 18;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_228_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_230_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 22;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_238_4)(uint32_t opcode) /* AND */
+{
+ OpcodeFamily = 2; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_239_4)(uint32_t opcode) /* AND */
+{
+ OpcodeFamily = 2; CurrentInstrCycles = 24;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_23c_4)(uint32_t opcode) /* ANDSR */
+{
+ OpcodeFamily = 5; CurrentInstrCycles = 20;
+{ MakeSR();
+{ int16_t src = get_iword(2);
+ src |= 0xFF00;
+ regs.sr &= src;
+ MakeFromSR();
+}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_240_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 8;
+{{ int16_t src = get_iword(2);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_250_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_258_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg(regs, dstreg) += 2;
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_260_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_268_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_270_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_278_4)(uint32_t opcode) /* AND */
+{
+ OpcodeFamily = 2; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_279_4)(uint32_t opcode) /* AND */
+{
+ OpcodeFamily = 2; CurrentInstrCycles = 24;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_27c_4)(uint32_t opcode) /* ANDSR */
+{
+ OpcodeFamily = 5; CurrentInstrCycles = 20;
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel89; }
+{ MakeSR();
+{ int16_t src = get_iword(2);
+ regs.sr &= src;
+ MakeFromSR();
+}}}m68k_incpc(4);
+endlabel89: ;
+return 20;
+}
+unsigned long CPUFUNC(op_280_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 16;
+{{ int32_t src = get_ilong(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_290_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_298_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg(regs, dstreg) += 4;
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_2a0_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 30;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_2a8_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_2b0_4)(uint32_t opcode) /* AND */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 2; CurrentInstrCycles = 34;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_2b8_4)(uint32_t opcode) /* AND */
+{
+ OpcodeFamily = 2; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_2b9_4)(uint32_t opcode) /* AND */
+{
+ OpcodeFamily = 2; CurrentInstrCycles = 36;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_ilong(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src &= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_400_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 8;
+{{ int8_t src = get_ibyte(2);
+{ int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_410_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_418_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_420_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 18;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_428_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_430_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 22;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_438_4)(uint32_t opcode) /* SUB */
+{
+ OpcodeFamily = 7; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_439_4)(uint32_t opcode) /* SUB */
+{
+ OpcodeFamily = 7; CurrentInstrCycles = 24;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_440_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 8;
+{{ int16_t src = get_iword(2);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_450_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_458_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_460_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_468_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_470_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_478_4)(uint32_t opcode) /* SUB */
+{
+ OpcodeFamily = 7; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_479_4)(uint32_t opcode) /* SUB */
+{
+ OpcodeFamily = 7; CurrentInstrCycles = 24;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_480_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 16;
+{{ int32_t src = get_ilong(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_490_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_498_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_4a0_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 30;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_4a8_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_4b0_4)(uint32_t opcode) /* SUB */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 7; CurrentInstrCycles = 34;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_4b8_4)(uint32_t opcode) /* SUB */
+{
+ OpcodeFamily = 7; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_4b9_4)(uint32_t opcode) /* SUB */
+{
+ OpcodeFamily = 7; CurrentInstrCycles = 36;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_ilong(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_600_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 8;
+{{ int8_t src = get_ibyte(2);
+{ int8_t dst = m68k_dreg(regs, dstreg);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_610_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_618_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_620_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 18;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_628_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_630_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 22;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_638_4)(uint32_t opcode) /* ADD */
+{
+ OpcodeFamily = 11; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_639_4)(uint32_t opcode) /* ADD */
+{
+ OpcodeFamily = 11; CurrentInstrCycles = 24;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_640_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 8;
+{{ int16_t src = get_iword(2);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_650_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_658_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg(regs, dstreg) += 2;
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_660_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_668_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_670_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_678_4)(uint32_t opcode) /* ADD */
+{
+ OpcodeFamily = 11; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_679_4)(uint32_t opcode) /* ADD */
+{
+ OpcodeFamily = 11; CurrentInstrCycles = 24;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_680_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 16;
+{{ int32_t src = get_ilong(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, dstreg) = (newv);
+}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_690_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_698_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg(regs, dstreg) += 4;
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_6a0_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 30;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_6a8_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_6b0_4)(uint32_t opcode) /* ADD */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 11; CurrentInstrCycles = 34;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+{ int32_t dst = m68k_read_memory_32(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_6b8_4)(uint32_t opcode) /* ADD */
+{
+ OpcodeFamily = 11; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_6b9_4)(uint32_t opcode) /* ADD */
+{
+ OpcodeFamily = 11; CurrentInstrCycles = 36;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_ilong(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{ refill_prefetch (m68k_getpc(), 2);
+{uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
+ SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(dsta,newv);
+}}}}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_800_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 10;
+{{ int16_t src = get_iword(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= 31;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(4);
+return 10;
+}
+unsigned long CPUFUNC(op_810_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_818_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_820_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 14;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_828_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_830_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 21; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_838_4)(uint32_t opcode) /* BTST */
+{
+ OpcodeFamily = 21; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_839_4)(uint32_t opcode) /* BTST */
+{
+ OpcodeFamily = 21; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_83a_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t dstreg = 2;
+ OpcodeFamily = 21; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_getpc () + 4;
+ dsta += (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_83b_4)(uint32_t opcode) /* BTST */
+{
+ uint32_t dstreg = 3;
+ OpcodeFamily = 21; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t tmppc = m68k_getpc() + 4;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_83c_4)(uint32_t opcode) /* BTST */
+{
+ OpcodeFamily = 21; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ int8_t dst = get_ibyte(4);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+}}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_840_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= 31;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_850_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_858_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_860_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_868_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_870_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 22; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_878_4)(uint32_t opcode) /* BCHG */
+{
+ OpcodeFamily = 22; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_879_4)(uint32_t opcode) /* BCHG */
+{
+ OpcodeFamily = 22; CurrentInstrCycles = 24;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_87a_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t dstreg = 2;
+ OpcodeFamily = 22; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_getpc () + 4;
+ dsta += (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_87b_4)(uint32_t opcode) /* BCHG */
+{
+ uint32_t dstreg = 3;
+ OpcodeFamily = 22; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t tmppc = m68k_getpc() + 4;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ dst ^= (1 << src);
+ SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_880_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 14;
+{{ int16_t src = get_iword(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= 31;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_dreg(regs, dstreg) = (dst);
+ if ( src < 16 ) { m68k_incpc(4); return 12; }
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_890_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_898_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8a0_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_8a8_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8b0_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 23; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_8b8_4)(uint32_t opcode) /* BCLR */
+{
+ OpcodeFamily = 23; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8b9_4)(uint32_t opcode) /* BCLR */
+{
+ OpcodeFamily = 23; CurrentInstrCycles = 24;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_8ba_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t dstreg = 2;
+ OpcodeFamily = 23; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_getpc () + 4;
+ dsta += (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8bb_4)(uint32_t opcode) /* BCLR */
+{
+ uint32_t dstreg = 3;
+ OpcodeFamily = 23; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t tmppc = m68k_getpc() + 4;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst &= ~(1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_8c0_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src &= 31;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_dreg(regs, dstreg) = (dst);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_8d0_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8d8_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_8e0_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_8e8_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8f0_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 24; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_8f8_4)(uint32_t opcode) /* BSET */
+{
+ OpcodeFamily = 24; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8f9_4)(uint32_t opcode) /* BSET */
+{
+ OpcodeFamily = 24; CurrentInstrCycles = 24;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_8fa_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t dstreg = 2;
+ OpcodeFamily = 24; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_getpc () + 4;
+ dsta += (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_8fb_4)(uint32_t opcode) /* BSET */
+{
+ uint32_t dstreg = 3;
+ OpcodeFamily = 24; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t tmppc = m68k_getpc() + 4;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src &= 7;
+ SET_ZFLG (1 ^ ((dst >> src) & 1));
+ dst |= (1 << src);
+ m68k_write_memory_8(dsta,dst);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_a00_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 8;
+{{ int8_t src = get_ibyte(2);
+{ int8_t dst = m68k_dreg(regs, dstreg);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_a10_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_a18_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_a20_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 18;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_a28_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_a30_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 22;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_a38_4)(uint32_t opcode) /* EOR */
+{
+ OpcodeFamily = 3; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_a39_4)(uint32_t opcode) /* EOR */
+{
+ OpcodeFamily = 3; CurrentInstrCycles = 24;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_a3c_4)(uint32_t opcode) /* EORSR */
+{
+ OpcodeFamily = 6; CurrentInstrCycles = 20;
+{ MakeSR();
+{ int16_t src = get_iword(2);
+ src &= 0xFF;
+ regs.sr ^= src;
+ MakeFromSR();
+}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_a40_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 8;
+{{ int16_t src = get_iword(2);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_a50_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_a58_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg(regs, dstreg) += 2;
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_a60_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_a68_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_a70_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 22;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_a78_4)(uint32_t opcode) /* EOR */
+{
+ OpcodeFamily = 3; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_a79_4)(uint32_t opcode) /* EOR */
+{
+ OpcodeFamily = 3; CurrentInstrCycles = 24;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_a7c_4)(uint32_t opcode) /* EORSR */
+{
+ OpcodeFamily = 6; CurrentInstrCycles = 20;
+{if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel204; }
+{ MakeSR();
+{ int16_t src = get_iword(2);
+ regs.sr ^= src;
+ MakeFromSR();
+}}}m68k_incpc(4);
+endlabel204: ;
+return 20;
+}
+#endif
+
+#ifdef PART_2
+unsigned long CPUFUNC(op_a80_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 16;
+{{ int32_t src = get_ilong(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_a90_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_a98_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg(regs, dstreg) += 4;
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_aa0_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 30;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_aa8_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_ab0_4)(uint32_t opcode) /* EOR */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 3; CurrentInstrCycles = 34;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_ab8_4)(uint32_t opcode) /* EOR */
+{
+ OpcodeFamily = 3; CurrentInstrCycles = 32;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_ab9_4)(uint32_t opcode) /* EOR */
+{
+ OpcodeFamily = 3; CurrentInstrCycles = 36;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_ilong(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ src ^= dst;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_c00_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 8;
+{{ int8_t src = get_ibyte(2);
+{ int8_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_c10_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 12;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c18_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 12;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c20_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 14;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+{ int8_t dst = m68k_read_memory_8(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_c28_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c30_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 18;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_c38_4)(uint32_t opcode) /* CMP */
+{
+ OpcodeFamily = 25; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c39_4)(uint32_t opcode) /* CMP */
+{
+ OpcodeFamily = 25; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_ilong(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_c3a_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = 2;
+ OpcodeFamily = 25; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_getpc () + 4;
+ dsta += (int32_t)(int16_t)get_iword(4);
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c3b_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = 3;
+ OpcodeFamily = 25; CurrentInstrCycles = 18;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t tmppc = m68k_getpc() + 4;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+ BusCyclePenalty += 2;
+{ int8_t dst = m68k_read_memory_8(dsta);
+{{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(dst)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_ZFLG (((int8_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_c40_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 8;
+{{ int16_t src = get_iword(2);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_c50_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c58_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg(regs, dstreg) += 2;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_c60_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 14;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_c68_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c70_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_c78_4)(uint32_t opcode) /* CMP */
+{
+ OpcodeFamily = 25; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c79_4)(uint32_t opcode) /* CMP */
+{
+ OpcodeFamily = 25; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_c7a_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = 2;
+ OpcodeFamily = 25; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_getpc () + 4;
+ dsta += (int32_t)(int16_t)get_iword(4);
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_c7b_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = 3;
+ OpcodeFamily = 25; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t tmppc = m68k_getpc() + 4;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
+ BusCyclePenalty += 2;
+{ int16_t dst = m68k_read_memory_16(dsta);
+{{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(dst)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_ZFLG (((int16_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_c80_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 14;
+{{ int32_t src = get_ilong(2);
+{ int32_t dst = m68k_dreg(regs, dstreg);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}m68k_incpc(6);
+return 14;
+}
+unsigned long CPUFUNC(op_c90_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 20;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_c98_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 20;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg(regs, dstreg) += 4;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_ca0_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 22;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+{ int32_t dst = m68k_read_memory_32(dsta);
+ m68k_areg (regs, dstreg) = dsta;
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_ca8_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 24;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_cb0_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = opcode & 7;
+ OpcodeFamily = 25; CurrentInstrCycles = 26;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_cb8_4)(uint32_t opcode) /* CMP */
+{
+ OpcodeFamily = 25; CurrentInstrCycles = 24;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_cb9_4)(uint32_t opcode) /* CMP */
+{
+ OpcodeFamily = 25; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_ilong(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(10);
+return 28;
+}
+unsigned long CPUFUNC(op_cba_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = 2;
+ OpcodeFamily = 25; CurrentInstrCycles = 24;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_getpc () + 6;
+ dsta += (int32_t)(int16_t)get_iword(6);
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_cbb_4)(uint32_t opcode) /* CMP */
+{
+ uint32_t dstreg = 3;
+ OpcodeFamily = 25; CurrentInstrCycles = 26;
+{{ int32_t src = get_ilong(2);
+{ uint32_t tmppc = m68k_getpc() + 6;
+ uint32_t dsta = get_disp_ea_000(tmppc, get_iword(6));
+ BusCyclePenalty += 2;
+{ int32_t dst = m68k_read_memory_32(dsta);
+{{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(dst)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_ZFLG (((int32_t)(newv)) == 0);
+ SET_VFLG ((flgs != flgo) && (flgn != flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
+ SET_NFLG (flgn != 0);
+}}}}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_1000_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 4;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_1008_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 4;
+{{ int8_t src = m68k_areg(regs, srcreg);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_1010_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1018_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1020_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 10;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_1028_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1030_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_1038_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1039_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_103a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_103b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_103c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int8_t src = get_ibyte(2);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_1080_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1088_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1090_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1098_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_10a0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_10a8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10b0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_10b8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10b9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_10ba_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10bb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_10bc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_10c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_10c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_10d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_10d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_10e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_10e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_10f8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10f9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_10fa_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_10fb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_10fc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1100_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1108_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int8_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_1110_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1118_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_1120_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_1128_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1130_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1138_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1139_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_113a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_113b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_113c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1140_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1148_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_1150_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1158_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_1160_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1168_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_1170_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_1178_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_1179_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_117a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_117b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_117c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_1180_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_1188_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ int8_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_1190_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_1198_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_11a0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_11a8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11b0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_11b8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11b9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_11ba_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11bb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_11bc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_11c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_11c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int8_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_11d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_11d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_11e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_11e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_11f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11f8_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_11f9_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_11fa_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_11fb_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_11fc_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_13c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_13c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int8_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_13d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_13d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_13e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_13e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_13f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_13f8_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_13f9_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_ilong(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(10);
+return 28;
+}
+unsigned long CPUFUNC(op_13fa_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_13fb_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_13fc_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ int8_t src = get_ibyte(2);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(src)) == 0);
+ SET_NFLG (((int8_t)(src)) < 0);
+ m68k_write_memory_8(dsta,src);
+}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_2000_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 4;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_2008_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 4;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_2010_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2018_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2020_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_2028_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2030_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_2038_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2039_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_203a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_203b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_203c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int32_t src = get_ilong(2);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (src);
+}}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_2040_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 4;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_2048_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 4;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_2050_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2058_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2060_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_2068_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2070_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_2078_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2079_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_207a_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_207b_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 18;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_207c_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 12;
+{{ int32_t src = get_ilong(2);
+{ uint32_t val = src;
+ m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_2080_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2088_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2090_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_2098_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_20a0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_20a8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20b0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_20b8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20b9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_20ba_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20bb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_20bc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_20c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_20c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_20d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_20d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_20e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_20e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_20f8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20f9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_20fa_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_20fb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_20fc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 4;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_2100_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2108_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_2110_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_2118_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_2120_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_2128_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_2130_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_2138_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+#endif
+
+#ifdef PART_3
+unsigned long CPUFUNC(op_2139_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_213a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_213b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_213c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 4;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_2140_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2148_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_2150_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_2158_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_2160_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_2168_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_2170_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 30;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_2178_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_2179_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 32;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_217a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_217b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 30;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_217c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_2180_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_2188_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_2190_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_2198_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_21a0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 28;
+}
+unsigned long CPUFUNC(op_21a8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 30;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21b0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 32;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 32;
+}
+unsigned long CPUFUNC(op_21b8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 30;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21b9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 34;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_21ba_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 30;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21bb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 32;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 32;
+}
+unsigned long CPUFUNC(op_21bc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_21c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_21c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_21d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_21d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_21e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_21e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_21f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 30;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21f8_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_21f9_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 32;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_21fa_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_21fb_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 30;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_21fc_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_23c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_23c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ int32_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_23d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_23d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_23e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 30;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(6);
+return 30;
+}
+unsigned long CPUFUNC(op_23e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 32;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_23f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 34;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_23f8_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 32;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_23f9_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 36;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_ilong(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(10);
+return 36;
+}
+unsigned long CPUFUNC(op_23fa_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 32;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 32;
+}
+unsigned long CPUFUNC(op_23fb_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 34;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}}m68k_incpc(8);
+return 34;
+}
+unsigned long CPUFUNC(op_23fc_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ int32_t src = get_ilong(2);
+{ uint32_t dsta = get_ilong(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(src)) == 0);
+ SET_NFLG (((int32_t)(src)) < 0);
+ m68k_write_memory_32(dsta,src);
+}}}m68k_incpc(10);
+return 28;
+}
+unsigned long CPUFUNC(op_3000_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 4;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_3008_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 4;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_3010_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3018_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3020_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 10;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_3028_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3030_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_3038_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3039_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_303a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_303b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_303c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int16_t src = get_iword(2);
+{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_3040_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 4;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_3048_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 4;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_3050_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 8;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3058_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 8;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3060_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 10;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(2);
+return 10;
+}
+unsigned long CPUFUNC(op_3068_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3070_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 14;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_3078_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 12;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3079_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 16;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_307a_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_307b_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 14;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_307c_4)(uint32_t opcode) /* MOVEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 31; CurrentInstrCycles = 8;
+{{ int16_t src = get_iword(2);
+{ uint32_t val = (int32_t)(int16_t)src;
+ m68k_areg(regs, dstreg) = (val);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_3080_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3088_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3090_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_3098_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_30a0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_30a8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30b0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_30b8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30b9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_30ba_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30bb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_30bc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_30c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_30c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_30d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_30d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_30e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_30e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_30f8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30f9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_30fa_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_30fb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_30fc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg);
+ m68k_areg(regs, dstreg) += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3100_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3108_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 8;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(2);
+return 8;
+}
+unsigned long CPUFUNC(op_3110_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_3118_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_3120_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_3128_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_3130_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_3138_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_3139_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_313a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_313b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_313c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) - 2;
+ m68k_areg (regs, dstreg) = dsta;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3140_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3148_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_3150_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_3158_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_3160_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_3168_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_3170_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_3178_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_3179_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_317a_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_317b_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_317c_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_3180_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_3188_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 14;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_3190_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_3198_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_31a0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_31a8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31b0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_31b8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31b9_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_31ba_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31bb_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_31bc_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
+ BusCyclePenalty += 2;
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 18;
+}
+unsigned long CPUFUNC(op_31c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_31c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 12;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(4);
+return 12;
+}
+unsigned long CPUFUNC(op_31d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_31d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_31e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_31e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_31f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31f8_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_31f9_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_31fa_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_31fb_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_31fc_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = (int32_t)(int16_t)get_iword(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_33c0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_33c8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 16;
+{{ int16_t src = m68k_areg(regs, srcreg);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(6);
+return 16;
+}
+unsigned long CPUFUNC(op_33d0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_33d8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_33e0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t dsta = get_ilong(2);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(6);
+return 22;
+}
+unsigned long CPUFUNC(op_33e8_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_33f0_4)(uint32_t opcode) /* MOVE */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_33f8_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_33f9_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 28;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_ilong(6);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(10);
+return 28;
+}
+unsigned long CPUFUNC(op_33fa_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 24;
+}
+unsigned long CPUFUNC(op_33fb_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 26;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}}m68k_incpc(8);
+return 26;
+}
+unsigned long CPUFUNC(op_33fc_4)(uint32_t opcode) /* MOVE */
+{
+ OpcodeFamily = 30; CurrentInstrCycles = 20;
+{{ int16_t src = get_iword(2);
+{ uint32_t dsta = get_ilong(4);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(src)) == 0);
+ SET_NFLG (((int16_t)(src)) < 0);
+ m68k_write_memory_16(dsta,src);
+}}}m68k_incpc(8);
+return 20;
+}
+unsigned long CPUFUNC(op_4000_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 4;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+ SET_NFLG (((int8_t)(newv)) < 0);
+ m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff);
+}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4010_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+ SET_NFLG (((int8_t)(newv)) < 0);
+ m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4018_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+ SET_NFLG (((int8_t)(newv)) < 0);
+ m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4020_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+ SET_NFLG (((int8_t)(newv)) < 0);
+ m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4028_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+ SET_NFLG (((int8_t)(newv)) < 0);
+ m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4030_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+ SET_NFLG (((int8_t)(newv)) < 0);
+ m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4038_4)(uint32_t opcode) /* NEGX */
+{
+ OpcodeFamily = 16; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+ SET_NFLG (((int8_t)(newv)) < 0);
+ m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4039_4)(uint32_t opcode) /* NEGX */
+{
+ OpcodeFamily = 16; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int8_t)(newv)) == 0));
+ SET_NFLG (((int8_t)(newv)) < 0);
+ m68k_write_memory_8(srca,newv);
+}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4040_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 4;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+ SET_NFLG (((int16_t)(newv)) < 0);
+ m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff);
+}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4050_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+ SET_NFLG (((int16_t)(newv)) < 0);
+ m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4058_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+ SET_NFLG (((int16_t)(newv)) < 0);
+ m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4060_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+ SET_NFLG (((int16_t)(newv)) < 0);
+ m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4068_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+ SET_NFLG (((int16_t)(newv)) < 0);
+ m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4070_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+ SET_NFLG (((int16_t)(newv)) < 0);
+ m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4078_4)(uint32_t opcode) /* NEGX */
+{
+ OpcodeFamily = 16; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+ SET_NFLG (((int16_t)(newv)) < 0);
+ m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4079_4)(uint32_t opcode) /* NEGX */
+{
+ OpcodeFamily = 16; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int16_t)(newv)) == 0));
+ SET_NFLG (((int16_t)(newv)) < 0);
+ m68k_write_memory_16(srca,newv);
+}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4080_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 6;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+ SET_NFLG (((int32_t)(newv)) < 0);
+ m68k_dreg(regs, srcreg) = (newv);
+}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_4090_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+ SET_NFLG (((int32_t)(newv)) < 0);
+ m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_4098_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+ SET_NFLG (((int32_t)(newv)) < 0);
+ m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_40a0_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+ SET_NFLG (((int32_t)(newv)) < 0);
+ m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_40a8_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+ SET_NFLG (((int32_t)(newv)) < 0);
+ m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_40b0_4)(uint32_t opcode) /* NEGX */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 16; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+ SET_NFLG (((int32_t)(newv)) < 0);
+ m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_40b8_4)(uint32_t opcode) /* NEGX */
+{
+ OpcodeFamily = 16; CurrentInstrCycles = 24;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+ SET_NFLG (((int32_t)(newv)) < 0);
+ m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_40b9_4)(uint32_t opcode) /* NEGX */
+{
+ OpcodeFamily = 16; CurrentInstrCycles = 28;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{ uint32_t newv = 0 - src - (GET_XFLG ? 1 : 0);
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(newv)) < 0;
+ SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));
+ SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));
+ COPY_CARRY;
+ SET_ZFLG (GET_ZFLG & (((int32_t)(newv)) == 0));
+ SET_NFLG (((int32_t)(newv)) < 0);
+ m68k_write_memory_32(srca,newv);
+}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_40c0_4)(uint32_t opcode) /* MVSR2 */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 32; CurrentInstrCycles = 6;
+{{ MakeSR();
+ m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff);
+}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_40d0_4)(uint32_t opcode) /* MVSR2 */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 32; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+ MakeSR();
+ m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_40d8_4)(uint32_t opcode) /* MVSR2 */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 32; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+ m68k_areg(regs, srcreg) += 2;
+ MakeSR();
+ m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_40e0_4)(uint32_t opcode) /* MVSR2 */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 32; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+ m68k_areg (regs, srcreg) = srca;
+ MakeSR();
+ m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_40e8_4)(uint32_t opcode) /* MVSR2 */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 32; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+ MakeSR();
+ m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_40f0_4)(uint32_t opcode) /* MVSR2 */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 32; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+ MakeSR();
+ m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_40f8_4)(uint32_t opcode) /* MVSR2 */
+{
+ OpcodeFamily = 32; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+ MakeSR();
+ m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_40f9_4)(uint32_t opcode) /* MVSR2 */
+{
+ OpcodeFamily = 32; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+ MakeSR();
+ m68k_write_memory_16(srca,regs.sr);
+}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4180_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 10;
+{ uint32_t oldpc = m68k_getpc();
+{ int16_t src = m68k_dreg(regs, srcreg);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel587; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel587; }
+}}}endlabel587: ;
+return 10;
+}
+unsigned long CPUFUNC(op_4190_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 14;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel588; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel588; }
+}}}}endlabel588: ;
+return 14;
+}
+unsigned long CPUFUNC(op_4198_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 14;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel589; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel589; }
+}}}}endlabel589: ;
+return 14;
+}
+unsigned long CPUFUNC(op_41a0_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 16;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(2);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel590; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel590; }
+}}}}endlabel590: ;
+return 16;
+}
+unsigned long CPUFUNC(op_41a8_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 18;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel591; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel591; }
+}}}}endlabel591: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41b0_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 20;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel592; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel592; }
+}}}}endlabel592: ;
+return 20;
+}
+unsigned long CPUFUNC(op_41b8_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 18;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel593; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel593; }
+}}}}endlabel593: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41b9_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 22;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(6);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel594; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel594; }
+}}}}endlabel594: ;
+return 22;
+}
+unsigned long CPUFUNC(op_41ba_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 18;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel595; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel595; }
+}}}}endlabel595: ;
+return 18;
+}
+unsigned long CPUFUNC(op_41bb_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 20;
+{ uint32_t oldpc = m68k_getpc();
+{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel596; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel596; }
+}}}}endlabel596: ;
+return 20;
+}
+unsigned long CPUFUNC(op_41bc_4)(uint32_t opcode) /* CHK */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 80; CurrentInstrCycles = 14;
+{ uint32_t oldpc = m68k_getpc();
+{ int16_t src = get_iword(2);
+{ int16_t dst = m68k_dreg(regs, dstreg);
+m68k_incpc(4);
+ if ((int32_t)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel597; }
+ else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel597; }
+}}}endlabel597: ;
+return 14;
+}
+unsigned long CPUFUNC(op_41d0_4)(uint32_t opcode) /* LEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 56; CurrentInstrCycles = 4;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_41e8_4)(uint32_t opcode) /* LEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 56; CurrentInstrCycles = 8;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_41f0_4)(uint32_t opcode) /* LEA */
+{
+ uint32_t srcreg = (opcode & 7);
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 56; CurrentInstrCycles = 14;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_41f8_4)(uint32_t opcode) /* LEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 56; CurrentInstrCycles = 8;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_41f9_4)(uint32_t opcode) /* LEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 56; CurrentInstrCycles = 12;
+{{ uint32_t srca = get_ilong(2);
+{ m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(6);
+return 12;
+}
+unsigned long CPUFUNC(op_41fa_4)(uint32_t opcode) /* LEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 56; CurrentInstrCycles = 8;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 8;
+}
+unsigned long CPUFUNC(op_41fb_4)(uint32_t opcode) /* LEA */
+{
+ uint32_t dstreg = (opcode >> 9) & 7;
+ OpcodeFamily = 56; CurrentInstrCycles = 14;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ m68k_areg(regs, dstreg) = (srca);
+}}}m68k_incpc(4);
+return 14;
+}
+unsigned long CPUFUNC(op_4200_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 4;
+{{ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(0)) == 0);
+ SET_NFLG (((int8_t)(0)) < 0);
+ m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4210_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+ int8_t src = m68k_read_memory_8(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(0)) == 0);
+ SET_NFLG (((int8_t)(0)) < 0);
+ m68k_write_memory_8(srca,0);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4218_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+ int8_t src = m68k_read_memory_8(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(0)) == 0);
+ SET_NFLG (((int8_t)(0)) < 0);
+ m68k_write_memory_8(srca,0);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4220_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+ m68k_areg (regs, srcreg) = srca;
+ int8_t src = m68k_read_memory_8(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(0)) == 0);
+ SET_NFLG (((int8_t)(0)) < 0);
+ m68k_write_memory_8(srca,0);
+}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4228_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+ int8_t src = m68k_read_memory_8(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(0)) == 0);
+ SET_NFLG (((int8_t)(0)) < 0);
+ m68k_write_memory_8(srca,0);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4230_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+ int8_t src = m68k_read_memory_8(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(0)) == 0);
+ SET_NFLG (((int8_t)(0)) < 0);
+ m68k_write_memory_8(srca,0);
+}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4238_4)(uint32_t opcode) /* CLR */
+{
+ OpcodeFamily = 18; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+ int8_t src = m68k_read_memory_8(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(0)) == 0);
+ SET_NFLG (((int8_t)(0)) < 0);
+ m68k_write_memory_8(srca,0);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4239_4)(uint32_t opcode) /* CLR */
+{
+ OpcodeFamily = 18; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+ int8_t src = m68k_read_memory_8(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(0)) == 0);
+ SET_NFLG (((int8_t)(0)) < 0);
+ m68k_write_memory_8(srca,0);
+}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4240_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 4;
+{{ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(0)) == 0);
+ SET_NFLG (((int16_t)(0)) < 0);
+ m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff);
+}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4250_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+ int16_t src = m68k_read_memory_16(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(0)) == 0);
+ SET_NFLG (((int16_t)(0)) < 0);
+ m68k_write_memory_16(srca,0);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4258_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+ m68k_areg(regs, srcreg) += 2;
+ int16_t src = m68k_read_memory_16(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(0)) == 0);
+ SET_NFLG (((int16_t)(0)) < 0);
+ m68k_write_memory_16(srca,0);
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4260_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+ m68k_areg (regs, srcreg) = srca;
+ int16_t src = m68k_read_memory_16(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(0)) == 0);
+ SET_NFLG (((int16_t)(0)) < 0);
+ m68k_write_memory_16(srca,0);
+}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4268_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+ int16_t src = m68k_read_memory_16(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(0)) == 0);
+ SET_NFLG (((int16_t)(0)) < 0);
+ m68k_write_memory_16(srca,0);
+}}m68k_incpc(4);
+return 16;
+}
+#endif
+
+#ifdef PART_4
+unsigned long CPUFUNC(op_4270_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+ int16_t src = m68k_read_memory_16(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(0)) == 0);
+ SET_NFLG (((int16_t)(0)) < 0);
+ m68k_write_memory_16(srca,0);
+}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4278_4)(uint32_t opcode) /* CLR */
+{
+ OpcodeFamily = 18; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+ int16_t src = m68k_read_memory_16(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(0)) == 0);
+ SET_NFLG (((int16_t)(0)) < 0);
+ m68k_write_memory_16(srca,0);
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4279_4)(uint32_t opcode) /* CLR */
+{
+ OpcodeFamily = 18; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+ int16_t src = m68k_read_memory_16(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int16_t)(0)) == 0);
+ SET_NFLG (((int16_t)(0)) < 0);
+ m68k_write_memory_16(srca,0);
+}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4280_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 6;
+{{ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(0)) == 0);
+ SET_NFLG (((int32_t)(0)) < 0);
+ m68k_dreg(regs, srcreg) = (0);
+}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_4290_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+ int32_t src = m68k_read_memory_32(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(0)) == 0);
+ SET_NFLG (((int32_t)(0)) < 0);
+ m68k_write_memory_32(srca,0);
+}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_4298_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+ m68k_areg(regs, srcreg) += 4;
+ int32_t src = m68k_read_memory_32(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(0)) == 0);
+ SET_NFLG (((int32_t)(0)) < 0);
+ m68k_write_memory_32(srca,0);
+}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_42a0_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+ m68k_areg (regs, srcreg) = srca;
+ int32_t src = m68k_read_memory_32(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(0)) == 0);
+ SET_NFLG (((int32_t)(0)) < 0);
+ m68k_write_memory_32(srca,0);
+}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_42a8_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+ int32_t src = m68k_read_memory_32(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(0)) == 0);
+ SET_NFLG (((int32_t)(0)) < 0);
+ m68k_write_memory_32(srca,0);
+}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_42b0_4)(uint32_t opcode) /* CLR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 18; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+ int32_t src = m68k_read_memory_32(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(0)) == 0);
+ SET_NFLG (((int32_t)(0)) < 0);
+ m68k_write_memory_32(srca,0);
+}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_42b8_4)(uint32_t opcode) /* CLR */
+{
+ OpcodeFamily = 18; CurrentInstrCycles = 24;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+ int32_t src = m68k_read_memory_32(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(0)) == 0);
+ SET_NFLG (((int32_t)(0)) < 0);
+ m68k_write_memory_32(srca,0);
+}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_42b9_4)(uint32_t opcode) /* CLR */
+{
+ OpcodeFamily = 18; CurrentInstrCycles = 28;
+{{ uint32_t srca = get_ilong(2);
+ int32_t src = m68k_read_memory_32(srca);
+ CLEAR_CZNV;
+ SET_ZFLG (((int32_t)(0)) == 0);
+ SET_NFLG (((int32_t)(0)) < 0);
+ m68k_write_memory_32(srca,0);
+}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_4400_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 4;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(dst)) < 0;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff);
+}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4410_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(dst)) < 0;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4418_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(dst)) < 0;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4420_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
+{ int8_t src = m68k_read_memory_8(srca);
+ m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(dst)) < 0;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4428_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(dst)) < 0;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4430_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(dst)) < 0;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4438_4)(uint32_t opcode) /* NEG */
+{
+ OpcodeFamily = 15; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(dst)) < 0;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4439_4)(uint32_t opcode) /* NEG */
+{
+ OpcodeFamily = 15; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int8_t src = m68k_read_memory_8(srca);
+{{uint32_t dst = ((int8_t)(0)) - ((int8_t)(src));
+{ int flgs = ((int8_t)(src)) < 0;
+ int flgo = ((int8_t)(0)) < 0;
+ int flgn = ((int8_t)(dst)) < 0;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint8_t)(src)) > ((uint8_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_8(srca,dst);
+}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4440_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 4;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(dst)) < 0;
+ SET_ZFLG (((int16_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff);
+}}}}}m68k_incpc(2);
+return 4;
+}
+unsigned long CPUFUNC(op_4450_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(dst)) < 0;
+ SET_ZFLG (((int16_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4458_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 12;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(dst)) < 0;
+ SET_ZFLG (((int16_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_4460_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 14;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(dst)) < 0;
+ SET_ZFLG (((int16_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(2);
+return 14;
+}
+unsigned long CPUFUNC(op_4468_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(dst)) < 0;
+ SET_ZFLG (((int16_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4470_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 18;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(dst)) < 0;
+ SET_ZFLG (((int16_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(4);
+return 18;
+}
+unsigned long CPUFUNC(op_4478_4)(uint32_t opcode) /* NEG */
+{
+ OpcodeFamily = 15; CurrentInstrCycles = 16;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(dst)) < 0;
+ SET_ZFLG (((int16_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4479_4)(uint32_t opcode) /* NEG */
+{
+ OpcodeFamily = 15; CurrentInstrCycles = 20;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+{{uint32_t dst = ((int16_t)(0)) - ((int16_t)(src));
+{ int flgs = ((int16_t)(src)) < 0;
+ int flgo = ((int16_t)(0)) < 0;
+ int flgn = ((int16_t)(dst)) < 0;
+ SET_ZFLG (((int16_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint16_t)(src)) > ((uint16_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_16(srca,dst);
+}}}}}}m68k_incpc(6);
+return 20;
+}
+unsigned long CPUFUNC(op_4480_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 6;
+{{ int32_t src = m68k_dreg(regs, srcreg);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(dst)) < 0;
+ SET_ZFLG (((int32_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_dreg(regs, srcreg) = (dst);
+}}}}}m68k_incpc(2);
+return 6;
+}
+unsigned long CPUFUNC(op_4490_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(dst)) < 0;
+ SET_ZFLG (((int32_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_4498_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg(regs, srcreg) += 4;
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(dst)) < 0;
+ SET_ZFLG (((int32_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(2);
+return 20;
+}
+unsigned long CPUFUNC(op_44a0_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 22;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 4;
+{ int32_t src = m68k_read_memory_32(srca);
+ m68k_areg (regs, srcreg) = srca;
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(dst)) < 0;
+ SET_ZFLG (((int32_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(2);
+return 22;
+}
+unsigned long CPUFUNC(op_44a8_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 24;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(dst)) < 0;
+ SET_ZFLG (((int32_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_44b0_4)(uint32_t opcode) /* NEG */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 15; CurrentInstrCycles = 26;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(dst)) < 0;
+ SET_ZFLG (((int32_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(4);
+return 26;
+}
+unsigned long CPUFUNC(op_44b8_4)(uint32_t opcode) /* NEG */
+{
+ OpcodeFamily = 15; CurrentInstrCycles = 24;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(dst)) < 0;
+ SET_ZFLG (((int32_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(4);
+return 24;
+}
+unsigned long CPUFUNC(op_44b9_4)(uint32_t opcode) /* NEG */
+{
+ OpcodeFamily = 15; CurrentInstrCycles = 28;
+{{ uint32_t srca = get_ilong(2);
+{ int32_t src = m68k_read_memory_32(srca);
+{{uint32_t dst = ((int32_t)(0)) - ((int32_t)(src));
+{ int flgs = ((int32_t)(src)) < 0;
+ int flgo = ((int32_t)(0)) < 0;
+ int flgn = ((int32_t)(dst)) < 0;
+ SET_ZFLG (((int32_t)(dst)) == 0);
+ SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
+ SET_CFLG (((uint32_t)(src)) > ((uint32_t)(0)));
+ COPY_CARRY;
+ SET_NFLG (flgn != 0);
+ m68k_write_memory_32(srca,dst);
+}}}}}}m68k_incpc(6);
+return 28;
+}
+unsigned long CPUFUNC(op_44c0_4)(uint32_t opcode) /* MV2SR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 33; CurrentInstrCycles = 12;
+{{ int16_t src = m68k_dreg(regs, srcreg);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}m68k_incpc(2);
+return 12;
+}
+unsigned long CPUFUNC(op_44d0_4)(uint32_t opcode) /* MV2SR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 33; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_44d8_4)(uint32_t opcode) /* MV2SR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 33; CurrentInstrCycles = 16;
+{{ uint32_t srca = m68k_areg(regs, srcreg);
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg(regs, srcreg) += 2;
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(2);
+return 16;
+}
+unsigned long CPUFUNC(op_44e0_4)(uint32_t opcode) /* MV2SR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 33; CurrentInstrCycles = 18;
+{{ uint32_t srca = m68k_areg(regs, srcreg) - 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ m68k_areg (regs, srcreg) = srca;
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(2);
+return 18;
+}
+unsigned long CPUFUNC(op_44e8_4)(uint32_t opcode) /* MV2SR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 33; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_44f0_4)(uint32_t opcode) /* MV2SR */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 33; CurrentInstrCycles = 22;
+{{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(4);
+return 22;
+}
+unsigned long CPUFUNC(op_44f8_4)(uint32_t opcode) /* MV2SR */
+{
+ OpcodeFamily = 33; CurrentInstrCycles = 20;
+{{ uint32_t srca = (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_44f9_4)(uint32_t opcode) /* MV2SR */
+{
+ OpcodeFamily = 33; CurrentInstrCycles = 24;
+{{ uint32_t srca = get_ilong(2);
+{ int16_t src = m68k_read_memory_16(srca);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(6);
+return 24;
+}
+unsigned long CPUFUNC(op_44fa_4)(uint32_t opcode) /* MV2SR */
+{
+ OpcodeFamily = 33; CurrentInstrCycles = 20;
+{{ uint32_t srca = m68k_getpc () + 2;
+ srca += (int32_t)(int16_t)get_iword(2);
+{ int16_t src = m68k_read_memory_16(srca);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(4);
+return 20;
+}
+unsigned long CPUFUNC(op_44fb_4)(uint32_t opcode) /* MV2SR */
+{
+ OpcodeFamily = 33; CurrentInstrCycles = 22;
+{{ uint32_t tmppc = m68k_getpc() + 2;
+ uint32_t srca = get_disp_ea_000(tmppc, get_iword(2));
+ BusCyclePenalty += 2;
+{ int16_t src = m68k_read_memory_16(srca);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}}m68k_incpc(4);
+return 22;
+}
+unsigned long CPUFUNC(op_44fc_4)(uint32_t opcode) /* MV2SR */
+{
+ OpcodeFamily = 33; CurrentInstrCycles = 16;
+{{ int16_t src = get_iword(2);
+ MakeSR();
+ regs.sr &= 0xFF00;
+ regs.sr |= src & 0xFF;
+ MakeFromSR();
+}}m68k_incpc(4);
+return 16;
+}
+unsigned long CPUFUNC(op_4600_4)(uint32_t opcode) /* NOT */
+{
+ uint32_t srcreg = (opcode & 7);
+ OpcodeFamily = 19; CurrentInstrCycles = 4;
+{{ int8_t src = m68k_dreg(regs, srcreg);
+{ uint32_t dst = ~src;
+ CLEAR_CZNV;
+ SET_ZFLG (((int8_t)(dst)) == 0);
+ SET_NFLG (((int8_t)(dst)) < 0);
+ m68k_dreg(regs, srcreg) = (m68k_dreg(regs,
HCoop / clinton / Virtual-Jaguar-Rx.git / commitdiff