4 // Originally by David Raingeard
5 // GCC/SDL port by Niels Wagenaar (Linux/WIN32) and Carwin Jones (BeOS)
6 // Cleanups/rewrites/fixes by James Hammons
8 // JLH = James Hammons <jlhamm@acm.org>
11 // --- ---------- -----------------------------------------------------------
12 // JLH 11/25/2009 Major rewrite of memory subsystem and handlers
15 // ------------------------------------------------------------
16 // JERRY REGISTERS (Mapped by Aaron Giles)
17 // ------------------------------------------------------------
18 // F10000-F13FFF R/W xxxxxxxx xxxxxxxx Jerry
19 // F10000 W xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
20 // F10002 W xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
21 // F10004 W xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
22 // F10008 W xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
23 // F10010 W ------xx xxxxxxxx CLK1 - processor clock divider
24 // F10012 W ------xx xxxxxxxx CLK2 - video clock divider
25 // F10014 W -------- --xxxxxx CLK3 - chroma clock divider
26 // F10020 R/W ---xxxxx ---xxxxx JINTCTRL - interrupt control register
27 // W ---x---- -------- (J_SYNCLR - clear synchronous serial intf ints)
28 // W ----x--- -------- (J_ASYNCLR - clear asynchronous serial intf ints)
29 // W -----x-- -------- (J_TIM2CLR - clear timer 2 [tempo] interrupts)
30 // W ------x- -------- (J_TIM1CLR - clear timer 1 [sample] interrupts)
31 // W -------x -------- (J_EXTCLR - clear external interrupts)
32 // R/W -------- ---x---- (J_SYNENA - enable synchronous serial intf ints)
33 // R/W -------- ----x--- (J_ASYNENA - enable asynchronous serial intf ints)
34 // R/W -------- -----x-- (J_TIM2ENA - enable timer 2 [tempo] interrupts)
35 // R/W -------- ------x- (J_TIM1ENA - enable timer 1 [sample] interrupts)
36 // R/W -------- -------x (J_EXTENA - enable external interrupts)
37 // F10030 R/W -------- xxxxxxxx ASIDATA - asynchronous serial data
38 // F10032 W -x------ -xxxxxxx ASICTRL - asynchronous serial control
39 // W -x------ -------- (TXBRK - transmit break)
40 // W -------- -x------ (CLRERR - clear error)
41 // W -------- --x----- (RINTEN - enable receiver interrupts)
42 // W -------- ---x---- (TINTEN - enable transmitter interrupts)
43 // W -------- ----x--- (RXIPOL - receiver input polarity)
44 // W -------- -----x-- (TXOPOL - transmitter output polarity)
45 // W -------- ------x- (PAREN - parity enable)
46 // W -------- -------x (ODD - odd parity select)
47 // F10032 R xxx-xxxx x-xxxxxx ASISTAT - asynchronous serial status
48 // R x------- -------- (ERROR - OR of PE,FE,OE)
49 // R -x------ -------- (TXBRK - transmit break)
50 // R --x----- -------- (SERIN - serial input)
51 // R ----x--- -------- (OE - overrun error)
52 // R -----x-- -------- (FE - framing error)
53 // R ------x- -------- (PE - parity error)
54 // R -------x -------- (TBE - transmit buffer empty)
55 // R -------- x------- (RBF - receive buffer full)
56 // R -------- ---x---- (TINTEN - enable transmitter interrupts)
57 // R -------- ----x--- (RXIPOL - receiver input polarity)
58 // R -------- -----x-- (TXOPOL - transmitter output polarity)
59 // R -------- ------x- (PAREN - parity enable)
60 // R -------- -------x (ODD - odd parity)
61 // F10034 R/W xxxxxxxx xxxxxxxx ASICLK - asynchronous serial interface clock
62 // F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
63 // F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
64 // F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
65 // F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
66 // ------------------------------------------------------------
67 // F14000-F17FFF R/W xxxxxxxx xxxxxxxx Joysticks and GPIO0-5
68 // F14000 R xxxxxxxx xxxxxxxx JOYSTICK - read joystick state
69 // F14000 W x------- xxxxxxxx JOYSTICK - latch joystick output
70 // W x------- -------- (enable joystick outputs)
71 // W -------- xxxxxxxx (joystick output data)
72 // F14002 R xxxxxxxx xxxxxxxx JOYBUTS - button register
73 // F14800-F14FFF R/W xxxxxxxx xxxxxxxx GPI00 - reserved (CD-ROM? no.)
74 // F15000-F15FFF R/W xxxxxxxx xxxxxxxx GPI01 - reserved
75 // F16000-F16FFF R/W xxxxxxxx xxxxxxxx GPI02 - reserved
76 // F17000-F177FF R/W xxxxxxxx xxxxxxxx GPI03 - reserved
77 // F17800-F17BFF R/W xxxxxxxx xxxxxxxx GPI04 - reserved
78 // F17C00-F17FFF R/W xxxxxxxx xxxxxxxx GPI05 - reserved
79 // ------------------------------------------------------------
80 // F18000-F1FFFF R/W xxxxxxxx xxxxxxxx Jerry DSP
81 // F1A100 R/W xxxxxxxx xxxxxxxx D_FLAGS - DSP flags register
82 // R/W x------- -------- (DMAEN - DMA enable)
83 // R/W -x------ -------- (REGPAGE - register page)
84 // W --x----- -------- (D_EXT0CLR - clear external interrupt 0)
85 // W ---x---- -------- (D_TIM2CLR - clear timer 2 interrupt)
86 // W ----x--- -------- (D_TIM1CLR - clear timer 1 interrupt)
87 // W -----x-- -------- (D_I2SCLR - clear I2S interrupt)
88 // W ------x- -------- (D_CPUCLR - clear CPU interrupt)
89 // R/W -------x -------- (D_EXT0ENA - enable external interrupt 0)
90 // R/W -------- x------- (D_TIM2ENA - enable timer 2 interrupt)
91 // R/W -------- -x------ (D_TIM1ENA - enable timer 1 interrupt)
92 // R/W -------- --x----- (D_I2SENA - enable I2S interrupt)
93 // R/W -------- ---x---- (D_CPUENA - enable CPU interrupt)
94 // R/W -------- ----x--- (IMASK - interrupt mask)
95 // R/W -------- -----x-- (NEGA_FLAG - ALU negative)
96 // R/W -------- ------x- (CARRY_FLAG - ALU carry)
97 // R/W -------- -------x (ZERO_FLAG - ALU zero)
98 // F1A102 R/W -------- ------xx D_FLAGS - upper DSP flags
99 // R/W -------- ------x- (D_EXT1ENA - enable external interrupt 1)
100 // R/W -------- -------x (D_EXT1CLR - clear external interrupt 1)
101 // F1A104 W -------- ----xxxx D_MTXC - matrix control register
102 // W -------- ----x--- (MATCOL - column/row major)
103 // W -------- -----xxx (MATRIX3-15 - matrix width)
104 // F1A108 W ----xxxx xxxxxx-- D_MTXA - matrix address register
105 // F1A10C W -------- -----x-x D_END - data organization register
106 // W -------- -----x-- (BIG_INST - big endian instruction fetch)
107 // W -------- -------x (BIG_IO - big endian I/O)
108 // F1A110 R/W xxxxxxxx xxxxxxxx D_PC - DSP program counter
109 // F1A114 R/W xxxxxxxx xx-xxxxx D_CTRL - DSP control/status register
110 // R xxxx---- -------- (VERSION - DSP version code)
111 // R/W ----x--- -------- (BUS_HOG - hog the bus!)
112 // R/W -----x-- -------- (D_EXT0LAT - external interrupt 0 latch)
113 // R/W ------x- -------- (D_TIM2LAT - timer 2 interrupt latch)
114 // R/W -------x -------- (D_TIM1LAT - timer 1 interrupt latch)
115 // R/W -------- x------- (D_I2SLAT - I2S interrupt latch)
116 // R/W -------- -x------ (D_CPULAT - CPU interrupt latch)
117 // R/W -------- ---x---- (SINGLE_GO - single step one instruction)
118 // R/W -------- ----x--- (SINGLE_STEP - single step mode)
119 // R/W -------- -----x-- (FORCEINT0 - cause interrupt 0 on GPU)
120 // R/W -------- ------x- (CPUINT - send GPU interrupt to CPU)
121 // R/W -------- -------x (DSPGO - enable DSP execution)
122 // F1A116 R/W -------- -------x D_CTRL - upper DSP control/status register
123 // R/W -------- -------x (D_EXT1LAT - external interrupt 1 latch)
124 // F1A118-F1A11B W xxxxxxxx xxxxxxxx D_MOD - modulo instruction mask
125 // F1A11C-F1A11F R xxxxxxxx xxxxxxxx D_REMAIN - divide unit remainder
126 // F1A11C W -------- -------x D_DIVCTRL - divide unit control
127 // W -------- -------x (DIV_OFFSET - 1=16.16 divide, 0=32-bit divide)
128 // F1A120-F1A123 R xxxxxxxx xxxxxxxx D_MACHI - multiply & accumulate high bits
129 // F1A148 W xxxxxxxx xxxxxxxx R_DAC - right transmit data
130 // F1A14C W xxxxxxxx xxxxxxxx L_DAC - left transmit data
131 // F1A150 W -------- xxxxxxxx SCLK - serial clock frequency
132 // F1A150 R -------- ------xx SSTAT
133 // R -------- ------x- (left - no description)
134 // R -------- -------x (WS - word strobe status)
135 // F1A154 W -------- --xxxx-x SMODE - serial mode
136 // W -------- --x----- (EVERYWORD - interrupt on MSB of every word)
137 // W -------- ---x---- (FALLING - interrupt on falling edge)
138 // W -------- ----x--- (RISING - interrupt of rising edge)
139 // W -------- -----x-- (WSEN - enable word strobes)
140 // W -------- -------x (INTERNAL - enables serial clock)
141 // ------------------------------------------------------------
142 // F1B000-F1CFFF R/W xxxxxxxx xxxxxxxx Local DSP RAM
143 // ------------------------------------------------------------
144 // F1D000 R xxxxxxxx xxxxxxxx ROM_TRI - triangle wave
145 // F1D200 R xxxxxxxx xxxxxxxx ROM_SINE - full sine wave
146 // F1D400 R xxxxxxxx xxxxxxxx ROM_AMSINE - amplitude modulated sine wave
147 // F1D600 R xxxxxxxx xxxxxxxx ROM_12W - sine wave and second order harmonic
148 // F1D800 R xxxxxxxx xxxxxxxx ROM_CHIRP16 - chirp
149 // F1DA00 R xxxxxxxx xxxxxxxx ROM_NTRI - traingle wave with noise
150 // F1DC00 R xxxxxxxx xxxxxxxx ROM_DELTA - spike
151 // F1DE00 R xxxxxxxx xxxxxxxx ROM_NOISE - white noise
152 // ------------------------------------------------------------
156 #include <string.h> // For memcpy
164 #include "joystick.h"
166 #include "m68000/m68kinterface.h"
167 #include "memtrack.h"
168 #include "settings.h"
170 //#include "memory.h"
171 #include "wavetable.h"
173 //Note that 44100 Hz requires samples every 22.675737 usec.
174 //#define JERRY_DEBUG
176 /*static*/ uint8_t jerry_ram_8
[0x10000];
178 //#define JERRY_CONFIG 0x4002 // ??? What's this ???
180 // JERRY Registers (write, offset from $F10000)
188 #define JINTCTRL 0x20
196 uint8_t analog_x
, analog_y
;
198 static uint32_t JERRYPIT1Prescaler
;
199 static uint32_t JERRYPIT1Divider
;
200 static uint32_t JERRYPIT2Prescaler
;
201 static uint32_t JERRYPIT2Divider
;
202 static int32_t jerry_timer_1_counter
;
203 static int32_t jerry_timer_2_counter
;
205 //uint32_t JERRYI2SInterruptDivide = 8;
206 int32_t JERRYI2SInterruptTimer
= -1;
207 uint32_t jerryI2SCycles
;
208 uint32_t jerryIntPending
;
210 static uint16_t jerryInterruptMask
= 0;
211 static uint16_t jerryPendingInterrupt
= 0;
213 // Private function prototypes
215 void JERRYResetPIT1(void);
216 void JERRYResetPIT2(void);
217 void JERRYResetI2S(void);
219 void JERRYPIT1Callback(void);
220 void JERRYPIT2Callback(void);
221 void JERRYI2SCallback(void);
224 void JERRYResetI2S(void)
226 //WriteLog("i2s: reseting\n");
227 //This is really SCLK... !!! FIX !!!
229 JERRYI2SInterruptTimer
= -1;
233 void JERRYResetPIT1(void)
235 RemoveCallback(JERRYPIT1Callback
);
237 if (JERRYPIT1Prescaler
| JERRYPIT1Divider
)
239 double usecs
= (float)(JERRYPIT1Prescaler
+ 1) * (float)(JERRYPIT1Divider
+ 1) * RISC_CYCLE_IN_USEC
;
240 SetCallbackTime(JERRYPIT1Callback
, usecs
, EVENT_JERRY
);
245 void JERRYResetPIT2(void)
247 RemoveCallback(JERRYPIT2Callback
);
249 if (JERRYPIT1Prescaler
| JERRYPIT1Divider
)
251 double usecs
= (float)(JERRYPIT2Prescaler
+ 1) * (float)(JERRYPIT2Divider
+ 1) * RISC_CYCLE_IN_USEC
;
252 SetCallbackTime(JERRYPIT2Callback
, usecs
, EVENT_JERRY
);
257 // This is the cause of the regressions in Cybermorph and Missile Command 3D...
258 // Solution: Probably have to check the DSP enable bit before sending these thru.
259 //#define JERRY_NO_IRQS
260 void JERRYPIT1Callback(void)
262 #ifndef JERRY_NO_IRQS
263 //WriteLog("JERRY: In PIT1 callback, IRQM=$%04X\n", jerryInterruptMask);
264 if (TOMIRQEnabled(IRQ_DSP
))
266 if (jerryInterruptMask
& IRQ2_TIMER1
) // CPU Timer 1 IRQ
268 // Not sure, but I think we don't generate another IRQ if one's already going...
269 // But this seems to work... :-/
270 jerryPendingInterrupt
|= IRQ2_TIMER1
;
271 m68k_set_irq(2); // Generate 68K IPL 2
276 DSPSetIRQLine(DSPIRQ_TIMER0
, ASSERT_LINE
); // This does the 'IRQ enabled' checking...
281 void JERRYPIT2Callback(void)
283 #ifndef JERRY_NO_IRQS
284 if (TOMIRQEnabled(IRQ_DSP
))
286 //WriteLog("JERRY: In PIT2 callback, IRQM=$%04X\n", jerryInterruptMask);
287 if (jerryInterruptMask
& IRQ2_TIMER2
) // CPU Timer 2 IRQ
289 jerryPendingInterrupt
|= IRQ2_TIMER2
;
290 m68k_set_irq(2); // Generate 68K IPL 2
295 DSPSetIRQLine(DSPIRQ_TIMER1
, ASSERT_LINE
); // This does the 'IRQ enabled' checking...
300 void JERRYI2SCallback(void)
302 // We don't have to divide the RISC clock rate by this--the reason is a bit
303 // convoluted. Will put explanation here later...
304 // What's needed here is to find the ratio of the frequency to the number of clock cycles
305 // in one second. For example, if the sample rate is 44100, we divide the clock rate by
306 // this: 26590906 / 44100 = 602 cycles.
307 // Which means, every 602 cycles that go by we have to generate an interrupt.
308 jerryI2SCycles
= 32 * (2 * (sclk
+ 1));
309 //This makes audio faster, but not enough and the pitch is wrong besides
310 // jerryI2SCycles = 32 * (2 * (sclk - 1));
312 // If INTERNAL flag is set, then JERRY's SCLK is master
313 if (smode
& SMODE_INTERNAL
)
315 // This does the 'IRQ enabled' checking...
316 DSPSetIRQLine(DSPIRQ_SSI
, ASSERT_LINE
);
317 // double usecs = (float)jerryI2SCycles * RISC_CYCLE_IN_USEC;
318 //this fix is almost enough to fix timings in tripper, but not quite enough...
319 double usecs
= (float)jerryI2SCycles
* (vjs
.hardwareTypeNTSC
? RISC_CYCLE_IN_USEC
: RISC_CYCLE_PAL_IN_USEC
);
320 SetCallbackTime(JERRYI2SCallback
, usecs
, EVENT_JERRY
);
324 // JERRY is slave to external word clock
326 //Note that 44100 Hz requires samples every 22.675737 usec.
327 //When JERRY is slave to the word clock, we need to do interrupts either at 44.1K
328 //sample rate or at a 88.2K sample rate (11.332... usec).
329 /* // This is just a temporary kludge to see if the CD bus mastering works
330 // I.e., this is totally faked...!
331 // The whole interrupt system is pretty much borked and is need of an overhaul.
332 // What we need is a way of handling these interrupts when they happen instead of
333 // scanline boundaries the way it is now.
334 jerry_i2s_interrupt_timer -= cycles;
335 if (jerry_i2s_interrupt_timer <= 0)
337 //This is probably wrong as well (i.e., need to check enable lines)... !!! FIX !!! [DONE]
338 if (ButchIsReadyToSend())//Not sure this is right spot to check...
340 // return GetWordFromButchSSI(offset, who);
341 SetSSIWordsXmittedFromButch();
342 DSPSetIRQLine(DSPIRQ_SSI, ASSERT_LINE);
344 jerry_i2s_interrupt_timer += 602;
347 if (ButchIsReadyToSend())//Not sure this is right spot to check...
349 // return GetWordFromButchSSI(offset, who);
350 SetSSIWordsXmittedFromButch();
351 DSPSetIRQLine(DSPIRQ_SSI
, ASSERT_LINE
);
354 SetCallbackTime(JERRYI2SCallback
, 22.675737, EVENT_JERRY
);
363 memcpy(&jerry_ram_8
[0xD000], waveTableROM
, 0x1000);
365 JERRYPIT1Prescaler
= 0xFFFF;
366 JERRYPIT2Prescaler
= 0xFFFF;
367 JERRYPIT1Divider
= 0xFFFF;
368 JERRYPIT2Divider
= 0xFFFF;
369 jerryInterruptMask
= 0x0000;
370 jerryPendingInterrupt
= 0x0000;
376 void JERRYReset(void)
383 memset(jerry_ram_8
, 0x00, 0xD000); // Don't clear out the Wavetable ROM...!
384 JERRYPIT1Prescaler
= 0xFFFF;
385 JERRYPIT2Prescaler
= 0xFFFF;
386 JERRYPIT1Divider
= 0xFFFF;
387 JERRYPIT2Divider
= 0xFFFF;
388 jerry_timer_1_counter
= 0;
389 jerry_timer_2_counter
= 0;
390 jerryInterruptMask
= 0x0000;
391 jerryPendingInterrupt
= 0x0000;
399 JERRYDumpIORegistersToLog();
400 WriteLog("JERRY: M68K Interrupt control ($F10020) = %04X\n", GET16(jerry_ram_8
, 0x20));
408 bool JERRYIRQEnabled(int irq
)
410 // Read the word @ $F10020
411 // return jerry_ram_8[0x21] & (1 << irq);
412 return jerryInterruptMask
& irq
;
416 void JERRYSetPendingIRQ(int irq
)
418 // This is the shadow of INT (it's a split RO/WO register)
419 // jerryIntPending |= (1 << irq);
420 jerryPendingInterrupt
|= irq
;
424 // Dump all JERRY register values to the log
426 void JERRYDumpIORegistersToLog(void)
428 WriteLog("\n\n---------------------------------------------------------------------\n");
429 WriteLog("JERRY I/O Registers\n");
430 WriteLog("---------------------------------------------------------------------\n");
431 WriteLog("F1%04X (JPIT1): $%04X\n", JPIT1
, GET16(jerry_ram_8
, JPIT1
));
432 WriteLog("F1%04X (JPIT2): $%04X\n", JPIT2
, GET16(jerry_ram_8
, JPIT2
));
433 WriteLog("F1%04X (JPIT3): $%04X\n", JPIT3
, GET16(jerry_ram_8
, JPIT3
));
434 WriteLog("F1%04X (JPIT4): $%04X\n", JPIT4
, GET16(jerry_ram_8
, JPIT4
));
435 WriteLog("F1%04X (CLK1): $%04X\n", CLK1
, GET16(jerry_ram_8
, CLK1
));
436 WriteLog("F1%04X (CLK2): $%04X\n", CLK2
, GET16(jerry_ram_8
, CLK2
));
437 WriteLog("F1%04X (CLK3): $%04X\n", CLK3
, GET16(jerry_ram_8
, CLK3
));
438 WriteLog("F1%04X (JINTCTRL): $%04X\n", JINTCTRL
, GET16(jerry_ram_8
, JINTCTRL
));
439 WriteLog("F1%04X (ASIDATA): $%04X\n", ASIDATA
, GET16(jerry_ram_8
, ASIDATA
));
440 WriteLog("F1%04X (ASICTRL): $%04X\n", ASICTRL
, GET16(jerry_ram_8
, ASICTRL
));
441 WriteLog("F1%04X (ASICLK): $%04X\n", ASICLK
, GET16(jerry_ram_8
, ASICLK
));
442 WriteLog("F1%04X (SCLK): $%04X\n", SCLK
, GET16(jerry_ram_8
, SCLK
));
443 WriteLog("F1%04X (SMODE): $%04X\n", SMODE
, GET16(jerry_ram_8
, SMODE
));
444 WriteLog("---------------------------------------------------------------------\n\n\n");
449 // JERRY byte access (read)
451 uint8_t JERRYReadByte(uint32_t offset
, uint32_t who
/*=UNKNOWN*/)
454 WriteLog("JERRY: Reading byte at %06X\n", offset
);
456 if ((offset
>= DSP_CONTROL_RAM_BASE
) && (offset
< DSP_CONTROL_RAM_BASE
+0x20))
457 return DSPReadByte(offset
, who
);
458 else if ((offset
>= DSP_WORK_RAM_BASE
) && (offset
< DSP_WORK_RAM_BASE
+0x2000))
459 return DSPReadByte(offset
, who
);
460 // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
461 else if (offset
>= 0xF1A148 && offset
<= 0xF1A153)
462 return DACReadByte(offset
, who
);
463 // F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
464 // F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
465 // F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
466 // F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
468 // else if (offset >= 0xF10000 && offset <= 0xF10007)
469 //This is still wrong. What needs to be returned here are the values being counted down
470 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
472 //This is probably the problem with the new timer code... This is invalid
473 //under the new system... !!! FIX !!!
474 else if ((offset
>= 0xF10036) && (offset
<= 0xF1003D))
476 WriteLog("JERRY: Unhandled timer read (BYTE) at %08X...\n", offset
);
478 // else if (offset >= 0xF10010 && offset <= 0xF10015)
479 // return clock_byte_read(offset);
480 // else if (offset >= 0xF17C00 && offset <= 0xF17C01)
481 // return anajoy_byte_read(offset);
482 else if (offset
>= 0xF14000 && offset
<= 0xF14003)
483 // return JoystickReadByte(offset) | EepromReadByte(offset);
485 uint16_t value
= JoystickReadWord(offset
& 0xFE);
492 // This is wrong, should only have the lowest bit from $F14001
493 return value
| EepromReadByte(offset
);
495 else if (offset
>= 0xF14000 && offset
<= 0xF1A0FF)
496 return EepromReadByte(offset
);
498 return jerry_ram_8
[offset
& 0xFFFF];
503 // JERRY word access (read)
505 uint16_t JERRYReadWord(uint32_t offset
, uint32_t who
/*=UNKNOWN*/)
508 WriteLog("JERRY: Reading word at %06X\n", offset
);
511 if ((offset
>= DSP_CONTROL_RAM_BASE
) && (offset
< DSP_CONTROL_RAM_BASE
+0x20))
512 return DSPReadWord(offset
, who
);
513 else if (offset
>= DSP_WORK_RAM_BASE
&& offset
<= DSP_WORK_RAM_BASE
+ 0x1FFF)
514 return DSPReadWord(offset
, who
);
515 // LRXD/RRXD/SSTAT $F1A148/4C/50 (really 16-bit registers...)
516 else if (offset
>= 0xF1A148 && offset
<= 0xF1A153)
517 return DACReadWord(offset
, who
);
518 // F10036 R xxxxxxxx xxxxxxxx JPIT1 - timer 1 pre-scaler
519 // F10038 R xxxxxxxx xxxxxxxx JPIT2 - timer 1 divider
520 // F1003A R xxxxxxxx xxxxxxxx JPIT3 - timer 2 pre-scaler
521 // F1003C R xxxxxxxx xxxxxxxx JPIT4 - timer 2 divider
523 // else if ((offset >= 0xF10000) && (offset <= 0xF10007))
524 //This is still wrong. What needs to be returned here are the values being counted down
525 //in the jerry_timer_n_counter variables... !!! FIX !!! [DONE]
526 else if ((offset
>= 0xF10036) && (offset
<= 0xF1003D))
528 WriteLog("JERRY: Unhandled timer read (WORD) at %08X...\n", offset
);
530 // else if ((offset >= 0xF10010) && (offset <= 0xF10015))
531 // return clock_word_read(offset);
532 else if (offset
== 0xF10020)
533 // return jerryIntPending;
534 return jerryPendingInterrupt
;
535 // else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
536 // return anajoy_word_read(offset);
537 else if (offset
== 0xF14000)
538 return (JoystickReadWord(offset
) & 0xFFFE) | EepromReadWord(offset
);
539 else if ((offset
>= 0xF14002) && (offset
< 0xF14003))
540 return JoystickReadWord(offset
);
541 else if ((offset
>= 0xF14000) && (offset
<= 0xF1A0FF))
542 return EepromReadWord(offset
);
544 /*if (offset >= 0xF1D000)
545 WriteLog("JERRY: Reading word at %08X [%04X]...\n", offset, ((uint16_t)jerry_ram_8[(offset+0)&0xFFFF] << 8) | jerry_ram_8[(offset+1)&0xFFFF]);//*/
547 offset
&= 0xFFFF; // Prevent crashing...!
548 return ((uint16_t)jerry_ram_8
[offset
+0] << 8) | jerry_ram_8
[offset
+1];
553 // JERRY byte access (write)
555 void JERRYWriteByte(uint32_t offset
, uint8_t data
, uint32_t who
/*=UNKNOWN*/)
557 // Moved here tentatively, so we can see everything written to JERRY.
558 jerry_ram_8
[offset
& 0xFFFF] = data
;
561 WriteLog("jerry: writing byte %.2x at 0x%.6x\n",data
,offset
);
563 if ((offset
>= DSP_CONTROL_RAM_BASE
) && (offset
< DSP_CONTROL_RAM_BASE
+ 0x20))
565 DSPWriteByte(offset
, data
, who
);
568 else if ((offset
>= DSP_WORK_RAM_BASE
) && (offset
< DSP_WORK_RAM_BASE
+ 0x2000))
570 DSPWriteByte(offset
, data
, who
);
573 // SCLK ($F1A150--8 bits wide)
574 //NOTE: This should be taken care of in DAC...
576 else if ((offset
>= 0xF1A152) && (offset
<= 0xF1A153))
579 // WriteLog("JERRY: Writing %02X to SCLK...\n", data);
580 if ((offset
& 0x03) == 2)
581 sclk
= (sclk
& 0x00FF) | ((uint32_t)data
<< 8);
583 sclk
= (sclk
& 0xFF00) | (uint32_t)data
;
587 #warning "!!! SCLK should be handled in dac.cpp !!!"
588 JERRYI2SInterruptTimer
= -1;
589 RemoveCallback(JERRYI2SCallback
);
594 // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
595 else if (offset
>= 0xF1A148 && offset
<= 0xF1A157)
597 DACWriteByte(offset
, data
, who
);
600 else if (offset
>= 0xF10000 && offset
<= 0xF10007)
602 WriteLog("JERRY: Unhandled timer write (BYTE) at %08X...\n", offset
);
605 /* else if ((offset >= 0xF10010) && (offset <= 0xF10015))
607 clock_byte_write(offset, data);
610 // JERRY -> 68K interrupt enables/latches (need to be handled!)
611 else if (offset
>= 0xF10020 && offset
<= 0xF10021)//WAS:23)
613 if (offset
== 0xF10020)
615 // Clear pending interrupts...
616 jerryPendingInterrupt
&= ~data
;
618 else if (offset
== 0xF10021)
619 jerryInterruptMask
= data
;
620 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%02X to $%08X!\n", data, offset);
621 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
623 /* else if ((offset >= 0xF17C00) && (offset <= 0xF17C01))
625 anajoy_byte_write(offset, data);
628 else if ((offset
>= 0xF14000) && (offset
<= 0xF14003))
630 WriteLog("JERRYWriteByte: Unhandled byte write to JOYSTICK by %s.\n", whoName
[who
]);
631 // JoystickWriteByte(offset, data);
632 JoystickWriteWord(offset
& 0xFE, (uint16_t)data
);
633 // This is wrong, EEPROM is never written here
634 EepromWriteByte(offset
, data
);
637 else if ((offset
>= 0xF14000) && (offset
<= 0xF1A0FF))
639 EepromWriteByte(offset
, data
);
643 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
644 if (offset
>= 0xF1D000 && offset
<= 0xF1DFFF)
647 // jerry_ram_8[offset & 0xFFFF] = data;
652 // JERRY word access (write)
654 void JERRYWriteWord(uint32_t offset
, uint16_t data
, uint32_t who
/*=UNKNOWN*/)
656 // Moved here tentatively, so we can see everything written to JERRY.
657 jerry_ram_8
[(offset
+0) & 0xFFFF] = (data
>> 8) & 0xFF;
658 jerry_ram_8
[(offset
+1) & 0xFFFF] = data
& 0xFF;
661 WriteLog( "JERRY: Writing word %04X at %06X\n", data
, offset
);
664 if (offset
== 0xF10000)
665 WriteLog("JERRY: JPIT1 word written by %s: %u\n", whoName
[who
], data
);
666 else if (offset
== 0xF10002)
667 WriteLog("JERRY: JPIT2 word written by %s: %u\n", whoName
[who
], data
);
668 else if (offset
== 0xF10004)
669 WriteLog("JERRY: JPIT3 word written by %s: %u\n", whoName
[who
], data
);
670 else if (offset
== 0xF10006)
671 WriteLog("JERRY: JPIT4 word written by %s: %u\n", whoName
[who
], data
);
672 else if (offset
== 0xF10010)
673 WriteLog("JERRY: CLK1 word written by %s: %u\n", whoName
[who
], data
);
674 else if (offset
== 0xF10012)
675 WriteLog("JERRY: CLK2 word written by %s: %u\n", whoName
[who
], data
);
676 else if (offset
== 0xF10014)
677 WriteLog("JERRY: CLK3 word written by %s: %u\n", whoName
[who
], data
);
678 //else if (offset == 0xF1A100)
679 // WriteLog("JERRY: D_FLAGS word written by %s: %u\n", whoName[who], data);
680 //else if (offset == 0xF1A102)
681 // WriteLog("JERRY: D_FLAGS+2 word written by %s: %u\n", whoName[who], data);
682 else if (offset
== 0xF10020)
683 WriteLog("JERRY: JINTCTRL word written by %s: $%04X (%s%s%s%s%s%s)\n", whoName
[who
], data
,
684 (data
& 0x01 ? "Extrnl " : ""), (data
& 0x02 ? "DSP " : ""),
685 (data
& 0x04 ? "Timer0 " : ""), (data
& 0x08 ? "Timer1 " : ""),
686 (data
& 0x10 ? "ASI " : ""), (data
& 0x20 ? "I2S " : ""));
689 if ((offset
>= DSP_CONTROL_RAM_BASE
) && (offset
< DSP_CONTROL_RAM_BASE
+ 0x20))
691 DSPWriteWord(offset
, data
, who
);
694 else if ((offset
>= DSP_WORK_RAM_BASE
) && (offset
< DSP_WORK_RAM_BASE
+ 0x2000))
696 DSPWriteWord(offset
, data
, who
);
699 //NOTE: This should be taken care of in DAC...
701 else if (offset
== 0xF1A152) // Bottom half of SCLK ($F1A150)
703 #warning "!!! SCLK should be handled in dac.cpp !!!"
704 WriteLog("JERRY: Writing $%X to SCLK (by %s)...\n", data
, whoName
[who
]);
705 //This should *only* be enabled when SMODE has its INTERNAL bit set! !!! FIX !!!
707 sclk
= (uint8_t)data
;
711 JERRYI2SInterruptTimer
= -1;
712 RemoveCallback(JERRYI2SCallback
);
715 DACWriteWord(offset
, data
, who
);
719 // LTXD/RTXD/SCLK/SMODE $F1A148/4C/50/54 (really 16-bit registers...)
720 else if (offset
>= 0xF1A148 && offset
<= 0xF1A156)
722 DACWriteWord(offset
, data
, who
);
725 else if (offset
>= 0xF10000 && offset
<= 0xF10007)
727 switch(offset
& 0x07)
730 JERRYPIT1Prescaler
= data
;
734 JERRYPIT1Divider
= data
;
738 JERRYPIT2Prescaler
= data
;
742 JERRYPIT2Divider
= data
;
745 // Need to handle (unaligned) cases???
749 // JERRY -> 68K interrupt enables/latches (need to be handled!)
750 else if (offset
>= 0xF10020 && offset
<= 0xF10022)
752 jerryInterruptMask
= data
& 0xFF;
753 jerryPendingInterrupt
&= ~(data
>> 8);
754 //WriteLog("JERRY: (68K int en/lat - Unhandled!) Tried to write $%04X to $%08X!\n", data, offset);
755 //WriteLog("JERRY: (Previous is partially handled... IRQMask=$%04X)\n", jerryInterruptMask);
758 else if (offset
>= 0xF14000 && offset
< 0xF14003)
760 JoystickWriteWord(offset
, data
);
761 EepromWriteWord(offset
, data
);
764 else if (offset
>= 0xF14000 && offset
<= 0xF1A0FF)
766 EepromWriteWord(offset
, data
);
770 //Need to protect write attempts to Wavetable ROM (F1D000-FFF)
771 if (offset
>= 0xF1D000 && offset
<= 0xF1DFFF)
774 // jerry_ram_8[(offset+0) & 0xFFFF] = (data >> 8) & 0xFF;
775 // jerry_ram_8[(offset+1) & 0xFFFF] = data & 0xFF;
779 int JERRYGetPIT1Frequency(void)
781 int systemClockFrequency
= (vjs
.hardwareTypeNTSC
? RISC_CLOCK_RATE_NTSC
: RISC_CLOCK_RATE_PAL
);
782 return systemClockFrequency
/ ((JERRYPIT1Prescaler
+ 1) * (JERRYPIT1Divider
+ 1));
786 int JERRYGetPIT2Frequency(void)
788 int systemClockFrequency
= (vjs
.hardwareTypeNTSC
? RISC_CLOCK_RATE_NTSC
: RISC_CLOCK_RATE_PAL
);
789 return systemClockFrequency
/ ((JERRYPIT2Prescaler
+ 1) * (JERRYPIT2Divider
+ 1));