2 // MEMORY.H: Header file
4 // All Jaguar related memory and I/O locations are contained in this file
6 // JPM = Jean-Paul Mari <djipi.mari@gmail.com>
9 // --- ---------- -------------------------------------------------------------
10 // JPM 06/16/2016 Added a Big to Little endian
18 extern uint8_t jagMemSpace
[];
20 extern uint8_t * jaguarMainRAM
;
21 extern uint8_t * jaguarMainROM
;
22 extern uint8_t * gpuRAM
;
23 extern uint8_t * dspRAM
;
26 extern uint32_t & butch
, & dscntrl
;
27 extern uint16_t & ds_data
;
28 extern uint32_t & i2cntrl
, & sbcntrl
, & subdata
, & subdatb
, & sb_time
, & fifo_data
, & i2sdat2
, & unknown
;
30 extern uint32_t butch
, dscntrl
, ds_data
, i2cntrl
, sbcntrl
, subdata
, subdatb
, sb_time
, fifo_data
, i2sdat2
, unknown
;
33 extern uint16_t & memcon1
, & memcon2
, & hc
, & vc
, & lph
, & lpv
;
34 extern uint64_t & obData
;
35 extern uint32_t & olp
;
36 extern uint16_t & obf
, & vmode
, & bord1
, & bord2
, & hp
, & hbb
, & hbe
, & hs
,
37 & hvs
, & hdb1
, & hdb2
, & hde
, & vp
, & vbb
, & vbe
, & vs
, & vdb
, & vde
,
38 & veb
, & vee
, & vi
, & pit0
, & pit1
, & heq
;
40 extern uint16_t & int1
, & int2
;
41 extern uint8_t * clut
, * lbuf
;
42 extern uint32_t & g_flags
, & g_mtxc
, & g_mtxa
, & g_end
, & g_pc
, & g_ctrl
,
43 & g_hidata
, & g_divctrl
;
44 extern uint32_t g_remain
;
45 extern uint32_t & a1_base
, & a1_flags
, & a1_clip
, & a1_pixel
, & a1_step
,
46 & a1_fstep
, & a1_fpixel
, & a1_inc
, & a1_finc
, & a2_base
, & a2_flags
,
47 & a2_mask
, & a2_pixel
, & a2_step
, & b_cmd
, & b_count
;
48 extern uint64_t & b_srcd
, & b_dstd
, & b_dstz
, & b_srcz1
, & b_srcz2
, & b_patd
;
49 extern uint32_t & b_iinc
, & b_zinc
, & b_stop
, & b_i3
, & b_i2
, & b_i1
, & b_i0
, & b_z3
,
50 & b_z2
, & b_z1
, & b_z0
;
51 extern uint16_t & jpit1
, & jpit2
, & jpit3
, & jpit4
, & clk1
, & clk2
, & clk3
, & j_int
,
53 extern uint16_t asistat
;
54 extern uint16_t & asiclk
, & joystick
, & joybuts
;
55 extern uint32_t & d_flags
, & d_mtxc
, & d_mtxa
, & d_end
, & d_pc
, & d_ctrl
,
57 extern uint32_t d_remain
;
58 extern uint32_t & d_machi
;
59 extern uint16_t & ltxd
, lrxd
, & rtxd
, rrxd
;
60 extern uint8_t & sclk
, sstat
;
61 extern uint32_t & smode
;
63 uint16_t & ltxd = *((uint16_t *)&jagMemSpace[0xF1A148]);
64 uint16_t lrxd; // Dual register with $F1A148
65 uint16_t & rtxd = *((uint16_t *)&jagMemSpace[0xF1A14C]);
66 uint16_t rrxd; // Dual register with $F1A14C
67 uint8_t & sclk = *((uint8_t *) &jagMemSpace[0xF1A150]);
68 uint8_t sstat; // Dual register with $F1A150
69 uint32_t & smode = *((uint32_t *)&jagMemSpace[0xF1A154]);
72 // Read/write tracing enumeration
74 enum { UNKNOWN
, JAGUAR
, DSP
, GPU
, TOM
, JERRY
, M68K
, BLITTER
, OP
, DEBUG
};
75 extern const char * whoName
[10];
77 // BIOS identification enum
79 //enum { BIOS_NORMAL=0x01, BIOS_CD=0x02, BIOS_STUB1=0x04, BIOS_STUB2=0x08, BIOS_DEV_CD=0x10 };
80 //extern int biosAvailable;
82 // Some handy macros to help converting native endian to big endian (jaguar native)
85 #define SET64(r, a, v) r[(a)] = ((v) & 0xFF00000000000000) >> 56, r[(a)+1] = ((v) & 0x00FF000000000000) >> 48, \
86 r[(a)+2] = ((v) & 0x0000FF0000000000) >> 40, r[(a)+3] = ((v) & 0x000000FF00000000) >> 32, \
87 r[(a)+4] = ((v) & 0xFF000000) >> 24, r[(a)+5] = ((v) & 0x00FF0000) >> 16, \
88 r[(a)+6] = ((v) & 0x0000FF00) >> 8, r[(a)+7] = (v) & 0x000000FF
89 #define GET64(r, a) (((uint64_t)r[(a)] << 56) | ((uint64_t)r[(a)+1] << 48) | \
90 ((uint64_t)r[(a)+2] << 40) | ((uint64_t)r[(a)+3] << 32) | \
91 ((uint64_t)r[(a)+4] << 24) | ((uint64_t)r[(a)+5] << 16) | \
92 ((uint64_t)r[(a)+6] << 8) | (uint64_t)r[(a)+7])
93 #define SET32(r, a, v) r[(a)] = ((v) & 0xFF000000) >> 24, r[(a)+1] = ((v) & 0x00FF0000) >> 16, \
94 r[(a)+2] = ((v) & 0x0000FF00) >> 8, r[(a)+3] = (v) & 0x000000FF
95 #define GET32(r, a) ((r[(a)] << 24) | (r[(a)+1] << 16) | (r[(a)+2] << 8) | r[(a)+3])
96 #define SET16(r, a, v) r[(a)] = ((v) & 0xFF00) >> 8, r[(a)+1] = (v) & 0xFF
97 #define GET16(r, a) ((r[(a)] << 8) | r[(a)+1])
99 #define BigToLittleEndian16(a) (((a & 0xFF) << 8) | (a >> 8))
100 #define BigToLittleEndian32(a) (((a & 0xFF) << 24) | ((a & 0xFF00) << 8) | ((a & 0xFF0000) >> 8) | ((a & 0xFF000000) >> 24))
102 //This doesn't seem to work on OSX. So have to figure something else out. :-(
103 //byteswap.h doesn't exist on OSX.
105 // This is GCC specific, but we can fix that if we need to...
106 // Big plus of this approach is that these compile down to single instructions on little
107 // endian machines while one big endian machines we don't have any overhead. :-)
109 #include <byteswap.h>
112 #if __BYTE_ORDER == __LITTLE_ENDIAN
113 #define ESAFE16(x) bswap_16(x)
114 #define ESAFE32(x) bswap_32(x)
115 #define ESAFE64(x) bswap_64(x)
117 #define ESAFE16(x) (x)
118 #define ESAFE32(x) (x)
119 #define ESAFE64(x) (x)
124 Stuff ripped out of Hatari
, that may be useful
:
126 /* Can the actual CPU access unaligned memory? */
127 #ifndef CPU_CAN_ACCESS_UNALIGNED
128 # if defined(__i386__) || defined(powerpc) || defined(__mc68020__)
129 # define CPU_CAN_ACCESS_UNALIGNED 1
131 # define CPU_CAN_ACCESS_UNALIGNED 0
136 /* If the CPU can access unaligned memory, use these accelerated functions: */
137 #if CPU_CAN_ACCESS_UNALIGNED
139 #include <SDL_endian.h>
142 static inline uae_u32
do_get_mem_long(void *a
)
144 return SDL_SwapBE32(*(uae_u32
*)a
);
147 static inline uae_u16
do_get_mem_word(void *a
)
149 return SDL_SwapBE16(*(uae_u16
*)a
);
153 static inline void do_put_mem_long(void *a
, uae_u32 v
)
155 *(uae_u32
*)a
= SDL_SwapBE32(v
);
158 static inline void do_put_mem_word(void *a
, uae_u16 v
)
160 *(uae_u16
*)a
= SDL_SwapBE16(v
);
164 #else /* Cpu can not access unaligned memory: */
167 static inline uae_u32
do_get_mem_long(void *a
)
169 uae_u8
*b
= (uae_u8
*)a
;
171 return (b
[0] << 24) | (b
[1] << 16) | (b
[2] << 8) | b
[3];
174 static inline uae_u16
do_get_mem_word(void *a
)
176 uae_u8
*b
= (uae_u8
*)a
;
178 return (b
[0] << 8) | b
[1];
182 static inline void do_put_mem_long(void *a
, uae_u32 v
)
184 uae_u8
*b
= (uae_u8
*)a
;
192 static inline void do_put_mem_word(void *a
, uae_u16 v
)
194 uae_u8
*b
= (uae_u8
*)a
;
201 #endif /* CPU_CAN_ACCESS_UNALIGNED */
204 /* These are same for all architectures: */
206 static inline uae_u8
do_get_mem_byte(uae_u8
*a
)
211 static inline void do_put_mem_byte(uae_u8
*a
, uae_u8 v
)
217 #endif // __MEMORY_H__