fix a number of assuptions that a long could hold an inum
[bpt/guile.git] / libguile / vm-i-scheme.c
CommitLineData
73788ca8 1/* Copyright (C) 2001, 2009, 2010 Free Software Foundation, Inc.
a98cef7e 2 *
560b9c25 3 * This library is free software; you can redistribute it and/or
53befeb7
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4 * modify it under the terms of the GNU Lesser General Public License
5 * as published by the Free Software Foundation; either version 3 of
6 * the License, or (at your option) any later version.
a98cef7e 7 *
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8 * This library is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
560b9c25
AW
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * Lesser General Public License for more details.
a98cef7e 12 *
560b9c25
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13 * You should have received a copy of the GNU Lesser General Public
14 * License along with this library; if not, write to the Free Software
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15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
16 * 02110-1301 USA
560b9c25 17 */
a98cef7e
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18
19/* This file is included in vm_engine.c */
20
a80be762
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21\f
22/*
23 * Predicates
24 */
25
93d197be 26#define ARGS1(a1) SCM a1 = sp[0];
11ea1aba
AW
27#define ARGS2(a1,a2) SCM a1 = sp[-1], a2 = sp[0]; sp--; NULLSTACK (1);
28#define ARGS3(a1,a2,a3) SCM a1 = sp[-2], a2 = sp[-1], a3 = sp[0]; sp -= 2; NULLSTACK (2);
93d197be
AW
29
30#define RETURN(x) do { *sp = x; NEXT; } while (0)
31
827dc8dc 32VM_DEFINE_FUNCTION (128, not, "not", 1)
a98cef7e 33{
a80be762 34 ARGS1 (x);
2533f10b 35 RETURN (scm_from_bool (scm_is_false (x)));
17e90c5e
KN
36}
37
827dc8dc 38VM_DEFINE_FUNCTION (129, not_not, "not-not", 1)
17e90c5e 39{
a80be762 40 ARGS1 (x);
2533f10b 41 RETURN (scm_from_bool (!scm_is_false (x)));
17e90c5e
KN
42}
43
827dc8dc 44VM_DEFINE_FUNCTION (130, eq, "eq?", 2)
17e90c5e 45{
a80be762 46 ARGS2 (x, y);
5c8cefe5 47 RETURN (scm_from_bool (scm_is_eq (x, y)));
17e90c5e
KN
48}
49
827dc8dc 50VM_DEFINE_FUNCTION (131, not_eq, "not-eq?", 2)
17e90c5e 51{
a80be762 52 ARGS2 (x, y);
5c8cefe5 53 RETURN (scm_from_bool (!scm_is_eq (x, y)));
17e90c5e
KN
54}
55
827dc8dc 56VM_DEFINE_FUNCTION (132, nullp, "null?", 1)
17e90c5e 57{
a80be762 58 ARGS1 (x);
2533f10b 59 RETURN (scm_from_bool (scm_is_null (x)));
a98cef7e
KN
60}
61
827dc8dc 62VM_DEFINE_FUNCTION (133, not_nullp, "not-null?", 1)
a98cef7e 63{
a80be762 64 ARGS1 (x);
2533f10b 65 RETURN (scm_from_bool (!scm_is_null (x)));
a80be762
KN
66}
67
827dc8dc 68VM_DEFINE_FUNCTION (134, eqv, "eqv?", 2)
a80be762
KN
69{
70 ARGS2 (x, y);
5c8cefe5 71 if (scm_is_eq (x, y))
a80be762
KN
72 RETURN (SCM_BOOL_T);
73 if (SCM_IMP (x) || SCM_IMP (y))
74 RETURN (SCM_BOOL_F);
1865ad56 75 SYNC_REGISTER ();
a80be762
KN
76 RETURN (scm_eqv_p (x, y));
77}
78
827dc8dc 79VM_DEFINE_FUNCTION (135, equal, "equal?", 2)
a80be762
KN
80{
81 ARGS2 (x, y);
5c8cefe5 82 if (scm_is_eq (x, y))
a80be762
KN
83 RETURN (SCM_BOOL_T);
84 if (SCM_IMP (x) || SCM_IMP (y))
85 RETURN (SCM_BOOL_F);
1865ad56 86 SYNC_REGISTER ();
a80be762 87 RETURN (scm_equal_p (x, y));
a98cef7e
KN
88}
89
827dc8dc 90VM_DEFINE_FUNCTION (136, pairp, "pair?", 1)
a98cef7e 91{
a80be762 92 ARGS1 (x);
5c8cefe5 93 RETURN (scm_from_bool (scm_is_pair (x)));
a98cef7e
KN
94}
95
827dc8dc 96VM_DEFINE_FUNCTION (137, listp, "list?", 1)
a98cef7e 97{
a80be762 98 ARGS1 (x);
9bd48cb1 99 RETURN (scm_from_bool (scm_ilength (x) >= 0));
a98cef7e
KN
100}
101
cf45ff03
AW
102VM_DEFINE_FUNCTION (138, symbolp, "symbol?", 1)
103{
104 ARGS1 (x);
105 RETURN (scm_from_bool (scm_is_symbol (x)));
106}
107
108VM_DEFINE_FUNCTION (139, vectorp, "vector?", 1)
109{
110 ARGS1 (x);
111 RETURN (scm_from_bool (SCM_I_IS_VECTOR (x)));
112}
113
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114\f
115/*
116 * Basic data
117 */
118
cf45ff03 119VM_DEFINE_FUNCTION (140, cons, "cons", 2)
a98cef7e 120{
a80be762
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121 ARGS2 (x, y);
122 CONS (x, x, y);
123 RETURN (x);
a98cef7e
KN
124}
125
41e49280 126#define VM_VALIDATE_CONS(x, proc) \
5e390de6 127 if (SCM_UNLIKELY (!scm_is_pair (x))) \
41e49280
AW
128 { func_name = proc; \
129 finish_args = x; \
5e390de6
AW
130 goto vm_error_not_a_pair; \
131 }
132
cf45ff03 133VM_DEFINE_FUNCTION (141, car, "car", 1)
a98cef7e 134{
a80be762 135 ARGS1 (x);
41e49280 136 VM_VALIDATE_CONS (x, "car");
a80be762 137 RETURN (SCM_CAR (x));
a98cef7e
KN
138}
139
cf45ff03 140VM_DEFINE_FUNCTION (142, cdr, "cdr", 1)
a98cef7e 141{
a80be762 142 ARGS1 (x);
41e49280 143 VM_VALIDATE_CONS (x, "cdr");
a80be762 144 RETURN (SCM_CDR (x));
a98cef7e
KN
145}
146
cf45ff03 147VM_DEFINE_INSTRUCTION (143, set_car, "set-car!", 0, 2, 0)
a98cef7e 148{
60ed31d2
AW
149 SCM x, y;
150 POP (y);
151 POP (x);
41e49280 152 VM_VALIDATE_CONS (x, "set-car!");
a80be762 153 SCM_SETCAR (x, y);
60ed31d2 154 NEXT;
a98cef7e
KN
155}
156
cf45ff03 157VM_DEFINE_INSTRUCTION (144, set_cdr, "set-cdr!", 0, 2, 0)
a98cef7e 158{
60ed31d2
AW
159 SCM x, y;
160 POP (y);
161 POP (x);
41e49280 162 VM_VALIDATE_CONS (x, "set-cdr!");
a80be762 163 SCM_SETCDR (x, y);
60ed31d2 164 NEXT;
a98cef7e
KN
165}
166
a80be762
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167\f
168/*
169 * Numeric relational tests
170 */
171
172#undef REL
d8eeb67c
LC
173#define REL(crel,srel) \
174{ \
175 ARGS2 (x, y); \
2d80426a 176 if (SCM_I_INUMP (x) && SCM_I_INUMP (y)) \
0b54eea0
LC
177 RETURN (scm_from_bool ((scm_t_signed_bits) (x) \
178 crel (scm_t_signed_bits) (y))); \
179 SYNC_REGISTER (); \
180 RETURN (srel (x, y)); \
a80be762
KN
181}
182
cf45ff03 183VM_DEFINE_FUNCTION (145, ee, "ee?", 2)
a80be762
KN
184{
185 REL (==, scm_num_eq_p);
186}
187
cf45ff03 188VM_DEFINE_FUNCTION (146, lt, "lt?", 2)
a80be762
KN
189{
190 REL (<, scm_less_p);
191}
192
cf45ff03 193VM_DEFINE_FUNCTION (147, le, "le?", 2)
a80be762
KN
194{
195 REL (<=, scm_leq_p);
196}
197
cf45ff03 198VM_DEFINE_FUNCTION (148, gt, "gt?", 2)
a80be762
KN
199{
200 REL (>, scm_gr_p);
201}
202
cf45ff03 203VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
a80be762
KN
204{
205 REL (>=, scm_geq_p);
206}
207
208\f
209/*
210 * Numeric functions
211 */
212
e78d4bf9 213/* The maximum/minimum tagged integers. */
0c57673a
LC
214#undef INUM_MAX
215#undef INUM_MIN
e78d4bf9
LC
216#define INUM_MAX (INTPTR_MAX - 1)
217#define INUM_MIN (INTPTR_MIN + scm_tc2_int)
218
a80be762
KN
219#undef FUNC2
220#define FUNC2(CFUNC,SFUNC) \
221{ \
d8eeb67c 222 ARGS2 (x, y); \
2d80426a 223 if (SCM_I_INUMP (x) && SCM_I_INUMP (y)) \
a80be762 224 { \
c0ee3245 225 scm_t_int64 n = SCM_I_INUM (x) CFUNC SCM_I_INUM (y);\
a80be762 226 if (SCM_FIXABLE (n)) \
2d80426a 227 RETURN (SCM_I_MAKINUM (n)); \
a80be762 228 } \
b2642276 229 SYNC_REGISTER (); \
a80be762
KN
230 RETURN (SFUNC (x, y)); \
231}
232
0c57673a
LC
233/* Assembly tagged integer arithmetic routines. This code uses the
234 `asm goto' feature introduced in GCC 4.5. */
235
236#if defined __x86_64__ && SCM_GNUC_PREREQ (4, 5)
237
238/* The macros below check the CPU's overflow flag to improve fixnum
239 arithmetic. The %rcx register is explicitly clobbered because `asm
240 goto' can't have outputs, in which case the `r' constraint could be
241 used to let the register allocator choose a register.
242
243 TODO: Use `cold' label attribute in GCC 4.6.
244 http://gcc.gnu.org/ml/gcc-patches/2010-10/msg01777.html */
245
246# define ASM_ADD(x, y) \
247 { \
248 asm volatile goto ("mov %1, %%rcx; " \
249 "test %[tag], %%cl; je %l[slow_add]; " \
250 "test %[tag], %0; je %l[slow_add]; " \
251 "add %0, %%rcx; jo %l[slow_add]; " \
252 "sub %[tag], %%rcx; " \
253 "mov %%rcx, (%[vsp])\n" \
254 : /* no outputs */ \
255 : "r" (x), "r" (y), \
256 [vsp] "r" (sp), [tag] "i" (scm_tc2_int) \
257 : "rcx", "memory" \
258 : slow_add); \
259 NEXT; \
260 } \
261 slow_add: \
262 do { } while (0)
263
264# define ASM_SUB(x, y) \
265 { \
266 asm volatile goto ("mov %0, %%rcx; " \
267 "test %[tag], %%cl; je %l[slow_sub]; " \
268 "test %[tag], %1; je %l[slow_sub]; " \
269 "sub %1, %%rcx; jo %l[slow_sub]; " \
270 "add %[tag], %%rcx; " \
271 "mov %%rcx, (%[vsp])\n" \
272 : /* no outputs */ \
273 : "r" (x), "r" (y), \
274 [vsp] "r" (sp), [tag] "i" (scm_tc2_int) \
275 : "rcx", "memory" \
276 : slow_sub); \
277 NEXT; \
278 } \
279 slow_sub: \
280 do { } while (0)
281
282#endif
283
284
cf45ff03 285VM_DEFINE_FUNCTION (150, add, "add", 2)
a80be762 286{
0c57673a 287#ifndef ASM_ADD
a80be762 288 FUNC2 (+, scm_sum);
0c57673a
LC
289#else
290 ARGS2 (x, y);
291 ASM_ADD (x, y);
292 SYNC_REGISTER ();
293 RETURN (scm_sum (x, y));
294#endif
a80be762
KN
295}
296
cf45ff03 297VM_DEFINE_FUNCTION (151, add1, "add1", 1)
7382f23e
AW
298{
299 ARGS1 (x);
e78d4bf9
LC
300
301 /* Check for overflow. */
302 if (SCM_LIKELY ((scm_t_intptr) x < INUM_MAX))
7382f23e 303 {
e78d4bf9
LC
304 SCM result;
305
306 /* Add the integers without untagging. */
307 result = SCM_PACK ((scm_t_intptr) x
308 + (scm_t_intptr) SCM_I_MAKINUM (1)
309 - scm_tc2_int);
310
311 if (SCM_LIKELY (SCM_I_INUMP (result)))
312 RETURN (result);
7382f23e 313 }
e78d4bf9 314
7382f23e
AW
315 SYNC_REGISTER ();
316 RETURN (scm_sum (x, SCM_I_MAKINUM (1)));
317}
318
cf45ff03 319VM_DEFINE_FUNCTION (152, sub, "sub", 2)
a80be762 320{
0c57673a 321#ifndef ASM_SUB
a80be762 322 FUNC2 (-, scm_difference);
0c57673a
LC
323#else
324 ARGS2 (x, y);
325 ASM_SUB (x, y);
326 SYNC_REGISTER ();
327 RETURN (scm_difference (x, y));
328#endif
a80be762
KN
329}
330
cf45ff03 331VM_DEFINE_FUNCTION (153, sub1, "sub1", 1)
7382f23e
AW
332{
333 ARGS1 (x);
e78d4bf9
LC
334
335 /* Check for underflow. */
336 if (SCM_LIKELY ((scm_t_intptr) x > INUM_MIN))
7382f23e 337 {
e78d4bf9
LC
338 SCM result;
339
340 /* Substract the integers without untagging. */
341 result = SCM_PACK ((scm_t_intptr) x
342 - (scm_t_intptr) SCM_I_MAKINUM (1)
343 + scm_tc2_int);
344
345 if (SCM_LIKELY (SCM_I_INUMP (result)))
346 RETURN (result);
7382f23e 347 }
e78d4bf9 348
7382f23e
AW
349 SYNC_REGISTER ();
350 RETURN (scm_difference (x, SCM_I_MAKINUM (1)));
351}
352
0c57673a
LC
353# undef ASM_ADD
354# undef ASM_SUB
355
cf45ff03 356VM_DEFINE_FUNCTION (154, mul, "mul", 2)
a80be762
KN
357{
358 ARGS2 (x, y);
1865ad56 359 SYNC_REGISTER ();
a80be762
KN
360 RETURN (scm_product (x, y));
361}
362
cf45ff03 363VM_DEFINE_FUNCTION (155, div, "div", 2)
a80be762
KN
364{
365 ARGS2 (x, y);
1865ad56 366 SYNC_REGISTER ();
a80be762
KN
367 RETURN (scm_divide (x, y));
368}
369
cf45ff03 370VM_DEFINE_FUNCTION (156, quo, "quo", 2)
a80be762
KN
371{
372 ARGS2 (x, y);
1865ad56 373 SYNC_REGISTER ();
a80be762
KN
374 RETURN (scm_quotient (x, y));
375}
376
cf45ff03 377VM_DEFINE_FUNCTION (157, rem, "rem", 2)
a80be762
KN
378{
379 ARGS2 (x, y);
1865ad56 380 SYNC_REGISTER ();
a80be762
KN
381 RETURN (scm_remainder (x, y));
382}
383
cf45ff03 384VM_DEFINE_FUNCTION (158, mod, "mod", 2)
a80be762
KN
385{
386 ARGS2 (x, y);
1865ad56 387 SYNC_REGISTER ();
a80be762
KN
388 RETURN (scm_modulo (x, y));
389}
390
cf45ff03 391VM_DEFINE_FUNCTION (159, ash, "ash", 2)
b10d9330
AW
392{
393 ARGS2 (x, y);
394 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
395 {
396 if (SCM_I_INUM (y) < 0)
8ecd1943 397 /* Right shift, will be a fixnum. */
b10d9330 398 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) >> -SCM_I_INUM (y)));
8ecd1943
AW
399 else
400 /* Left shift. See comments in scm_ash. */
401 {
e25f3727 402 scm_t_signed_bits nn, bits_to_shift;
8ecd1943
AW
403
404 nn = SCM_I_INUM (x);
405 bits_to_shift = SCM_I_INUM (y);
406
407 if (bits_to_shift < SCM_I_FIXNUM_BIT-1
e25f3727 408 && ((scm_t_bits)
8ecd1943
AW
409 (SCM_SRS (nn, (SCM_I_FIXNUM_BIT-1 - bits_to_shift)) + 1)
410 <= 1))
411 RETURN (SCM_I_MAKINUM (nn << bits_to_shift));
412 /* fall through */
413 }
b10d9330
AW
414 /* fall through */
415 }
416 SYNC_REGISTER ();
417 RETURN (scm_ash (x, y));
418}
419
cf45ff03 420VM_DEFINE_FUNCTION (160, logand, "logand", 2)
b10d9330
AW
421{
422 ARGS2 (x, y);
423 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
424 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) & SCM_I_INUM (y)));
425 SYNC_REGISTER ();
426 RETURN (scm_logand (x, y));
427}
428
cf45ff03 429VM_DEFINE_FUNCTION (161, logior, "logior", 2)
b10d9330
AW
430{
431 ARGS2 (x, y);
432 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
433 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) | SCM_I_INUM (y)));
434 SYNC_REGISTER ();
435 RETURN (scm_logior (x, y));
436}
437
cf45ff03 438VM_DEFINE_FUNCTION (162, logxor, "logxor", 2)
b10d9330
AW
439{
440 ARGS2 (x, y);
441 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
442 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) ^ SCM_I_INUM (y)));
443 SYNC_REGISTER ();
444 RETURN (scm_logxor (x, y));
445}
446
1e4b834a
AW
447\f
448/*
827dc8dc 449 * Vectors and arrays
1e4b834a 450 */
aec4a84a 451
cf45ff03 452VM_DEFINE_FUNCTION (163, vector_ref, "vector-ref", 2)
d6f1ce3d 453{
e25f3727 454 scm_t_signed_bits i = 0;
d6f1ce3d 455 ARGS2 (vect, idx);
7b702b53 456 if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
d6f1ce3d
AW
457 && SCM_I_INUMP (idx)
458 && ((i = SCM_I_INUM (idx)) >= 0)
459 && i < SCM_I_VECTOR_LENGTH (vect)))
460 RETURN (SCM_I_VECTOR_ELTS (vect)[i]);
461 else
9b29d607
AW
462 {
463 SYNC_REGISTER ();
464 RETURN (scm_vector_ref (vect, idx));
465 }
d6f1ce3d
AW
466}
467
cf45ff03 468VM_DEFINE_INSTRUCTION (164, vector_set, "vector-set", 0, 3, 0)
d6f1ce3d 469{
e25f3727 470 scm_t_signed_bits i = 0;
d6f1ce3d
AW
471 SCM vect, idx, val;
472 POP (val); POP (idx); POP (vect);
7b702b53 473 if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
d6f1ce3d
AW
474 && SCM_I_INUMP (idx)
475 && ((i = SCM_I_INUM (idx)) >= 0)
476 && i < SCM_I_VECTOR_LENGTH (vect)))
477 SCM_I_VECTOR_WELTS (vect)[i] = val;
478 else
9b29d607
AW
479 {
480 SYNC_REGISTER ();
481 scm_vector_set_x (vect, idx, val);
482 }
d6f1ce3d
AW
483 NEXT;
484}
485
cf45ff03 486VM_DEFINE_INSTRUCTION (165, make_array, "make-array", 3, -1, 1)
827dc8dc
AW
487{
488 scm_t_uint32 len;
489 SCM shape, ret;
490
491 len = FETCH ();
492 len = (len << 8) + FETCH ();
493 len = (len << 8) + FETCH ();
494 POP (shape);
495 SYNC_REGISTER ();
384dce46 496 PRE_CHECK_UNDERFLOW (len);
827dc8dc
AW
497 ret = scm_from_contiguous_array (shape, sp - len + 1, len);
498 DROPN (len);
499 PUSH (ret);
500 NEXT;
501}
502
503\f
504/*
505 * Structs
506 */
41e49280 507#define VM_VALIDATE_STRUCT(obj, proc) \
827dc8dc
AW
508 if (SCM_UNLIKELY (!SCM_STRUCTP (obj))) \
509 { \
41e49280 510 func_name = proc; \
827dc8dc
AW
511 finish_args = (obj); \
512 goto vm_error_not_a_struct; \
513 }
514
cf45ff03 515VM_DEFINE_FUNCTION (166, struct_p, "struct?", 1)
827dc8dc
AW
516{
517 ARGS1 (obj);
518 RETURN (scm_from_bool (SCM_STRUCTP (obj)));
519}
520
cf45ff03 521VM_DEFINE_FUNCTION (167, struct_vtable, "struct-vtable", 1)
827dc8dc
AW
522{
523 ARGS1 (obj);
41e49280 524 VM_VALIDATE_STRUCT (obj, "struct_vtable");
827dc8dc
AW
525 RETURN (SCM_STRUCT_VTABLE (obj));
526}
527
cf45ff03 528VM_DEFINE_INSTRUCTION (168, make_struct, "make-struct", 2, -1, 1)
827dc8dc
AW
529{
530 unsigned h = FETCH ();
531 unsigned l = FETCH ();
9a974fd3
AW
532 scm_t_bits n = ((h << 8U) + l);
533 SCM vtable = sp[-(n - 1)];
534 const SCM *inits = sp - n + 2;
535 SCM ret;
827dc8dc 536
9823fd39
LC
537 SYNC_REGISTER ();
538
827dc8dc
AW
539 if (SCM_LIKELY (SCM_STRUCTP (vtable)
540 && SCM_VTABLE_FLAG_IS_SET (vtable, SCM_VTABLE_FLAG_SIMPLE)
9a974fd3
AW
541 && (SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size) + 1
542 == n)
543 && !SCM_VTABLE_INSTANCE_FINALIZER (vtable)))
827dc8dc 544 {
9a974fd3
AW
545 /* Verily, we are making a simple struct with the right number of
546 initializers, and no finalizer. */
547 ret = scm_words ((scm_t_bits)SCM_STRUCT_DATA (vtable) | scm_tc3_struct,
548 n + 1);
549 SCM_SET_CELL_WORD_1 (ret, (scm_t_bits)SCM_CELL_OBJECT_LOC (ret, 2));
550 memcpy (SCM_STRUCT_DATA (ret), inits, (n - 1) * sizeof (SCM));
827dc8dc 551 }
9a974fd3
AW
552 else
553 ret = scm_c_make_structv (vtable, 0, n - 1, (scm_t_bits *) inits);
554
c99865c1 555 DROPN (n);
9a974fd3 556 PUSH (ret);
827dc8dc 557
9a974fd3 558 NEXT;
827dc8dc
AW
559}
560
cf45ff03 561VM_DEFINE_FUNCTION (169, struct_ref, "struct-ref", 2)
827dc8dc
AW
562{
563 ARGS2 (obj, pos);
564
565 if (SCM_LIKELY (SCM_STRUCTP (obj)
566 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
567 SCM_VTABLE_FLAG_SIMPLE)
568 && SCM_I_INUMP (pos)))
569 {
570 SCM vtable;
571 scm_t_bits index, len;
572
e25f3727
AW
573 /* True, an inum is a signed value, but cast to unsigned it will
574 certainly be more than the length, so we will fall through if
575 index is negative. */
827dc8dc
AW
576 index = SCM_I_INUM (pos);
577 vtable = SCM_STRUCT_VTABLE (obj);
578 len = SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size);
579
580 if (SCM_LIKELY (index < len))
581 {
582 scm_t_bits *data = SCM_STRUCT_DATA (obj);
583 RETURN (SCM_PACK (data[index]));
584 }
585 }
586
9823fd39 587 SYNC_REGISTER ();
827dc8dc
AW
588 RETURN (scm_struct_ref (obj, pos));
589}
590
cf45ff03 591VM_DEFINE_FUNCTION (170, struct_set, "struct-set", 3)
827dc8dc
AW
592{
593 ARGS3 (obj, pos, val);
594
595 if (SCM_LIKELY (SCM_STRUCTP (obj)
596 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
597 SCM_VTABLE_FLAG_SIMPLE)
598 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
599 SCM_VTABLE_FLAG_SIMPLE_RW)
600 && SCM_I_INUMP (pos)))
601 {
602 SCM vtable;
603 scm_t_bits index, len;
604
e25f3727 605 /* See above regarding index being >= 0. */
827dc8dc
AW
606 index = SCM_I_INUM (pos);
607 vtable = SCM_STRUCT_VTABLE (obj);
608 len = SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size);
609 if (SCM_LIKELY (index < len))
610 {
611 scm_t_bits *data = SCM_STRUCT_DATA (obj);
612 data[index] = SCM_UNPACK (val);
613 RETURN (val);
614 }
615 }
616
9823fd39 617 SYNC_REGISTER ();
827dc8dc
AW
618 RETURN (scm_struct_set_x (obj, pos, val));
619}
620
621\f
622/*
623 * GOOPS support
624 */
cf45ff03 625VM_DEFINE_FUNCTION (171, class_of, "class-of", 1)
827dc8dc
AW
626{
627 ARGS1 (obj);
1a461493
AW
628 if (SCM_INSTANCEP (obj))
629 RETURN (SCM_CLASS_OF (obj));
630 SYNC_REGISTER ();
631 RETURN (scm_class_of (obj));
827dc8dc
AW
632}
633
e25f3727 634/* FIXME: No checking whatsoever. */
cf45ff03 635VM_DEFINE_FUNCTION (172, slot_ref, "slot-ref", 2)
827dc8dc
AW
636{
637 size_t slot;
638 ARGS2 (instance, idx);
639 slot = SCM_I_INUM (idx);
640 RETURN (SCM_PACK (SCM_STRUCT_DATA (instance) [slot]));
641}
642
e25f3727 643/* FIXME: No checking whatsoever. */
cf45ff03 644VM_DEFINE_INSTRUCTION (173, slot_set, "slot-set", 0, 3, 0)
827dc8dc
AW
645{
646 SCM instance, idx, val;
647 size_t slot;
648 POP (val);
649 POP (idx);
650 POP (instance);
651 slot = SCM_I_INUM (idx);
652 SCM_STRUCT_DATA (instance) [slot] = SCM_UNPACK (val);
653 NEXT;
654}
655
656\f
657/*
658 * Bytevectors
659 */
41e49280 660#define VM_VALIDATE_BYTEVECTOR(x, proc) \
1b68d627
LC
661 do \
662 { \
663 if (SCM_UNLIKELY (!SCM_BYTEVECTOR_P (x))) \
664 { \
41e49280 665 func_name = proc; \
1b68d627
LC
666 finish_args = x; \
667 goto vm_error_not_a_bytevector; \
668 } \
669 } \
670 while (0)
e6eb2467
AW
671
672#define BV_REF_WITH_ENDIANNESS(stem, fn_stem) \
673{ \
674 SCM endianness; \
675 POP (endianness); \
676 if (scm_is_eq (endianness, scm_i_native_endianness)) \
677 goto VM_LABEL (bv_##stem##_native_ref); \
678 { \
679 ARGS2 (bv, idx); \
9823fd39 680 SYNC_REGISTER (); \
e6eb2467
AW
681 RETURN (scm_bytevector_##fn_stem##_ref (bv, idx, endianness)); \
682 } \
683}
684
daccfef4
LC
685/* Return true (non-zero) if PTR has suitable alignment for TYPE. */
686#define ALIGNED_P(ptr, type) \
687 ((scm_t_uintptr) (ptr) % alignof (type) == 0)
688
cf45ff03 689VM_DEFINE_FUNCTION (174, bv_u16_ref, "bv-u16-ref", 3)
e6eb2467 690BV_REF_WITH_ENDIANNESS (u16, u16)
cf45ff03 691VM_DEFINE_FUNCTION (175, bv_s16_ref, "bv-s16-ref", 3)
e6eb2467 692BV_REF_WITH_ENDIANNESS (s16, s16)
cf45ff03 693VM_DEFINE_FUNCTION (176, bv_u32_ref, "bv-u32-ref", 3)
e6eb2467 694BV_REF_WITH_ENDIANNESS (u32, u32)
cf45ff03 695VM_DEFINE_FUNCTION (177, bv_s32_ref, "bv-s32-ref", 3)
e6eb2467 696BV_REF_WITH_ENDIANNESS (s32, s32)
cf45ff03 697VM_DEFINE_FUNCTION (178, bv_u64_ref, "bv-u64-ref", 3)
e6eb2467 698BV_REF_WITH_ENDIANNESS (u64, u64)
cf45ff03 699VM_DEFINE_FUNCTION (179, bv_s64_ref, "bv-s64-ref", 3)
e6eb2467 700BV_REF_WITH_ENDIANNESS (s64, s64)
cf45ff03 701VM_DEFINE_FUNCTION (180, bv_f32_ref, "bv-f32-ref", 3)
e6eb2467 702BV_REF_WITH_ENDIANNESS (f32, ieee_single)
cf45ff03 703VM_DEFINE_FUNCTION (181, bv_f64_ref, "bv-f64-ref", 3)
e6eb2467
AW
704BV_REF_WITH_ENDIANNESS (f64, ieee_double)
705
706#undef BV_REF_WITH_ENDIANNESS
707
9823fd39
LC
708#define BV_FIXABLE_INT_REF(stem, fn_stem, type, size) \
709{ \
e25f3727 710 scm_t_signed_bits i; \
daccfef4 711 const scm_t_ ## type *int_ptr; \
9823fd39 712 ARGS2 (bv, idx); \
daccfef4 713 \
41e49280 714 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC
715 i = SCM_I_INUM (idx); \
716 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
717 \
9823fd39 718 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 719 && (i >= 0) \
9823fd39 720 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC
721 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
722 RETURN (SCM_I_MAKINUM (*int_ptr)); \
9823fd39
LC
723 else \
724 { \
725 SYNC_REGISTER (); \
726 RETURN (scm_bytevector_ ## fn_stem ## _ref (bv, idx)); \
727 } \
728}
729
730#define BV_INT_REF(stem, type, size) \
731{ \
e25f3727 732 scm_t_signed_bits i; \
daccfef4 733 const scm_t_ ## type *int_ptr; \
9823fd39 734 ARGS2 (bv, idx); \
daccfef4 735 \
41e49280 736 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC
737 i = SCM_I_INUM (idx); \
738 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
739 \
9823fd39 740 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 741 && (i >= 0) \
9823fd39 742 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC
743 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
744 { \
745 scm_t_ ## type x = *int_ptr; \
9823fd39
LC
746 if (SCM_FIXABLE (x)) \
747 RETURN (SCM_I_MAKINUM (x)); \
748 else \
749 { \
750 SYNC_REGISTER (); \
751 RETURN (scm_from_ ## type (x)); \
752 } \
753 } \
754 else \
755 { \
756 SYNC_REGISTER (); \
757 RETURN (scm_bytevector_ ## stem ## _native_ref (bv, idx)); \
758 } \
759}
760
761#define BV_FLOAT_REF(stem, fn_stem, type, size) \
762{ \
e25f3727 763 scm_t_signed_bits i; \
daccfef4 764 const type *float_ptr; \
9823fd39 765 ARGS2 (bv, idx); \
daccfef4 766 \
41e49280 767 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC
768 i = SCM_I_INUM (idx); \
769 float_ptr = (type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
770 \
9823fd39
LC
771 SYNC_REGISTER (); \
772 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 773 && (i >= 0) \
9823fd39 774 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC
775 && (ALIGNED_P (float_ptr, type)))) \
776 RETURN (scm_from_double (*float_ptr)); \
9823fd39
LC
777 else \
778 RETURN (scm_bytevector_ ## fn_stem ## _native_ref (bv, idx)); \
e6eb2467
AW
779}
780
cf45ff03 781VM_DEFINE_FUNCTION (182, bv_u8_ref, "bv-u8-ref", 2)
e6eb2467 782BV_FIXABLE_INT_REF (u8, u8, uint8, 1)
cf45ff03 783VM_DEFINE_FUNCTION (183, bv_s8_ref, "bv-s8-ref", 2)
e6eb2467 784BV_FIXABLE_INT_REF (s8, s8, int8, 1)
cf45ff03 785VM_DEFINE_FUNCTION (184, bv_u16_native_ref, "bv-u16-native-ref", 2)
e6eb2467 786BV_FIXABLE_INT_REF (u16, u16_native, uint16, 2)
cf45ff03 787VM_DEFINE_FUNCTION (185, bv_s16_native_ref, "bv-s16-native-ref", 2)
e6eb2467 788BV_FIXABLE_INT_REF (s16, s16_native, int16, 2)
cf45ff03 789VM_DEFINE_FUNCTION (186, bv_u32_native_ref, "bv-u32-native-ref", 2)
dddacb23
LC
790#if SIZEOF_VOID_P > 4
791BV_FIXABLE_INT_REF (u32, u32_native, uint32, 4)
792#else
e6eb2467 793BV_INT_REF (u32, uint32, 4)
dddacb23 794#endif
cf45ff03 795VM_DEFINE_FUNCTION (187, bv_s32_native_ref, "bv-s32-native-ref", 2)
dddacb23
LC
796#if SIZEOF_VOID_P > 4
797BV_FIXABLE_INT_REF (s32, s32_native, int32, 4)
798#else
e6eb2467 799BV_INT_REF (s32, int32, 4)
dddacb23 800#endif
cf45ff03 801VM_DEFINE_FUNCTION (188, bv_u64_native_ref, "bv-u64-native-ref", 2)
e6eb2467 802BV_INT_REF (u64, uint64, 8)
cf45ff03 803VM_DEFINE_FUNCTION (189, bv_s64_native_ref, "bv-s64-native-ref", 2)
e6eb2467 804BV_INT_REF (s64, int64, 8)
cf45ff03 805VM_DEFINE_FUNCTION (190, bv_f32_native_ref, "bv-f32-native-ref", 2)
e6eb2467 806BV_FLOAT_REF (f32, ieee_single, float, 4)
cf45ff03 807VM_DEFINE_FUNCTION (191, bv_f64_native_ref, "bv-f64-native-ref", 2)
e6eb2467
AW
808BV_FLOAT_REF (f64, ieee_double, double, 8)
809
810#undef BV_FIXABLE_INT_REF
811#undef BV_INT_REF
812#undef BV_FLOAT_REF
813
814
815
816#define BV_SET_WITH_ENDIANNESS(stem, fn_stem) \
817{ \
818 SCM endianness; \
819 POP (endianness); \
820 if (scm_is_eq (endianness, scm_i_native_endianness)) \
821 goto VM_LABEL (bv_##stem##_native_set); \
822 { \
d6f1ce3d
AW
823 SCM bv, idx, val; POP (val); POP (idx); POP (bv); \
824 scm_bytevector_##fn_stem##_set_x (bv, idx, val, endianness); \
825 NEXT; \
e6eb2467
AW
826 } \
827}
828
cf45ff03 829VM_DEFINE_INSTRUCTION (192, bv_u16_set, "bv-u16-set", 0, 4, 0)
e6eb2467 830BV_SET_WITH_ENDIANNESS (u16, u16)
cf45ff03 831VM_DEFINE_INSTRUCTION (193, bv_s16_set, "bv-s16-set", 0, 4, 0)
e6eb2467 832BV_SET_WITH_ENDIANNESS (s16, s16)
cf45ff03 833VM_DEFINE_INSTRUCTION (194, bv_u32_set, "bv-u32-set", 0, 4, 0)
e6eb2467 834BV_SET_WITH_ENDIANNESS (u32, u32)
cf45ff03 835VM_DEFINE_INSTRUCTION (195, bv_s32_set, "bv-s32-set", 0, 4, 0)
e6eb2467 836BV_SET_WITH_ENDIANNESS (s32, s32)
cf45ff03 837VM_DEFINE_INSTRUCTION (196, bv_u64_set, "bv-u64-set", 0, 4, 0)
e6eb2467 838BV_SET_WITH_ENDIANNESS (u64, u64)
cf45ff03 839VM_DEFINE_INSTRUCTION (197, bv_s64_set, "bv-s64-set", 0, 4, 0)
e6eb2467 840BV_SET_WITH_ENDIANNESS (s64, s64)
cf45ff03 841VM_DEFINE_INSTRUCTION (198, bv_f32_set, "bv-f32-set", 0, 4, 0)
e6eb2467 842BV_SET_WITH_ENDIANNESS (f32, ieee_single)
cf45ff03 843VM_DEFINE_INSTRUCTION (199, bv_f64_set, "bv-f64-set", 0, 4, 0)
e6eb2467
AW
844BV_SET_WITH_ENDIANNESS (f64, ieee_double)
845
846#undef BV_SET_WITH_ENDIANNESS
847
daccfef4
LC
848#define BV_FIXABLE_INT_SET(stem, fn_stem, type, min, max, size) \
849{ \
e25f3727 850 scm_t_signed_bits i, j = 0; \
daccfef4
LC
851 SCM bv, idx, val; \
852 scm_t_ ## type *int_ptr; \
853 \
854 POP (val); POP (idx); POP (bv); \
41e49280 855 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC
856 i = SCM_I_INUM (idx); \
857 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
858 \
859 if (SCM_LIKELY (SCM_I_INUMP (idx) \
860 && (i >= 0) \
861 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
862 && (ALIGNED_P (int_ptr, scm_t_ ## type)) \
863 && (SCM_I_INUMP (val)) \
864 && ((j = SCM_I_INUM (val)) >= min) \
865 && (j <= max))) \
866 *int_ptr = (scm_t_ ## type) j; \
867 else \
868 scm_bytevector_ ## fn_stem ## _set_x (bv, idx, val); \
869 NEXT; \
870}
871
872#define BV_INT_SET(stem, type, size) \
873{ \
e25f3727 874 scm_t_signed_bits i = 0; \
daccfef4
LC
875 SCM bv, idx, val; \
876 scm_t_ ## type *int_ptr; \
877 \
878 POP (val); POP (idx); POP (bv); \
41e49280 879 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC
880 i = SCM_I_INUM (idx); \
881 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
882 \
883 if (SCM_LIKELY (SCM_I_INUMP (idx) \
884 && (i >= 0) \
885 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
886 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
887 *int_ptr = scm_to_ ## type (val); \
888 else \
889 scm_bytevector_ ## stem ## _native_set_x (bv, idx, val); \
890 NEXT; \
891}
892
893#define BV_FLOAT_SET(stem, fn_stem, type, size) \
894{ \
e25f3727 895 scm_t_signed_bits i = 0; \
daccfef4
LC
896 SCM bv, idx, val; \
897 type *float_ptr; \
898 \
899 POP (val); POP (idx); POP (bv); \
41e49280 900 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC
901 i = SCM_I_INUM (idx); \
902 float_ptr = (type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
903 \
904 if (SCM_LIKELY (SCM_I_INUMP (idx) \
905 && (i >= 0) \
906 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
907 && (ALIGNED_P (float_ptr, type)))) \
908 *float_ptr = scm_to_double (val); \
909 else \
910 scm_bytevector_ ## fn_stem ## _native_set_x (bv, idx, val); \
911 NEXT; \
e6eb2467
AW
912}
913
cf45ff03 914VM_DEFINE_INSTRUCTION (200, bv_u8_set, "bv-u8-set", 0, 3, 0)
e6eb2467 915BV_FIXABLE_INT_SET (u8, u8, uint8, 0, SCM_T_UINT8_MAX, 1)
cf45ff03 916VM_DEFINE_INSTRUCTION (201, bv_s8_set, "bv-s8-set", 0, 3, 0)
e6eb2467 917BV_FIXABLE_INT_SET (s8, s8, int8, SCM_T_INT8_MIN, SCM_T_INT8_MAX, 1)
cf45ff03 918VM_DEFINE_INSTRUCTION (202, bv_u16_native_set, "bv-u16-native-set", 0, 3, 0)
d6f1ce3d 919BV_FIXABLE_INT_SET (u16, u16_native, uint16, 0, SCM_T_UINT16_MAX, 2)
cf45ff03 920VM_DEFINE_INSTRUCTION (203, bv_s16_native_set, "bv-s16-native-set", 0, 3, 0)
d6f1ce3d 921BV_FIXABLE_INT_SET (s16, s16_native, int16, SCM_T_INT16_MIN, SCM_T_INT16_MAX, 2)
cf45ff03 922VM_DEFINE_INSTRUCTION (204, bv_u32_native_set, "bv-u32-native-set", 0, 3, 0)
dddacb23
LC
923#if SIZEOF_VOID_P > 4
924BV_FIXABLE_INT_SET (u32, u32_native, uint32, 0, SCM_T_UINT32_MAX, 4)
925#else
e6eb2467 926BV_INT_SET (u32, uint32, 4)
dddacb23 927#endif
cf45ff03 928VM_DEFINE_INSTRUCTION (205, bv_s32_native_set, "bv-s32-native-set", 0, 3, 0)
dddacb23
LC
929#if SIZEOF_VOID_P > 4
930BV_FIXABLE_INT_SET (s32, s32_native, int32, SCM_T_INT32_MIN, SCM_T_INT32_MAX, 4)
931#else
e6eb2467 932BV_INT_SET (s32, int32, 4)
dddacb23 933#endif
cf45ff03 934VM_DEFINE_INSTRUCTION (206, bv_u64_native_set, "bv-u64-native-set", 0, 3, 0)
e6eb2467 935BV_INT_SET (u64, uint64, 8)
cf45ff03 936VM_DEFINE_INSTRUCTION (207, bv_s64_native_set, "bv-s64-native-set", 0, 3, 0)
e6eb2467 937BV_INT_SET (s64, int64, 8)
cf45ff03 938VM_DEFINE_INSTRUCTION (208, bv_f32_native_set, "bv-f32-native-set", 0, 3, 0)
e6eb2467 939BV_FLOAT_SET (f32, ieee_single, float, 4)
cf45ff03 940VM_DEFINE_INSTRUCTION (209, bv_f64_native_set, "bv-f64-native-set", 0, 3, 0)
e6eb2467
AW
941BV_FLOAT_SET (f64, ieee_double, double, 8)
942
943#undef BV_FIXABLE_INT_SET
944#undef BV_INT_SET
945#undef BV_FLOAT_SET
946
53e28ed9
AW
947/*
948(defun renumber-ops ()
949 "start from top of buffer and renumber 'VM_DEFINE_FOO (\n' sequences"
950 (interactive "")
951 (save-excursion
827dc8dc 952 (let ((counter 127)) (goto-char (point-min))
53e28ed9
AW
953 (while (re-search-forward "^VM_DEFINE_[^ ]+ (\\([^,]+\\)," (point-max) t)
954 (replace-match
955 (number-to-string (setq counter (1+ counter)))
956 t t nil 1)))))
957*/
1e4b834a 958
17e90c5e
KN
959/*
960 Local Variables:
961 c-file-style: "gnu"
962 End:
963*/