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Add a missing SYNC_ALL in variable-ref
[bpt/guile.git] / libguile / vm-i-scheme.c
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53bdfcf0 1/* Copyright (C) 2001, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
a98cef7e 2 *
560b9c25 3 * This library is free software; you can redistribute it and/or
53befeb7
NJ		 4 * modify it under the terms of the GNU Lesser General Public License
5 * as published by the Free Software Foundation; either version 3 of
6 * the License, or (at your option) any later version.
a98cef7e 7 *
53befeb7
NJ		 8 * This library is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
560b9c25
AW		 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * Lesser General Public License for more details.
a98cef7e 12 *
560b9c25
AW		 13 * You should have received a copy of the GNU Lesser General Public
14 * License along with this library; if not, write to the Free Software
53befeb7
NJ		 15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
16 * 02110-1301 USA
560b9c25 17 */
a98cef7e
KN		 18
19/* This file is included in vm_engine.c */
20
a80be762
KN		 21\f
22/*
23 * Predicates
24 */
25
93d197be 26#define ARGS1(a1) SCM a1 = sp[0];
11ea1aba
AW		 27#define ARGS2(a1,a2) SCM a1 = sp[-1], a2 = sp[0]; sp--; NULLSTACK (1);
28#define ARGS3(a1,a2,a3) SCM a1 = sp[-2], a2 = sp[-1], a3 = sp[0]; sp -= 2; NULLSTACK (2);
93d197be 29
a18e13a5 30#define RETURN(x) do { *sp = x; NEXT; } while (0)
93d197be 31
827dc8dc 32VM_DEFINE_FUNCTION (128, not, "not", 1)
a98cef7e 33{
a80be762 34 ARGS1 (x);
2533f10b 35 RETURN (scm_from_bool (scm_is_false (x)));
17e90c5e
KN		 36}
37
827dc8dc 38VM_DEFINE_FUNCTION (129, not_not, "not-not", 1)
17e90c5e 39{
a80be762 40 ARGS1 (x);
2533f10b 41 RETURN (scm_from_bool (!scm_is_false (x)));
17e90c5e
KN		 42}
43
827dc8dc 44VM_DEFINE_FUNCTION (130, eq, "eq?", 2)
17e90c5e 45{
a80be762 46 ARGS2 (x, y);
5c8cefe5 47 RETURN (scm_from_bool (scm_is_eq (x, y)));
17e90c5e
KN		 48}
49
827dc8dc 50VM_DEFINE_FUNCTION (131, not_eq, "not-eq?", 2)
17e90c5e 51{
a80be762 52 ARGS2 (x, y);
5c8cefe5 53 RETURN (scm_from_bool (!scm_is_eq (x, y)));
17e90c5e
KN		 54}
55
827dc8dc 56VM_DEFINE_FUNCTION (132, nullp, "null?", 1)
17e90c5e 57{
a80be762 58 ARGS1 (x);
2533f10b 59 RETURN (scm_from_bool (scm_is_null (x)));
a98cef7e
KN		 60}
61
827dc8dc 62VM_DEFINE_FUNCTION (133, not_nullp, "not-null?", 1)
a98cef7e 63{
a80be762 64 ARGS1 (x);
2533f10b 65 RETURN (scm_from_bool (!scm_is_null (x)));
a80be762
KN		 66}
67
827dc8dc 68VM_DEFINE_FUNCTION (134, eqv, "eqv?", 2)
a80be762
KN		 69{
70 ARGS2 (x, y);
5c8cefe5 71 if (scm_is_eq (x, y))
a80be762 72 RETURN (SCM_BOOL_T);
a18e13a5 73 if (SCM_IMP (x) || SCM_IMP (y))
a80be762 74 RETURN (SCM_BOOL_F);
a18e13a5
AW		 75 SYNC_REGISTER ();
76 RETURN (scm_eqv_p (x, y));
a80be762
KN		 77}
78
827dc8dc 79VM_DEFINE_FUNCTION (135, equal, "equal?", 2)
a80be762
KN		 80{
81 ARGS2 (x, y);
5c8cefe5 82 if (scm_is_eq (x, y))
a80be762 83 RETURN (SCM_BOOL_T);
a18e13a5 84 if (SCM_IMP (x) || SCM_IMP (y))
a80be762 85 RETURN (SCM_BOOL_F);
a18e13a5
AW		 86 SYNC_REGISTER ();
87 RETURN (scm_equal_p (x, y));
a98cef7e
KN		 88}
89
827dc8dc 90VM_DEFINE_FUNCTION (136, pairp, "pair?", 1)
a98cef7e 91{
a80be762 92 ARGS1 (x);
5c8cefe5 93 RETURN (scm_from_bool (scm_is_pair (x)));
a98cef7e
KN		 94}
95
827dc8dc 96VM_DEFINE_FUNCTION (137, listp, "list?", 1)
a98cef7e 97{
a80be762 98 ARGS1 (x);
9bd48cb1 99 RETURN (scm_from_bool (scm_ilength (x) >= 0));
a98cef7e
KN		 100}
101
cf45ff03
AW		 102VM_DEFINE_FUNCTION (138, symbolp, "symbol?", 1)
103{
104 ARGS1 (x);
105 RETURN (scm_from_bool (scm_is_symbol (x)));
106}
107
108VM_DEFINE_FUNCTION (139, vectorp, "vector?", 1)
109{
110 ARGS1 (x);
111 RETURN (scm_from_bool (SCM_I_IS_VECTOR (x)));
112}
113
a80be762
KN		 114\f
115/*
116 * Basic data
117 */
118
cf45ff03 119VM_DEFINE_FUNCTION (140, cons, "cons", 2)
a98cef7e 120{
a80be762
KN		 121 ARGS2 (x, y);
122 CONS (x, x, y);
123 RETURN (x);
a98cef7e
KN		 124}
125
41e49280 126#define VM_VALIDATE_CONS(x, proc) \
53bdfcf0 127 VM_ASSERT (scm_is_pair (x), vm_error_not_a_pair (proc, x))
5e390de6 128
cf45ff03 129VM_DEFINE_FUNCTION (141, car, "car", 1)
a98cef7e 130{
a80be762 131 ARGS1 (x);
41e49280 132 VM_VALIDATE_CONS (x, "car");
a80be762 133 RETURN (SCM_CAR (x));
a98cef7e
KN		 134}
135
cf45ff03 136VM_DEFINE_FUNCTION (142, cdr, "cdr", 1)
a98cef7e 137{
a80be762 138 ARGS1 (x);
41e49280 139 VM_VALIDATE_CONS (x, "cdr");
a80be762 140 RETURN (SCM_CDR (x));
a98cef7e
KN		 141}
142
cf45ff03 143VM_DEFINE_INSTRUCTION (143, set_car, "set-car!", 0, 2, 0)
a98cef7e 144{
60ed31d2 145 SCM x, y;
eae2438d 146 POP2 (y, x);
41e49280 147 VM_VALIDATE_CONS (x, "set-car!");
a80be762 148 SCM_SETCAR (x, y);
60ed31d2 149 NEXT;
a98cef7e
KN		 150}
151
cf45ff03 152VM_DEFINE_INSTRUCTION (144, set_cdr, "set-cdr!", 0, 2, 0)
a98cef7e 153{
60ed31d2 154 SCM x, y;
eae2438d 155 POP2 (y, x);
41e49280 156 VM_VALIDATE_CONS (x, "set-cdr!");
a80be762 157 SCM_SETCDR (x, y);
60ed31d2 158 NEXT;
a98cef7e
KN		 159}
160
a80be762
KN		 161\f
162/*
163 * Numeric relational tests
164 */
165
166#undef REL
b2b33168
AW		 167#define REL(crel,srel) \
168 { \
169 ARGS2 (x, y); \
170 if (SCM_I_INUMP (x) && SCM_I_INUMP (y)) \
171 RETURN (scm_from_bool (((scm_t_signed_bits) SCM_UNPACK (x)) \
172 crel ((scm_t_signed_bits) SCM_UNPACK (y)))); \
a18e13a5
AW		 173 SYNC_REGISTER (); \
174 RETURN (srel (x, y)); \
b2b33168 175 }
a80be762 176
cf45ff03 177VM_DEFINE_FUNCTION (145, ee, "ee?", 2)
a80be762
KN		 178{
179 REL (==, scm_num_eq_p);
180}
181
cf45ff03 182VM_DEFINE_FUNCTION (146, lt, "lt?", 2)
a80be762
KN		 183{
184 REL (<, scm_less_p);
185}
186
cf45ff03 187VM_DEFINE_FUNCTION (147, le, "le?", 2)
a80be762
KN		 188{
189 REL (<=, scm_leq_p);
190}
191
cf45ff03 192VM_DEFINE_FUNCTION (148, gt, "gt?", 2)
a80be762
KN		 193{
194 REL (>, scm_gr_p);
195}
196
cf45ff03 197VM_DEFINE_FUNCTION (149, ge, "ge?", 2)
a80be762
KN		 198{
199 REL (>=, scm_geq_p);
200}
201
202\f
203/*
204 * Numeric functions
205 */
206
e78d4bf9 207/* The maximum/minimum tagged integers. */
0c57673a
LC		 208#undef INUM_MAX
209#undef INUM_MIN
e78d4bf9
LC		 210#define INUM_MAX (INTPTR_MAX - 1)
211#define INUM_MIN (INTPTR_MIN + scm_tc2_int)
212
a80be762 213#undef FUNC2
a18e13a5
AW		 214#define FUNC2(CFUNC,SFUNC) \
215{ \
216 ARGS2 (x, y); \
217 if (SCM_I_INUMP (x) && SCM_I_INUMP (y)) \
218 { \
219 scm_t_int64 n = SCM_I_INUM (x) CFUNC SCM_I_INUM (y);\
220 if (SCM_FIXABLE (n)) \
221 RETURN (SCM_I_MAKINUM (n)); \
222 } \
223 SYNC_REGISTER (); \
224 RETURN (SFUNC (x, y)); \
225}
a80be762 226
0c57673a
LC		 227/* Assembly tagged integer arithmetic routines. This code uses the
228 `asm goto' feature introduced in GCC 4.5. */
229
230#if defined __x86_64__ && SCM_GNUC_PREREQ (4, 5)
231
232/* The macros below check the CPU's overflow flag to improve fixnum
233 arithmetic. The %rcx register is explicitly clobbered because `asm
234 goto' can't have outputs, in which case the `r' constraint could be
235 used to let the register allocator choose a register.
236
237 TODO: Use `cold' label attribute in GCC 4.6.
238 http://gcc.gnu.org/ml/gcc-patches/2010-10/msg01777.html */
239
240# define ASM_ADD(x, y) \
241 { \
242 asm volatile goto ("mov %1, %%rcx; " \
243 "test %[tag], %%cl; je %l[slow_add]; " \
244 "test %[tag], %0; je %l[slow_add]; " \
245 "add %0, %%rcx; jo %l[slow_add]; " \
246 "sub %[tag], %%rcx; " \
247 "mov %%rcx, (%[vsp])\n" \
248 : /* no outputs */ \
249 : "r" (x), "r" (y), \
250 [vsp] "r" (sp), [tag] "i" (scm_tc2_int) \
251 : "rcx", "memory" \
252 : slow_add); \
253 NEXT; \
254 } \
255 slow_add: \
256 do { } while (0)
257
258# define ASM_SUB(x, y) \
259 { \
260 asm volatile goto ("mov %0, %%rcx; " \
261 "test %[tag], %%cl; je %l[slow_sub]; " \
262 "test %[tag], %1; je %l[slow_sub]; " \
263 "sub %1, %%rcx; jo %l[slow_sub]; " \
264 "add %[tag], %%rcx; " \
265 "mov %%rcx, (%[vsp])\n" \
266 : /* no outputs */ \
267 : "r" (x), "r" (y), \
268 [vsp] "r" (sp), [tag] "i" (scm_tc2_int) \
269 : "rcx", "memory" \
270 : slow_sub); \
271 NEXT; \
272 } \
273 slow_sub: \
274 do { } while (0)
275
276#endif
277
278
cf45ff03 279VM_DEFINE_FUNCTION (150, add, "add", 2)
a80be762 280{
0c57673a 281#ifndef ASM_ADD
a80be762 282 FUNC2 (+, scm_sum);
0c57673a
LC		 283#else
284 ARGS2 (x, y);
285 ASM_ADD (x, y);
286 SYNC_REGISTER ();
287 RETURN (scm_sum (x, y));
288#endif
a80be762
KN		 289}
290
cf45ff03 291VM_DEFINE_FUNCTION (151, add1, "add1", 1)
7382f23e
AW		 292{
293 ARGS1 (x);
e78d4bf9
LC		 294
295 /* Check for overflow. */
b2b33168 296 if (SCM_LIKELY ((scm_t_intptr) SCM_UNPACK (x) < INUM_MAX))
7382f23e 297 {
e78d4bf9
LC		 298 SCM result;
299
300 /* Add the integers without untagging. */
b2b33168
AW		 301 result = SCM_PACK ((scm_t_intptr) SCM_UNPACK (x)
302 + (scm_t_intptr) SCM_UNPACK (SCM_I_MAKINUM (1))
e78d4bf9
LC		 303 - scm_tc2_int);
304
305 if (SCM_LIKELY (SCM_I_INUMP (result)))
a18e13a5 306 RETURN (result);
7382f23e 307 }
e78d4bf9 308
7382f23e
AW		 309 SYNC_REGISTER ();
310 RETURN (scm_sum (x, SCM_I_MAKINUM (1)));
311}
312
cf45ff03 313VM_DEFINE_FUNCTION (152, sub, "sub", 2)
a80be762 314{
0c57673a 315#ifndef ASM_SUB
a80be762 316 FUNC2 (-, scm_difference);
0c57673a
LC		 317#else
318 ARGS2 (x, y);
319 ASM_SUB (x, y);
320 SYNC_REGISTER ();
321 RETURN (scm_difference (x, y));
322#endif
a80be762
KN		 323}
324
cf45ff03 325VM_DEFINE_FUNCTION (153, sub1, "sub1", 1)
7382f23e
AW		 326{
327 ARGS1 (x);
e78d4bf9
LC		 328
329 /* Check for underflow. */
b2b33168 330 if (SCM_LIKELY ((scm_t_intptr) SCM_UNPACK (x) > INUM_MIN))
7382f23e 331 {
e78d4bf9
LC		 332 SCM result;
333
334 /* Substract the integers without untagging. */
b2b33168
AW		 335 result = SCM_PACK ((scm_t_intptr) SCM_UNPACK (x)
336 - (scm_t_intptr) SCM_UNPACK (SCM_I_MAKINUM (1))
e78d4bf9
LC		 337 + scm_tc2_int);
338
339 if (SCM_LIKELY (SCM_I_INUMP (result)))
a18e13a5 340 RETURN (result);
7382f23e 341 }
e78d4bf9 342
7382f23e
AW		 343 SYNC_REGISTER ();
344 RETURN (scm_difference (x, SCM_I_MAKINUM (1)));
345}
346
0c57673a
LC		 347# undef ASM_ADD
348# undef ASM_SUB
349
cf45ff03 350VM_DEFINE_FUNCTION (154, mul, "mul", 2)
a80be762
KN		 351{
352 ARGS2 (x, y);
1865ad56 353 SYNC_REGISTER ();
a80be762
KN		 354 RETURN (scm_product (x, y));
355}
356
cf45ff03 357VM_DEFINE_FUNCTION (155, div, "div", 2)
a80be762
KN		 358{
359 ARGS2 (x, y);
1865ad56 360 SYNC_REGISTER ();
a80be762
KN		 361 RETURN (scm_divide (x, y));
362}
363
cf45ff03 364VM_DEFINE_FUNCTION (156, quo, "quo", 2)
a80be762
KN		 365{
366 ARGS2 (x, y);
1865ad56 367 SYNC_REGISTER ();
a80be762
KN		 368 RETURN (scm_quotient (x, y));
369}
370
cf45ff03 371VM_DEFINE_FUNCTION (157, rem, "rem", 2)
a80be762
KN		 372{
373 ARGS2 (x, y);
1865ad56 374 SYNC_REGISTER ();
a80be762
KN		 375 RETURN (scm_remainder (x, y));
376}
377
cf45ff03 378VM_DEFINE_FUNCTION (158, mod, "mod", 2)
a80be762
KN		 379{
380 ARGS2 (x, y);
1865ad56 381 SYNC_REGISTER ();
a80be762
KN		 382 RETURN (scm_modulo (x, y));
383}
384
cf45ff03 385VM_DEFINE_FUNCTION (159, ash, "ash", 2)
b10d9330
AW		 386{
387 ARGS2 (x, y);
388 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
389 {
390 if (SCM_I_INUM (y) < 0)
8ecd1943 391 /* Right shift, will be a fixnum. */
a18e13a5 392 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) >> -SCM_I_INUM (y)));
8ecd1943
AW		 393 else
394 /* Left shift. See comments in scm_ash. */
395 {
e25f3727 396 scm_t_signed_bits nn, bits_to_shift;
8ecd1943
AW		 397
398 nn = SCM_I_INUM (x);
399 bits_to_shift = SCM_I_INUM (y);
400
401 if (bits_to_shift < SCM_I_FIXNUM_BIT-1
e25f3727 402 && ((scm_t_bits)
8ecd1943
AW		 403 (SCM_SRS (nn, (SCM_I_FIXNUM_BIT-1 - bits_to_shift)) + 1)
404 <= 1))
a18e13a5 405 RETURN (SCM_I_MAKINUM (nn << bits_to_shift));
8ecd1943
AW		 406 /* fall through */
407 }
b10d9330
AW		 408 /* fall through */
409 }
410 SYNC_REGISTER ();
411 RETURN (scm_ash (x, y));
412}
413
cf45ff03 414VM_DEFINE_FUNCTION (160, logand, "logand", 2)
b10d9330
AW		 415{
416 ARGS2 (x, y);
a18e13a5 417 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
b10d9330 418 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) & SCM_I_INUM (y)));
a18e13a5
AW		 419 SYNC_REGISTER ();
420 RETURN (scm_logand (x, y));
b10d9330
AW		 421}
422
cf45ff03 423VM_DEFINE_FUNCTION (161, logior, "logior", 2)
b10d9330
AW		 424{
425 ARGS2 (x, y);
a18e13a5 426 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
b10d9330 427 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) | SCM_I_INUM (y)));
a18e13a5
AW		 428 SYNC_REGISTER ();
429 RETURN (scm_logior (x, y));
b10d9330
AW		 430}
431
cf45ff03 432VM_DEFINE_FUNCTION (162, logxor, "logxor", 2)
b10d9330
AW		 433{
434 ARGS2 (x, y);
a18e13a5 435 if (SCM_I_INUMP (x) && SCM_I_INUMP (y))
b10d9330 436 RETURN (SCM_I_MAKINUM (SCM_I_INUM (x) ^ SCM_I_INUM (y)));
a18e13a5
AW		 437 SYNC_REGISTER ();
438 RETURN (scm_logxor (x, y));
b10d9330
AW		 439}
440
1e4b834a
AW		 441\f
442/*
827dc8dc 443 * Vectors and arrays
1e4b834a 444 */
aec4a84a 445
cf45ff03 446VM_DEFINE_FUNCTION (163, vector_ref, "vector-ref", 2)
d6f1ce3d 447{
e25f3727 448 scm_t_signed_bits i = 0;
d6f1ce3d 449 ARGS2 (vect, idx);
7b702b53 450 if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
d6f1ce3d
AW		 451 && SCM_I_INUMP (idx)
452 && ((i = SCM_I_INUM (idx)) >= 0)
453 && i < SCM_I_VECTOR_LENGTH (vect)))
454 RETURN (SCM_I_VECTOR_ELTS (vect)[i]);
455 else
9b29d607
AW		 456 {
457 SYNC_REGISTER ();
458 RETURN (scm_vector_ref (vect, idx));
459 }
d6f1ce3d
AW		 460}
461
cf45ff03 462VM_DEFINE_INSTRUCTION (164, vector_set, "vector-set", 0, 3, 0)
d6f1ce3d 463{
e25f3727 464 scm_t_signed_bits i = 0;
d6f1ce3d 465 SCM vect, idx, val;
eae2438d 466 POP3 (val, idx, vect);
7b702b53 467 if (SCM_LIKELY (SCM_I_IS_NONWEAK_VECTOR (vect)
d6f1ce3d
AW		 468 && SCM_I_INUMP (idx)
469 && ((i = SCM_I_INUM (idx)) >= 0)
470 && i < SCM_I_VECTOR_LENGTH (vect)))
471 SCM_I_VECTOR_WELTS (vect)[i] = val;
472 else
9b29d607
AW		 473 {
474 SYNC_REGISTER ();
475 scm_vector_set_x (vect, idx, val);
476 }
d6f1ce3d
AW		 477 NEXT;
478}
479
cf45ff03 480VM_DEFINE_INSTRUCTION (165, make_array, "make-array", 3, -1, 1)
827dc8dc
AW		 481{
482 scm_t_uint32 len;
483 SCM shape, ret;
484
485 len = FETCH ();
486 len = (len << 8) + FETCH ();
487 len = (len << 8) + FETCH ();
488 POP (shape);
489 SYNC_REGISTER ();
384dce46 490 PRE_CHECK_UNDERFLOW (len);
827dc8dc
AW		 491 ret = scm_from_contiguous_array (shape, sp - len + 1, len);
492 DROPN (len);
493 PUSH (ret);
494 NEXT;
495}
496
497\f
498/*
499 * Structs
500 */
41e49280 501#define VM_VALIDATE_STRUCT(obj, proc) \
53bdfcf0 502 VM_ASSERT (SCM_STRUCTP (obj), vm_error_not_a_pair (proc, obj))
827dc8dc 503
cf45ff03 504VM_DEFINE_FUNCTION (166, struct_p, "struct?", 1)
827dc8dc
AW		 505{
506 ARGS1 (obj);
507 RETURN (scm_from_bool (SCM_STRUCTP (obj)));
508}
509
cf45ff03 510VM_DEFINE_FUNCTION (167, struct_vtable, "struct-vtable", 1)
827dc8dc
AW		 511{
512 ARGS1 (obj);
41e49280 513 VM_VALIDATE_STRUCT (obj, "struct_vtable");
827dc8dc
AW		 514 RETURN (SCM_STRUCT_VTABLE (obj));
515}
516
cf45ff03 517VM_DEFINE_INSTRUCTION (168, make_struct, "make-struct", 2, -1, 1)
827dc8dc
AW		 518{
519 unsigned h = FETCH ();
520 unsigned l = FETCH ();
9a974fd3
AW		 521 scm_t_bits n = ((h << 8U) + l);
522 SCM vtable = sp[-(n - 1)];
523 const SCM *inits = sp - n + 2;
524 SCM ret;
827dc8dc 525
9823fd39
LC		 526 SYNC_REGISTER ();
527
827dc8dc
AW		 528 if (SCM_LIKELY (SCM_STRUCTP (vtable)
529 && SCM_VTABLE_FLAG_IS_SET (vtable, SCM_VTABLE_FLAG_SIMPLE)
9a974fd3
AW		 530 && (SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size) + 1
531 == n)
532 && !SCM_VTABLE_INSTANCE_FINALIZER (vtable)))
827dc8dc 533 {
9a974fd3
AW		 534 /* Verily, we are making a simple struct with the right number of
535 initializers, and no finalizer. */
536 ret = scm_words ((scm_t_bits)SCM_STRUCT_DATA (vtable) | scm_tc3_struct,
537 n + 1);
538 SCM_SET_CELL_WORD_1 (ret, (scm_t_bits)SCM_CELL_OBJECT_LOC (ret, 2));
539 memcpy (SCM_STRUCT_DATA (ret), inits, (n - 1) * sizeof (SCM));
827dc8dc 540 }
9a974fd3
AW		 541 else
542 ret = scm_c_make_structv (vtable, 0, n - 1, (scm_t_bits *) inits);
543
c99865c1 544 DROPN (n);
9a974fd3 545 PUSH (ret);
827dc8dc 546
9a974fd3 547 NEXT;
827dc8dc
AW		 548}
549
cf45ff03 550VM_DEFINE_FUNCTION (169, struct_ref, "struct-ref", 2)
827dc8dc
AW		 551{
552 ARGS2 (obj, pos);
553
554 if (SCM_LIKELY (SCM_STRUCTP (obj)
555 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
556 SCM_VTABLE_FLAG_SIMPLE)
557 && SCM_I_INUMP (pos)))
558 {
559 SCM vtable;
560 scm_t_bits index, len;
561
e25f3727
AW		 562 /* True, an inum is a signed value, but cast to unsigned it will
563 certainly be more than the length, so we will fall through if
564 index is negative. */
827dc8dc
AW		 565 index = SCM_I_INUM (pos);
566 vtable = SCM_STRUCT_VTABLE (obj);
567 len = SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size);
568
569 if (SCM_LIKELY (index < len))
570 {
a18e13a5
AW		 571 scm_t_bits *data = SCM_STRUCT_DATA (obj);
572 RETURN (SCM_PACK (data[index]));
827dc8dc
AW		 573 }
574 }
575
9823fd39 576 SYNC_REGISTER ();
827dc8dc
AW		 577 RETURN (scm_struct_ref (obj, pos));
578}
579
cf45ff03 580VM_DEFINE_FUNCTION (170, struct_set, "struct-set", 3)
827dc8dc
AW		 581{
582 ARGS3 (obj, pos, val);
583
584 if (SCM_LIKELY (SCM_STRUCTP (obj)
585 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
586 SCM_VTABLE_FLAG_SIMPLE)
587 && SCM_STRUCT_VTABLE_FLAG_IS_SET (obj,
588 SCM_VTABLE_FLAG_SIMPLE_RW)
589 && SCM_I_INUMP (pos)))
590 {
591 SCM vtable;
592 scm_t_bits index, len;
593
e25f3727 594 /* See above regarding index being >= 0. */
827dc8dc
AW		 595 index = SCM_I_INUM (pos);
596 vtable = SCM_STRUCT_VTABLE (obj);
597 len = SCM_STRUCT_DATA_REF (vtable, scm_vtable_index_size);
598 if (SCM_LIKELY (index < len))
599 {
a18e13a5
AW		 600 scm_t_bits *data = SCM_STRUCT_DATA (obj);
601 data[index] = SCM_UNPACK (val);
602 RETURN (val);
827dc8dc
AW		 603 }
604 }
605
9823fd39 606 SYNC_REGISTER ();
827dc8dc
AW		 607 RETURN (scm_struct_set_x (obj, pos, val));
608}
609
610\f
611/*
612 * GOOPS support
613 */
cf45ff03 614VM_DEFINE_FUNCTION (171, class_of, "class-of", 1)
827dc8dc
AW		 615{
616 ARGS1 (obj);
1a461493
AW		 617 if (SCM_INSTANCEP (obj))
618 RETURN (SCM_CLASS_OF (obj));
a18e13a5
AW		 619 SYNC_REGISTER ();
620 RETURN (scm_class_of (obj));
827dc8dc
AW		 621}
622
e25f3727 623/* FIXME: No checking whatsoever. */
cf45ff03 624VM_DEFINE_FUNCTION (172, slot_ref, "slot-ref", 2)
827dc8dc
AW		 625{
626 size_t slot;
627 ARGS2 (instance, idx);
628 slot = SCM_I_INUM (idx);
629 RETURN (SCM_PACK (SCM_STRUCT_DATA (instance) [slot]));
630}
631
e25f3727 632/* FIXME: No checking whatsoever. */
cf45ff03 633VM_DEFINE_INSTRUCTION (173, slot_set, "slot-set", 0, 3, 0)
827dc8dc
AW		 634{
635 SCM instance, idx, val;
636 size_t slot;
eae2438d 637 POP3 (val, idx, instance);
827dc8dc
AW		 638 slot = SCM_I_INUM (idx);
639 SCM_STRUCT_DATA (instance) [slot] = SCM_UNPACK (val);
640 NEXT;
641}
642
643\f
644/*
645 * Bytevectors
646 */
41e49280 647#define VM_VALIDATE_BYTEVECTOR(x, proc) \
53bdfcf0 648 VM_ASSERT (SCM_BYTEVECTOR_P (x), vm_error_not_a_bytevector (proc, x))
e6eb2467
AW		 649
650#define BV_REF_WITH_ENDIANNESS(stem, fn_stem) \
651{ \
652 SCM endianness; \
653 POP (endianness); \
654 if (scm_is_eq (endianness, scm_i_native_endianness)) \
a39b116f 655 goto VM_LABEL (bv_##stem##_native_ref); \
e6eb2467
AW		 656 { \
657 ARGS2 (bv, idx); \
9823fd39 658 SYNC_REGISTER (); \
e6eb2467
AW		 659 RETURN (scm_bytevector_##fn_stem##_ref (bv, idx, endianness)); \
660 } \
661}
662
daccfef4
LC		 663/* Return true (non-zero) if PTR has suitable alignment for TYPE. */
664#define ALIGNED_P(ptr, type) \
1002c774 665 ((scm_t_uintptr) (ptr) % alignof_type (type) == 0)
daccfef4 666
cf45ff03 667VM_DEFINE_FUNCTION (174, bv_u16_ref, "bv-u16-ref", 3)
e6eb2467 668BV_REF_WITH_ENDIANNESS (u16, u16)
cf45ff03 669VM_DEFINE_FUNCTION (175, bv_s16_ref, "bv-s16-ref", 3)
e6eb2467 670BV_REF_WITH_ENDIANNESS (s16, s16)
cf45ff03 671VM_DEFINE_FUNCTION (176, bv_u32_ref, "bv-u32-ref", 3)
e6eb2467 672BV_REF_WITH_ENDIANNESS (u32, u32)
cf45ff03 673VM_DEFINE_FUNCTION (177, bv_s32_ref, "bv-s32-ref", 3)
e6eb2467 674BV_REF_WITH_ENDIANNESS (s32, s32)
cf45ff03 675VM_DEFINE_FUNCTION (178, bv_u64_ref, "bv-u64-ref", 3)
e6eb2467 676BV_REF_WITH_ENDIANNESS (u64, u64)
cf45ff03 677VM_DEFINE_FUNCTION (179, bv_s64_ref, "bv-s64-ref", 3)
e6eb2467 678BV_REF_WITH_ENDIANNESS (s64, s64)
cf45ff03 679VM_DEFINE_FUNCTION (180, bv_f32_ref, "bv-f32-ref", 3)
e6eb2467 680BV_REF_WITH_ENDIANNESS (f32, ieee_single)
cf45ff03 681VM_DEFINE_FUNCTION (181, bv_f64_ref, "bv-f64-ref", 3)
e6eb2467
AW		 682BV_REF_WITH_ENDIANNESS (f64, ieee_double)
683
684#undef BV_REF_WITH_ENDIANNESS
685
9823fd39
LC		 686#define BV_FIXABLE_INT_REF(stem, fn_stem, type, size) \
687{ \
e25f3727 688 scm_t_signed_bits i; \
daccfef4 689 const scm_t_ ## type *int_ptr; \
9823fd39 690 ARGS2 (bv, idx); \
daccfef4 691 \
41e49280 692 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 693 i = SCM_I_INUM (idx); \
694 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
695 \
9823fd39 696 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 697 && (i >= 0) \
9823fd39 698 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4 699 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
a18e13a5 700 RETURN (SCM_I_MAKINUM (*int_ptr)); \
9823fd39
LC		 701 else \
702 { \
703 SYNC_REGISTER (); \
a18e13a5 704 RETURN (scm_bytevector_ ## fn_stem ## _ref (bv, idx)); \
9823fd39
LC		 705 } \
706}
707
708#define BV_INT_REF(stem, type, size) \
709{ \
e25f3727 710 scm_t_signed_bits i; \
daccfef4 711 const scm_t_ ## type *int_ptr; \
9823fd39 712 ARGS2 (bv, idx); \
daccfef4 713 \
41e49280 714 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 715 i = SCM_I_INUM (idx); \
716 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
717 \
9823fd39 718 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 719 && (i >= 0) \
9823fd39 720 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC		 721 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
722 { \
723 scm_t_ ## type x = *int_ptr; \
9823fd39
LC		 724 if (SCM_FIXABLE (x)) \
725 RETURN (SCM_I_MAKINUM (x)); \
726 else \
727 { \
728 SYNC_REGISTER (); \
729 RETURN (scm_from_ ## type (x)); \
730 } \
731 } \
732 else \
733 { \
734 SYNC_REGISTER (); \
735 RETURN (scm_bytevector_ ## stem ## _native_ref (bv, idx)); \
736 } \
737}
738
739#define BV_FLOAT_REF(stem, fn_stem, type, size) \
740{ \
e25f3727 741 scm_t_signed_bits i; \
daccfef4 742 const type *float_ptr; \
9823fd39 743 ARGS2 (bv, idx); \
daccfef4 744 \
41e49280 745 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-ref"); \
daccfef4
LC		 746 i = SCM_I_INUM (idx); \
747 float_ptr = (type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
748 \
9823fd39
LC		 749 SYNC_REGISTER (); \
750 if (SCM_LIKELY (SCM_I_INUMP (idx) \
daccfef4 751 && (i >= 0) \
9823fd39 752 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
daccfef4
LC		 753 && (ALIGNED_P (float_ptr, type)))) \
754 RETURN (scm_from_double (*float_ptr)); \
9823fd39
LC		 755 else \
756 RETURN (scm_bytevector_ ## fn_stem ## _native_ref (bv, idx)); \
e6eb2467
AW		 757}
758
cf45ff03 759VM_DEFINE_FUNCTION (182, bv_u8_ref, "bv-u8-ref", 2)
e6eb2467 760BV_FIXABLE_INT_REF (u8, u8, uint8, 1)
cf45ff03 761VM_DEFINE_FUNCTION (183, bv_s8_ref, "bv-s8-ref", 2)
e6eb2467 762BV_FIXABLE_INT_REF (s8, s8, int8, 1)
cf45ff03 763VM_DEFINE_FUNCTION (184, bv_u16_native_ref, "bv-u16-native-ref", 2)
e6eb2467 764BV_FIXABLE_INT_REF (u16, u16_native, uint16, 2)
cf45ff03 765VM_DEFINE_FUNCTION (185, bv_s16_native_ref, "bv-s16-native-ref", 2)
e6eb2467 766BV_FIXABLE_INT_REF (s16, s16_native, int16, 2)
cf45ff03 767VM_DEFINE_FUNCTION (186, bv_u32_native_ref, "bv-u32-native-ref", 2)
dddacb23
LC		 768#if SIZEOF_VOID_P > 4
769BV_FIXABLE_INT_REF (u32, u32_native, uint32, 4)
770#else
e6eb2467 771BV_INT_REF (u32, uint32, 4)
dddacb23 772#endif
cf45ff03 773VM_DEFINE_FUNCTION (187, bv_s32_native_ref, "bv-s32-native-ref", 2)
dddacb23
LC		 774#if SIZEOF_VOID_P > 4
775BV_FIXABLE_INT_REF (s32, s32_native, int32, 4)
776#else
e6eb2467 777BV_INT_REF (s32, int32, 4)
dddacb23 778#endif
cf45ff03 779VM_DEFINE_FUNCTION (188, bv_u64_native_ref, "bv-u64-native-ref", 2)
e6eb2467 780BV_INT_REF (u64, uint64, 8)
cf45ff03 781VM_DEFINE_FUNCTION (189, bv_s64_native_ref, "bv-s64-native-ref", 2)
e6eb2467 782BV_INT_REF (s64, int64, 8)
cf45ff03 783VM_DEFINE_FUNCTION (190, bv_f32_native_ref, "bv-f32-native-ref", 2)
e6eb2467 784BV_FLOAT_REF (f32, ieee_single, float, 4)
cf45ff03 785VM_DEFINE_FUNCTION (191, bv_f64_native_ref, "bv-f64-native-ref", 2)
e6eb2467
AW		 786BV_FLOAT_REF (f64, ieee_double, double, 8)
787
788#undef BV_FIXABLE_INT_REF
789#undef BV_INT_REF
790#undef BV_FLOAT_REF
791
792
793
794#define BV_SET_WITH_ENDIANNESS(stem, fn_stem) \
795{ \
796 SCM endianness; \
797 POP (endianness); \
798 if (scm_is_eq (endianness, scm_i_native_endianness)) \
a39b116f 799 goto VM_LABEL (bv_##stem##_native_set); \
e6eb2467 800 { \
eae2438d 801 SCM bv, idx, val; POP3 (val, idx, bv); \
ad301b6d 802 SYNC_REGISTER (); \
d6f1ce3d
AW		 803 scm_bytevector_##fn_stem##_set_x (bv, idx, val, endianness); \
804 NEXT; \
e6eb2467
AW		 805 } \
806}
807
cf45ff03 808VM_DEFINE_INSTRUCTION (192, bv_u16_set, "bv-u16-set", 0, 4, 0)
e6eb2467 809BV_SET_WITH_ENDIANNESS (u16, u16)
cf45ff03 810VM_DEFINE_INSTRUCTION (193, bv_s16_set, "bv-s16-set", 0, 4, 0)
e6eb2467 811BV_SET_WITH_ENDIANNESS (s16, s16)
cf45ff03 812VM_DEFINE_INSTRUCTION (194, bv_u32_set, "bv-u32-set", 0, 4, 0)
e6eb2467 813BV_SET_WITH_ENDIANNESS (u32, u32)
cf45ff03 814VM_DEFINE_INSTRUCTION (195, bv_s32_set, "bv-s32-set", 0, 4, 0)
e6eb2467 815BV_SET_WITH_ENDIANNESS (s32, s32)
cf45ff03 816VM_DEFINE_INSTRUCTION (196, bv_u64_set, "bv-u64-set", 0, 4, 0)
e6eb2467 817BV_SET_WITH_ENDIANNESS (u64, u64)
cf45ff03 818VM_DEFINE_INSTRUCTION (197, bv_s64_set, "bv-s64-set", 0, 4, 0)
e6eb2467 819BV_SET_WITH_ENDIANNESS (s64, s64)
cf45ff03 820VM_DEFINE_INSTRUCTION (198, bv_f32_set, "bv-f32-set", 0, 4, 0)
e6eb2467 821BV_SET_WITH_ENDIANNESS (f32, ieee_single)
cf45ff03 822VM_DEFINE_INSTRUCTION (199, bv_f64_set, "bv-f64-set", 0, 4, 0)
e6eb2467
AW		 823BV_SET_WITH_ENDIANNESS (f64, ieee_double)
824
825#undef BV_SET_WITH_ENDIANNESS
826
daccfef4
LC		 827#define BV_FIXABLE_INT_SET(stem, fn_stem, type, min, max, size) \
828{ \
e25f3727 829 scm_t_signed_bits i, j = 0; \
daccfef4
LC		 830 SCM bv, idx, val; \
831 scm_t_ ## type *int_ptr; \
832 \
eae2438d 833 POP3 (val, idx, bv); \
41e49280 834 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC		 835 i = SCM_I_INUM (idx); \
836 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
837 \
838 if (SCM_LIKELY (SCM_I_INUMP (idx) \
839 && (i >= 0) \
840 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
841 && (ALIGNED_P (int_ptr, scm_t_ ## type)) \
842 && (SCM_I_INUMP (val)) \
843 && ((j = SCM_I_INUM (val)) >= min) \
844 && (j <= max))) \
845 *int_ptr = (scm_t_ ## type) j; \
846 else \
ad301b6d
AW		 847 { \
848 SYNC_REGISTER (); \
849 scm_bytevector_ ## fn_stem ## _set_x (bv, idx, val); \
850 } \
daccfef4
LC		 851 NEXT; \
852}
853
854#define BV_INT_SET(stem, type, size) \
855{ \
e25f3727 856 scm_t_signed_bits i = 0; \
daccfef4
LC		 857 SCM bv, idx, val; \
858 scm_t_ ## type *int_ptr; \
859 \
eae2438d 860 POP3 (val, idx, bv); \
41e49280 861 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
daccfef4
LC		 862 i = SCM_I_INUM (idx); \
863 int_ptr = (scm_t_ ## type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
864 \
865 if (SCM_LIKELY (SCM_I_INUMP (idx) \
866 && (i >= 0) \
867 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
868 && (ALIGNED_P (int_ptr, scm_t_ ## type)))) \
869 *int_ptr = scm_to_ ## type (val); \
870 else \
ad301b6d
AW		 871 { \
872 SYNC_REGISTER (); \
873 scm_bytevector_ ## stem ## _native_set_x (bv, idx, val); \
874 } \
875 NEXT; \
daccfef4
LC		 876}
877
ad301b6d
AW		 878#define BV_FLOAT_SET(stem, fn_stem, type, size) \
879{ \
880 scm_t_signed_bits i = 0; \
881 SCM bv, idx, val; \
882 type *float_ptr; \
883 \
eae2438d 884 POP3 (val, idx, bv); \
ad301b6d
AW		 885 VM_VALIDATE_BYTEVECTOR (bv, "bv-" #stem "-set"); \
886 i = SCM_I_INUM (idx); \
887 float_ptr = (type *) (SCM_BYTEVECTOR_CONTENTS (bv) + i); \
888 \
889 if (SCM_LIKELY (SCM_I_INUMP (idx) \
890 && (i >= 0) \
891 && (i + size <= SCM_BYTEVECTOR_LENGTH (bv)) \
892 && (ALIGNED_P (float_ptr, type)))) \
893 *float_ptr = scm_to_double (val); \
894 else \
895 { \
896 SYNC_REGISTER (); \
897 scm_bytevector_ ## fn_stem ## _native_set_x (bv, idx, val); \
898 } \
899 NEXT; \
e6eb2467
AW		 900}
901
cf45ff03 902VM_DEFINE_INSTRUCTION (200, bv_u8_set, "bv-u8-set", 0, 3, 0)
e6eb2467 903BV_FIXABLE_INT_SET (u8, u8, uint8, 0, SCM_T_UINT8_MAX, 1)
cf45ff03 904VM_DEFINE_INSTRUCTION (201, bv_s8_set, "bv-s8-set", 0, 3, 0)
e6eb2467 905BV_FIXABLE_INT_SET (s8, s8, int8, SCM_T_INT8_MIN, SCM_T_INT8_MAX, 1)
cf45ff03 906VM_DEFINE_INSTRUCTION (202, bv_u16_native_set, "bv-u16-native-set", 0, 3, 0)
d6f1ce3d 907BV_FIXABLE_INT_SET (u16, u16_native, uint16, 0, SCM_T_UINT16_MAX, 2)
cf45ff03 908VM_DEFINE_INSTRUCTION (203, bv_s16_native_set, "bv-s16-native-set", 0, 3, 0)
d6f1ce3d 909BV_FIXABLE_INT_SET (s16, s16_native, int16, SCM_T_INT16_MIN, SCM_T_INT16_MAX, 2)
cf45ff03 910VM_DEFINE_INSTRUCTION (204, bv_u32_native_set, "bv-u32-native-set", 0, 3, 0)
dddacb23
LC		 911#if SIZEOF_VOID_P > 4
912BV_FIXABLE_INT_SET (u32, u32_native, uint32, 0, SCM_T_UINT32_MAX, 4)
913#else
e6eb2467 914BV_INT_SET (u32, uint32, 4)
dddacb23 915#endif
cf45ff03 916VM_DEFINE_INSTRUCTION (205, bv_s32_native_set, "bv-s32-native-set", 0, 3, 0)
dddacb23
LC		 917#if SIZEOF_VOID_P > 4
918BV_FIXABLE_INT_SET (s32, s32_native, int32, SCM_T_INT32_MIN, SCM_T_INT32_MAX, 4)
919#else
e6eb2467 920BV_INT_SET (s32, int32, 4)
dddacb23 921#endif
cf45ff03 922VM_DEFINE_INSTRUCTION (206, bv_u64_native_set, "bv-u64-native-set", 0, 3, 0)
e6eb2467 923BV_INT_SET (u64, uint64, 8)
cf45ff03 924VM_DEFINE_INSTRUCTION (207, bv_s64_native_set, "bv-s64-native-set", 0, 3, 0)
e6eb2467 925BV_INT_SET (s64, int64, 8)
cf45ff03 926VM_DEFINE_INSTRUCTION (208, bv_f32_native_set, "bv-f32-native-set", 0, 3, 0)
e6eb2467 927BV_FLOAT_SET (f32, ieee_single, float, 4)
cf45ff03 928VM_DEFINE_INSTRUCTION (209, bv_f64_native_set, "bv-f64-native-set", 0, 3, 0)
e6eb2467
AW		 929BV_FLOAT_SET (f64, ieee_double, double, 8)
930
931#undef BV_FIXABLE_INT_SET
932#undef BV_INT_SET
933#undef BV_FLOAT_SET
934
53e28ed9
AW		 935/*
936(defun renumber-ops ()
937 "start from top of buffer and renumber 'VM_DEFINE_FOO (\n' sequences"
938 (interactive "")
939 (save-excursion
827dc8dc 940 (let ((counter 127)) (goto-char (point-min))
53e28ed9
AW		 941 (while (re-search-forward "^VM_DEFINE_[^ ]+ (\\([^,]+\\)," (point-max) t)
942 (replace-match
943 (number-to-string (setq counter (1+ counter)))
944 t t nil 1)))))
945*/
1e4b834a 946
17e90c5e
KN		 947/*
948 Local Variables:
949 c-file-style: "gnu"
950 End:
951*/
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