Commit | Line | Data |
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1be43e12 C |
1 | /* |
2 | * | |
3 | * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400 | |
4 | * | |
5 | * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz> | |
6 | * | |
7 | * Portions Copyright (c) 2001 Matrox Graphics Inc. | |
8 | * | |
9 | * Version: 1.65 2002/08/14 | |
10 | * | |
11 | * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org> | |
12 | * | |
13 | * Contributors: "menion?" <menion@mindless.com> | |
14 | * Betatesting, fixes, ideas | |
15 | * | |
16 | * "Kurt Garloff" <garloff@suse.de> | |
17 | * Betatesting, fixes, ideas, videomodes, videomodes timmings | |
18 | * | |
19 | * "Tom Rini" <trini@kernel.crashing.org> | |
20 | * MTRR stuff, PPC cleanups, betatesting, fixes, ideas | |
21 | * | |
22 | * "Bibek Sahu" <scorpio@dodds.net> | |
23 | * Access device through readb|w|l and write b|w|l | |
24 | * Extensive debugging stuff | |
25 | * | |
26 | * "Daniel Haun" <haund@usa.net> | |
27 | * Testing, hardware cursor fixes | |
28 | * | |
29 | * "Scott Wood" <sawst46+@pitt.edu> | |
30 | * Fixes | |
31 | * | |
32 | * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de> | |
33 | * Betatesting | |
34 | * | |
35 | * "Kelly French" <targon@hazmat.com> | |
36 | * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es> | |
37 | * Betatesting, bug reporting | |
38 | * | |
39 | * "Pablo Bianucci" <pbian@pccp.com.ar> | |
40 | * Fixes, ideas, betatesting | |
41 | * | |
42 | * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es> | |
43 | * Fixes, enhandcements, ideas, betatesting | |
44 | * | |
45 | * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp> | |
46 | * PPC betatesting, PPC support, backward compatibility | |
47 | * | |
48 | * "Paul Womar" <Paul@pwomar.demon.co.uk> | |
49 | * "Owen Waller" <O.Waller@ee.qub.ac.uk> | |
50 | * PPC betatesting | |
51 | * | |
52 | * "Thomas Pornin" <pornin@bolet.ens.fr> | |
53 | * Alpha betatesting | |
54 | * | |
55 | * "Pieter van Leuven" <pvl@iae.nl> | |
56 | * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de> | |
57 | * G100 testing | |
58 | * | |
59 | * "H. Peter Arvin" <hpa@transmeta.com> | |
60 | * Ideas | |
61 | * | |
62 | * "Cort Dougan" <cort@cs.nmt.edu> | |
63 | * CHRP fixes and PReP cleanup | |
64 | * | |
65 | * "Mark Vojkovich" <mvojkovi@ucsd.edu> | |
66 | * G400 support | |
67 | * | |
68 | * "Samuel Hocevar" <sam@via.ecp.fr> | |
69 | * Fixes | |
70 | * | |
71 | * "Anton Altaparmakov" <AntonA@bigfoot.com> | |
72 | * G400 MAX/non-MAX distinction | |
73 | * | |
74 | * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com> | |
75 | * memtype extension (needed for GXT130P RS/6000 adapter) | |
76 | * | |
77 | * "Uns Lider" <unslider@miranda.org> | |
78 | * G100 PLNWT fixes | |
79 | * | |
80 | * "Denis Zaitsev" <zzz@cd-club.ru> | |
81 | * Fixes | |
82 | * | |
83 | * "Mike Pieper" <mike@pieper-family.de> | |
84 | * TVOut enhandcements, V4L2 control interface. | |
85 | * | |
86 | * "Diego Biurrun" <diego@biurrun.de> | |
87 | * DFP testing | |
88 | * | |
89 | * (following author is not in any relation with this code, but his code | |
90 | * is included in this driver) | |
91 | * | |
92 | * Based on framebuffer driver for VBE 2.0 compliant graphic boards | |
93 | * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> | |
94 | * | |
95 | * (following author is not in any relation with this code, but his ideas | |
96 | * were used when writing this driver) | |
97 | * | |
98 | * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> | |
99 | * | |
100 | */ | |
101 | ||
102 | #include <linux/version.h> | |
103 | ||
104 | #define __OLD_VIDIOC_ | |
105 | ||
106 | #include "matroxfb_base.h" | |
107 | #include "matroxfb_misc.h" | |
108 | #include "matroxfb_accel.h" | |
109 | #include "matroxfb_DAC1064.h" | |
110 | #include "matroxfb_Ti3026.h" | |
111 | #include "matroxfb_maven.h" | |
112 | #include "matroxfb_crtc2.h" | |
113 | #include "matroxfb_g450.h" | |
114 | #include <linux/matroxfb.h> | |
115 | #include <linux/interrupt.h> | |
116 | #include <linux/uaccess.h> | |
117 | ||
118 | #ifdef CONFIG_PPC_PMAC | |
119 | #include <asm/machdep.h> | |
120 | unsigned char nvram_read_byte(int); | |
121 | static int default_vmode = VMODE_NVRAM; | |
122 | static int default_cmode = CMODE_NVRAM; | |
123 | #endif | |
124 | ||
125 | static void matroxfb_unregister_device(struct matrox_fb_info* minfo); | |
126 | ||
127 | /* --------------------------------------------------------------------- */ | |
128 | ||
129 | /* | |
130 | * card parameters | |
131 | */ | |
132 | ||
133 | /* --------------------------------------------------------------------- */ | |
134 | ||
135 | static struct fb_var_screeninfo vesafb_defined = { | |
136 | 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/ | |
137 | 0,0, /* virtual -> visible no offset */ | |
138 | 8, /* depth -> load bits_per_pixel */ | |
139 | 0, /* greyscale ? */ | |
140 | {0,0,0}, /* R */ | |
141 | {0,0,0}, /* G */ | |
142 | {0,0,0}, /* B */ | |
143 | {0,0,0}, /* transparency */ | |
144 | 0, /* standard pixel format */ | |
145 | FB_ACTIVATE_NOW, | |
146 | -1,-1, | |
147 | FB_ACCELF_TEXT, /* accel flags */ | |
148 | 39721L,48L,16L,33L,10L, | |
149 | 96L,2L,~0, /* No sync info */ | |
150 | FB_VMODE_NONINTERLACED, | |
151 | 0, {0,0,0,0,0} | |
152 | }; | |
153 | ||
154 | ||
155 | ||
156 | /* --------------------------------------------------------------------- */ | |
157 | static void update_crtc2(WPMINFO unsigned int pos) { | |
158 | struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info); | |
159 | ||
160 | /* Make sure that displays are compatible */ | |
161 | if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel) | |
162 | && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual) | |
163 | && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length) | |
164 | ) { | |
165 | switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) { | |
166 | case 16: | |
167 | case 32: | |
168 | pos = pos * 8; | |
169 | if (info->interlaced) { | |
170 | mga_outl(0x3C2C, pos); | |
171 | mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8); | |
172 | } else { | |
173 | mga_outl(0x3C28, pos); | |
174 | } | |
175 | break; | |
176 | } | |
177 | } | |
178 | } | |
179 | ||
180 | static void matroxfb_crtc1_panpos(WPMINFO2) { | |
181 | if (ACCESS_FBINFO(crtc1.panpos) >= 0) { | |
182 | unsigned long flags; | |
183 | int panpos; | |
184 | ||
185 | matroxfb_DAC_lock_irqsave(flags); | |
186 | panpos = ACCESS_FBINFO(crtc1.panpos); | |
187 | if (panpos >= 0) { | |
188 | unsigned int extvga_reg; | |
189 | ||
190 | ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */ | |
191 | extvga_reg = mga_inb(M_EXTVGA_INDEX); | |
192 | mga_setr(M_EXTVGA_INDEX, 0x00, panpos); | |
193 | if (extvga_reg != 0x00) { | |
194 | mga_outb(M_EXTVGA_INDEX, extvga_reg); | |
195 | } | |
196 | } | |
197 | matroxfb_DAC_unlock_irqrestore(flags); | |
198 | } | |
199 | } | |
200 | ||
201 | static irqreturn_t matrox_irq(int irq, void *dev_id) | |
202 | { | |
203 | u_int32_t status; | |
204 | int handled = 0; | |
205 | ||
206 | MINFO_FROM(dev_id); | |
207 | ||
208 | status = mga_inl(M_STATUS); | |
209 | ||
210 | if (status & 0x20) { | |
211 | mga_outl(M_ICLEAR, 0x20); | |
212 | ACCESS_FBINFO(crtc1.vsync.cnt)++; | |
213 | matroxfb_crtc1_panpos(PMINFO2); | |
214 | wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait)); | |
215 | handled = 1; | |
216 | } | |
217 | if (status & 0x200) { | |
218 | mga_outl(M_ICLEAR, 0x200); | |
219 | ACCESS_FBINFO(crtc2.vsync.cnt)++; | |
220 | wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait)); | |
221 | handled = 1; | |
222 | } | |
223 | return IRQ_RETVAL(handled); | |
224 | } | |
225 | ||
226 | int matroxfb_enable_irq(WPMINFO int reenable) { | |
227 | u_int32_t bm; | |
228 | ||
229 | if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) | |
230 | bm = 0x220; | |
231 | else | |
232 | bm = 0x020; | |
233 | ||
234 | if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) { | |
235 | if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq, | |
236 | IRQF_SHARED, "matroxfb", MINFO)) { | |
237 | clear_bit(0, &ACCESS_FBINFO(irq_flags)); | |
238 | return -EINVAL; | |
239 | } | |
240 | /* Clear any pending field interrupts */ | |
241 | mga_outl(M_ICLEAR, bm); | |
242 | mga_outl(M_IEN, mga_inl(M_IEN) | bm); | |
243 | } else if (reenable) { | |
244 | u_int32_t ien; | |
245 | ||
246 | ien = mga_inl(M_IEN); | |
247 | if ((ien & bm) != bm) { | |
248 | printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien); | |
249 | mga_outl(M_IEN, ien | bm); | |
250 | } | |
251 | } | |
252 | return 0; | |
253 | } | |
254 | ||
255 | static void matroxfb_disable_irq(WPMINFO2) { | |
256 | if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) { | |
257 | /* Flush pending pan-at-vbl request... */ | |
258 | matroxfb_crtc1_panpos(PMINFO2); | |
259 | if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) | |
260 | mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220); | |
261 | else | |
262 | mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20); | |
263 | free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO); | |
264 | } | |
265 | } | |
266 | ||
267 | int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) { | |
268 | struct matrox_vsync *vs; | |
269 | unsigned int cnt; | |
270 | int ret; | |
271 | ||
272 | switch (crtc) { | |
273 | case 0: | |
274 | vs = &ACCESS_FBINFO(crtc1.vsync); | |
275 | break; | |
276 | case 1: | |
277 | if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) { | |
278 | return -ENODEV; | |
279 | } | |
280 | vs = &ACCESS_FBINFO(crtc2.vsync); | |
281 | break; | |
282 | default: | |
283 | return -ENODEV; | |
284 | } | |
285 | ret = matroxfb_enable_irq(PMINFO 0); | |
286 | if (ret) { | |
287 | return ret; | |
288 | } | |
289 | ||
290 | cnt = vs->cnt; | |
291 | ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10); | |
292 | if (ret < 0) { | |
293 | return ret; | |
294 | } | |
295 | if (ret == 0) { | |
296 | matroxfb_enable_irq(PMINFO 1); | |
297 | return -ETIMEDOUT; | |
298 | } | |
299 | return 0; | |
300 | } | |
301 | ||
302 | /* --------------------------------------------------------------------- */ | |
303 | ||
304 | static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) { | |
305 | unsigned int pos; | |
306 | unsigned short p0, p1, p2; | |
307 | #ifdef CONFIG_FB_MATROX_32MB | |
308 | unsigned int p3; | |
309 | #endif | |
310 | int vbl; | |
311 | unsigned long flags; | |
312 | ||
313 | CRITFLAGS | |
314 | ||
315 | DBG(__FUNCTION__) | |
316 | ||
317 | if (ACCESS_FBINFO(dead)) | |
318 | return; | |
319 | ||
320 | ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset; | |
321 | ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset; | |
322 | pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32; | |
323 | pos += ACCESS_FBINFO(curr.ydstorg.chunks); | |
324 | p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF; | |
325 | p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8; | |
326 | p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); | |
327 | #ifdef CONFIG_FB_MATROX_32MB | |
328 | p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21; | |
329 | #endif | |
330 | ||
331 | /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */ | |
332 | vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0); | |
333 | ||
334 | CRITBEGIN | |
335 | ||
336 | matroxfb_DAC_lock_irqsave(flags); | |
337 | mga_setr(M_CRTC_INDEX, 0x0D, p0); | |
338 | mga_setr(M_CRTC_INDEX, 0x0C, p1); | |
339 | #ifdef CONFIG_FB_MATROX_32MB | |
340 | if (ACCESS_FBINFO(devflags.support32MB)) | |
341 | mga_setr(M_EXTVGA_INDEX, 0x08, p3); | |
342 | #endif | |
343 | if (vbl) { | |
344 | ACCESS_FBINFO(crtc1.panpos) = p2; | |
345 | } else { | |
346 | /* Abort any pending change */ | |
347 | ACCESS_FBINFO(crtc1.panpos) = -1; | |
348 | mga_setr(M_EXTVGA_INDEX, 0x00, p2); | |
349 | } | |
350 | matroxfb_DAC_unlock_irqrestore(flags); | |
351 | ||
352 | update_crtc2(PMINFO pos); | |
353 | ||
354 | CRITEND | |
355 | } | |
356 | ||
357 | static void matroxfb_remove(WPMINFO int dummy) { | |
358 | /* Currently we are holding big kernel lock on all dead & usecount updates. | |
359 | * Destroy everything after all users release it. Especially do not unregister | |
360 | * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check | |
361 | * for device unplugged when in use. | |
362 | * In future we should point mmio.vbase & video.vbase somewhere where we can | |
363 | * write data without causing too much damage... | |
364 | */ | |
365 | ||
366 | ACCESS_FBINFO(dead) = 1; | |
367 | if (ACCESS_FBINFO(usecount)) { | |
368 | /* destroy it later */ | |
369 | return; | |
370 | } | |
371 | matroxfb_unregister_device(MINFO); | |
372 | unregister_framebuffer(&ACCESS_FBINFO(fbcon)); | |
373 | matroxfb_g450_shutdown(PMINFO2); | |
374 | #ifdef CONFIG_MTRR | |
375 | if (ACCESS_FBINFO(mtrr.vram_valid)) | |
376 | mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len)); | |
377 | #endif | |
378 | mga_iounmap(ACCESS_FBINFO(mmio.vbase)); | |
379 | mga_iounmap(ACCESS_FBINFO(video.vbase)); | |
380 | release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum)); | |
381 | release_mem_region(ACCESS_FBINFO(mmio.base), 16384); | |
382 | #ifdef CONFIG_FB_MATROX_MULTIHEAD | |
383 | kfree(minfo); | |
384 | #endif | |
385 | } | |
386 | ||
387 | /* | |
388 | * Open/Release the frame buffer device | |
389 | */ | |
390 | ||
391 | static int matroxfb_open(struct fb_info *info, int user) | |
392 | { | |
393 | MINFO_FROM_INFO(info); | |
394 | ||
395 | DBG_LOOP(__FUNCTION__) | |
396 | ||
397 | if (ACCESS_FBINFO(dead)) { | |
398 | return -ENXIO; | |
399 | } | |
400 | ACCESS_FBINFO(usecount)++; | |
401 | if (user) { | |
402 | ACCESS_FBINFO(userusecount)++; | |
403 | } | |
404 | return(0); | |
405 | } | |
406 | ||
407 | static int matroxfb_release(struct fb_info *info, int user) | |
408 | { | |
409 | MINFO_FROM_INFO(info); | |
410 | ||
411 | DBG_LOOP(__FUNCTION__) | |
412 | ||
413 | if (user) { | |
414 | if (0 == --ACCESS_FBINFO(userusecount)) { | |
415 | matroxfb_disable_irq(PMINFO2); | |
416 | } | |
417 | } | |
418 | if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) { | |
419 | matroxfb_remove(PMINFO 0); | |
420 | } | |
421 | return(0); | |
422 | } | |
423 | ||
424 | static int matroxfb_pan_display(struct fb_var_screeninfo *var, | |
425 | struct fb_info* info) { | |
426 | MINFO_FROM_INFO(info); | |
427 | ||
428 | DBG(__FUNCTION__) | |
429 | ||
430 | matrox_pan_var(PMINFO var); | |
431 | return 0; | |
432 | } | |
433 | ||
434 | static int matroxfb_get_final_bppShift(CPMINFO int bpp) { | |
435 | int bppshft2; | |
436 | ||
437 | DBG(__FUNCTION__) | |
438 | ||
439 | bppshft2 = bpp; | |
440 | if (!bppshft2) { | |
441 | return 8; | |
442 | } | |
443 | if (isInterleave(MINFO)) | |
444 | bppshft2 >>= 1; | |
445 | if (ACCESS_FBINFO(devflags.video64bits)) | |
446 | bppshft2 >>= 1; | |
447 | return bppshft2; | |
448 | } | |
449 | ||
450 | static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) { | |
451 | int over; | |
452 | int rounding; | |
453 | ||
454 | DBG(__FUNCTION__) | |
455 | ||
456 | switch (bpp) { | |
457 | case 0: return xres; | |
458 | case 4: rounding = 128; | |
459 | break; | |
460 | case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */ | |
461 | break; | |
462 | case 16: rounding = 32; | |
463 | break; | |
464 | case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */ | |
465 | break; | |
466 | default: rounding = 16; | |
467 | /* on G400, 16 really does not work */ | |
468 | if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) | |
469 | rounding = 32; | |
470 | break; | |
471 | } | |
472 | if (isInterleave(MINFO)) { | |
473 | rounding *= 2; | |
474 | } | |
475 | over = xres % rounding; | |
476 | if (over) | |
477 | xres += rounding-over; | |
478 | return xres; | |
479 | } | |
480 | ||
481 | static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) { | |
482 | const int* width; | |
483 | int xres_new; | |
484 | ||
485 | DBG(__FUNCTION__) | |
486 | ||
487 | if (!bpp) return xres; | |
488 | ||
489 | width = ACCESS_FBINFO(capable.vxres); | |
490 | ||
491 | if (ACCESS_FBINFO(devflags.precise_width)) { | |
492 | while (*width) { | |
493 | if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) { | |
494 | break; | |
495 | } | |
496 | width++; | |
497 | } | |
498 | xres_new = *width; | |
499 | } else { | |
500 | xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp); | |
501 | } | |
502 | return xres_new; | |
503 | } | |
504 | ||
505 | static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) { | |
506 | ||
507 | DBG(__FUNCTION__) | |
508 | ||
509 | switch (var->bits_per_pixel) { | |
510 | case 4: | |
511 | return 16; /* pseudocolor... 16 entries HW palette */ | |
512 | case 8: | |
513 | return 256; /* pseudocolor... 256 entries HW palette */ | |
514 | case 16: | |
515 | return 16; /* directcolor... 16 entries SW palette */ | |
516 | /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ | |
517 | case 24: | |
518 | return 16; /* directcolor... 16 entries SW palette */ | |
519 | /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ | |
520 | case 32: | |
521 | return 16; /* directcolor... 16 entries SW palette */ | |
522 | /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ | |
523 | } | |
524 | return 16; /* return something reasonable... or panic()? */ | |
525 | } | |
526 | ||
527 | static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) { | |
528 | struct RGBT { | |
529 | unsigned char bpp; | |
530 | struct { | |
531 | unsigned char offset, | |
532 | length; | |
533 | } red, | |
534 | green, | |
535 | blue, | |
536 | transp; | |
537 | signed char visual; | |
538 | }; | |
539 | static const struct RGBT table[]= { | |
540 | { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR}, | |
541 | {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR}, | |
542 | {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR}, | |
543 | {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR}, | |
544 | {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR} | |
545 | }; | |
546 | struct RGBT const *rgbt; | |
547 | unsigned int bpp = var->bits_per_pixel; | |
548 | unsigned int vramlen; | |
549 | unsigned int memlen; | |
550 | ||
551 | DBG(__FUNCTION__) | |
552 | ||
553 | switch (bpp) { | |
554 | case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL; | |
555 | break; | |
556 | case 8: break; | |
557 | case 16: break; | |
558 | case 24: break; | |
559 | case 32: break; | |
560 | default: return -EINVAL; | |
561 | } | |
562 | *ydstorg = 0; | |
563 | vramlen = ACCESS_FBINFO(video.len_usable); | |
564 | if (var->yres_virtual < var->yres) | |
565 | var->yres_virtual = var->yres; | |
566 | if (var->xres_virtual < var->xres) | |
567 | var->xres_virtual = var->xres; | |
568 | ||
569 | var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp); | |
570 | memlen = var->xres_virtual * bpp * var->yres_virtual / 8; | |
571 | if (memlen > vramlen) { | |
572 | var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp); | |
573 | memlen = var->xres_virtual * bpp * var->yres_virtual / 8; | |
574 | } | |
575 | /* There is hardware bug that no line can cross 4MB boundary */ | |
576 | /* give up for CFB24, it is impossible to easy workaround it */ | |
577 | /* for other try to do something */ | |
578 | if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) { | |
579 | if (bpp == 24) { | |
580 | /* sorry */ | |
581 | } else { | |
582 | unsigned int linelen; | |
583 | unsigned int m1 = linelen = var->xres_virtual * bpp / 8; | |
584 | unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */ | |
585 | unsigned int max_yres; | |
586 | ||
587 | while (m1) { | |
588 | int t; | |
589 | ||
590 | while (m2 >= m1) m2 -= m1; | |
591 | t = m1; | |
592 | m1 = m2; | |
593 | m2 = t; | |
594 | } | |
595 | m2 = linelen * PAGE_SIZE / m2; | |
596 | *ydstorg = m2 = 0x400000 % m2; | |
597 | max_yres = (vramlen - m2) / linelen; | |
598 | if (var->yres_virtual > max_yres) | |
599 | var->yres_virtual = max_yres; | |
600 | } | |
601 | } | |
602 | /* YDSTLEN contains only signed 16bit value */ | |
603 | if (var->yres_virtual > 32767) | |
604 | var->yres_virtual = 32767; | |
605 | /* we must round yres/xres down, we already rounded y/xres_virtual up | |
606 | if it was possible. We should return -EINVAL, but I disagree */ | |
607 | if (var->yres_virtual < var->yres) | |
608 | var->yres = var->yres_virtual; | |
609 | if (var->xres_virtual < var->xres) | |
610 | var->xres = var->xres_virtual; | |
611 | if (var->xoffset + var->xres > var->xres_virtual) | |
612 | var->xoffset = var->xres_virtual - var->xres; | |
613 | if (var->yoffset + var->yres > var->yres_virtual) | |
614 | var->yoffset = var->yres_virtual - var->yres; | |
615 | ||
616 | if (bpp == 16 && var->green.length == 5) { | |
617 | bpp--; /* an artifical value - 15 */ | |
618 | } | |
619 | ||
620 | for (rgbt = table; rgbt->bpp < bpp; rgbt++); | |
621 | #define SETCLR(clr)\ | |
622 | var->clr.offset = rgbt->clr.offset;\ | |
623 | var->clr.length = rgbt->clr.length | |
624 | SETCLR(red); | |
625 | SETCLR(green); | |
626 | SETCLR(blue); | |
627 | SETCLR(transp); | |
628 | #undef SETCLR | |
629 | *visual = rgbt->visual; | |
630 | ||
631 | if (bpp > 8) | |
632 | dprintk("matroxfb: truecolor: " | |
633 | "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n", | |
634 | var->transp.length, var->red.length, var->green.length, var->blue.length, | |
635 | var->transp.offset, var->red.offset, var->green.offset, var->blue.offset); | |
636 | ||
637 | *video_cmap_len = matroxfb_get_cmap_len(var); | |
638 | dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel, | |
639 | var->xres_virtual, var->yres_virtual); | |
640 | return 0; | |
641 | } | |
642 | ||
643 | static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green, | |
644 | unsigned blue, unsigned transp, | |
645 | struct fb_info *fb_info) | |
646 | { | |
647 | #ifdef CONFIG_FB_MATROX_MULTIHEAD | |
648 | struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon); | |
649 | #endif | |
650 | ||
651 | DBG(__FUNCTION__) | |
652 | ||
653 | /* | |
654 | * Set a single color register. The values supplied are | |
655 | * already rounded down to the hardware's capabilities | |
656 | * (according to the entries in the `var' structure). Return | |
657 | * != 0 for invalid regno. | |
658 | */ | |
659 | ||
660 | if (regno >= ACCESS_FBINFO(curr.cmap_len)) | |
661 | return 1; | |
662 | ||
663 | if (ACCESS_FBINFO(fbcon).var.grayscale) { | |
664 | /* gray = 0.30*R + 0.59*G + 0.11*B */ | |
665 | red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; | |
666 | } | |
667 | ||
668 | red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length); | |
669 | green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length); | |
670 | blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length); | |
671 | transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length); | |
672 | ||
673 | switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) { | |
674 | case 4: | |
675 | case 8: | |
676 | mga_outb(M_DAC_REG, regno); | |
677 | mga_outb(M_DAC_VAL, red); | |
678 | mga_outb(M_DAC_VAL, green); | |
679 | mga_outb(M_DAC_VAL, blue); | |
680 | break; | |
681 | case 16: | |
682 | if (regno >= 16) | |
683 | break; | |
684 | { | |
685 | u_int16_t col = | |
686 | (red << ACCESS_FBINFO(fbcon).var.red.offset) | | |
687 | (green << ACCESS_FBINFO(fbcon).var.green.offset) | | |
688 | (blue << ACCESS_FBINFO(fbcon).var.blue.offset) | | |
689 | (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */ | |
690 | ACCESS_FBINFO(cmap[regno]) = col | (col << 16); | |
691 | } | |
692 | break; | |
693 | case 24: | |
694 | case 32: | |
695 | if (regno >= 16) | |
696 | break; | |
697 | ACCESS_FBINFO(cmap[regno]) = | |
698 | (red << ACCESS_FBINFO(fbcon).var.red.offset) | | |
699 | (green << ACCESS_FBINFO(fbcon).var.green.offset) | | |
700 | (blue << ACCESS_FBINFO(fbcon).var.blue.offset) | | |
701 | (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */ | |
702 | break; | |
703 | } | |
704 | return 0; | |
705 | } | |
706 | ||
707 | static void matroxfb_init_fix(WPMINFO2) | |
708 | { | |
709 | struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix; | |
710 | DBG(__FUNCTION__) | |
711 | ||
712 | strcpy(fix->id,"MATROX"); | |
713 | ||
714 | fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */ | |
715 | fix->ypanstep = 1; | |
716 | fix->ywrapstep = 0; | |
717 | fix->mmio_start = ACCESS_FBINFO(mmio.base); | |
718 | fix->mmio_len = ACCESS_FBINFO(mmio.len); | |
719 | fix->accel = ACCESS_FBINFO(devflags.accelerator); | |
720 | } | |
721 | ||
722 | static void matroxfb_update_fix(WPMINFO2) | |
723 | { | |
724 | struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix; | |
725 | DBG(__FUNCTION__) | |
726 | ||
727 | fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes); | |
728 | fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes); | |
729 | } | |
730 | ||
731 | static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
732 | { | |
733 | int err; | |
734 | int visual; | |
735 | int cmap_len; | |
736 | unsigned int ydstorg; | |
737 | MINFO_FROM_INFO(info); | |
738 | ||
739 | if (ACCESS_FBINFO(dead)) { | |
740 | return -ENXIO; | |
741 | } | |
742 | if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0) | |
743 | return err; | |
744 | return 0; | |
745 | } | |
746 | ||
747 | static int matroxfb_set_par(struct fb_info *info) | |
748 | { | |
749 | int err; | |
750 | int visual; | |
751 | int cmap_len; | |
752 | unsigned int ydstorg; | |
753 | struct fb_var_screeninfo *var; | |
754 | MINFO_FROM_INFO(info); | |
755 | ||
756 | DBG(__FUNCTION__) | |
757 | ||
758 | if (ACCESS_FBINFO(dead)) { | |
759 | return -ENXIO; | |
760 | } | |
761 | ||
762 | var = &info->var; | |
763 | if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0) | |
764 | return err; | |
765 | ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg; | |
766 | matroxfb_update_fix(PMINFO2); | |
767 | ACCESS_FBINFO(fbcon).fix.visual = visual; | |
768 | ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS; | |
769 | ACCESS_FBINFO(fbcon).fix.type_aux = 0; | |
770 | ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3; | |
771 | { | |
772 | unsigned int pos; | |
773 | ||
774 | ACCESS_FBINFO(curr.cmap_len) = cmap_len; | |
775 | ydstorg += ACCESS_FBINFO(devflags.ydstorg); | |
776 | ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg; | |
777 | ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2); | |
778 | if (var->bits_per_pixel == 4) | |
779 | ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg; | |
780 | else | |
781 | ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel; | |
782 | ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel); | |
783 | { struct my_timming mt; | |
784 | struct matrox_hw_state* hw; | |
785 | int out; | |
786 | ||
787 | matroxfb_var2my(var, &mt); | |
788 | mt.crtc = MATROXFB_SRC_CRTC1; | |
789 | /* CRTC1 delays */ | |
790 | switch (var->bits_per_pixel) { | |
791 | case 0: mt.delay = 31 + 0; break; | |
792 | case 16: mt.delay = 21 + 8; break; | |
793 | case 24: mt.delay = 17 + 8; break; | |
794 | case 32: mt.delay = 16 + 8; break; | |
795 | default: mt.delay = 31 + 8; break; | |
796 | } | |
797 | ||
798 | hw = &ACCESS_FBINFO(hw); | |
799 | ||
800 | down_read(&ACCESS_FBINFO(altout).lock); | |
801 | for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { | |
802 | if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 && | |
803 | ACCESS_FBINFO(outputs[out]).output->compute) { | |
804 | ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt); | |
805 | } | |
806 | } | |
807 | up_read(&ACCESS_FBINFO(altout).lock); | |
808 | ACCESS_FBINFO(crtc1).pixclock = mt.pixclock; | |
809 | ACCESS_FBINFO(crtc1).mnp = mt.mnp; | |
810 | ACCESS_FBINFO(hw_switch->init(PMINFO &mt)); | |
811 | pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32; | |
812 | pos += ACCESS_FBINFO(curr.ydstorg.chunks); | |
813 | ||
814 | hw->CRTC[0x0D] = pos & 0xFF; | |
815 | hw->CRTC[0x0C] = (pos & 0xFF00) >> 8; | |
816 | hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); | |
817 | hw->CRTCEXT[8] = pos >> 21; | |
818 | ACCESS_FBINFO(hw_switch->restore(PMINFO2)); | |
819 | update_crtc2(PMINFO pos); | |
820 | down_read(&ACCESS_FBINFO(altout).lock); | |
821 | for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { | |
822 | if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 && | |
823 | ACCESS_FBINFO(outputs[out]).output->program) { | |
824 | ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data); | |
825 | } | |
826 | } | |
827 | for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { | |
828 | if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 && | |
829 | ACCESS_FBINFO(outputs[out]).output->start) { | |
830 | ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data); | |
831 | } | |
832 | } | |
833 | up_read(&ACCESS_FBINFO(altout).lock); | |
834 | matrox_cfbX_init(PMINFO2); | |
835 | } | |
836 | } | |
837 | ACCESS_FBINFO(initialized) = 1; | |
838 | return 0; | |
839 | } | |
840 | ||
841 | static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank) | |
842 | { | |
843 | unsigned int sts1; | |
844 | ||
845 | matroxfb_enable_irq(PMINFO 0); | |
846 | memset(vblank, 0, sizeof(*vblank)); | |
847 | vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC | | |
848 | FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK; | |
849 | sts1 = mga_inb(M_INSTS1); | |
850 | vblank->vcount = mga_inl(M_VCOUNT); | |
851 | /* BTW, on my PIII/450 with G400, reading M_INSTS1 | |
852 | byte makes this call about 12% slower (1.70 vs. 2.05 us | |
853 | per ioctl()) */ | |
854 | if (sts1 & 1) | |
855 | vblank->flags |= FB_VBLANK_HBLANKING; | |
856 | if (sts1 & 8) | |
857 | vblank->flags |= FB_VBLANK_VSYNCING; | |
858 | if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres) | |
859 | vblank->flags |= FB_VBLANK_VBLANKING; | |
860 | if (test_bit(0, &ACCESS_FBINFO(irq_flags))) { | |
861 | vblank->flags |= FB_VBLANK_HAVE_COUNT; | |
862 | /* Only one writer, aligned int value... | |
863 | it should work without lock and without atomic_t */ | |
864 | vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt; | |
865 | } | |
866 | return 0; | |
867 | } | |
868 | ||
869 | static struct matrox_altout panellink_output = { | |
870 | .name = "Panellink output", | |
871 | }; | |
872 | ||
873 | static int matroxfb_ioctl(struct fb_info *info, | |
874 | unsigned int cmd, unsigned long arg) | |
875 | { | |
876 | void __user *argp = (void __user *)arg; | |
877 | MINFO_FROM_INFO(info); | |
878 | ||
879 | DBG(__FUNCTION__) | |
880 | ||
881 | if (ACCESS_FBINFO(dead)) { | |
882 | return -ENXIO; | |
883 | } | |
884 | ||
885 | switch (cmd) { | |
886 | case FBIOGET_VBLANK: | |
887 | { | |
888 | struct fb_vblank vblank; | |
889 | int err; | |
890 | ||
891 | err = matroxfb_get_vblank(PMINFO &vblank); | |
892 | if (err) | |
893 | return err; | |
894 | if (copy_to_user(argp, &vblank, sizeof(vblank))) | |
895 | return -EFAULT; | |
896 | return 0; | |
897 | } | |
898 | case FBIO_WAITFORVSYNC: | |
899 | { | |
900 | u_int32_t crt; | |
901 | ||
902 | if (get_user(crt, (u_int32_t __user *)arg)) | |
903 | return -EFAULT; | |
904 | ||
905 | return matroxfb_wait_for_sync(PMINFO crt); | |
906 | } | |
907 | case MATROXFB_SET_OUTPUT_MODE: | |
908 | { | |
909 | struct matroxioc_output_mode mom; | |
910 | struct matrox_altout *oproc; | |
911 | int val; | |
912 | ||
913 | if (copy_from_user(&mom, argp, sizeof(mom))) | |
914 | return -EFAULT; | |
915 | if (mom.output >= MATROXFB_MAX_OUTPUTS) | |
916 | return -ENXIO; | |
917 | down_read(&ACCESS_FBINFO(altout.lock)); | |
918 | oproc = ACCESS_FBINFO(outputs[mom.output]).output; | |
919 | if (!oproc) { | |
920 | val = -ENXIO; | |
921 | } else if (!oproc->verifymode) { | |
922 | if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) { | |
923 | val = 0; | |
924 | } else { | |
925 | val = -EINVAL; | |
926 | } | |
927 | } else { | |
928 | val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode); | |
929 | } | |
930 | if (!val) { | |
931 | if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) { | |
932 | ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode; | |
933 | val = 1; | |
934 | } | |
935 | } | |
936 | up_read(&ACCESS_FBINFO(altout.lock)); | |
937 | if (val != 1) | |
938 | return val; | |
939 | switch (ACCESS_FBINFO(outputs[mom.output]).src) { | |
940 | case MATROXFB_SRC_CRTC1: | |
941 | matroxfb_set_par(info); | |
942 | break; | |
943 | case MATROXFB_SRC_CRTC2: | |
944 | { | |
945 | struct matroxfb_dh_fb_info* crtc2; | |
946 | ||
947 | down_read(&ACCESS_FBINFO(crtc2.lock)); | |
948 | crtc2 = ACCESS_FBINFO(crtc2.info); | |
949 | if (crtc2) | |
950 | crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon); | |
951 | up_read(&ACCESS_FBINFO(crtc2.lock)); | |
952 | } | |
953 | break; | |
954 | } | |
955 | return 0; | |
956 | } | |
957 | case MATROXFB_GET_OUTPUT_MODE: | |
958 | { | |
959 | struct matroxioc_output_mode mom; | |
960 | struct matrox_altout *oproc; | |
961 | int val; | |
962 | ||
963 | if (copy_from_user(&mom, argp, sizeof(mom))) | |
964 | return -EFAULT; | |
965 | if (mom.output >= MATROXFB_MAX_OUTPUTS) | |
966 | return -ENXIO; | |
967 | down_read(&ACCESS_FBINFO(altout.lock)); | |
968 | oproc = ACCESS_FBINFO(outputs[mom.output]).output; | |
969 | if (!oproc) { | |
970 | val = -ENXIO; | |
971 | } else { | |
972 | mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode; | |
973 | val = 0; | |
974 | } | |
975 | up_read(&ACCESS_FBINFO(altout.lock)); | |
976 | if (val) | |
977 | return val; | |
978 | if (copy_to_user(argp, &mom, sizeof(mom))) | |
979 | return -EFAULT; | |
980 | return 0; | |
981 | } | |
982 | case MATROXFB_SET_OUTPUT_CONNECTION: | |
983 | { | |
984 | u_int32_t tmp; | |
985 | int i; | |
986 | int changes; | |
987 | ||
988 | if (copy_from_user(&tmp, argp, sizeof(tmp))) | |
989 | return -EFAULT; | |
990 | for (i = 0; i < 32; i++) { | |
991 | if (tmp & (1 << i)) { | |
992 | if (i >= MATROXFB_MAX_OUTPUTS) | |
993 | return -ENXIO; | |
994 | if (!ACCESS_FBINFO(outputs[i]).output) | |
995 | return -ENXIO; | |
996 | switch (ACCESS_FBINFO(outputs[i]).src) { | |
997 | case MATROXFB_SRC_NONE: | |
998 | case MATROXFB_SRC_CRTC1: | |
999 | break; | |
1000 | default: | |
1001 | return -EBUSY; | |
1002 | } | |
1003 | } | |
1004 | } | |
1005 | if (ACCESS_FBINFO(devflags.panellink)) { | |
1006 | if (tmp & MATROXFB_OUTPUT_CONN_DFP) { | |
1007 | if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY) | |
1008 | return -EINVAL; | |
1009 | for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { | |
1010 | if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) { | |
1011 | return -EBUSY; | |
1012 | } | |
1013 | } | |
1014 | } | |
1015 | } | |
1016 | changes = 0; | |
1017 | for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { | |
1018 | if (tmp & (1 << i)) { | |
1019 | if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) { | |
1020 | changes = 1; | |
1021 | ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1; | |
1022 | } | |
1023 | } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) { | |
1024 | changes = 1; | |
1025 | ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE; | |
1026 | } | |
1027 | } | |
1028 | if (!changes) | |
1029 | return 0; | |
1030 | matroxfb_set_par(info); | |
1031 | return 0; | |
1032 | } | |
1033 | case MATROXFB_GET_OUTPUT_CONNECTION: | |
1034 | { | |
1035 | u_int32_t conn = 0; | |
1036 | int i; | |
1037 | ||
1038 | for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { | |
1039 | if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) { | |
1040 | conn |= 1 << i; | |
1041 | } | |
1042 | } | |
1043 | if (put_user(conn, (u_int32_t __user *)arg)) | |
1044 | return -EFAULT; | |
1045 | return 0; | |
1046 | } | |
1047 | case MATROXFB_GET_AVAILABLE_OUTPUTS: | |
1048 | { | |
1049 | u_int32_t conn = 0; | |
1050 | int i; | |
1051 | ||
1052 | for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { | |
1053 | if (ACCESS_FBINFO(outputs[i]).output) { | |
1054 | switch (ACCESS_FBINFO(outputs[i]).src) { | |
1055 | case MATROXFB_SRC_NONE: | |
1056 | case MATROXFB_SRC_CRTC1: | |
1057 | conn |= 1 << i; | |
1058 | break; | |
1059 | } | |
1060 | } | |
1061 | } | |
1062 | if (ACCESS_FBINFO(devflags.panellink)) { | |
1063 | if (conn & MATROXFB_OUTPUT_CONN_DFP) | |
1064 | conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY; | |
1065 | if (conn & MATROXFB_OUTPUT_CONN_SECONDARY) | |
1066 | conn &= ~MATROXFB_OUTPUT_CONN_DFP; | |
1067 | } | |
1068 | if (put_user(conn, (u_int32_t __user *)arg)) | |
1069 | return -EFAULT; | |
1070 | return 0; | |
1071 | } | |
1072 | case MATROXFB_GET_ALL_OUTPUTS: | |
1073 | { | |
1074 | u_int32_t conn = 0; | |
1075 | int i; | |
1076 | ||
1077 | for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { | |
1078 | if (ACCESS_FBINFO(outputs[i]).output) { | |
1079 | conn |= 1 << i; | |
1080 | } | |
1081 | } | |
1082 | if (put_user(conn, (u_int32_t __user *)arg)) | |
1083 | return -EFAULT; | |
1084 | return 0; | |
1085 | } | |
1086 | case VIDIOC_QUERYCAP: | |
1087 | { | |
1088 | struct v4l2_capability r; | |
1089 | ||
1090 | memset(&r, 0, sizeof(r)); | |
1091 | strcpy(r.driver, "matroxfb"); | |
1092 | strcpy(r.card, "Matrox"); | |
1093 | sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev))); | |
1094 | r.version = KERNEL_VERSION(1,0,0); | |
1095 | r.capabilities = V4L2_CAP_VIDEO_OUTPUT; | |
1096 | if (copy_to_user(argp, &r, sizeof(r))) | |
1097 | return -EFAULT; | |
1098 | return 0; | |
1099 | ||
1100 | } | |
1101 | case VIDIOC_QUERYCTRL: | |
1102 | { | |
1103 | struct v4l2_queryctrl qctrl; | |
1104 | int err; | |
1105 | ||
1106 | if (copy_from_user(&qctrl, argp, sizeof(qctrl))) | |
1107 | return -EFAULT; | |
1108 | ||
1109 | down_read(&ACCESS_FBINFO(altout).lock); | |
1110 | if (!ACCESS_FBINFO(outputs[1]).output) { | |
1111 | err = -ENXIO; | |
1112 | } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) { | |
1113 | err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl); | |
1114 | } else { | |
1115 | err = -EINVAL; | |
1116 | } | |
1117 | up_read(&ACCESS_FBINFO(altout).lock); | |
1118 | if (err >= 0 && | |
1119 | copy_to_user(argp, &qctrl, sizeof(qctrl))) | |
1120 | return -EFAULT; | |
1121 | return err; | |
1122 | } | |
1123 | case VIDIOC_G_CTRL: | |
1124 | { | |
1125 | struct v4l2_control ctrl; | |
1126 | int err; | |
1127 | ||
1128 | if (copy_from_user(&ctrl, argp, sizeof(ctrl))) | |
1129 | return -EFAULT; | |
1130 | ||
1131 | down_read(&ACCESS_FBINFO(altout).lock); | |
1132 | if (!ACCESS_FBINFO(outputs[1]).output) { | |
1133 | err = -ENXIO; | |
1134 | } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) { | |
1135 | err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl); | |
1136 | } else { | |
1137 | err = -EINVAL; | |
1138 | } | |
1139 | up_read(&ACCESS_FBINFO(altout).lock); | |
1140 | if (err >= 0 && | |
1141 | copy_to_user(argp, &ctrl, sizeof(ctrl))) | |
1142 | return -EFAULT; | |
1143 | return err; | |
1144 | } | |
1145 | case VIDIOC_S_CTRL_OLD: | |
1146 | case VIDIOC_S_CTRL: | |
1147 | { | |
1148 | struct v4l2_control ctrl; | |
1149 | int err; | |
1150 | ||
1151 | if (copy_from_user(&ctrl, argp, sizeof(ctrl))) | |
1152 | return -EFAULT; | |
1153 | ||
1154 | down_read(&ACCESS_FBINFO(altout).lock); | |
1155 | if (!ACCESS_FBINFO(outputs[1]).output) { | |
1156 | err = -ENXIO; | |
1157 | } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) { | |
1158 | err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl); | |
1159 | } else { | |
1160 | err = -EINVAL; | |
1161 | } | |
1162 | up_read(&ACCESS_FBINFO(altout).lock); | |
1163 | return err; | |
1164 | } | |
1165 | } | |
1166 | return -ENOTTY; | |
1167 | } | |
1168 | ||
1169 | /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */ | |
1170 | ||
1171 | static int matroxfb_blank(int blank, struct fb_info *info) | |
1172 | { | |
1173 | int seq; | |
1174 | int crtc; | |
1175 | CRITFLAGS | |
1176 | MINFO_FROM_INFO(info); | |
1177 | ||
1178 | DBG(__FUNCTION__) | |
1179 | ||
1180 | if (ACCESS_FBINFO(dead)) | |
1181 | return 1; | |
1182 | ||
1183 | switch (blank) { | |
1184 | case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */ | |
1185 | case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break; | |
1186 | case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break; | |
1187 | case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break; | |
1188 | default: seq = 0x00; crtc = 0x00; break; | |
1189 | } | |
1190 | ||
1191 | CRITBEGIN | |
1192 | ||
1193 | mga_outb(M_SEQ_INDEX, 1); | |
1194 | mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq); | |
1195 | mga_outb(M_EXTVGA_INDEX, 1); | |
1196 | mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc); | |
1197 | ||
1198 | CRITEND | |
1199 | return 0; | |
1200 | } | |
1201 | ||
1202 | static struct fb_ops matroxfb_ops = { | |
1203 | .owner = THIS_MODULE, | |
1204 | .fb_open = matroxfb_open, | |
1205 | .fb_release = matroxfb_release, | |
1206 | .fb_check_var = matroxfb_check_var, | |
1207 | .fb_set_par = matroxfb_set_par, | |
1208 | .fb_setcolreg = matroxfb_setcolreg, | |
1209 | .fb_pan_display =matroxfb_pan_display, | |
1210 | .fb_blank = matroxfb_blank, | |
1211 | .fb_ioctl = matroxfb_ioctl, | |
1212 | /* .fb_fillrect = <set by matrox_cfbX_init>, */ | |
1213 | /* .fb_copyarea = <set by matrox_cfbX_init>, */ | |
1214 | /* .fb_imageblit = <set by matrox_cfbX_init>, */ | |
1215 | /* .fb_cursor = <set by matrox_cfbX_init>, */ | |
1216 | }; | |
1217 | ||
1218 | #define RSDepth(X) (((X) >> 8) & 0x0F) | |
1219 | #define RS8bpp 0x1 | |
1220 | #define RS15bpp 0x2 | |
1221 | #define RS16bpp 0x3 | |
1222 | #define RS32bpp 0x4 | |
1223 | #define RS4bpp 0x5 | |
1224 | #define RS24bpp 0x6 | |
1225 | #define RSText 0x7 | |
1226 | #define RSText8 0x8 | |
1227 | /* 9-F */ | |
1228 | static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = { | |
1229 | { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 }, | |
1230 | { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 }, | |
1231 | { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 }, | |
1232 | { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 }, | |
1233 | { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 }, | |
1234 | { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 }, | |
1235 | { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */ | |
1236 | { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */ | |
1237 | }; | |
1238 | ||
1239 | /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */ | |
1240 | static unsigned int mem; /* "matrox:mem:xxxxxM" */ | |
1241 | static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */ | |
1242 | static int inv24; /* "matrox:inv24" */ | |
1243 | static int cross4MB = -1; /* "matrox:cross4MB" */ | |
1244 | static int disabled; /* "matrox:disabled" */ | |
1245 | static int noaccel; /* "matrox:noaccel" */ | |
1246 | static int nopan; /* "matrox:nopan" */ | |
1247 | static int no_pci_retry; /* "matrox:nopciretry" */ | |
1248 | static int novga; /* "matrox:novga" */ | |
1249 | static int nobios; /* "matrox:nobios" */ | |
1250 | static int noinit = 1; /* "matrox:init" */ | |
1251 | static int inverse; /* "matrox:inverse" */ | |
1252 | static int sgram; /* "matrox:sgram" */ | |
1253 | #ifdef CONFIG_MTRR | |
1254 | static int mtrr = 1; /* "matrox:nomtrr" */ | |
1255 | #endif | |
1256 | static int grayscale; /* "matrox:grayscale" */ | |
1257 | static int dev = -1; /* "matrox:dev:xxxxx" */ | |
1258 | static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */ | |
1259 | static int depth = -1; /* "matrox:depth:xxxxx" */ | |
1260 | static unsigned int xres; /* "matrox:xres:xxxxx" */ | |
1261 | static unsigned int yres; /* "matrox:yres:xxxxx" */ | |
1262 | static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */ | |
1263 | static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */ | |
1264 | static unsigned int vslen; /* "matrox:vslen:xxxxx" */ | |
1265 | static unsigned int left = ~0; /* "matrox:left:xxxxx" */ | |
1266 | static unsigned int right = ~0; /* "matrox:right:xxxxx" */ | |
1267 | static unsigned int hslen; /* "matrox:hslen:xxxxx" */ | |
1268 | static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */ | |
1269 | static int sync = -1; /* "matrox:sync:xxxxx" */ | |
1270 | static unsigned int fv; /* "matrox:fv:xxxxx" */ | |
1271 | static unsigned int fh; /* "matrox:fh:xxxxxk" */ | |
1272 | static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */ | |
1273 | static int dfp; /* "matrox:dfp */ | |
1274 | static int dfp_type = -1; /* "matrox:dfp:xxx */ | |
1275 | static int memtype = -1; /* "matrox:memtype:xxx" */ | |
1276 | static char outputs[8]; /* "matrox:outputs:xxx" */ | |
1277 | ||
1278 | #ifndef MODULE | |
1279 | static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */ | |
1280 | #endif | |
1281 | ||
1282 | static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){ | |
1283 | vaddr_t vm; | |
1284 | unsigned int offs; | |
1285 | unsigned int offs2; | |
1286 | unsigned char orig; | |
1287 | unsigned char bytes[32]; | |
1288 | unsigned char* tmp; | |
1289 | ||
1290 | DBG(__FUNCTION__) | |
1291 | ||
1292 | vm = ACCESS_FBINFO(video.vbase); | |
1293 | maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */ | |
1294 | /* at least 2MB */ | |
1295 | if (maxSize < 0x0200000) return 0; | |
1296 | if (maxSize > 0x2000000) maxSize = 0x2000000; | |
1297 | ||
1298 | mga_outb(M_EXTVGA_INDEX, 0x03); | |
1299 | orig = mga_inb(M_EXTVGA_DATA); | |
1300 | mga_outb(M_EXTVGA_DATA, orig | 0x80); | |
1301 | ||
1302 | tmp = bytes; | |
1303 | for (offs = 0x100000; offs < maxSize; offs += 0x200000) | |
1304 | *tmp++ = mga_readb(vm, offs); | |
1305 | for (offs = 0x100000; offs < maxSize; offs += 0x200000) | |
1306 | mga_writeb(vm, offs, 0x02); | |
1307 | mga_outb(M_CACHEFLUSH, 0x00); | |
1308 | for (offs = 0x100000; offs < maxSize; offs += 0x200000) { | |
1309 | if (mga_readb(vm, offs) != 0x02) | |
1310 | break; | |
1311 | mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02); | |
1312 | if (mga_readb(vm, offs)) | |
1313 | break; | |
1314 | } | |
1315 | tmp = bytes; | |
1316 | for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000) | |
1317 | mga_writeb(vm, offs2, *tmp++); | |
1318 | ||
1319 | mga_outb(M_EXTVGA_INDEX, 0x03); | |
1320 | mga_outb(M_EXTVGA_DATA, orig); | |
1321 | ||
1322 | *realSize = offs - 0x100000; | |
1323 | #ifdef CONFIG_FB_MATROX_MILLENIUM | |
1324 | ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF)); | |
1325 | #endif | |
1326 | return 1; | |
1327 | } | |
1328 | ||
1329 | struct video_board { | |
1330 | int maxvram; | |
1331 | int maxdisplayable; | |
1332 | int accelID; | |
1333 | struct matrox_switch* lowlevel; | |
1334 | }; | |
1335 | #ifdef CONFIG_FB_MATROX_MILLENIUM | |
1336 | static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium}; | |
1337 | static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium}; | |
1338 | static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium}; | |
1339 | #endif /* CONFIG_FB_MATROX_MILLENIUM */ | |
1340 | #ifdef CONFIG_FB_MATROX_MYSTIQUE | |
1341 | static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique}; | |
1342 | #endif /* CONFIG_FB_MATROX_MYSTIQUE */ | |
1343 | #ifdef CONFIG_FB_MATROX_G | |
1344 | static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100}; | |
1345 | static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100}; | |
1346 | #ifdef CONFIG_FB_MATROX_32MB | |
1347 | /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for | |
1348 | whole 32MB */ | |
1349 | static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100}; | |
1350 | #else | |
1351 | static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100}; | |
1352 | #endif | |
1353 | #endif | |
1354 | ||
1355 | #define DEVF_VIDEO64BIT 0x0001 | |
1356 | #define DEVF_SWAPS 0x0002 | |
1357 | #define DEVF_SRCORG 0x0004 | |
1358 | #define DEVF_DUALHEAD 0x0008 | |
1359 | #define DEVF_CROSS4MB 0x0010 | |
1360 | #define DEVF_TEXT4B 0x0020 | |
1361 | /* #define DEVF_recycled 0x0040 */ | |
1362 | /* #define DEVF_recycled 0x0080 */ | |
1363 | #define DEVF_SUPPORT32MB 0x0100 | |
1364 | #define DEVF_ANY_VXRES 0x0200 | |
1365 | #define DEVF_TEXT16B 0x0400 | |
1366 | #define DEVF_CRTC2 0x0800 | |
1367 | #define DEVF_MAVEN_CAPABLE 0x1000 | |
1368 | #define DEVF_PANELLINK_CAPABLE 0x2000 | |
1369 | #define DEVF_G450DAC 0x4000 | |
1370 | ||
1371 | #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB) | |
1372 | #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD) | |
1373 | #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */ | |
1374 | #define DEVF_G200 (DEVF_G2CORE) | |
1375 | #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2) | |
1376 | /* if you'll find how to drive DFP... */ | |
1377 | #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD) | |
1378 | #define DEVF_G550 (DEVF_G450) | |
1379 | ||
1380 | static struct board { | |
1381 | unsigned short vendor, device, rev, svid, sid; | |
1382 | unsigned int flags; | |
1383 | unsigned int maxclk; | |
1384 | enum mga_chip chip; | |
1385 | struct video_board* base; | |
1386 | const char* name; | |
1387 | } dev_list[] = { | |
1388 | #ifdef CONFIG_FB_MATROX_MILLENIUM | |
1389 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF, | |
1390 | 0, 0, | |
1391 | DEVF_TEXT4B, | |
1392 | 230000, | |
1393 | MGA_2064, | |
1394 | &vbMillennium, | |
1395 | "Millennium (PCI)"}, | |
1396 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF, | |
1397 | 0, 0, | |
1398 | DEVF_SWAPS, | |
1399 | 220000, | |
1400 | MGA_2164, | |
1401 | &vbMillennium2, | |
1402 | "Millennium II (PCI)"}, | |
1403 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF, | |
1404 | 0, 0, | |
1405 | DEVF_SWAPS, | |
1406 | 250000, | |
1407 | MGA_2164, | |
1408 | &vbMillennium2A, | |
1409 | "Millennium II (AGP)"}, | |
1410 | #endif | |
1411 | #ifdef CONFIG_FB_MATROX_MYSTIQUE | |
1412 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02, | |
1413 | 0, 0, | |
1414 | DEVF_VIDEO64BIT | DEVF_CROSS4MB, | |
1415 | 180000, | |
1416 | MGA_1064, | |
1417 | &vbMystique, | |
1418 | "Mystique (PCI)"}, | |
1419 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF, | |
1420 | 0, 0, | |
1421 | DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, | |
1422 | 220000, | |
1423 | MGA_1164, | |
1424 | &vbMystique, | |
1425 | "Mystique 220 (PCI)"}, | |
1426 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02, | |
1427 | 0, 0, | |
1428 | DEVF_VIDEO64BIT | DEVF_CROSS4MB, | |
1429 | 180000, | |
1430 | MGA_1064, | |
1431 | &vbMystique, | |
1432 | "Mystique (AGP)"}, | |
1433 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF, | |
1434 | 0, 0, | |
1435 | DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, | |
1436 | 220000, | |
1437 | MGA_1164, | |
1438 | &vbMystique, | |
1439 | "Mystique 220 (AGP)"}, | |
1440 | #endif | |
1441 | #ifdef CONFIG_FB_MATROX_G | |
1442 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF, | |
1443 | 0, 0, | |
1444 | DEVF_G100, | |
1445 | 230000, | |
1446 | MGA_G100, | |
1447 | &vbG100, | |
1448 | "MGA-G100 (PCI)"}, | |
1449 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF, | |
1450 | 0, 0, | |
1451 | DEVF_G100, | |
1452 | 230000, | |
1453 | MGA_G100, | |
1454 | &vbG100, | |
1455 | "MGA-G100 (AGP)"}, | |
1456 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF, | |
1457 | 0, 0, | |
1458 | DEVF_G200, | |
1459 | 250000, | |
1460 | MGA_G200, | |
1461 | &vbG200, | |
1462 | "MGA-G200 (PCI)"}, | |
1463 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, | |
1464 | PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC, | |
1465 | DEVF_G200, | |
1466 | 220000, | |
1467 | MGA_G200, | |
1468 | &vbG200, | |
1469 | "MGA-G200 (AGP)"}, | |
1470 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, | |
1471 | PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP, | |
1472 | DEVF_G200, | |
1473 | 230000, | |
1474 | MGA_G200, | |
1475 | &vbG200, | |
1476 | "Mystique G200 (AGP)"}, | |
1477 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, | |
1478 | PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP, | |
1479 | DEVF_G200, | |
1480 | 250000, | |
1481 | MGA_G200, | |
1482 | &vbG200, | |
1483 | "Millennium G200 (AGP)"}, | |
1484 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, | |
1485 | PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP, | |
1486 | DEVF_G200, | |
1487 | 230000, | |
1488 | MGA_G200, | |
1489 | &vbG200, | |
1490 | "Marvel G200 (AGP)"}, | |
1491 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, | |
1492 | PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP, | |
1493 | DEVF_G200, | |
1494 | 230000, | |
1495 | MGA_G200, | |
1496 | &vbG200, | |
1497 | "MGA-G200 (AGP)"}, | |
1498 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, | |
1499 | 0, 0, | |
1500 | DEVF_G200, | |
1501 | 230000, | |
1502 | MGA_G200, | |
1503 | &vbG200, | |
1504 | "G200 (AGP)"}, | |
1505 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, | |
1506 | PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP, | |
1507 | DEVF_G400, | |
1508 | 360000, | |
1509 | MGA_G400, | |
1510 | &vbG400, | |
1511 | "Millennium G400 MAX (AGP)"}, | |
1512 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, | |
1513 | 0, 0, | |
1514 | DEVF_G400, | |
1515 | 300000, | |
1516 | MGA_G400, | |
1517 | &vbG400, | |
1518 | "G400 (AGP)"}, | |
1519 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF, | |
1520 | 0, 0, | |
1521 | DEVF_G450, | |
1522 | 360000, | |
1523 | MGA_G450, | |
1524 | &vbG400, | |
1525 | "G450"}, | |
1526 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF, | |
1527 | 0, 0, | |
1528 | DEVF_G550, | |
1529 | 360000, | |
1530 | MGA_G550, | |
1531 | &vbG400, | |
1532 | "G550"}, | |
1533 | #endif | |
1534 | {0, 0, 0xFF, | |
1535 | 0, 0, | |
1536 | 0, | |
1537 | 0, | |
1538 | 0, | |
1539 | NULL, | |
1540 | NULL}}; | |
1541 | ||
1542 | #ifndef MODULE | |
1543 | static struct fb_videomode defaultmode = { | |
1544 | /* 640x480 @ 60Hz, 31.5 kHz */ | |
1545 | NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, | |
1546 | 0, FB_VMODE_NONINTERLACED | |
1547 | }; | |
1548 | #endif /* !MODULE */ | |
1549 | ||
1550 | static int hotplug = 0; | |
1551 | ||
1552 | static void setDefaultOutputs(WPMINFO2) { | |
1553 | unsigned int i; | |
1554 | const char* ptr; | |
1555 | ||
1556 | ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1; | |
1557 | if (ACCESS_FBINFO(devflags.g450dac)) { | |
1558 | ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1; | |
1559 | ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1; | |
1560 | } else if (dfp) { | |
1561 | ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1; | |
1562 | } | |
1563 | ptr = outputs; | |
1564 | for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { | |
1565 | char c = *ptr++; | |
1566 | ||
1567 | if (c == 0) { | |
1568 | break; | |
1569 | } | |
1570 | if (c == '0') { | |
1571 | ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE; | |
1572 | } else if (c == '1') { | |
1573 | ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1; | |
1574 | } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) { | |
1575 | ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2; | |
1576 | } else { | |
1577 | printk(KERN_ERR "matroxfb: Unknown outputs setting\n"); | |
1578 | break; | |
1579 | } | |
1580 | } | |
1581 | /* Nullify this option for subsequent adapters */ | |
1582 | outputs[0] = 0; | |
1583 | } | |
1584 | ||
1585 | static int initMatrox2(WPMINFO struct board* b){ | |
1586 | unsigned long ctrlptr_phys = 0; | |
1587 | unsigned long video_base_phys = 0; | |
1588 | unsigned int memsize; | |
1589 | int err; | |
1590 | ||
1591 | static struct pci_device_id intel_82437[] = { | |
1592 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) }, | |
1593 | { }, | |
1594 | }; | |
1595 | ||
1596 | DBG(__FUNCTION__) | |
1597 | ||
1598 | /* set default values... */ | |
1599 | vesafb_defined.accel_flags = FB_ACCELF_TEXT; | |
1600 | ||
1601 | ACCESS_FBINFO(hw_switch) = b->base->lowlevel; | |
1602 | ACCESS_FBINFO(devflags.accelerator) = b->base->accelID; | |
1603 | ACCESS_FBINFO(max_pixel_clock) = b->maxclk; | |
1604 | ||
1605 | printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name); | |
1606 | ACCESS_FBINFO(capable.plnwt) = 1; | |
1607 | ACCESS_FBINFO(chip) = b->chip; | |
1608 | ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG; | |
1609 | ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT; | |
1610 | if (b->flags & DEVF_TEXT4B) { | |
1611 | ACCESS_FBINFO(devflags.vgastep) = 4; | |
1612 | ACCESS_FBINFO(devflags.textmode) = 4; | |
1613 | ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16; | |
1614 | } else if (b->flags & DEVF_TEXT16B) { | |
1615 | ACCESS_FBINFO(devflags.vgastep) = 16; | |
1616 | ACCESS_FBINFO(devflags.textmode) = 1; | |
1617 | ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16; | |
1618 | } else { | |
1619 | ACCESS_FBINFO(devflags.vgastep) = 8; | |
1620 | ACCESS_FBINFO(devflags.textmode) = 1; | |
1621 | ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8; | |
1622 | } | |
1623 | #ifdef CONFIG_FB_MATROX_32MB | |
1624 | ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0; | |
1625 | #endif | |
1626 | ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES); | |
1627 | ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0; | |
1628 | ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0; | |
1629 | ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0; | |
1630 | ACCESS_FBINFO(devflags.dfp_type) = dfp_type; | |
1631 | ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0; | |
1632 | ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode); | |
1633 | ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode); | |
1634 | setDefaultOutputs(PMINFO2); | |
1635 | if (b->flags & DEVF_PANELLINK_CAPABLE) { | |
1636 | ACCESS_FBINFO(outputs[2]).data = MINFO; | |
1637 | ACCESS_FBINFO(outputs[2]).output = &panellink_output; | |
1638 | ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src; | |
1639 | ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR; | |
1640 | ACCESS_FBINFO(devflags.panellink) = 1; | |
1641 | } | |
1642 | ||
1643 | if (ACCESS_FBINFO(capable.cross4MB) < 0) | |
1644 | ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB; | |
1645 | if (b->flags & DEVF_SWAPS) { | |
1646 | ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1); | |
1647 | video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0); | |
1648 | ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0; | |
1649 | } else { | |
1650 | ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0); | |
1651 | video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1); | |
1652 | ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1; | |
1653 | } | |
1654 | err = -EINVAL; | |
1655 | if (!ctrlptr_phys) { | |
1656 | printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n"); | |
1657 | goto fail; | |
1658 | } | |
1659 | if (!video_base_phys) { | |
1660 | printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n"); | |
1661 | goto fail; | |
1662 | } | |
1663 | memsize = b->base->maxvram; | |
1664 | if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) { | |
1665 | goto fail; | |
1666 | } | |
1667 | if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) { | |
1668 | goto failCtrlMR; | |
1669 | } | |
1670 | ACCESS_FBINFO(video.len_maximum) = memsize; | |
1671 | /* convert mem (autodetect k, M) */ | |
1672 | if (mem < 1024) mem *= 1024; | |
1673 | if (mem < 0x00100000) mem *= 1024; | |
1674 | ||
1675 | if (mem && (mem < memsize)) | |
1676 | memsize = mem; | |
1677 | err = -ENOMEM; | |
1678 | if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) { | |
1679 | printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys); | |
1680 | goto failVideoMR; | |
1681 | } | |
1682 | ACCESS_FBINFO(mmio.base) = ctrlptr_phys; | |
1683 | ACCESS_FBINFO(mmio.len) = 16384; | |
1684 | ACCESS_FBINFO(video.base) = video_base_phys; | |
1685 | if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) { | |
1686 | printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n", | |
1687 | video_base_phys, memsize); | |
1688 | goto failCtrlIO; | |
1689 | } | |
1690 | { | |
1691 | u_int32_t cmd; | |
1692 | u_int32_t mga_option; | |
1693 | ||
1694 | pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option); | |
1695 | pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd); | |
1696 | mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */ | |
1697 | mga_option |= MX_OPTION_BSWAP; | |
1698 | /* disable palette snooping */ | |
1699 | cmd &= ~PCI_COMMAND_VGA_PALETTE; | |
1700 | if (pci_dev_present(intel_82437)) { | |
1701 | if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) { | |
1702 | printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n"); | |
1703 | } | |
1704 | mga_option |= 0x20000000; | |
1705 | ACCESS_FBINFO(devflags.nopciretry) = 1; | |
1706 | } | |
1707 | pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd); | |
1708 | pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option); | |
1709 | ACCESS_FBINFO(hw).MXoptionReg = mga_option; | |
1710 | ||
1711 | /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */ | |
1712 | /* maybe preinit() candidate, but it is same... for all devices... at this time... */ | |
1713 | pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00); | |
1714 | } | |
1715 | ||
1716 | err = -ENXIO; | |
1717 | matroxfb_read_pins(PMINFO2); | |
1718 | if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) { | |
1719 | goto failVideoIO; | |
1720 | } | |
1721 | ||
1722 | err = -ENOMEM; | |
1723 | if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) { | |
1724 | printk(KERN_ERR "matroxfb: cannot determine memory size\n"); | |
1725 | goto failVideoIO; | |
1726 | } | |
1727 | ACCESS_FBINFO(devflags.ydstorg) = 0; | |
1728 | ||
1729 | ACCESS_FBINFO(video.base) = video_base_phys; | |
1730 | ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len); | |
1731 | if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable) | |
1732 | ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable; | |
1733 | #ifdef CONFIG_MTRR | |
1734 | if (mtrr) { | |
1735 | ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1); | |
1736 | ACCESS_FBINFO(mtrr.vram_valid) = 1; | |
1737 | printk(KERN_INFO "matroxfb: MTRR's turned on\n"); | |
1738 | } | |
1739 | #endif /* CONFIG_MTRR */ | |
1740 | ||
1741 | if (!ACCESS_FBINFO(devflags.novga)) | |
1742 | request_region(0x3C0, 32, "matrox"); | |
1743 | matroxfb_g450_connect(PMINFO2); | |
1744 | ACCESS_FBINFO(hw_switch->reset(PMINFO2)); | |
1745 | ||
1746 | ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0; | |
1747 | ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh; | |
1748 | ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0; | |
1749 | ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv; | |
1750 | ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */ | |
1751 | ||
1752 | /* static settings */ | |
1753 | vesafb_defined.red = colors[depth-1].red; | |
1754 | vesafb_defined.green = colors[depth-1].green; | |
1755 | vesafb_defined.blue = colors[depth-1].blue; | |
1756 | vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel; | |
1757 | vesafb_defined.grayscale = grayscale; | |
1758 | vesafb_defined.vmode = 0; | |
1759 | if (noaccel) | |
1760 | vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT; | |
1761 | ||
1762 | ACCESS_FBINFO(fbops) = matroxfb_ops; | |
1763 | ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops); | |
1764 | ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap); | |
1765 | /* after __init time we are like module... no logo */ | |
1766 | ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT; | |
1767 | ACCESS_FBINFO(fbcon.flags) |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */ | |
1768 | FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */ | |
1769 | FBINFO_HWACCEL_FILLRECT | /* And fillrect */ | |
1770 | FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */ | |
1771 | FBINFO_HWACCEL_XPAN | /* And we support both horizontal */ | |
1772 | FBINFO_HWACCEL_YPAN; /* And vertical panning */ | |
1773 | ACCESS_FBINFO(video.len_usable) &= PAGE_MASK; | |
1774 | fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1); | |
1775 | ||
1776 | #ifndef MODULE | |
1777 | /* mode database is marked __init!!! */ | |
1778 | if (!hotplug) { | |
1779 | fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL, | |
1780 | NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel); | |
1781 | } | |
1782 | #endif /* !MODULE */ | |
1783 | ||
1784 | /* mode modifiers */ | |
1785 | if (hslen) | |
1786 | vesafb_defined.hsync_len = hslen; | |
1787 | if (vslen) | |
1788 | vesafb_defined.vsync_len = vslen; | |
1789 | if (left != ~0) | |
1790 | vesafb_defined.left_margin = left; | |
1791 | if (right != ~0) | |
1792 | vesafb_defined.right_margin = right; | |
1793 | if (upper != ~0) | |
1794 | vesafb_defined.upper_margin = upper; | |
1795 | if (lower != ~0) | |
1796 | vesafb_defined.lower_margin = lower; | |
1797 | if (xres) | |
1798 | vesafb_defined.xres = xres; | |
1799 | if (yres) | |
1800 | vesafb_defined.yres = yres; | |
1801 | if (sync != -1) | |
1802 | vesafb_defined.sync = sync; | |
1803 | else if (vesafb_defined.sync == ~0) { | |
1804 | vesafb_defined.sync = 0; | |
1805 | if (yres < 400) | |
1806 | vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT; | |
1807 | else if (yres < 480) | |
1808 | vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT; | |
1809 | } | |
1810 | ||
1811 | /* fv, fh, maxclk limits was specified */ | |
1812 | { | |
1813 | unsigned int tmp; | |
1814 | ||
1815 | if (fv) { | |
1816 | tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres | |
1817 | + vesafb_defined.lower_margin + vesafb_defined.vsync_len); | |
1818 | if ((tmp < fh) || (fh == 0)) fh = tmp; | |
1819 | } | |
1820 | if (fh) { | |
1821 | tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres | |
1822 | + vesafb_defined.right_margin + vesafb_defined.hsync_len); | |
1823 | if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp; | |
1824 | } | |
1825 | tmp = (maxclk + 499) / 500; | |
1826 | if (tmp) { | |
1827 | tmp = (2000000000 + tmp) / tmp; | |
1828 | if (tmp > pixclock) pixclock = tmp; | |
1829 | } | |
1830 | } | |
1831 | if (pixclock) { | |
1832 | if (pixclock < 2000) /* > 500MHz */ | |
1833 | pixclock = 4000; /* 250MHz */ | |
1834 | if (pixclock > 1000000) | |
1835 | pixclock = 1000000; /* 1MHz */ | |
1836 | vesafb_defined.pixclock = pixclock; | |
1837 | } | |
1838 | ||
1839 | /* FIXME: Where to move this?! */ | |
1840 | #if defined(CONFIG_PPC_PMAC) | |
1841 | #ifndef MODULE | |
1842 | if (machine_is(powermac)) { | |
1843 | struct fb_var_screeninfo var; | |
1844 | if (default_vmode <= 0 || default_vmode > VMODE_MAX) | |
1845 | default_vmode = VMODE_640_480_60; | |
1846 | #ifdef CONFIG_NVRAM | |
1847 | if (default_cmode == CMODE_NVRAM) | |
1848 | default_cmode = nvram_read_byte(NV_CMODE); | |
1849 | #endif | |
1850 | if (default_cmode < CMODE_8 || default_cmode > CMODE_32) | |
1851 | default_cmode = CMODE_8; | |
1852 | if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) { | |
1853 | var.accel_flags = vesafb_defined.accel_flags; | |
1854 | var.xoffset = var.yoffset = 0; | |
1855 | /* Note: mac_vmode_to_var() does not set all parameters */ | |
1856 | vesafb_defined = var; | |
1857 | } | |
1858 | } | |
1859 | #endif /* !MODULE */ | |
1860 | #endif /* CONFIG_PPC_PMAC */ | |
1861 | vesafb_defined.xres_virtual = vesafb_defined.xres; | |
1862 | if (nopan) { | |
1863 | vesafb_defined.yres_virtual = vesafb_defined.yres; | |
1864 | } else { | |
1865 | vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough | |
1866 | to yres_virtual * xres_virtual < 2^32 */ | |
1867 | } | |
1868 | matroxfb_init_fix(PMINFO2); | |
1869 | ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)); | |
1870 | matroxfb_update_fix(PMINFO2); | |
1871 | /* Normalize values (namely yres_virtual) */ | |
1872 | matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon)); | |
1873 | /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over | |
1874 | * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var, | |
1875 | * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work | |
1876 | * anyway. But we at least tried... */ | |
1877 | ACCESS_FBINFO(fbcon.var) = vesafb_defined; | |
1878 | err = -EINVAL; | |
1879 | ||
1880 | printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n", | |
1881 | vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel, | |
1882 | vesafb_defined.xres_virtual, vesafb_defined.yres_virtual); | |
1883 | printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n", | |
1884 | ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len)); | |
1885 | ||
1886 | /* We do not have to set currcon to 0... register_framebuffer do it for us on first console | |
1887 | * and we do not want currcon == 0 for subsequent framebuffers */ | |
1888 | ||
1889 | ACCESS_FBINFO(fbcon).device = &ACCESS_FBINFO(pcidev)->dev; | |
1890 | if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) { | |
1891 | goto failVideoIO; | |
1892 | } | |
1893 | printk("fb%d: %s frame buffer device\n", | |
1894 | ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id)); | |
1895 | ||
1896 | /* there is no console on this fb... but we have to initialize hardware | |
1897 | * until someone tells me what is proper thing to do */ | |
1898 | if (!ACCESS_FBINFO(initialized)) { | |
1899 | printk(KERN_INFO "fb%d: initializing hardware\n", | |
1900 | ACCESS_FBINFO(fbcon.node)); | |
1901 | /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var | |
1902 | * already before, so register_framebuffer works correctly. */ | |
1903 | vesafb_defined.activate |= FB_ACTIVATE_FORCE; | |
1904 | fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined); | |
1905 | } | |
1906 | ||
1907 | return 0; | |
1908 | failVideoIO:; | |
1909 | matroxfb_g450_shutdown(PMINFO2); | |
1910 | mga_iounmap(ACCESS_FBINFO(video.vbase)); | |
1911 | failCtrlIO:; | |
1912 | mga_iounmap(ACCESS_FBINFO(mmio.vbase)); | |
1913 | failVideoMR:; | |
1914 | release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum)); | |
1915 | failCtrlMR:; | |
1916 | release_mem_region(ctrlptr_phys, 16384); | |
1917 | fail:; | |
1918 | return err; | |
1919 | } | |
1920 | ||
1921 | static LIST_HEAD(matroxfb_list); | |
1922 | static LIST_HEAD(matroxfb_driver_list); | |
1923 | ||
1924 | #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb) | |
1925 | #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node) | |
1926 | int matroxfb_register_driver(struct matroxfb_driver* drv) { | |
1927 | struct matrox_fb_info* minfo; | |
1928 | ||
1929 | list_add(&drv->node, &matroxfb_driver_list); | |
1930 | for (minfo = matroxfb_l(matroxfb_list.next); | |
1931 | minfo != matroxfb_l(&matroxfb_list); | |
1932 | minfo = matroxfb_l(minfo->next_fb.next)) { | |
1933 | void* p; | |
1934 | ||
1935 | if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS) | |
1936 | continue; | |
1937 | p = drv->probe(minfo); | |
1938 | if (p) { | |
1939 | minfo->drivers_data[minfo->drivers_count] = p; | |
1940 | minfo->drivers[minfo->drivers_count++] = drv; | |
1941 | } | |
1942 | } | |
1943 | return 0; | |
1944 | } | |
1945 | ||
1946 | void matroxfb_unregister_driver(struct matroxfb_driver* drv) { | |
1947 | struct matrox_fb_info* minfo; | |
1948 | ||
1949 | list_del(&drv->node); | |
1950 | for (minfo = matroxfb_l(matroxfb_list.next); | |
1951 | minfo != matroxfb_l(&matroxfb_list); | |
1952 | minfo = matroxfb_l(minfo->next_fb.next)) { | |
1953 | int i; | |
1954 | ||
1955 | for (i = 0; i < minfo->drivers_count; ) { | |
1956 | if (minfo->drivers[i] == drv) { | |
1957 | if (drv && drv->remove) | |
1958 | drv->remove(minfo, minfo->drivers_data[i]); | |
1959 | minfo->drivers[i] = minfo->drivers[--minfo->drivers_count]; | |
1960 | minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count]; | |
1961 | } else | |
1962 | i++; | |
1963 | } | |
1964 | } | |
1965 | } | |
1966 | ||
1967 | static void matroxfb_register_device(struct matrox_fb_info* minfo) { | |
1968 | struct matroxfb_driver* drv; | |
1969 | int i = 0; | |
1970 | list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list); | |
1971 | for (drv = matroxfb_driver_l(matroxfb_driver_list.next); | |
1972 | drv != matroxfb_driver_l(&matroxfb_driver_list); | |
1973 | drv = matroxfb_driver_l(drv->node.next)) { | |
1974 | if (drv && drv->probe) { | |
1975 | void *p = drv->probe(minfo); | |
1976 | if (p) { | |
1977 | minfo->drivers_data[i] = p; | |
1978 | minfo->drivers[i++] = drv; | |
1979 | if (i == MATROXFB_MAX_FB_DRIVERS) | |
1980 | break; | |
1981 | } | |
1982 | } | |
1983 | } | |
1984 | minfo->drivers_count = i; | |
1985 | } | |
1986 | ||
1987 | static void matroxfb_unregister_device(struct matrox_fb_info* minfo) { | |
1988 | int i; | |
1989 | ||
1990 | list_del(&ACCESS_FBINFO(next_fb)); | |
1991 | for (i = 0; i < minfo->drivers_count; i++) { | |
1992 | struct matroxfb_driver* drv = minfo->drivers[i]; | |
1993 | ||
1994 | if (drv && drv->remove) | |
1995 | drv->remove(minfo, minfo->drivers_data[i]); | |
1996 | } | |
1997 | } | |
1998 | ||
1999 | static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) { | |
2000 | struct board* b; | |
2001 | u_int16_t svid; | |
2002 | u_int16_t sid; | |
2003 | struct matrox_fb_info* minfo; | |
2004 | int err; | |
2005 | u_int32_t cmd; | |
2006 | #ifndef CONFIG_FB_MATROX_MULTIHEAD | |
2007 | static int registered = 0; | |
2008 | #endif | |
2009 | DBG(__FUNCTION__) | |
2010 | ||
2011 | svid = pdev->subsystem_vendor; | |
2012 | sid = pdev->subsystem_device; | |
2013 | for (b = dev_list; b->vendor; b++) { | |
2014 | if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue; | |
2015 | if (b->svid) | |
2016 | if ((b->svid != svid) || (b->sid != sid)) continue; | |
2017 | break; | |
2018 | } | |
2019 | /* not match... */ | |
2020 | if (!b->vendor) | |
2021 | return -ENODEV; | |
2022 | if (dev > 0) { | |
2023 | /* not requested one... */ | |
2024 | dev--; | |
2025 | return -ENODEV; | |
2026 | } | |
2027 | pci_read_config_dword(pdev, PCI_COMMAND, &cmd); | |
2028 | if (pci_enable_device(pdev)) { | |
2029 | return -1; | |
2030 | } | |
2031 | ||
2032 | #ifdef CONFIG_FB_MATROX_MULTIHEAD | |
2033 | minfo = kmalloc(sizeof(*minfo), GFP_KERNEL); | |
2034 | if (!minfo) | |
2035 | return -1; | |
2036 | #else | |
2037 | if (registered) /* singlehead driver... */ | |
2038 | return -1; | |
2039 | minfo = &matroxfb_global_mxinfo; | |
2040 | #endif | |
2041 | memset(MINFO, 0, sizeof(*MINFO)); | |
2042 | ||
2043 | ACCESS_FBINFO(pcidev) = pdev; | |
2044 | ACCESS_FBINFO(dead) = 0; | |
2045 | ACCESS_FBINFO(usecount) = 0; | |
2046 | ACCESS_FBINFO(userusecount) = 0; | |
2047 | ||
2048 | pci_set_drvdata(pdev, MINFO); | |
2049 | /* DEVFLAGS */ | |
2050 | ACCESS_FBINFO(devflags.memtype) = memtype; | |
2051 | if (memtype != -1) | |
2052 | noinit = 0; | |
2053 | if (cmd & PCI_COMMAND_MEMORY) { | |
2054 | ACCESS_FBINFO(devflags.novga) = novga; | |
2055 | ACCESS_FBINFO(devflags.nobios) = nobios; | |
2056 | ACCESS_FBINFO(devflags.noinit) = noinit; | |
2057 | /* subsequent heads always needs initialization and must not enable BIOS */ | |
2058 | novga = 1; | |
2059 | nobios = 1; | |
2060 | noinit = 0; | |
2061 | } else { | |
2062 | ACCESS_FBINFO(devflags.novga) = 1; | |
2063 | ACCESS_FBINFO(devflags.nobios) = 1; | |
2064 | ACCESS_FBINFO(devflags.noinit) = 0; | |
2065 | } | |
2066 | ||
2067 | ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry; | |
2068 | ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24; | |
2069 | ACCESS_FBINFO(devflags.precise_width) = option_precise_width; | |
2070 | ACCESS_FBINFO(devflags.sgram) = sgram; | |
2071 | ACCESS_FBINFO(capable.cross4MB) = cross4MB; | |
2072 | ||
2073 | spin_lock_init(&ACCESS_FBINFO(lock.DAC)); | |
2074 | spin_lock_init(&ACCESS_FBINFO(lock.accel)); | |
2075 | init_rwsem(&ACCESS_FBINFO(crtc2.lock)); | |
2076 | init_rwsem(&ACCESS_FBINFO(altout.lock)); | |
2077 | ACCESS_FBINFO(irq_flags) = 0; | |
2078 | init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait)); | |
2079 | init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait)); | |
2080 | ACCESS_FBINFO(crtc1.panpos) = -1; | |
2081 | ||
2082 | err = initMatrox2(PMINFO b); | |
2083 | if (!err) { | |
2084 | #ifndef CONFIG_FB_MATROX_MULTIHEAD | |
2085 | registered = 1; | |
2086 | #endif | |
2087 | matroxfb_register_device(MINFO); | |
2088 | return 0; | |
2089 | } | |
2090 | #ifdef CONFIG_FB_MATROX_MULTIHEAD | |
2091 | kfree(minfo); | |
2092 | #endif | |
2093 | return -1; | |
2094 | } | |
2095 | ||
2096 | static void pci_remove_matrox(struct pci_dev* pdev) { | |
2097 | struct matrox_fb_info* minfo; | |
2098 | ||
2099 | minfo = pci_get_drvdata(pdev); | |
2100 | matroxfb_remove(PMINFO 1); | |
2101 | } | |
2102 | ||
2103 | static struct pci_device_id matroxfb_devices[] = { | |
2104 | #ifdef CONFIG_FB_MATROX_MILLENIUM | |
2105 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, | |
2106 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2107 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, | |
2108 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2109 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, | |
2110 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2111 | #endif | |
2112 | #ifdef CONFIG_FB_MATROX_MYSTIQUE | |
2113 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, | |
2114 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2115 | #endif | |
2116 | #ifdef CONFIG_FB_MATROX_G | |
2117 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, | |
2118 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2119 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, | |
2120 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2121 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, | |
2122 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2123 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, | |
2124 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2125 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, | |
2126 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2127 | {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, | |
2128 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
2129 | #endif | |
2130 | {0, 0, | |
2131 | 0, 0, 0, 0, 0} | |
2132 | }; | |
2133 | ||
2134 | MODULE_DEVICE_TABLE(pci, matroxfb_devices); | |
2135 | ||
2136 | ||
2137 | static struct pci_driver matroxfb_driver = { | |
2138 | .name = "matroxfb", | |
2139 | .id_table = matroxfb_devices, | |
2140 | .probe = matroxfb_probe, | |
2141 | .remove = pci_remove_matrox, | |
2142 | }; | |
2143 | ||
2144 | /* **************************** init-time only **************************** */ | |
2145 | ||
2146 | #define RSResolution(X) ((X) & 0x0F) | |
2147 | #define RS640x400 1 | |
2148 | #define RS640x480 2 | |
2149 | #define RS800x600 3 | |
2150 | #define RS1024x768 4 | |
2151 | #define RS1280x1024 5 | |
2152 | #define RS1600x1200 6 | |
2153 | #define RS768x576 7 | |
2154 | #define RS960x720 8 | |
2155 | #define RS1152x864 9 | |
2156 | #define RS1408x1056 10 | |
2157 | #define RS640x350 11 | |
2158 | #define RS1056x344 12 /* 132 x 43 text */ | |
2159 | #define RS1056x400 13 /* 132 x 50 text */ | |
2160 | #define RS1056x480 14 /* 132 x 60 text */ | |
2161 | #define RSNoxNo 15 | |
2162 | /* 10-FF */ | |
2163 | static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = { | |
2164 | { 640, 400, 48, 16, 39, 8, 96, 2, 70 }, | |
2165 | { 640, 480, 48, 16, 33, 10, 96, 2, 60 }, | |
2166 | { 800, 600, 144, 24, 28, 8, 112, 6, 60 }, | |
2167 | { 1024, 768, 160, 32, 30, 4, 128, 4, 60 }, | |
2168 | { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 }, | |
2169 | { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 }, | |
2170 | { 768, 576, 144, 16, 28, 6, 112, 4, 60 }, | |
2171 | { 960, 720, 144, 24, 28, 8, 112, 4, 60 }, | |
2172 | { 1152, 864, 192, 32, 30, 4, 128, 4, 60 }, | |
2173 | { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 }, | |
2174 | { 640, 350, 48, 16, 39, 8, 96, 2, 70 }, | |
2175 | { 1056, 344, 96, 24, 59, 44, 160, 2, 70 }, | |
2176 | { 1056, 400, 96, 24, 39, 8, 160, 2, 70 }, | |
2177 | { 1056, 480, 96, 24, 36, 12, 160, 3, 60 }, | |
2178 | { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 } | |
2179 | }; | |
2180 | ||
2181 | #define RSCreate(X,Y) ((X) | ((Y) << 8)) | |
2182 | static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = { | |
2183 | /* default must be first */ | |
2184 | { ~0, RSCreate(RSNoxNo, RS8bpp ) }, | |
2185 | { 0x101, RSCreate(RS640x480, RS8bpp ) }, | |
2186 | { 0x100, RSCreate(RS640x400, RS8bpp ) }, | |
2187 | { 0x180, RSCreate(RS768x576, RS8bpp ) }, | |
2188 | { 0x103, RSCreate(RS800x600, RS8bpp ) }, | |
2189 | { 0x188, RSCreate(RS960x720, RS8bpp ) }, | |
2190 | { 0x105, RSCreate(RS1024x768, RS8bpp ) }, | |
2191 | { 0x190, RSCreate(RS1152x864, RS8bpp ) }, | |
2192 | { 0x107, RSCreate(RS1280x1024, RS8bpp ) }, | |
2193 | { 0x198, RSCreate(RS1408x1056, RS8bpp ) }, | |
2194 | { 0x11C, RSCreate(RS1600x1200, RS8bpp ) }, | |
2195 | { 0x110, RSCreate(RS640x480, RS15bpp) }, | |
2196 | { 0x181, RSCreate(RS768x576, RS15bpp) }, | |
2197 | { 0x113, RSCreate(RS800x600, RS15bpp) }, | |
2198 | { 0x189, RSCreate(RS960x720, RS15bpp) }, | |
2199 | { 0x116, RSCreate(RS1024x768, RS15bpp) }, | |
2200 | { 0x191, RSCreate(RS1152x864, RS15bpp) }, | |
2201 | { 0x119, RSCreate(RS1280x1024, RS15bpp) }, | |
2202 | { 0x199, RSCreate(RS1408x1056, RS15bpp) }, | |
2203 | { 0x11D, RSCreate(RS1600x1200, RS15bpp) }, | |
2204 | { 0x111, RSCreate(RS640x480, RS16bpp) }, | |
2205 | { 0x182, RSCreate(RS768x576, RS16bpp) }, | |
2206 | { 0x114, RSCreate(RS800x600, RS16bpp) }, | |
2207 | { 0x18A, RSCreate(RS960x720, RS16bpp) }, | |
2208 | { 0x117, RSCreate(RS1024x768, RS16bpp) }, | |
2209 | { 0x192, RSCreate(RS1152x864, RS16bpp) }, | |
2210 | { 0x11A, RSCreate(RS1280x1024, RS16bpp) }, | |
2211 | { 0x19A, RSCreate(RS1408x1056, RS16bpp) }, | |
2212 | { 0x11E, RSCreate(RS1600x1200, RS16bpp) }, | |
2213 | { 0x1B2, RSCreate(RS640x480, RS24bpp) }, | |
2214 | { 0x184, RSCreate(RS768x576, RS24bpp) }, | |
2215 | { 0x1B5, RSCreate(RS800x600, RS24bpp) }, | |
2216 | { 0x18C, RSCreate(RS960x720, RS24bpp) }, | |
2217 | { 0x1B8, RSCreate(RS1024x768, RS24bpp) }, | |
2218 | { 0x194, RSCreate(RS1152x864, RS24bpp) }, | |
2219 | { 0x1BB, RSCreate(RS1280x1024, RS24bpp) }, | |
2220 | { 0x19C, RSCreate(RS1408x1056, RS24bpp) }, | |
2221 | { 0x1BF, RSCreate(RS1600x1200, RS24bpp) }, | |
2222 | { 0x112, RSCreate(RS640x480, RS32bpp) }, | |
2223 | { 0x183, RSCreate(RS768x576, RS32bpp) }, | |
2224 | { 0x115, RSCreate(RS800x600, RS32bpp) }, | |
2225 | { 0x18B, RSCreate(RS960x720, RS32bpp) }, | |
2226 | { 0x118, RSCreate(RS1024x768, RS32bpp) }, | |
2227 | { 0x193, RSCreate(RS1152x864, RS32bpp) }, | |
2228 | { 0x11B, RSCreate(RS1280x1024, RS32bpp) }, | |
2229 | { 0x19B, RSCreate(RS1408x1056, RS32bpp) }, | |
2230 | { 0x11F, RSCreate(RS1600x1200, RS32bpp) }, | |
2231 | { 0x010, RSCreate(RS640x350, RS4bpp ) }, | |
2232 | { 0x012, RSCreate(RS640x480, RS4bpp ) }, | |
2233 | { 0x102, RSCreate(RS800x600, RS4bpp ) }, | |
2234 | { 0x104, RSCreate(RS1024x768, RS4bpp ) }, | |
2235 | { 0x106, RSCreate(RS1280x1024, RS4bpp ) }, | |
2236 | { 0, 0 }}; | |
2237 | ||
2238 | static void __init matroxfb_init_params(void) { | |
2239 | /* fh from kHz to Hz */ | |
2240 | if (fh < 1000) | |
2241 | fh *= 1000; /* 1kHz minimum */ | |
2242 | /* maxclk */ | |
2243 | if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */ | |
2244 | if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */ | |
2245 | /* fix VESA number */ | |
2246 | if (vesa != ~0) | |
2247 | vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */ | |
2248 | ||
2249 | /* static settings */ | |
2250 | for (RSptr = vesamap; RSptr->vesa; RSptr++) { | |
2251 | if (RSptr->vesa == vesa) break; | |
2252 | } | |
2253 | if (!RSptr->vesa) { | |
2254 | printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa); | |
2255 | RSptr = vesamap; | |
2256 | } | |
2257 | { | |
2258 | int res = RSResolution(RSptr->info)-1; | |
2259 | if (left == ~0) | |
2260 | left = timmings[res].left; | |
2261 | if (!xres) | |
2262 | xres = timmings[res].xres; | |
2263 | if (right == ~0) | |
2264 | right = timmings[res].right; | |
2265 | if (!hslen) | |
2266 | hslen = timmings[res].hslen; | |
2267 | if (upper == ~0) | |
2268 | upper = timmings[res].upper; | |
2269 | if (!yres) | |
2270 | yres = timmings[res].yres; | |
2271 | if (lower == ~0) | |
2272 | lower = timmings[res].lower; | |
2273 | if (!vslen) | |
2274 | vslen = timmings[res].vslen; | |
2275 | if (!(fv||fh||maxclk||pixclock)) | |
2276 | fv = timmings[res].vfreq; | |
2277 | if (depth == -1) | |
2278 | depth = RSDepth(RSptr->info); | |
2279 | } | |
2280 | } | |
2281 | ||
2282 | static int __init matrox_init(void) { | |
2283 | int err; | |
2284 | ||
2285 | matroxfb_init_params(); | |
2286 | err = pci_register_driver(&matroxfb_driver); | |
2287 | dev = -1; /* accept all new devices... */ | |
2288 | return err; | |
2289 | } | |
2290 | ||
2291 | /* **************************** exit-time only **************************** */ | |
2292 | ||
2293 | static void __exit matrox_done(void) { | |
2294 | pci_unregister_driver(&matroxfb_driver); | |
2295 | } | |
2296 | ||
2297 | #ifndef MODULE | |
2298 | ||
2299 | /* ************************* init in-kernel code ************************** */ | |
2300 | ||
2301 | static int __init matroxfb_setup(char *options) { | |
2302 | char *this_opt; | |
2303 | ||
2304 | DBG(__FUNCTION__) | |
2305 | ||
2306 | if (!options || !*options) | |
2307 | return 0; | |
2308 | ||
2309 | while ((this_opt = strsep(&options, ",")) != NULL) { | |
2310 | if (!*this_opt) continue; | |
2311 | ||
2312 | dprintk("matroxfb_setup: option %s\n", this_opt); | |
2313 | ||
2314 | if (!strncmp(this_opt, "dev:", 4)) | |
2315 | dev = simple_strtoul(this_opt+4, NULL, 0); | |
2316 | else if (!strncmp(this_opt, "depth:", 6)) { | |
2317 | switch (simple_strtoul(this_opt+6, NULL, 0)) { | |
2318 | case 0: depth = RSText; break; | |
2319 | case 4: depth = RS4bpp; break; | |
2320 | case 8: depth = RS8bpp; break; | |
2321 | case 15:depth = RS15bpp; break; | |
2322 | case 16:depth = RS16bpp; break; | |
2323 | case 24:depth = RS24bpp; break; | |
2324 | case 32:depth = RS32bpp; break; | |
2325 | default: | |
2326 | printk(KERN_ERR "matroxfb: unsupported color depth\n"); | |
2327 | } | |
2328 | } else if (!strncmp(this_opt, "xres:", 5)) | |
2329 | xres = simple_strtoul(this_opt+5, NULL, 0); | |
2330 | else if (!strncmp(this_opt, "yres:", 5)) | |
2331 | yres = simple_strtoul(this_opt+5, NULL, 0); | |
2332 | else if (!strncmp(this_opt, "vslen:", 6)) | |
2333 | vslen = simple_strtoul(this_opt+6, NULL, 0); | |
2334 | else if (!strncmp(this_opt, "hslen:", 6)) | |
2335 | hslen = simple_strtoul(this_opt+6, NULL, 0); | |
2336 | else if (!strncmp(this_opt, "left:", 5)) | |
2337 | left = simple_strtoul(this_opt+5, NULL, 0); | |
2338 | else if (!strncmp(this_opt, "right:", 6)) | |
2339 | right = simple_strtoul(this_opt+6, NULL, 0); | |
2340 | else if (!strncmp(this_opt, "upper:", 6)) | |
2341 | upper = simple_strtoul(this_opt+6, NULL, 0); | |
2342 | else if (!strncmp(this_opt, "lower:", 6)) | |
2343 | lower = simple_strtoul(this_opt+6, NULL, 0); | |
2344 | else if (!strncmp(this_opt, "pixclock:", 9)) | |
2345 | pixclock = simple_strtoul(this_opt+9, NULL, 0); | |
2346 | else if (!strncmp(this_opt, "sync:", 5)) | |
2347 | sync = simple_strtoul(this_opt+5, NULL, 0); | |
2348 | else if (!strncmp(this_opt, "vesa:", 5)) | |
2349 | vesa = simple_strtoul(this_opt+5, NULL, 0); | |
2350 | else if (!strncmp(this_opt, "maxclk:", 7)) | |
2351 | maxclk = simple_strtoul(this_opt+7, NULL, 0); | |
2352 | else if (!strncmp(this_opt, "fh:", 3)) | |
2353 | fh = simple_strtoul(this_opt+3, NULL, 0); | |
2354 | else if (!strncmp(this_opt, "fv:", 3)) | |
2355 | fv = simple_strtoul(this_opt+3, NULL, 0); | |
2356 | else if (!strncmp(this_opt, "mem:", 4)) | |
2357 | mem = simple_strtoul(this_opt+4, NULL, 0); | |
2358 | else if (!strncmp(this_opt, "mode:", 5)) | |
2359 | strlcpy(videomode, this_opt+5, sizeof(videomode)); | |
2360 | else if (!strncmp(this_opt, "outputs:", 8)) | |
2361 | strlcpy(outputs, this_opt+8, sizeof(outputs)); | |
2362 | else if (!strncmp(this_opt, "dfp:", 4)) { | |
2363 | dfp_type = simple_strtoul(this_opt+4, NULL, 0); | |
2364 | dfp = 1; | |
2365 | } | |
2366 | #ifdef CONFIG_PPC_PMAC | |
2367 | else if (!strncmp(this_opt, "vmode:", 6)) { | |
2368 | unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0); | |
2369 | if (vmode > 0 && vmode <= VMODE_MAX) | |
2370 | default_vmode = vmode; | |
2371 | } else if (!strncmp(this_opt, "cmode:", 6)) { | |
2372 | unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0); | |
2373 | switch (cmode) { | |
2374 | case 0: | |
2375 | case 8: | |
2376 | default_cmode = CMODE_8; | |
2377 | break; | |
2378 | case 15: | |
2379 | case 16: | |
2380 | default_cmode = CMODE_16; | |
2381 | break; | |
2382 | case 24: | |
2383 | case 32: | |
2384 | default_cmode = CMODE_32; | |
2385 | break; | |
2386 | } | |
2387 | } | |
2388 | #endif | |
2389 | else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */ | |
2390 | disabled = 1; | |
2391 | else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */ | |
2392 | disabled = 0; | |
2393 | else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */ | |
2394 | sgram = 1; | |
2395 | else if (!strcmp(this_opt, "sdram")) | |
2396 | sgram = 0; | |
2397 | else if (!strncmp(this_opt, "memtype:", 8)) | |
2398 | memtype = simple_strtoul(this_opt+8, NULL, 0); | |
2399 | else { | |
2400 | int value = 1; | |
2401 | ||
2402 | if (!strncmp(this_opt, "no", 2)) { | |
2403 | value = 0; | |
2404 | this_opt += 2; | |
2405 | } | |
2406 | if (! strcmp(this_opt, "inverse")) | |
2407 | inverse = value; | |
2408 | else if (!strcmp(this_opt, "accel")) | |
2409 | noaccel = !value; | |
2410 | else if (!strcmp(this_opt, "pan")) | |
2411 | nopan = !value; | |
2412 | else if (!strcmp(this_opt, "pciretry")) | |
2413 | no_pci_retry = !value; | |
2414 | else if (!strcmp(this_opt, "vga")) | |
2415 | novga = !value; | |
2416 | else if (!strcmp(this_opt, "bios")) | |
2417 | nobios = !value; | |
2418 | else if (!strcmp(this_opt, "init")) | |
2419 | noinit = !value; | |
2420 | #ifdef CONFIG_MTRR | |
2421 | else if (!strcmp(this_opt, "mtrr")) | |
2422 | mtrr = value; | |
2423 | #endif | |
2424 | else if (!strcmp(this_opt, "inv24")) | |
2425 | inv24 = value; | |
2426 | else if (!strcmp(this_opt, "cross4MB")) | |
2427 | cross4MB = value; | |
2428 | else if (!strcmp(this_opt, "grayscale")) | |
2429 | grayscale = value; | |
2430 | else if (!strcmp(this_opt, "dfp")) | |
2431 | dfp = value; | |
2432 | else { | |
2433 | strlcpy(videomode, this_opt, sizeof(videomode)); | |
2434 | } | |
2435 | } | |
2436 | } | |
2437 | return 0; | |
2438 | } | |
2439 | ||
2440 | static int __initdata initialized = 0; | |
2441 | ||
2442 | static int __init matroxfb_init(void) | |
2443 | { | |
2444 | char *option = NULL; | |
2445 | int err = 0; | |
2446 | ||
2447 | DBG(__FUNCTION__) | |
2448 | ||
2449 | if (fb_get_options("matroxfb", &option)) | |
2450 | return -ENODEV; | |
2451 | matroxfb_setup(option); | |
2452 | ||
2453 | if (disabled) | |
2454 | return -ENXIO; | |
2455 | if (!initialized) { | |
2456 | initialized = 1; | |
2457 | err = matrox_init(); | |
2458 | } | |
2459 | hotplug = 1; | |
2460 | /* never return failure, user can hotplug matrox later... */ | |
2461 | return err; | |
2462 | } | |
2463 | ||
2464 | module_init(matroxfb_init); | |
2465 | ||
2466 | #else | |
2467 | ||
2468 | /* *************************** init module code **************************** */ | |
2469 | ||
2470 | MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>"); | |
2471 | MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550"); | |
2472 | MODULE_LICENSE("GPL"); | |
2473 | ||
2474 | module_param(mem, int, 0); | |
2475 | MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)"); | |
2476 | module_param(disabled, int, 0); | |
2477 | MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)"); | |
2478 | module_param(noaccel, int, 0); | |
2479 | MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)"); | |
2480 | module_param(nopan, int, 0); | |
2481 | MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)"); | |
2482 | module_param(no_pci_retry, int, 0); | |
2483 | MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)"); | |
2484 | module_param(novga, int, 0); | |
2485 | MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)"); | |
2486 | module_param(nobios, int, 0); | |
2487 | MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)"); | |
2488 | module_param(noinit, int, 0); | |
2489 | MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)"); | |
2490 | module_param(memtype, int, 0); | |
2491 | MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)"); | |
2492 | #ifdef CONFIG_MTRR | |
2493 | module_param(mtrr, int, 0); | |
2494 | MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)"); | |
2495 | #endif | |
2496 | module_param(sgram, int, 0); | |
2497 | MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)"); | |
2498 | module_param(inv24, int, 0); | |
2499 | MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)"); | |
2500 | module_param(inverse, int, 0); | |
2501 | MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)"); | |
2502 | #ifdef CONFIG_FB_MATROX_MULTIHEAD | |
2503 | module_param(dev, int, 0); | |
2504 | MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)"); | |
2505 | #else | |
2506 | module_param(dev, int, 0); | |
2507 | MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)"); | |
2508 | #endif | |
2509 | module_param(vesa, int, 0); | |
2510 | MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)"); | |
2511 | module_param(xres, int, 0); | |
2512 | MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)"); | |
2513 | module_param(yres, int, 0); | |
2514 | MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)"); | |
2515 | module_param(upper, int, 0); | |
2516 | MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)"); | |
2517 | module_param(lower, int, 0); | |
2518 | MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)"); | |
2519 | module_param(vslen, int, 0); | |
2520 | MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)"); | |
2521 | module_param(left, int, 0); | |
2522 | MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)"); | |
2523 | module_param(right, int, 0); | |
2524 | MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)"); | |
2525 | module_param(hslen, int, 0); | |
2526 | MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)"); | |
2527 | module_param(pixclock, int, 0); | |
2528 | MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)"); | |
2529 | module_param(sync, int, 0); | |
2530 | MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)"); | |
2531 | module_param(depth, int, 0); | |
2532 | MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)"); | |
2533 | module_param(maxclk, int, 0); | |
2534 | MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz"); | |
2535 | module_param(fh, int, 0); | |
2536 | MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz"); | |
2537 | module_param(fv, int, 0); | |
2538 | MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n" | |
2539 | "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n"); | |
2540 | module_param(grayscale, int, 0); | |
2541 | MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)"); | |
2542 | module_param(cross4MB, int, 0); | |
2543 | MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)"); | |
2544 | module_param(dfp, int, 0); | |
2545 | MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)"); | |
2546 | module_param(dfp_type, int, 0); | |
2547 | MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)"); | |
2548 | module_param_string(outputs, outputs, sizeof(outputs), 0); | |
2549 | MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)"); | |
2550 | #ifdef CONFIG_PPC_PMAC | |
2551 | module_param_named(vmode, default_vmode, int, 0); | |
2552 | MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)"); | |
2553 | module_param_named(cmode, default_cmode, int, 0); | |
2554 | MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)"); | |
2555 | #endif | |
2556 | ||
2557 | int __init init_module(void){ | |
2558 | ||
2559 | DBG(__FUNCTION__) | |
2560 | ||
2561 | if (disabled) | |
2562 | return -ENXIO; | |
2563 | ||
2564 | if (depth == 0) | |
2565 | depth = RSText; | |
2566 | else if (depth == 4) | |
2567 | depth = RS4bpp; | |
2568 | else if (depth == 8) | |
2569 | depth = RS8bpp; | |
2570 | else if (depth == 15) | |
2571 | depth = RS15bpp; | |
2572 | else if (depth == 16) | |
2573 | depth = RS16bpp; | |
2574 | else if (depth == 24) | |
2575 | depth = RS24bpp; | |
2576 | else if (depth == 32) | |
2577 | depth = RS32bpp; | |
2578 | else if (depth != -1) { | |
2579 | printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth); | |
2580 | depth = -1; | |
2581 | } | |
2582 | matrox_init(); | |
2583 | /* never return failure; user can hotplug matrox later... */ | |
2584 | return 0; | |
2585 | } | |
2586 | #endif /* MODULE */ | |
2587 | ||
2588 | module_exit(matrox_done); | |
2589 | EXPORT_SYMBOL(matroxfb_register_driver); | |
2590 | EXPORT_SYMBOL(matroxfb_unregister_driver); | |
2591 | EXPORT_SYMBOL(matroxfb_wait_for_sync); | |
2592 | EXPORT_SYMBOL(matroxfb_enable_irq); | |
2593 | ||
2594 | /* | |
2595 | * Overrides for Emacs so that we follow Linus's tabbing style. | |
2596 | * --------------------------------------------------------------------------- | |
2597 | * Local variables: | |
2598 | * c-basic-offset: 8 | |
2599 | * End: | |
2600 | */ | |
2601 |